Substrate and display device including the substrate

Abstract

A substrate and a display device including the substrate are disclosed. The display device includes a substrate, a first wiring, a second wiring, a first conductor, and a second conductor, the substrate having a first surface, a second surface opposite to the first surface, and an inner surface defining a through hole; the first wiring and the second wiring are arranged on the first surface; and the first conductor and the second conductor are arranged in one of the through holes. The first conductor is connected to the first wiring, the second conductor is connected to the second wiring, and the first conductor and the second conductor are insulated from each other.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to and the benefit of Korean Patent Application No. 10-2018-0142903 filed in the Korean Intellectual Property Office (KIPO) on November 19, 2018, the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0003] Embodiments relate to a substrate and a display device including the substrate. Background Art

[0004] Display devices such as liquid crystal display (LCD) devices, plasma display devices (PDP), organic light emitting diode (OLED) display devices, field emission display (FED) devices, and electrophoretic display devices are currently being utilized.

[0005] For example, an OLED display device includes two electrodes and an organic light-emitting layer disposed between the two electrodes. Electrons injected from one electrode and holes injected from the other electrode combine in the organic light-emitting layer to form excitons, and the excitons can emit light by emitting energy (for example, when transitioning from an excited state to a ground state).

[0006] OLED display devices have self-luminous properties and do not require a separate light source, unlike LCD devices. Accordingly, the thickness and weight of the display device can be reduced. In addition, OLED display devices have attracted much attention as next-generation display devices due to their high-quality properties such as low power consumption, high brightness, and / or fast response speed.

[0007] In order to drive the OLED in the OLED display device, a printed circuit board (PCB) is coupled to a peripheral area of ​​the substrate, and a signal required for driving (eg, driving the OLED) is received through the PCB.

[0008] A structure in which a portion of a PCB attached to a substrate is bent is widely (e.g., usually) utilized. In this case, cracks may occur (e.g., cracks may be generated) on a metal wiring located on the bent PCB. In addition, a frame of the display device may increase due to the bent PCB.

[0009] In order to reduce a dead area of ​​the display panel, connection wirings extending from the display area may be connected to a PCB disposed on a rear surface of the display panel through vias defined (eg, located) at the peripheral area.

[0010] However, the diameter or width of the through hole and the distance between the through holes may be greater than the line width of the connecting wiring and the spacing distance between the connecting wiring. Accordingly, the density of the connecting wiring (i.e., the number of connecting wirings that can be arranged separately from each other within a set or predetermined distance) may be limited by the number of through holes.

[0011] It should be understood that the present background of the technology section is intended to provide a background useful for understanding the technology, and as disclosed herein, the technical background section may include ideas, concepts or cognitions that were not known or understood by a person skilled in the relevant art before the corresponding effective filing date of the subject matter disclosed herein. Summary of the invention

[0012] An aspect of an embodiment according to the present disclosure may relate to a display device capable of increasing the density of connection wirings.

[0013] According to an embodiment, a display device includes a substrate, a first wiring, a second wiring, a first conductor, and a second conductor, the substrate having a first surface, a second surface opposite to the first surface, and an inner surface defining a plurality of through holes; the first wiring and the second wiring are both located on the first surface; and the first conductor and the second conductor are both located in one of the plurality of through holes. The first conductor is connected to the first wiring, the second conductor is connected to the second wiring, and the first conductor and the second conductor are insulated from each other.

[0014] The substrate may include a display area and a peripheral area, the display area includes a plurality of pixels, and the peripheral area is located around the display area and has no pixels, the through hole may be located at the peripheral area, and the first wiring and the second wiring may be connected to the plurality of pixels.

[0015] The display device may further include a printed circuit board on the second surface, and the first conductor and the second conductor may be connected to the printed circuit board.

[0016] The display device may further include a third wiring and a fourth wiring both located on the second surface. The first conductor may be connected to the third wiring, and the second conductor may be connected to the fourth wiring.

[0017] The display device may further include an insulator located in the through hole in a plan view and partitioning the through hole.

[0018] The insulator may have upper and lower surfaces each parallel to the first surface of the substrate, first and second side surfaces contacting the inner side surface of the substrate, and third and fourth side surfaces facing the inner side surface of the substrate.

[0019] A distance between an upper surface and a lower surface of the insulator may be substantially equal to a distance between a first surface and a second surface of the substrate.

[0020] A distance between an upper surface and a lower surface of the insulator may be greater than a distance between a first surface and a second surface of the substrate.

[0021] The through hole may have a first connection hole defined by the third side surface of the insulator and the inner side surface of the substrate and a second connection hole defined by the fourth side surface of the insulator and the inner side surface of the substrate. The first conductor may be located in the first connection hole, and the second conductor may be located in the second connection hole.

[0022] The display device may further include an insulating layer on a third side surface of the insulator, a fourth side surface of the insulator, and an inner side surface of the substrate. The through hole may have a third connection hole defined by the third side surface of the insulator and the insulating layer on the inner side surface of the substrate, and a fourth connection hole defined by the fourth side surface of the insulator and the insulating layer on the inner side surface of the substrate. The first conductor may be located in the third connection hole, and the second conductor may be located in the fourth connection hole.

[0023] The insulator may include a first portion extending from the center of the via in a first direction in a plan view and contacting the inner surface of the substrate, and a second portion extending from the center of the via in a second direction different from the first direction in a plan view and contacting the inner surface of the substrate.

[0024] The first direction and the second direction may be opposite to each other.

[0025] The insulator may further include a third portion extending from a center of the through hole in a third direction different from the first direction and the second direction in a plan view and contacting an inner side surface of the substrate.

[0026] The insulator may further include a fourth portion extending from a center of the through hole in a fourth direction different from the first direction, the second direction, and the third direction in a plan view and contacting an inner side surface of the substrate.

[0027] In a plan view, the inner side surface of the substrate may have an elliptical shape, and the first direction and the second direction may be parallel to a main axis direction of the ellipse.

[0028] In a plan view, the inner side surface of the substrate may have a circular shape.

[0029] The side surface of the insulator in contact with the inner side surface of the substrate may include a protrusion protruding toward the substrate in a plan view.

[0030] In a cross-sectional view, the inner side surface of the substrate may be perpendicular to the first surface and the second surface.

[0031] In the cross-sectional view, the inner side surface of the substrate may be inclined with respect to the first surface and the second surface.

[0032] In a cross-sectional view, an inner side surface of the substrate around the through hole may have a convex shape.

[0033] According to another embodiment, a substrate having a first surface, a second surface opposite to the first surface, and an inner side surface defining a plurality of through holes includes a first wiring, a second wiring, a third wiring, a fourth wiring, an insulator, a first conductor, and a second conductor, the first wiring and the second wiring are both located on the first surface; and the third wiring and the fourth wiring are both located on the second surface; in a plan view, the insulator is located in the through hole and divides the through hole; and the first conductor and the second conductor are both located in one of the plurality of through holes and insulated from each other by the insulator. The first conductor connects the first wiring and the third wiring, and the second conductor connects the second wiring and the fourth wiring.

[0034] The substrate may be a printed circuit board.

[0035] The substrate may be a substrate of a display panel.

[0036] The foregoing is illustrative only and is not intended to be limiting in any way. In addition to the illustrative aspects, embodiments, and features described above, additional aspects, embodiments, and features will become apparent by reference to the drawings and the following detailed description. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] A more complete understanding of the present invention will become more apparent by describing embodiments of the present invention in more detail with reference to the accompanying drawings, in which:

[0038] Figure 1 is a schematic exploded perspective view showing a display device according to an embodiment;

[0039] Figure 2A and Figure 2B is a schematic side view showing a display device according to an embodiment;

[0040] Figure 3 It is shown Figure 1 A schematic diagram of a display area;

[0041] Figure 4 is along Figure 3 A cross-sectional view taken along line A-A';

[0042] Figure 5A is a schematic plan view showing a display device according to an embodiment;

[0043] Figure 5B is a schematic diagram showing a substrate having a plurality of through holes defined thereon;

[0044] Figure 5C is a bottom view showing a display device according to an embodiment;

[0045] Fig. 6A is a perspective view showing a through hole and an insulator of a substrate according to an embodiment;

[0046] Figure 6B yes Fig. 6A Floor plan of

[0047] Figure 6C is along Fig. 6A A cross-sectional view taken along line II';

[0048] Fig.6D is along Fig. 6A A cross-sectional view taken along line II-II';

[0049] Fig. 7A is a perspective view showing a through hole and an insulator of a substrate according to a modified embodiment;

[0050] Figure 7B yes Fig. 7A Floor plan of

[0051] Figure 7C is along Fig. 7A A cross-sectional view taken along line II';

[0052] Fig.7D is along Fig. 7A A cross-sectional view taken along line II-II';

[0053] Fig. 8A and Figure 8B is a plan view showing a through hole and an insulator of a substrate according to a modified embodiment;

[0054] Fig.9A is a perspective view showing a through hole and an insulator of a substrate according to a modified embodiment;

[0055] Fig. 9B yes Fig.9A Floor plan of

[0056] Fig.10 is a plan view showing a through hole and an insulator of a substrate according to a modified embodiment;

[0057] Fig.11A is a perspective view showing a through hole and an insulator of a substrate according to a modified embodiment;

[0058] Fig. 11B yes Fig.11A Floor plan of

[0059] Fig. 11C is along Fig.11A A cross-sectional view taken along line II';

[0060] Fig.11D is along Fig.11A A cross-sectional view taken along line II-II';

[0061] Fig. 12A is a perspective view showing a through hole and an insulator of a substrate according to a modified embodiment;

[0062] Fig. 12B yes Fig. 12A Floor plan of

[0063] Fig. 12C is along Fig. 12A A cross-sectional view taken along line II';

[0064] Fig.12D is along Fig. 12A A cross-sectional view taken along line II-II';

[0065] Fig.13 is a perspective view showing an insulator of a substrate according to an embodiment;

[0066] Fig.14A is a perspective view showing a through hole and an insulator of a substrate according to a modified embodiment;

[0067] Fig. 14B yes Fig.14A Floor plan of

[0068] Fig. 14C is along Fig.14A A cross-sectional view taken along line II';

[0069] Fig.14D is along Fig.14A A cross-sectional view taken along line II-II';

[0070] FIG. 15A to FIG. 15F is a cross-sectional view showing a method for manufacturing a substrate according to an embodiment;

[0071] Figure 15G is with Fig.15F The corresponding floor plan;

[0072] Fig.16A is a cross-sectional view showing a method for manufacturing a substrate according to an embodiment;

[0073] Fig. 16B and Fig. 16C are a cross-sectional view and a plan view respectively showing a substrate manufactured according to the method; and

[0074] Fig.17 and Fig.18 2 are cross-sectional views respectively showing a first pad portion and a second pad portion of a display device according to an embodiment. DETAILED DESCRIPTION

[0075] Embodiments will now be described more fully below with reference to the accompanying drawings. Although the present invention can be modified in various suitable ways and has several embodiments, example embodiments are shown in the drawings and embodiments will be primarily described in the specification. However, the scope of the present invention is not limited to the embodiments, and should be interpreted as including all changes, equivalents and substitutions included in the spirit and scope of the present invention.

[0076] In the accompanying drawings, in order to clearly and conveniently describe multiple layers and regions, the thickness of multiple layers and regions is shown in an enlarged manner. When a layer, region or plate is referred to as "on" another layer, region or plate, the layer, region or plate may be directly on another layer, region or plate, or there may be an intermediate layer, region or plate between them. On the contrary, when a layer, region or plate is referred to as "directly on" another layer, region or plate "on", there should not be one or more intermediate layers, regions or plates between them. In addition, when a layer, region or plate is referred to as "below" another layer, region or plate, the layer, region or plate may be directly below another layer, region or plate, or there may be an intermediate layer, region or plate between them. On the contrary, when a layer, region or plate is referred to as "directly on" another layer, region or plate "below", there should not be one or more intermediate layers, regions or plates between them.

[0077] Spatially relative terms "below", "beneath", "lower", "above", "upper", etc. may be used herein to facilitate description of the relationship between one element or component and another element or component, as shown in the accompanying drawings. It should be understood that the spatially relative terms are intended to cover different orientations of the device in use or operation in addition to the orientation shown in the accompanying drawings. For example, where the device shown in the accompanying drawings is turned over, a device positioned "below" or "beneath" another device may be placed "above" another device. Accordingly, the illustrative term "below" may include both a lower position and an upper position. The device may also be oriented in other directions, and accordingly, the spatially relative terms may be interpreted differently depending on the orientation.

[0078] Throughout the specification, when an element is referred to as being “connected” to another element, the element may be “directly connected” to the other element, or “electrically connected” to the other element through one or more intermediate elements interposed therebetween. It should be understood that when the terms “comprise”, “comprising”, “include” and / or “including” are used in this specification, they indicate the presence of stated features, integers, steps, operations, elements, components and / or clusters thereof, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or clusters thereof.

[0079] It should be understood that although the terms "first", "second", "third", etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another element. Accordingly, the "first element" discussed below may be referred to as the "second element" or the "third element", and the "second element" and the "third element" may be referred to similarly without departing from the teachings herein.

[0080] As used herein, the terms "about," "substantially," or "approximately" include values ​​and means that are within an acceptable range of deviation for a particular value as determined by one of ordinary skill in the art, taking into account the errors associated with the measurements and the measurement of the particular quantity (i.e., the limitations of the measurement system). For example, "about" may mean within one or more standard deviations, or within ±30%, 20%, 10%, 5% of the stated value.

[0081] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as those commonly understood by those skilled in the art to which the present disclosure belongs. In addition, it should be understood that unless explicitly defined in this specification, terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the relevant technology, and will not be interpreted in an idealized or overly formal sense.

[0082] In order to specifically describe the embodiments, some of parts not associated with the description may not be provided. Throughout the specification, the same reference numerals refer to the same elements.

[0083] In the following, reference will be made to Figure 1 and Figure 2A A display device according to an embodiment is described.

[0084] Figure 1is a schematic exploded perspective view showing a display device according to an embodiment, and Figure 2A is a schematic side view showing a display device according to an embodiment.

[0085] Reference Figure 1 and Figure 2A , a display device according to an embodiment includes a display panel PNL and a printed circuit board (PCB) bonded thereto. A first pad portion PAD1 positioned on a substrate 100 of the display panel PNL may be in direct contact with a second pad portion PAD2 of the PCB at a second surface S2 that is a lower surface of the substrate 100. In such an embodiment, a plurality of connection wirings CL connected to the display area DA may be electrically connected to the first pad portion PAD1 through a plurality of through holes H1 positioned at a peripheral area PA of the substrate 100. A detailed coupling structure of the first pad portion PAD1 and the second pad portion PAD2 according to an embodiment will be described below.

[0086] According to this embodiment, since the second pad portion PAD2 of the PCB directly contacts the first pad portion PAD1 at the second surface S2 which is the lower surface of the substrate 100, a structure in which the substrate 100 of the display panel PNL and the base film BF of the PCB are bent to contact each other can be omitted (e.g., not required).

[0087] The display panel PNL according to the present embodiment may include a display area DA and a peripheral area PA. The display area DA and the peripheral area PA refer to areas positioned on the substrate 100.

[0088] The display area DA is an area for displaying an image, and a plurality of stacked structures for emitting light may be arranged at the display area DA. The structure of the display area DA will be described in more detail below.

[0089] The peripheral area PA is an area positioned at the periphery of the display area DA, and the peripheral area PA may be coupled to a PCB that transmits signals from the outside. In this embodiment, a plurality of connection wirings CL and a first pad portion PAD1 may be arranged at the peripheral area PA, and the first pad portion PAD1 may be coupled to a second pad portion PAD2 of the PCB.

[0090] A plurality of connection wirings CL may be arranged at the peripheral area PA. The display area DA and the first pad portion PAD1 may be connected to each other through the plurality of connection wirings CL. In addition, the plurality of connection wirings CL may be connected to a plurality of signal lines arranged at the display area DA.

[0091] In such an embodiment, the plurality of connection wirings CL may be connected to the first pad portion PAD1 through the plurality of through holes H1 located at the peripheral area PA. That is, the plurality of connection wirings CL may be electrically connected to the first pad portion PAD1 arranged at the second surface S2 as the lower surface of the substrate 100 through the plurality of through holes H1. In such an embodiment, at least two connection wirings CL1 and CL2 may be electrically connected to the first pad portion PAD1 through one through hole H1.

[0092] The first pad portion PAD1 may include a plurality of first pad terminals (see Figure 5C The plurality of first pad terminals PAD1-1 and PAD1-2 may be in direct contact with the plurality of second pad terminals PAD2-1 and PAD2-2 of the second pad portion PAD2. The plurality of first pad terminals PAD1-1 and PAD1-2 may be connected to the plurality of connection wirings CL through the plurality of through holes H1. In this embodiment, at least two first pad terminals PAD1-1 and PAD1-2 may be connected to at least two connection wirings CL1 and CL2 through one through hole H1.

[0093] Accordingly, signals transmitted from the PCB may be sequentially transmitted to the first pad portion PAD1, the connection wiring CL, and the display area DA. The structures of the first pad terminals PAD1-1 and PAD1-2, the connection wiring CL, and the through hole H1 will be described in more detail below.

[0094] The PCB may be coupled to the first pad portion PAD1 of the peripheral area PA of the substrate 100 to transmit a signal (eg, necessary) for driving the display panel PNL to the display panel PNL. In such an embodiment, a driving chip DDI may be mounted on the base film BF, and the driving chip DDI may be used to drive the display panel PNL. Figure 1 and Figure 2A An example is shown in which the driving chip DDI is arranged on the upper surface of the base film BF to face the second surface S2 of the substrate 100 .

[0095] However, the embodiments of the present disclosure are not limited thereto. Figure 2BAs shown in , the driver chip DDI may be arranged at the lower surface of the base film BF of the PCB. In this embodiment, the terminal wiring CLP connected to the driver chip DDI may be arranged at the lower surface of the base film BF, and the through hole H2 defined (e.g., formed) by the base film BF may be defined (e.g., formed) at the PCB. Accordingly, the terminal wiring CLP may be connected to the second pad terminals PAD2-1 and PAD2-2 through the through hole H2. That is, the driver chip DDI may be electrically connected to the second pad terminals PAD2-1 and PAD2-2 through the terminal wiring CLP. The second pad terminals PAD2-1 and PAD2-2, the terminal wiring CLP and the through hole H2 may have a structure substantially the same as the structure of the first pad terminals PAD1-1 and PAD1-2, the connection wiring CL and the through hole H1 (described in more detail below).

[0096] In this embodiment, the second pad portion PAD2 may be arranged at one end of the base film BF of the PCB, and the second pad portion PAD2 may be coupled to the first pad portion PAD1 of the substrate 100. The second pad portion PAD2 may be in direct contact with the first pad portion PAD1 to transmit the signal of the driving chip DDI to the first pad portion PAD1 of the substrate 100. According to the present embodiment, the PCB is attached to the second surface S2 of the substrate 100, not to the first surface S1. That is, the PCB is not attached to the upper surface of the substrate 100 of the display panel PNL, but may be directly attached to the lower surface of the substrate 100.

[0097] For example, when the PCB is attached to the first surface S1, the remaining portion of the PCB except for the portion attached to the substrate 100 is bent to face the second surface S2 which is the lower surface of the substrate 100. However, according to the present embodiment, since the PCB is directly attached to the second surface S2 which is the lower surface of the substrate 100 instead of being attached to the first surface S1, a bent area of ​​the PCB is removed (e.g., eliminated), the material cost of the PCB can be reduced, and a dead zone that may exist at the display device can be reduced.

[0098] In this embodiment, the second pad portion PAD2 is arranged to face the first pad portion PAD1, and the second pad portion PAD2 may include a plurality of second pad terminals PAD2-1 and PAD2-2. The plurality of second pad terminals PAD2-1 and PAD2-2 may be arranged corresponding to the plurality of first pad terminals PAD1-1 and PAD1-2 arranged at the first pad portion PAD1. The plurality of first pad terminals PAD1-1 and PAD1-2 of the first pad portion PAD1 and the plurality of second pad terminals PAD2-1 and PAD2-2 of the second pad portion PAD2 are arranged in a manner corresponding to each other, and therefore, each of the plurality of first pad terminals PAD1-1 and PAD1-2 and each of the plurality of second pad terminals PAD2-1 and PAD2-2 may contact each other in a one-to-one correspondence.

[0099] In the following, reference will be made to Figure 3 and Figure 4 The display panel PNL is described in more detail.

[0100] Figure 3 It is shown Figure 1 A schematic diagram of the display area, and Figure 4 is along Figure 3 A cross-sectional view taken along line AA'.

[0101] According to the present embodiment, the display panel PNL includes a first gate wiring GW1, a second gate wiring GW2, a data wiring DW, a display area DA, and a pixel (eg, a plurality of pixels) PX. Figure 3 and Figure 4 , the gate wiring is described as including the first gate wiring GW1 and the second gate wiring GW2 positioned in different layers, but the embodiments of the present disclosure are not limited thereto. In an embodiment, all gate wirings may be arranged on one layer.

[0102] The gate driver SD sequentially applies scan signals to the first scan lines SC2 to SC2n or the second scan lines SC1 to SC1n-1 included in the first gate wiring GW1 or the second gate wiring GW2 in response to a control signal applied from an external control circuit (such as a timing controller), where n is a natural number equal to or greater than 1, and so on.

[0103] The pixel PX is selected by the scan signal and sequentially (eg, subsequently) receives the data signal. In other words, the scan signal is sent to the selected pixel PX, and then the data signal is sent to the selected pixel PX. In this embodiment, Figure 3 The gate driver SD shown in FIG. 1 may be arranged in a driving chip DDI of a PCB.

[0104] The first gate wiring GW1 is positioned on the substrate 100 with the first insulating layer GI1 interposed therebetween, and extends in a first direction. The first gate wiring GW1 includes second scan lines SC1 to SC1n-1 and emission control lines E1 to En.

[0105] The second scan lines SC1 to SC1n-1 are connected to the gate driver SD and receive scan signals from the gate driver SD. The emission control lines E1 to En are connected to the emission control driver ED and receive emission control signals from the emission control driver ED. In this embodiment, similar to the gate driver SD, Figure 3 The emission control driver ED shown in FIG. 1 may be formed in a driving chip DDI of a PCB.

[0106] The second gate wiring GW2 is positioned on the first gate wiring GW1 with the second insulating layer GI2 interposed therebetween, and extends in the first direction. The second gate wiring GW2 includes first scan lines SC2 to SC2n and an initialization power line Vinit.

[0107] The first scan lines SC2 to SC2n are connected to the gate driver SD and receive scan signals from the gate driver SD. The initialization power line Vinit is connected to the gate driver SD and receives initialization power from the gate driver SD.

[0108] The emission control driver ED sequentially applies emission control signals to the emission control lines E1 to En in response to a control signal applied from the outside such as a timing control unit. Then, light emission of the pixel PX is controlled by the emission control signal.

[0109] That is, the emission control signal controls the light emitting time of the pixel PX. However, depending on the internal structure of the pixel PX, the emission control driver ED may be omitted (eg, not included).

[0110] The data driver DD applies a data signal to the data lines DA1 to DAm among the data wirings DW in response to a control signal applied from the outside (such as a timing controller). Each time a scan signal is applied to the first scan lines SC2 to SC2n or the second scan lines SC1 to SC1n-1, the data signal applied to the data lines DA1 to DAm is applied to the pixel PX selected by the scan signal (e.g., the selected pixel PX receiving the scan signal). Then, the pixel PX is charged with a voltage corresponding to the data signal and emits light having a brightness corresponding thereto. In this embodiment, Figure 3 The data driver DD shown in FIG. 1 may be formed in a driving chip DDI of a PCB.

[0111] The data wiring DW is positioned on the second gate wiring GW2 with the third insulating layer ILD1 interposed therebetween, and extends in a second direction intersecting (e.g., crossing) the first direction. The data wiring DW includes data lines DA1 to DAm and a driving power line ELVDDL. The data lines DA1 to DAm are connected to a data driver DD and receive data signals from the data driver DD. The driving power line ELVDDL is connected to an external first power source ELVDD (to be described in more detail below) and receives a driving power source from the first power source ELVDD.

[0112] The display area DA includes a plurality of pixels PX located at intersections of the first gate wiring GW1, the second gate wiring GW2, and the data wiring DW. In this embodiment, each pixel PX includes an OLED that emits light having a brightness corresponding to a driving current corresponding to a data signal and a pixel circuit for controlling the driving current flowing through the OLED.

[0113] The pixel circuit is connected to each of the first gate wiring GW1, the second gate wiring GW2, and the data wiring DW, and the OLED is connected to the pixel circuit. According to the embodiment, the pixel PX is described as an OLED, but the pixel PX applied to the display device according to the embodiment of the present disclosure is not limited thereto and may be, for example, a liquid crystal display element and / or an electrophoretic display element.

[0114] The OLED of the pixel PX of the display area DA is connected to the external first power source ELVDD, and is also connected to the second power source ELVSS through the pixel circuit therebetween. Each of the first power source ELVDD and the second power source ELVSS applies driving power and common power to the pixel PX of the display area DA, respectively, and the pixel PX emits light with a brightness corresponding to the driving current flowing through the OLED from the first power source ELVDD in response to the data signal according to the driving power and common power applied to the pixel PX.

[0115] In the following, reference will be made to FIG. 5A to FIG. 5C The connection structure of the plurality of connection wirings CL arranged at the peripheral area PA, the plurality of vias H1 , and the first pad portion PAD1 is described in more detail.

[0116] Figure 5A is a schematic plan view showing a display device according to an embodiment, Figure 5B is a schematic diagram showing a substrate having a plurality of through holes defined thereon, and Figure 5C is a bottom view showing a display device according to an embodiment.

[0117] Reference Figure 5A , Figure 5B and Figure 5C, a plurality of connection wirings CL1 and CL2 may be arranged at the first surface S1 of the substrate 100. The plurality of connection wirings CL1 and CL2 may be arranged at the first surface S1 of the substrate 100 which is the same surface as the display area DA. That is, the plurality of connection wirings CL1 and CL2 and the display area DA may be arranged at the first surface S1 which is the upper surface of the substrate 100. However, the plurality of connection wirings CL1 and CL2 may be arranged at the peripheral area PA positioned around the display area DA.

[0118] In such an embodiment, each of the plurality of connection wirings CL1 and CL2 may extend in parallel in the second direction (Y axis). Each of the plurality of connection wirings CL1 and CL2 may be bent while extending along the second direction (Y axis). Figure 5A , for convenience of description, a plurality of connection wirings CL1 and CL2 are shown, but the number of the connection wirings CL1 and CL2 may be several tens or several hundreds.

[0119] As described above, the plurality of connection wirings CL1 and CL2 may be connected to the plurality of signal lines arranged at the display area DA (see Figure 3 ), and outputs the signal transmitted from the PCB to a plurality of signal lines of the display area DA. Accordingly, a plurality of connection wirings CL1 and CL2 may be used to electrically connect the display area DA and the PCB.

[0120] In the present embodiment, a plurality of through holes H1 defined (eg, formed) by the substrate 100 may be arranged at the peripheral area PA of the substrate 100. Figure 5B , for convenience of description, a plurality of connection wirings CL1 and CL2 arranged at the peripheral area PA are omitted (e.g., not shown). Opposite ends of the plurality of through holes H1 may reach the first surface S1 and the second surface S2 of the substrate 100, respectively. The plurality of through holes H1 may extend along a third direction (Z axis) that intersects (e.g., is perpendicular to) the surface directions of the first surface S1 and the second surface S2.

[0121] For example, the plurality of through holes H1 may be spaced apart from each other along the first direction (X axis). In such an embodiment, each of the through holes H1 may be arranged corresponding to two or more connection wirings CL1 and CL2. For example, two connection wirings CL1 and CL2 and one through hole H (including H11 and H12) may be arranged to overlap each other. Similar to the connection wirings CL1 and CL2, for the convenience of description, Figure 5B Several through holes H are shown in FIG. 1 , but the number of through holes H may be dozens or hundreds.

[0122] Reference Figure 5C, the first pad portion PAD1 may be arranged at the second surface S2 of the substrate 100. In such an embodiment, the first pad portion PAD1 may include a plurality of first pad terminals PAD1-1 and PAD1-2.

[0123] Reference Figure 5C , a plurality of first pad terminals PAD1-1 and PAD1-2 may extend in parallel along a third direction (Z axis). A plurality of first pad terminals PAD1-1 and PAD1-2 may be spaced apart from each other along a first direction (X axis). Two or more first pad terminals PAD1-1 and PAD1-2 may be arranged corresponding to one through hole H1. For example, two first pad terminals PAD1-1 and PAD1-2 and one through hole H1 may be arranged to overlap each other.

[0124] According to the present embodiment, two or more connection wirings CL1 and CL2 may be connected to two or more first pad terminals PAD1 - 1 and PAD1 - 2 , respectively, through one through hole H1 .

[0125] The first connection wiring CL1 is connected to one (1-1)th pad terminal PAD1-1 through the through hole H1, and the second connection wiring CL2 is connected to the other (1-2)th pad terminal PAD1-2 through the same through hole H1. The first connection wiring CL1 and the second connection wiring CL2 are not connected to each other on the first surface S1 of the peripheral area PA and in the through hole H1. The (1-1)th pad terminal PAD1-1 and the (1-2)th pad terminal PAD1-2 are also insulated from each other. A detailed description of the through hole H1 and the insulator 120 will be described below.

[0126] The first connection wiring CL1 and the second connection wiring CL2 may be insulated by the insulator 120 that divides the through hole H1 inside the through hole H1. The insulator 120 may divide one through hole H1 into at least two spaces or regions H11 and H12. For convenience of explanation, the spaces or regions H11 and H12 divided by the insulator 120 are referred to as connection holes H11 and H12. The first connection wiring CL1 may be connected to the (1-1)th pad terminal PAD1-1 through the first connection hole H11, and the second connection wiring CL2 may be connected to the other (1-2)th pad terminal PAD1-2 through the second connection hole H12.

[0127] Reference FIG. 5A to FIG. 5C, the plurality of connection wirings CL may be electrically connected to the plurality of first pad terminals PAD1-1 and PAD1-2 through the plurality of connection holes H11 and H12, respectively. In this embodiment, the plurality of connection holes H11 and H12 may be filled with a conductive material. According to the present embodiment, the conductive material positioned in the plurality of connection holes H11 and H12 may include a material substantially the same as that included in the plurality of connection wirings CL. In addition, the plurality of first pad terminals PAD1-1 and PAD1-2 may include a material substantially the same as that included in the plurality of connection wirings CL.

[0128] In the following, reference will be made to FIG. 6A to FIG. 13 The structures of the through hole and the insulator are described in more detail. In a plan view, the insulator 120 may have any suitable shape that divides the through hole H10.

[0129] Fig. 6A is a perspective view showing a through hole and an insulator of a substrate according to an embodiment, Figure 6B yes Fig. 6A Floor plan, Figure 6C is along Fig. 6A A cross-sectional view taken along line II' of Fig.6D is along Fig. 6A A cross-sectional view taken along line II-II'.

[0130] Reference FIG. 6A to FIG. 6D , the substrate 110 has a through hole H10 defined (eg, formed) through the substrate 110 .

[0131] The substrate 110 may include an insulating material. The substrate 110 may include an inorganic material such as glass and / or quartz, and / or may include an organic material such as polyimide. The substrate 110 may have a multilayer structure in which two or more layers overlap. For example, the substrate 110 may include an insulating layer arranged on the upper surface and the lower surface of the substrate 110. The substrate 110 may be a rigid substrate or a flexible substrate.

[0132] Each of the through holes H10 defined by the substrate 110 (e.g., formed on the substrate 110) may be defined as a space or region surrounded by the inner surface of the substrate 110 between the first surface S1 and the second surface S2 of the substrate 110. In other words, one through hole H10 is a space or region defined only by two virtual flat surfaces S1' and S2' extending from the first surface S1 and the second surface S2 of the substrate 110, respectively, and the inner surface 111 of the substrate 110. Accordingly, in a plan view, the through hole H10 is a space completely surrounded only by the inner surface 111 of the substrate 110. As described above, the substrate 110 may have a multilayer structure in which a plurality of layers are stacked, and the inner surface 111 of the substrate 110 may include a plurality of inner surfaces 111 of a plurality of layers.

[0133] Reference FIG. 6C to FIG. 6D , the through hole H10 has a cylindrical shape vertically defined by the substrate 110. Figure 6B As shown in FIG. 1 , in a plan view, the inner side surface 111 of the through hole H10 is circular, and as shown in FIG. Fig. 6A and 6D As shown in , the cross-sectional view of the inner surface 111 of the through hole H10 may be a straight line perpendicular to the first surface S1 and the second surface S2. For example, the diameter or width of the through hole H10 (i.e., the diameter or width of the circular opening in a plan view) may be in the range of about 10 μm to about 1000 μm. For example, the height of the through hole H10 (i.e., the thickness of the substrate 110) may be in the range of about 0.1 mm to about 1 mm. The through hole H10 may have substantially the same diameter or width at all heights (e.g., a diameter or width that is consistent throughout the thickness direction).

[0134] Reference FIG. 6A to FIG. 6D , the insulator 120 divides the through hole H10 into two connection holes H11 and H12.

[0135] Insulator 120 may include any suitable insulating material. Insulator 120 may include an inorganic material such as glass and / or quartz, and / or may include an organic material such as polyimide. Insulator 120 may include a material different from that included in substrate 110.

[0136] The insulator 120 may be in the form of a flat plate.

[0137] The insulator 120 may include a first portion and a second portion, the first portion extending from the center of the through hole H10 in a first direction in a plan view and contacting the inner surface 111 of the substrate 110 (e.g., one side thereof), and the second portion extending from the center of the through hole H10 in a second direction opposite to the first direction in a plan view and contacting the inner surface 111 of the substrate 110 (e.g., the other side thereof).

[0138] For example, Figure 6B As shown in FIG. 1 , in a plan view, the insulator 120 includes a first side surface 121, a second side surface 122, a third side surface 123, and a fourth side surface 124. The first side surface 121 and the second side surface 122 face each other (e.g., oppositely facing each other), and the third side surface 123 and the fourth side surface 124 face each other (e.g., oppositely facing each other). The first side surface 121 contacts the third side surface 123 and the fourth side surface 124, and the second side surface 122 contacts the third side surface 123 and the fourth side surface 124.

[0139] like Figure 6C and Fig.6DAs shown in FIG. 1 , the insulator 120 includes an upper surface 125 and a lower surface 126 that contact the first side surface 121, the second side surface 122, the third side surface 123, and the fourth side surface 124 in a cross-sectional view. The upper surface 125 and the lower surface 126 may be coplanar with the first surface S1 and the second surface S2, respectively. The height of the insulator 120 (i.e., the distance between the upper surface 125 and the lower surface 126) may be substantially equal to the thickness of the substrate 110.

[0140] like Figure 6B and Figure 6C As shown in , the entire first side surface 121 and the second side surface 122 of the insulator 120 may be in contact with the inner side surface 111 of the substrate 110 in the plan view and the cross-sectional view. The first side surface 121 and the second side surface 122 may have a shape substantially the same as the shape of the inner side surface 111 of the substrate 110. That is, the first side surface 121 and the second side surface 122 may have a shape substantially the same as the shape of the portion of the inner side surface 111 of the substrate 110 that contacts them. For example, the first side surface 121 and the second side surface 122 may have a curvature substantially the same as the curvature of the inner side surface 111 of the substrate 110. The distance between the first side surface 121 and the second side surface 122 (that is, the width of the insulator 120) is substantially equal to the diameter or width of the through hole H10.

[0141] However, the embodiments of the present disclosure are not limited thereto, and an adhesive layer may be disposed between each of the first side surface 121 and the second side surface 122 and the inner side surface 111. In addition, the first side surface 121 and the second side surface 122 may have a shape different from that of the inner side surface 111 of the substrate 110. For example, the first side surface 121 and the second side surface 122 may be flat surfaces.

[0142] like Figure 6B and Fig.6D As shown in FIG. 1 , the third side surface 123 and the fourth side surface 124 of the insulator 120 may be flat surfaces parallel to each other in the plan view and the cross-sectional view. The third side surface 123 and the fourth side surface 124 face the inner side surface 111 of the substrate 110. The edges of the third side surface 123 and the fourth side surface 124 contacting the first side surface 121 and the second side surface 122 may contact the inner side surface 111 of the substrate 110. The distance between the third side surface 123 and the fourth side surface 124 (i.e., the thickness of the insulator 120) is smaller than the diameter or width of the through hole H10.

[0143] A virtual flat surface passing through the center of the through hole H10 and perpendicular to the first surface S1 and the second surface S2 may be defined between the third side surface 123 and the fourth side surface 124. The vertical virtual flat surface may be perpendicular to the direction in which the plurality of connection wirings CL1 and CL2 are spaced apart from each other ( Figure 5AAccordingly, in a plan view, the width direction of the insulator 120 is perpendicular to the direction in which the plurality of connection wirings CL1 and CL2 are spaced apart from each other ( Figure 5A The X-axis direction in FIG. 1 is perpendicular to the direction in which the plurality of connection wirings CL1 and CL2 extend ( Figure 5A parallel to the Y-axis direction in the figure.

[0144] Each of the third side surface 123 and the fourth side surface 124 and the inner side surface 111 of the substrate 110 defines a first connection hole H11 and a second connection hole H12 separated from each other. In a plan view, the first connection hole H11 is defined as a space surrounded by the inner side surface 111 of the substrate 110 and the third side surface 123, and the second connection hole H12 is defined as a space surrounded by the inner side surface 111 of the substrate 110 and the fourth side surface 124. The first connection hole H11 and the second connection hole H12 may be spaced apart from each other in a direction ( Figure 5A They are spaced apart from each other in the X-axis direction).

[0145] Accordingly, the through hole H10 may be divided into two connection holes H11 and H12 by the insulator 120 , and the connection wirings CL1 and CL2 arranged at the first surface S1 may be connected to the first pad portion PAD1 arranged at the second surface S2 through the connection holes H11 and H12 , respectively.

[0146] The diameter or width of the through hole H10 and the distance between the through holes H10 may be greater than the line width of the connection wiring CL and the distance between the connection wirings CL. Accordingly, the density of the connection wirings CL (i.e., the number of connection wirings CL that can be arranged separately from each other within a certain distance) may be limited by the number of through holes H10. According to an embodiment, by dividing the through hole H10 into two connection holes H11 and H12 separated from each other, the number of connection wirings CL that can be connected through the same number of through holes H10 can be doubled, and accordingly, the density of the connection wirings CL can be increased.

[0147] Fig. 7A FIG. 7B is a perspective view showing a through hole and an insulator of a substrate according to a modified embodiment, and FIG. Fig. 7A Floor plan, Figure 7C is along Fig. 7A A cross-sectional view taken along line II' of Fig.7D is along Fig. 7A A cross-sectional view taken along line II-II'.

[0148] This embodiment includes reference FIG. 6A to FIG. 6D The substrate 110 , the through hole H10 , and the connection holes H11 and H12 are described, and a description thereof will not be repeated.

[0149] Reference FIG. 7A to FIG. 7D According to the present embodiment, the height of the insulator 220 is greater than the thickness of the substrate 110 .

[0150] like Figure 7B As shown in FIG. 1 , in a plan view, the insulator 220 includes a first side surface 221, a second side surface 222, a third side surface 223, and a fourth side surface 224. Figure 7C and Fig.7D As shown in , the insulator 220 includes an upper surface 225 and a lower surface 226 that contact the first side surface 221, the second side surface 222, the third side surface 223, and the fourth side surface 224 in the cross-sectional view. The upper surface 225 is higher than the first surface S1, and the lower surface 226 is lower than the second surface S2. The height of the insulator 220 (that is, the distance between the upper surface 225 and the lower surface 226) is greater than the thickness of the substrate 110.

[0151] like Figure 7B and Figure 7C As shown in FIG, a portion of the first side surface 221 and the second side surface 222 of the insulator 220 located between the first surface S1 and the second surface S2 contacts the inner side surface 111 of the substrate 110, and the remaining portion protrudes from the first surface S1 and the second surface S2 of the substrate 110. Similarly, a portion of the third side surface 223 and the fourth side surface 224 of the insulator 220 protrudes from the first surface S1 and the second surface S2 of the substrate 110.

[0152] The insulator 220 according to the present embodiment protrudes from the first surface S1 and the second surface S2 of the substrate 110. Accordingly, the possibility that metals filled in the connection holes H11 and H12 are connected to each other on the upper surface 225 or the lower surface 226 of the insulator 220 may be reduced.

[0153] Fig. 8A and Figure 8B is a plan view showing a through hole and an insulator of a substrate according to a modified embodiment.

[0154] Reference Fig. 8A , the insulator 320 according to the present embodiment divides the through hole H10 into three connection holes H13 - 1 , H13 - 2 , and H13 - 3 .

[0155] In a plan view, the insulator 320 includes a first portion 321, a second portion 322, and a third portion 323, the first portion 321 extending from the center of the through hole H10 in a first direction and contacting the inner side surface 111 of the substrate 110, the second portion 322 extending from the center of the through hole H10 in a second direction intersecting (e.g., crossing) the first direction and contacting the inner side surface 111 of the substrate 110, and the third portion 323 extending from the center of the through hole H10 in a third direction intersecting (e.g., crossing) the first direction and the second direction and contacting the inner side surface 111 of the substrate 110. Angles between the first direction, the second direction, and the third direction may all be equal to 120 degrees.

[0156] The first portion 321, the second portion 322, and the third portion 323 contact each other at a straight line passing through the center of the through hole H10 and intersecting (e.g., perpendicular to) the first surface S1 and the second surface S2. Each of the side surfaces of the first portion 321, the second portion 322, and the third portion 323 opposite to the center line contacts the inner side surface 111 of the substrate 110.

[0157] Reference Figure 8B , the insulator 420 according to the embodiment divides the through hole H10 into four connection holes H14 - 1 , H14 - 2 , H14 - 3 , and H14 - 4 .

[0158] In a plan view, the insulator 420 includes a first portion 421, a second portion 422, a third portion 423, and a fourth portion 424, the first portion 421 extending from the center of the through hole H10 in a first direction and contacting the inner side surface 111 of the substrate 110, the second portion 422 extending from the center of the through hole H10 in a second direction intersecting (e.g., crossing) the first direction and contacting the inner side surface 111 of the substrate 110, the third portion 423 extending from the center of the through hole H10 in a third direction intersecting (e.g., crossing) the first direction and the second direction and contacting the inner side surface 111 of the substrate 110, and the fourth portion 424 extending from the center of the through hole H10 in a fourth direction opposite to the second direction and contacting the inner side surface 111 of the substrate 110. Angles among the first direction, the second direction, the third direction, and the fourth direction may all be equal to 90 degrees.

[0159] The insulator 420 may include five or more portions extending in different directions from the center of the through hole H10 and contacting the inner side surface 111 of the substrate 110 .

[0160] Fig.9A is a perspective view showing a through hole and an insulator of a substrate according to a modified embodiment, and Fig. 9B yes Fig.9A Floor plan.

[0161] In a plan view, the first side surface 521 and the second side surface 522 of the insulator 520 according to the present embodiment include a protrusion 525 protruding toward the substrate 510 .

[0162] The first and second side surfaces 521 and 522 of the insulator 520 contact the inner side surface 511 of the substrate 510. The third and fourth side surfaces 523 and 524 of the insulator 520 together with the inner side surface 511 of the substrate 510 define the first and second connection holes H21 and H22.

[0163] The first side surface 521 and the second side surface 522 include a protrusion 525 extending in a direction perpendicular to the first surface S1 and the second surface S2. The protrusion 525 is farther from the center line than the dummy surface 511' extending from the inner side surface 511 of the substrate 510 that is not in contact with the insulator 520. Accordingly, the distance from the center line to the protrusion 525 of the first side surface 521 and the second side surface 522 is greater than the radius or half width of the inner side surface 511 of the substrate 510 that is not in contact with the insulator 520.

[0164] like FIG. 6A to FIG. 6D The through hole H10 in the substrate 510 is shaped as a through hole H20, and the through hole H20 is defined as a cylindrical shape, and the insulator 520 including the protrusion 525 can be inserted therein. Due to the elasticity of the substrate 510, the inner side surface 511 of the through hole H20 can be defined with (e.g., formed with) a recessed portion 512 corresponding to the protrusion 525. Alternatively, cylindrical inner side surfaces 511 and 511' are formed at the substrate 510, and the recessed portion 512 corresponding to the protrusion 525 can be pre-defined (e.g., formed) at the inner side surface 511' to be arranged together with the protrusion 525. The protrusion 525 of the insulator 520 can be inserted into the recessed portion 512.

[0165] According to the present embodiment, the insulator 520 having a width wider than the diameter or width of the through hole H20 can be easily inserted into the through hole H20, and the possibility that a gap may be generated between the inner surface 511 of the substrate 510 and the insulator 520 can be reduced. In all embodiments described herein, the shape of the second side surface 522 of the insulator 520 according to the embodiment can be applied to the side surface of the insulator that contacts the inner surface 511 of the substrate 510.

[0166] Fig.10 is a plan view showing a through hole and an insulator of a substrate according to a modified embodiment.

[0167] According to the present embodiment, in a plan view, the through hole H25 has a shape whose diameter or width varies depending on directions (eg, along different directions), for example, an elliptical shape. The through hole H25 has the largest diameter or width in the main axis direction.

[0168] Reference Fig.10 , the insulator 570 divides the through hole H25 into two connection holes H26 and H27. The insulator 570 may be in the form of a flat plate.

[0169] like Fig.10 As shown in FIG. 1 , the insulator 570 extends from the center line of the through hole H25 in the main axis direction and contacts the inner side surface 561 of the substrate. In a plan view, the insulator 570 includes a first side surface 571 and a second side surface 572 in contact with the inner side surface 561 of the substrate. The distance between the first side surface 571 and the second side surface 572 (i.e., the width of the insulator 570) may correspond to the diameter or width of the through hole H25 in the main axis direction.

[0170] Although an ellipse is exemplarily described according to the present embodiment, the through hole H25 may have any suitable shape, for example, a polygon (such as a quadrilateral having different diameters or widths along directions (e.g., along different directions) in a plan view), and the insulator 570 may have a width corresponding to its maximum diameter or width.

[0171] According to the present embodiment, the insulator 570 may not rotate in the through hole H25, and thus its position may be fixed along the main axis of the through hole H25.

[0172] Fig.11A is a perspective view showing a through hole and an insulator of a substrate according to a modified embodiment, Fig. 11B yes Fig.11A Floor plan, Fig. 11C is along Fig.11A A cross-sectional view taken along line II' of Fig.11D is along Fig.11A A cross-sectional view taken along line II-II'.

[0173] The through hole H30 according to the embodiment has a smaller (eg, smaller) diameter or width as the distance from the first surface S1 or the second surface S2 increases. Hereinafter, the through hole H30 having a larger diameter or width on the first surface S1 will be described as an example.

[0174] Reference FIG. 11A to FIG. 11D , the through hole H30 is in a conical shape passing through the substrate 610. Fig. 11B As shown in FIG. 1 , in a plan view, the inner side surface 611 of the through hole H30 is circular, and as shown in FIG. Fig. 11C and Fig.11DAs shown in , in the cross-sectional view, the inner side surface 611 of the through hole H30 may be an inclined straight line intersecting the first surface S1 and the second surface S2. In the cross-sectional view, the through hole H30 may have any suitable curved shape whose diameter or width decreases from the first surface S1 toward the second surface S2.

[0175] Reference FIG. 11A to FIG. 11D The insulator 620 divides the through hole H30 into two connection holes H31 and H32. The insulator 620 may be in the form of a flat plate.

[0176] The insulator 620 includes a first side surface 621, a second side surface 622, a third side surface 623, a fourth side surface 624, an upper surface 625, and a lower surface 626. Fig. 11B and Fig. 11C As shown in FIG. 6 , the first side surface 621 and the second side surface 622 of the insulator 620 facing each other (e.g., facing away from each other) may contact the inner side surface 611 of the substrate 610. The distance between the first side surface 621 and the second side surface 622 (i.e., the width of the insulator 620) is substantially equal to the diameter or width of the through hole H30. Accordingly, the distance between the first side surface 621 and the second side surface 622 decreases from the upper surface 625 toward the lower surface 626.

[0177] According to the present embodiment, the insulator 620 can be easily inserted into the through hole H30, and the insulator 620 can be stably fixed. In addition, even if the diameter or width of the through hole H30 (for example, the diameter or width from the top to the bottom of the through hole H30) is different from each other (for example, slightly different), the insulator 620 can be in close contact with the inner surface 611 of the substrate 610.

[0178] In a plan view, the through hole H30 is not limited to a circular shape, but may have Fig.10 In addition, in a plan view, the insulator 620 may have an elliptical shape. Fig. 8A , Figure 8B , Fig.9A and Fig. 9B The shapes shown in .

[0179] Fig. 12A is a perspective view showing a through hole and an insulator of a substrate according to a modified embodiment, Fig. 12B yes Fig. 12A Floor plan, Fig. 12C is along Fig. 12A FIG. 12D is a cross-sectional view taken along line II'. Fig. 12A A cross-sectional view taken along line II-II', and Fig.13 is a perspective view showing an insulator of a substrate according to an embodiment.

[0180] The through hole H40 according to the present embodiment has the smallest diameter or width between the first surface S1 and the second surface S2. The diameters or widths of the through hole H40 on the first surface S1 and the second surface S2 may be substantially equal to or different from each other.

[0181] Reference FIG. 12A to FIG. 12D , the through hole H40 has a bottleneck shape passing through the substrate 710. As shown in FIG. 12B , in a plan view, the inner side surface 711 of the through hole H40 is circular, and as shown in FIG. 12C and Fig.12D As shown in FIG. 1 , in the cross-sectional view, the inner side surface 711 of the through hole H40 may be a curve protruding toward the center line between the first surface S1 and the second surface S2. In the cross-sectional view, the through hole H40 may have a curve shape in which the diameter or width decreases and then increases again from the first surface S1 toward the second surface S2.

[0182] Reference FIG. 12A to FIG. 12D The insulator 720 divides the through hole H40 into two connection holes H41 and H42. The insulator 720 may be in the shape of a flat plate.

[0183] The insulator 720 includes a first side surface 721, a second side surface 722, a third side surface 723, a fourth side surface 724, an upper surface 725, and a lower surface 726. Fig. 12B and Fig. 12C As shown in , the first side surface 721 and the second side surface 722 of the insulator 720 facing each other (e.g., facing away from each other) may contact the inner side surface 711 of the substrate 710. The distance between the first side surface 721 and the second side surface 722 (i.e., the width of the insulator 720) is substantially equal to the diameter or width of the through hole H40. Accordingly, the distance between the first side surface 721 and the second side surface 722 decreases from the upper surface 725 toward the lower surface 726, and then increases again. The width of the insulator 720 is the smallest at the center (e.g., the midpoint) between the upper surface 725 and the lower surface 726.

[0184] In a plan view, the through hole H40 is not limited to a circular shape, but may have Fig.10 In addition, in a plan view, the insulator 720 may have an elliptical shape. Fig. 8A , Figure 8B , Fig.9A and Fig. 9B The shapes shown in .

[0185] According to this embodiment, FIG. 6A to FIG. 6D Similar to the insulator 120 shown in FIG. 1 , the insulator 720 is formed to have straight side surfaces in a cross-sectional view, and when inserted into the through hole H40, the insulator 720 may be deformed according to the shape of the through hole H40.

[0186] Alternatively, if Fig.13 As shown in , the insulator 720 may include a first insulator 720-1 and a second insulator 720-2. As the distance from the first surface S1 increases, the width of the first insulator 720-1 decreases. As the distance from the second surface S2 increases, the width of the second insulator 720-2 decreases. The first insulator 720-1 and the second insulator 720-2 contact each other between the first surface S1 and the second surface S2. The width at the surface where the first insulator 720-1 and the second insulator 720-2 contact each other may correspond to the minimum diameter or width of the through hole H40. The first insulator 720-1 may be inserted from one side of the first surface S1, and the second insulator 720-2 may be inserted from one side of the second surface S2.

[0187] Fig.14A is a perspective view showing a through hole and an insulator of a substrate according to a modified embodiment, Fig. 14B yes Fig.14A Floor plan, Fig. 14C is along Fig.14A A cross-sectional view taken along line II' of Fig.14D is along Fig.14A A cross-sectional view taken along line II-II'.

[0188] According to the present embodiment, the insulating layer 130 may be disposed on the through hole H10 and the insulator 120 .

[0189] FIG. 14A to FIG. 14D The substrate 110, the through hole H10 and the insulator 120 shown in FIG. FIG. 6A to FIG. 6D However, the embodiments of the present disclosure are not limited thereto, and the insulating layer 130 may be applied to the substrate 100 , the through hole H1 , and the insulator 120 of all the above-mentioned embodiments.

[0190] The insulating layer 130 is arranged on the inner side surface 111 of the substrate 110 defining the first connection hole H11 and the third side surface 123 of the insulator 120, and defines the third connection hole H15. Accordingly, in a plan view, the insulating layer 130 surrounds the third connection hole H15. In addition, the insulating layer 130 is arranged on the inner side surface 111 of the substrate 110 defining the second connection hole H12 and the fourth side surface 124 of the insulator 120, and defines the fourth connection hole H16. Accordingly, in a plan view, the insulating layer 130 surrounds the fourth connection hole H16. In addition, the insulating layer 130 may be arranged at the first surface S1 and the second surface S2 of the substrate 110 and the upper surface 125 and the lower surface 126 of the insulator 120.

[0191] According to the present embodiment, the insulating layer 130 may substantially prevent or protect the respective metals filled in each of the connection holes H15 and H16 from being connected to each other through a gap between the inner side surface 111 of the substrate 110 and the first and second side surfaces 121 and 122 of the insulator 120 .

[0192] In the following, reference will be made to FIG. 15A to FIG. 16C A method of manufacturing the substrate including the substrate 110 , the connection wiring CL, the via H1 , the insulator 120 , and the first pad portion PAD1 according to the embodiment is described in more detail.

[0193] In the following, we will FIG. 6A to FIG. 6D , the substrate 110, the through hole H10, and the insulator 120 shown in the figure are described. However, the embodiments of the present disclosure are not limited thereto, and the method can be applied to the substrates, through holes, insulators, and connection holes of all the above-mentioned embodiments. In addition, the structure and manufacturing method of the display panel PNL according to the embodiment can also be applied to the PCB. For example, the PCB may include a base film BF, a connection wiring CLP, a through hole H2, and an insulator corresponding to the connection wiring CL, the through hole H1, the insulator 120, and the first pad portion PAD1 of the display panel PNL, respectively.

[0194] FIG. 15A to FIG. 15F is a cross-sectional view showing a method for manufacturing a substrate according to an embodiment, and Figure 15G is with Fig.15F The corresponding floor plan.

[0195] like Fig.15A As shown in , a substrate 110 is prepared.

[0196] like Fig. 15B As shown in FIG. 1 , a through hole H10 is defined (e.g., formed) at the peripheral area PA of the substrate 110. In this embodiment, the through hole H10 may be generated by a laser drilling machine. However, the embodiments of the present disclosure are not limited thereto, and the through hole H10 may be generated by, for example, cutting, electron beam, grinding wheel, and / or punching. The through hole H10 may have 6A to 14D The shapes shown in .

[0197] In an implementation, the inner side surface of the substrate 110 where the through hole H10 is defined may include stains deformed by the laser. Accordingly, after the through hole is generated by the laser drill, a desmear process for removing the stains may also be performed.

[0198] like Fig. 15C As shown in FIG. 1 , the insulator 120 is inserted into the through hole H10 defined at the substrate 110 to generate the connection holes H11 and H12. The insulator 120 may have 6A to 14D After inserting the insulator 120, it is also possible to perform FIG. 14A to FIG. 14DThe formation of the insulating layer 130 is shown in FIG.

[0199] Then, if Fig.15D As shown in , a conductor 140 is formed in the connection holes H11 and H12. The conductor 140 may completely fill the connection holes H11 and H12. The conductor 140 may be continuously arranged on the first surface S1 and the second surface S2 of the substrate 110 and on the upper surface 125 and the lower surface 126 of the insulator 120. The conductor 140 may be formed by a method such as evaporation, plating and / or sputtering. The conductor 140 may have a multilayer structure formed by plating after sputtering.

[0200] Then, if Fig.15E As shown in , the conductor 140 formed on the first surface S1 and the second surface S2 of the substrate 110 and the upper surface 125 and the lower surface 126 of the insulator 120 are removed by an etching process. Accordingly, the overall conductor 140 is divided into a first conductor 141 arranged in the first connection hole H11 and a second conductor 142 arranged in the second connection hole H12. In order to prevent or protect the first conductor 141 and the second conductor 142 from being connected to each other, the height of each of the first conductor 141 and the second conductor 142 may be less than the height of the first connection hole H11 and the second connection hole H12.

[0201] Then, if Fig.15F and Figure 15G As shown in FIG, wirings 151, 152, 161, and 162 may be formed on the first surface S1 and the second surface S2 of the substrate 110. The wirings 151, 152, 161, and 162 may be formed by laminating a photoresist, and then exposing, developing, and etching the photoresist.

[0202] The first wiring 151 continuously extends from the upper surface of the first conductor 141 to the first surface S1 of the substrate 110. The second wiring 152 continuously extends from the upper surface of the second conductor 142 to the first surface S1 of the substrate 110. The first wiring 151 and the second wiring 152 are not connected to each other. The first wiring 151 and the first conductor 141 may correspond to FIG. 5A to FIG. 5C , and the second wiring 152 and the second conductor 142 may correspond to Figure 5A and Figure 5C The second connection wiring CL2 shown in FIG.

[0203] The third wiring 161 extends continuously from the lower surface of the first conductor 141 to the second surface S2 of the substrate 110. The fourth wiring 162 extends continuously from the lower surface of the second conductor 142 to the second surface S2 of the substrate 110. The third wiring 161 and the fourth wiring 162 are not connected to each other. The third wiring 161 and the fourth wiring 162 correspond to FIG. 5A to FIG. 5CThe (1-1)th pad terminal PAD1-1 and the (1-2)th pad terminal PAD1-2 of the first pad portion PAD1 shown in FIG.

[0204] Accordingly, the first wiring 151 on the first surface S1, the first conductor 141 in the first connection hole H11 of the through hole H10, and the third wiring 161 on the second surface S2 are connected to each other, and the second conductor 142 on the second surface S2, the second conductor 142 in the second connection hole H12 of the same through hole H10, and the fourth wiring 162 on the second surface S2 are connected to each other. The first wiring 151, the first conductor 141, and the third wiring 161 connected to each other (hereinafter referred to as "wiring A") are not connected to the second wiring 152, the second conductor 142, and the fourth wiring 162 connected to each other (hereinafter referred to as "wiring B"). Accordingly, the wiring A and the wiring B separated from each other pass through one through hole H10.

[0205] Fig.16A is a cross-sectional view showing a method for manufacturing a substrate according to an embodiment, and Fig. 16B and Fig. 16C 1 and 2 are a cross-sectional view and a plan view respectively showing a substrate manufactured according to the method.

[0206] The first wiring 151 , the first conductor 141 , and the third wiring 161 of the wiring A are formed as an integral portion 140 - 1 , and the second wiring 152 , the second conductor 142 , and the fourth wiring 162 of the wiring B may be formed as an integral portion 140 - 2 .

[0207] In such Fig.15D After forming the conductor 140 as shown in Fig.16A As shown in , a photoresist PR corresponding to the shapes of the first wiring 151 and the second wiring 152 is laminated on the upper surface of the conductor 140, and is exposed and developed.

[0208] Then, if Fig. 16B and Fig. 16C As shown in FIG. 1 , conductor 140 is etched until upper surface 125 of insulator 120 is exposed.

[0209] The lower surface of the conductor 140 may also be processed in the same manner as described above.

[0210] Fig.17 and Fig.18 is a cross-sectional view showing a first pad portion and a second pad portion of a display device according to an embodiment.

[0211] Show Fig.17 and Fig.18 A cross-sectional view of the substrate shows the reference FIG. 14A to FIG. 14DThe through hole H10 is described, but the embodiments of the present disclosure are not limited thereto, and the structure can be applied to the substrates of all the above-described embodiments.

[0212] Reference Fig.17 , the first insulating layer I1 may correspond to FIG. 14A to FIG. 14D The insulating layer 130 may correspond to Figure 4 The second insulating layer I2 may correspond to Figure 4 The second insulating layer GI2 or the third insulating layer ILD1.

[0213] The first wiring 151 and the second wiring 152 arranged above the through hole H10 may correspond to Figure 1 The first wiring 151 and the second wiring 152 arranged above the through hole H10 may be Figure 4 The third and fourth wirings 161 and 162 disposed under the through hole H10 may correspond to the first pad terminals PAD1-1 and PAD1-2.

[0214] The fifth wiring 171 and the sixth wiring 172 contacting the first pad terminals PAD1-1 and PAD1-2 may correspond to the second pad terminals PAD2-1 and PAD2-2 according to the present embodiment. In this embodiment, a plurality of conductive balls ACF may be arranged between the first pad terminals PAD1-1 and PAD1-2 and the second pad terminals PAD2-1 and PAD2-2, and the first pad terminals PAD1-1 and PAD1-2 and the second pad terminals PAD2-1 and PAD2-2 may be electrically connected to each other through the plurality of conductive balls ACF.

[0215] The third insulating layer 13 exposes a portion of the first pad terminals PAD1-1 and PAD1-2, and the fourth insulating layer 14 exposes a portion of the second pad terminals PAD2-1 and PAD2-2.

[0216] Reference Fig.18 , the first insulating layer I1 may correspond to FIG. 14A to FIG. 14D The insulating layer 130 may correspond to Figure 4 The second insulating layer I2 may correspond to Figure 4 The fifth insulating layer I5 may correspond to Figure 4 The third insulating layer ILD1 is formed.

[0217] In the case where the gate lines arranged at the display area DA are double-layer gate lines, the connection wiring CL may be arranged as double-layer gate lines. Fig.18As shown in FIG. , the connection wiring CL may include Figure 4 In this embodiment, the connection wiring CL may include a first wiring 151 and a second wiring 152 corresponding to the first gate wiring GW1 and a seventh wiring 181 and an eighth wiring 182 corresponding to the second gate wiring GW2.

[0218] As described above, according to one or more embodiments, by dividing a through hole into two or more connection holes separated from each other, the number of connection wirings connectable through the same number of through holes may at least double, and accordingly, the density of the connection wirings may increase.

[0219] When describing embodiments of the present disclosure, the use of “may” refers to “one or more embodiments of the present disclosure.” Also, the term “exemplary” is intended to indicate an example or illustration.

[0220] Moreover, any numerical range listed herein is intended to include all subranges of the same numerical precision that are included in the listed range. For example, the range of "1.0 to 10.0" is intended to include all subranges between the listed minimum value of 1.0 and the listed maximum value of 10.0 (and including the listed minimum value of 1.0 and the listed maximum value of 10.0), that is, all subranges with a minimum value greater than or equal to 1.0 and a maximum value less than or equal to 10.0, for example, 2.4 to 7.6. Any maximum numerical limit listed herein is intended to include all lower numerical limits included therein, and any minimum numerical limit listed in this specification is intended to include all greater numerical limits included therein. Therefore, the applicant reserves the right to modify this specification (including claims) to explicitly list any subranges that are included in the range explicitly listed herein.

[0221] Although the present invention has been shown and described with reference to the embodiments of the present invention, it will be apparent to those skilled in the art that various changes in form and details may be made thereto without departing from the scope and spirit of the present invention as defined in the appended claims. In addition, the scope of the present disclosure is determined by the broadest permissible interpretation of the appended claims and their equivalents, and shall not be restricted or limited by the foregoing detailed description.

Claims

1. A display device, include: a substrate having a first surface, a second surface opposite to the first surface, and an inner side surface defining a plurality of through holes; an insulator which, in a plan view, is located in the through hole and divides the through hole by extending outward from the center of the through hole and contacting an inner side surface of the through hole or the inner side surface of the substrate; an insulating layer, the insulating layer being located on a surface of the insulator and an inner surface of the substrate; a first wiring and a second wiring, wherein the first wiring and the second wiring are both located on the first surface; as well as a first conductor and a second conductor, each of the first conductor and the second conductor being located in one of the plurality of through holes, wherein the first conductor is connected to the first wiring, The second conductor is connected to the second wiring, and The first conductor and the second conductor are insulated from each other by the insulator and the insulating layer, wherein the insulator has an upper surface and a lower surface, a first side surface and a second side surface contacting the inner side surface of the substrate, and a third side surface and a fourth side surface facing the inner side surface of the substrate, The through hole comprises: a third connection hole defined by the third side surface of the insulator and the insulating layer on the inner side surface of the substrate; and a fourth connection hole defined by the fourth side surface of the insulator and the insulating layer on the inner side surface of the substrate, The first conductor is located in the third connection hole, and The second conductor is located in the fourth connecting hole.

2. The display device according to claim 1, in, The substrate includes a display area in which a plurality of pixels are arranged and a peripheral area located around the display area and in which no pixels are arranged; The through hole is located at the peripheral area, and The first wiring and the second wiring are connected to the plurality of pixels.

3. The display device according to claim 1, further comprising: include: a printed circuit board located on the second surface, and The first conductor and the second conductor are connected to the printed circuit board.

4. The display device according to claim 1, further comprising: include: a third wiring and a fourth wiring, the third wiring and the fourth wiring being located on the second surface, The first conductor is connected to the third wiring, and The second conductor is connected to the fourth wiring.

5. The display device according to claim 1, in, A distance between the upper surface and the lower surface of the insulator is equal to a distance between the first surface and the second surface of the substrate.

6. The display device according to claim 1, in, A distance between the upper surface and the lower surface of the insulator is greater than a distance between the first surface and the second surface of the substrate.

7. The display device according to claim 1, in, The insulator comprises: a first portion, which, in a plan view, extends from a center of the through hole in a first direction and contacts the inner side surface of the substrate; and A second portion, in a plan view, extends from the center of the through hole in a second direction different from the first direction and contacts the inner side surface of the substrate.

8. The display device according to claim 7, in, The first direction and the second direction are opposite to each other.

9. The display device according to claim 7, in, The insulator also includes: a third portion extending from the center of the through hole in a third direction different from the first direction and the second direction in a plan view and contacting the inner side surface of the substrate.

10. The display device according to claim 9, in, The insulator also includes: and a fourth portion extending from the center of the through hole in a fourth direction different from the first direction, the second direction, and the third direction in a plan view and contacting the inner side surface of the substrate.

11. The display device according to claim 7, in, In a plan view, the inner side surface of the substrate has an elliptical shape, and The first direction and the second direction are parallel to the main axis direction of the ellipse.

12. The display device according to claim 7, in, The inner side surface of the substrate has a circular shape in a plan view.

13. The display device according to claim 1, in, A side surface of the insulator in contact with the inner side surface of the substrate includes a protrusion protruding toward the substrate in a plan view.

14. The display device according to claim 1, in, In a cross-sectional view, the inner surface of the substrate is perpendicular to the first surface and the second surface.

15. The display device according to claim 1, in, In a cross-sectional view, the inner side surface of the substrate is inclined with respect to the first surface and the second surface.

16. The display device according to claim 1, in, In a cross-sectional view, the inner side surface of the substrate defining the through hole has a convex shape.

17. A substrate comprising a first surface, a second surface opposite to the first surface, and an inner surface defining a plurality of through holes, wherein the substrate include: a first wiring and a second wiring, wherein the first wiring and the second wiring are both located on the first surface; a third wiring and a fourth wiring, wherein the third wiring and the fourth wiring are both located on the second surface; an insulator which, in a plan view, is located in the through hole and divides the through hole by extending outward from the center of the through hole and contacting an inner side surface of the through hole or the inner side surface of the substrate; and a first conductor and a second conductor, each of the first conductor and the second conductor being located in one of the plurality of through holes and insulated from each other by the insulator, wherein the first conductor connects the first wiring and the third wiring, and The second conductor connects the second wiring and the fourth wiring, wherein the insulator has an upper surface and a lower surface, a first side surface and a second side surface contacting the inner side surface of the substrate, and a third side surface and a fourth side surface facing the inner side surface of the substrate, The through hole comprises: a third connection hole defined by the third side surface of the insulator and the insulating layer on the inner side surface of the substrate; and a fourth connection hole, the fourth connection hole being defined by the fourth side surface of the insulator and the insulating layer on the inner side surface of the substrate, The first conductor is located in the third connection hole, and The second conductor is located in the fourth connecting hole.

18. The substrate according to claim 17, in, The substrate is a printed circuit board.

19. The substrate according to claim 17, in, The substrate is a substrate of a display panel.

Images