Audio amplifier with embedded buck controller for Class G applications

Abstract

The present disclosure relates to an audio amplifier with an embedded buck controller for Class G applications. The audio amplifier includes a buck controller configured to control an output voltage at a first power supply terminal, the output voltage selected from a set comprising a plurality of output voltages, wherein the output voltage takes a settling time to settle; a first audio bridge including a Class AB driver stage coupled to the first power supply terminal and a delay insertion circuit configured to receive a processed digital stream and provide the processed digital stream to the Class AB driver stage after a delay time after receiving the processed digital stream, wherein the delay time is based on the settling time; and an audio amplitude detector configured to detect a first peak amplitude in the first digital audio stream. The buck controller is configured to select the lowest output voltage from the set that is greater than the first peak amplitude plus a headroom voltage.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to U.S. Provisional Application No. 62 / 771,967, filed on November 27, 2018, entitled “AUDIO AMPLIFIER WITH EMBEDDEDBUCK CONTROLLER FOR CLASS-G APPLICATION,” which is incorporated herein by reference. Technical Field

[0003] The present disclosure relates generally to electronic systems and methods, and in particular embodiments, to an audio amplifier with an embedded buck controller for Class G applications. Background Art

[0004] Power amplifiers are categorized based on the characteristics of their output stages. Specifically, these categories are based on the proportion of current flowing through the output device during each input cycle. Conventional Class A amplifiers are simpler than Class B and Class AB amplifiers and utilize a single amplifier transistor that is biased so that it is always on. For differential Class A amplifiers, the bias point is typically chosen to be equal to the maximum output current to allow amplification of the full range of input signals.

[0005] Conventional Class B amplifiers use two amplifier transistors in a push-pull configuration, with each amplifier transistor operating for half a cycle. Because the signals from each amplifier device do not overlap, Class B amplifiers typically have high crossover distortion.

[0006] A conventional Class AB amplifier has a push-pull configuration that operates over half a cycle. To operate, a Class AB amplifier uses a bias circuit that is typically more complex than that of a Class A or Class B amplifier. The overlap helps reduce the crossover distortion present in Class B amplifiers at the expense of higher quiescent current.

[0007] Figure 1 The output stage 102 of a conventional class AB audio power amplifier 100 is shown driving an audio speaker 106. A controller and gate driver (not shown) control transistors 120, 122, 124, and 128 based on an audio input signal (which may be analog or digital).

[0008] A Class D amplifier is a switching amplifier that operates the output transistors as electronic switches rather than in the linear region. Figure 2 A schematic diagram of a conventional class D amplifier 200 is shown for driving an audio speaker 106. The class D amplifier includes a comparator 202, a drive circuit 204, an output stage 205, an inductor 210, and a capacitor 212.

[0009] During normal operation, comparator 202 receives an audio input signal 216 and a triangular waveform 218 (e.g., a sawtooth waveform) and generates a pulse width modulated (PWM) signal 220. PWM signal 220 is used to control driver circuit 204, which in turn drives transistors 206 and 208 of output stage 205 based on PWM signal 220. Output stage 205 generates an output signal 222, which drives speaker 106 through low pass filter (LPF) 209.

[0010] The PWM signal 220 has a frequency typically above 20 kHz, resulting in a switching frequency of the output signal 222 also above 20 kHz, which is above the audible range of humans. The LPF 209 typically filters out switching noise generated by the output signal 222 . Summary of the Invention

[0011] According to one embodiment, an audio amplifier includes: a first power supply terminal; a second power supply terminal; a buck controller having a power supply input configured to receive a battery voltage, the buck controller configured to control an output voltage at the first power supply terminal, the output voltage being selected from a set including a plurality of output voltages, wherein when the buck controller changes the output voltage from a first voltage in the set to a second voltage in the set, the output voltage at the first power supply terminal takes a stabilization time to stabilize, the second voltage being higher than the first voltage; a first audio bridge having an input configured to receive a first digital audio stream and an output configured to be coupled to a first speaker, the first audio bridge including a class AB driver stage, a digital signal processing circuit, and a delay insertion circuit, the class AB driver stage being coupled coupled to the first supply terminal, and the class AB driver stage is configured to be coupled to the first speaker, the digital signal processing circuit is coupled to the input of the first audio bridge, and the delay insertion circuit is configured to receive a processed digital stream from the digital signal processing circuit, and the delay insertion circuit is configured to provide the processed digital stream to the class AB driver stage after a delay time after receiving the processed digital stream, wherein the delay time is based on a settling time; and an audio amplitude detector having an input coupled to the input of the first audio bridge, and the audio amplitude detector is configured to detect a first peak amplitude in the first digital audio stream, wherein the buck controller is configured to select a lowest output voltage from the set that is higher than the first peak amplitude plus a headroom voltage.

[0012] According to one embodiment, an integrated circuit includes: a first power supply terminal; a second power supply terminal; a battery power supply terminal; a buck controller having a power supply input coupled to the battery power supply terminal, the buck controller being configured to control an output voltage at the first power supply terminal, the output voltage being selected from a set including a plurality of output voltages, wherein when the buck controller changes the output voltage from a first voltage in the set to a second voltage in the set, the output voltage at the first power supply terminal takes a stabilization time to stabilize, the second voltage being higher than the first voltage; a first audio bridge having an input configured to receive a first digital audio stream and an output configured to be coupled to a first speaker, the first audio bridge including a class AB driver stage, a digital signal processing circuit, and a delay insertion circuit, the class AB A class AB driver stage is coupled to the first supply terminal, and the class AB driver stage is configured to be coupled to the first speaker, the digital signal processing circuit is coupled to the input of the first audio bridge, and the delay insertion circuit is configured to receive a processed digital stream from the digital signal processing circuit, and the delay insertion circuit is configured to provide the processed digital stream to the class AB driver stage after a delay time after receiving the processed digital stream, wherein the delay time is based on a settling time; and an audio amplitude detector having an input coupled to the input of the first audio bridge, and the audio amplitude detector is configured to detect a first peak amplitude in the first digital audio stream, wherein the buck controller is configured to select a lowest output voltage from the set that is greater than the first peak amplitude plus a headroom voltage.

[0013] According to one embodiment, a method includes receiving a first digital audio stream; detecting a first peak amplitude in the first digital audio stream; selecting an output voltage of a buck converter so that the output voltage is a lowest output voltage from a set of buck output voltages that is greater than the first peak amplitude plus a headroom voltage; converting the first digital audio stream into an analog audio signal; and providing the analog audio signal to a speaker using a class AB driver stage after a delay time after the output voltage of the buck converter stabilizes, wherein the class AB driver stage receives power from the buck converter. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] For a more complete understanding of the present invention and its advantages, reference is now made to the following description taken in conjunction with the accompanying drawings, in which:

[0015] Figure 1 An output stage of a conventional class AB audio power amplifier for driving an audio speaker and a load current sensor circuit for sensing a load current flowing through the audio speaker are shown;

[0016] Figure 2 shows a schematic diagram of a conventional Class D amplifier for driving an audio speaker;

[0017] Figure 3shows a graph illustrating the power consumption Ptot of the internal components of a conventional class AB amplifier and the corresponding efficiency η as a function of the output power Po;

[0018] Figure 4 A digital input Class AB audio power amplifier with an embedded buck controller operating in a Class G configuration according to one embodiment of the present invention is shown;

[0019] Figure 5 shows the audio output (to the speaker), the Figure 4 The buck converter feeds the corresponding buck converter setup code and Figure 4 A diagram of the corresponding output levels of the buck converter;

[0020] Figure 6 FIG. 1 shows an audio signal and a corresponding modulated power supply VCC according to an embodiment of the present invention, wherein VCC is composed of Figure 4 The buck converter provides;

[0021] Figure 7 FIG. 1 shows an audio signal (sine wave) and a corresponding modulated power supply VCC according to an embodiment of the present invention, wherein VCC is composed of Figure 4 The buck converter provides;

[0022] Figure 8 A schematic diagram illustrating an audio bridge according to an embodiment of the present invention; and

[0023] Figure 9 Shown are graphs illustrating power consumption of internal components of a conventional class AB amplifier and graphs illustrating power consumption of internal components of a class AB amplifier with an embedded buck converter operating in a class G configuration according to the present invention.

[0024] Corresponding numerals and symbols in the different figures generally refer to corresponding parts unless otherwise indicated.The figures are drawn to clearly illustrate the relevant aspects of the preferred embodiments and are not necessarily drawn to scale. DETAILED DESCRIPTION

[0025] The making and using of the disclosed embodiments are discussed in detail below. However, it should be understood that the present invention provides many applicable inventive concepts that can be embodied in a wide variety of specific contexts. The specific embodiments discussed are merely illustrative of specific ways to make and use the invention and do not limit the scope of the invention.

[0026] The following description explains various specific details to provide an in-depth understanding of several example embodiments according to this specification. An embodiment can be obtained without one or more specific details or with other methods, components, materials, etc. In other cases, known structures, materials, or operations are not shown or described in detail to avoid confusing different aspects of the embodiment. References to "one embodiment" in this specification indicate that a specific configuration, structure, or feature described in association with the embodiment is included in at least one embodiment. Therefore, phrases such as "in one embodiment" that may appear at different points in this specification do not necessarily refer to the same embodiment precisely. In addition, in one or more embodiments, specific formations, structures, or features may be combined in any appropriate manner.

[0027] Embodiments of the invention will be described in a specific context, namely a digital audio amplifier with multiple outputs. Embodiments of the invention may be used in other circuits, such as audio amplifiers with a single output, and amplifiers for, for example, reproducing non-audio signals.

[0028] In one embodiment of the present invention, a Class AB amplifier with an embedded buck converter is used in a Class G configuration to achieve lower power consumption during periods of light load, for example. An audio amplitude detector monitors the amplitude of the digital audio stream transmitted to a bridge, which is coupled to a speaker. The buck converter that provides power to the bridge steps up or down the buck converter's output voltage to a minimum voltage that provides sufficient headroom for the bridge to drive the speaker without clipping or distortion. A delay is introduced in the audio signal processing chain within the bridge to allow the buck converter sufficient time to settle to the desired output.

[0029] Conventional power audio amplifiers are often implemented using Class D amplifiers rather than Class AB amplifiers to reduce power consumption. Although Class D amplifiers may use more expensive external components and may have the worst electromagnetic interference (EMI) characteristics compared to Class AB amplifiers, Class D amplifiers are generally more efficient than Class AB amplifiers. For example Figure 3 Curves 302 and 304 are shown, respectively illustrating the power consumption Ptot and the corresponding efficiency η of the internal components of a conventional class AB amplifier as a function of the output power Po.

[0030] Figure 4 1 shows a digital input Class AB audio power amplifier 400 with an embedded buck controller 408 operating in a Class G configuration according to one embodiment of the present invention. Figure 4 As shown, the digital input class AB audio power amplifier 400 has N channels, which receive N digital audio inputs (Input 1, Input 2, ..., Inputi 、...、Input N ) and with corresponding audio bridges (4041, 4042, ..., 404 i , ..., 404 N )'s corresponding outputs (OUTP, OUTM) drive N corresponding speakers (1061, 1062, ..., 106 i ,...,106 N ), where N is a positive integer greater than or equal to 1. In some embodiments, the digital input Class AB audio power amplifier 400 with the embedded buck controller 408 and the N audio bridges 404 can be implemented, for example, in an integrated circuit 410 in a single package and in a monolithic substrate.

[0031] like Figure 4 As shown, the buck converter 420 includes an embedded buck controller 408, a transistor 412, a Schottky diode 414, and an output capacitor 418. The buck converter 420 receives power from a power supply VBAT, which may be, for example, a car or cell phone battery, and delivers a supply voltage VCC to the audio bridge(s) 404. In some embodiments, the buck converter 420 is capable of providing up to 40A of current at an 18V supply level. In some embodiments, the buck converter 420 may provide even higher power. Other embodiments may have a maximum power capability of less than 40A at 18V.

[0032] During normal operation, the buck converter 420 provides power to the audio bridge(s) 404, for example, via the VCC terminal. The digital input class AB audio power amplifier 400 receives digital input(s) (Input 1 . . . Input 2 . . . ) from an external circuit (e.g., a controller, a memory, a bus, etc.) or from another circuit within the integrated circuit 410. N ). The (multiple) digital inputs are provided to the corresponding (multiple) audio bridges 404. The (multiple) audio bridges 404 receive the corresponding digital inputs. i ) generate output (audio) signals at the corresponding outputs (OUTP, OUTM) of the audio bridge 404.

[0033] The audio amplitude detector(s) 405 monitor the digital inputs of the corresponding audio bridges 404 and predict the output signal amplitudes that the corresponding audio bridges will produce at the corresponding outputs (OUTP, OUTM). For example, the audio amplitude detectors 405 can be implemented in the digital domain and can monitor the real-time input digital signals. The audio amplitude detector(s) 405 provide, for example, the predicted peak amplitudes of the output signals to the supply level selector 406.

[0034] The supply level selector 406 receives the predicted peak amplitude of the output signal from the audio amplitude detector(s) 405 and selects an output voltage level for the buck converter 420 based on the received peak amplitude(s) (e.g., using the buck_code). For example, in some embodiments, the supply level selector 406 configures the buck converter 420 to have an output voltage that is the lowest voltage higher than the highest received peak amplitude (plus the headroom voltage).

[0035] Figure 5 Graph 500 shows an audio output curve 502 (e.g., delivered to a speaker via audio bridge 404), a corresponding buck_code setting code fed to buck converter 420, and a corresponding output level of buck converter 420, in accordance with one embodiment of the present invention. For simplicity, it is assumed that audio output curve 502 represents the highest voltage peak from all N channels of digital input class AB audio power amplifier 400.

[0036] like Figure 5 As shown, based on, for example, the predicted output signal amplitude or the amplitude of the digital audio stream transmitted to the audio bridge 404, the output of the buck converter 420 is adjusted to a minimum voltage that provides sufficient headroom for the output signals (OUTP, OUTM) of the audio bridge 4040 to drive the corresponding speakers 106.

[0037] For example, in some embodiments, the buck converter 420 can have three different output levels (e.g., 8V for buck_code 00, 11V for buck_code 01, and VBAT for buck_code 11). When the output audio signal (curve 502) has a peak value below a minimum level (e.g., 6V), buck_code 00 is selected, corresponding to an 8V output of the buck converter 420. When the output audio signal has a peak value above the minimum level (e.g., 6V) but below a second minimum level (e.g., 9V), buck_code 01 is selected, corresponding to an 11V output of the buck converter. When the output audio signal has a peak value above both the minimum level (e.g., 6V) and the second minimum level (e.g., 9V), buck_code 11 is selected, corresponding to a VBAT output of the buck converter 420.

[0038] In this embodiment, a headroom voltage of 2 V is assumed. For example, an 8 V VCC is used when the peak voltage is less than 6 V. In some embodiments, a different headroom voltage may be used, such as less than 2 V or greater than 2 V.

[0039] Other output levels may be used for buck converter 420. As another non-limiting example, some embodiments may use 6V, 9V, and VBAT as output levels corresponding to buck_code 00, buck_code 01, and buck_code 11, respectively. Other output levels may be used.

[0040] Some embodiments may have only two output levels for a buck converter. Other embodiments may have more than three possible output levels for a buck converter.

[0041] Some embodiments may use a digital-to-analog converter (DAC) to implement the output voltage selection.Other implementations are also possible.

[0042] In some embodiments, all of the N channels of the digital-input Class AB audio power amplifier 400 are monitored, and the output of the buck converter 420 is set to a minimum level that provides sufficient headroom for all of the N channels. For example, in one embodiment, if channel one has a peak amplitude of 11 V, but the other N-1 channels have a peak amplitude of less than 6 V, then the VBAT setting is selected for the buck converter 420.

[0043] Figure 6 6 shows an audio signal 602 (from the outputs OUTP, OUTM of the audio bridge 404) and a corresponding modulated power supply VCC (curve 604) according to one embodiment of the present invention, wherein VCC is provided by the buck converter 420. Figure 6 As shown, when the audio signal (curve 602) goes low, the supply VCC (curve 604) goes low, and when the audio signal goes high, the supply VCC (curve 604) goes high, thereby advantageously allowing sufficient headroom to avoid clamping or distorting the audio signal while maintaining a low VCC voltage.

[0044] Figure 7 An audio signal 702 (sine wave) and a corresponding modulated power supply VCC (curve 604 ) are shown, wherein VCC is provided by the buck converter 420 , according to one embodiment of the present invention.

[0045] like Figures 4 to 7 As shown, the buck converter 420 is based on the digital audio input (Input1...Input N) to regulate the buck output voltage VCC. When it is determined that the buck output voltage VCC of the buck converter 420 should rise, the buck output voltage VCC should rise before the audio output signal is transmitted to the speaker 106. Therefore, some embodiments insert a delay in the signal processing path of each audio bridge to enable the buck output voltage VCC to stabilize before the audio output reaches the speaker. For example, Figure 8 FIG. 8 is a schematic diagram of an audio bridge 800 according to an embodiment of the present invention. The audio bridge 800 is a possible implementation of the audio bridge 404 .

[0046] like Figure 8 As shown, digital inputs (for example, Input1...Input N Any one of ) is processed by digital signal processing circuit 802. The delay is then inserted by delay insertion circuit 804 (e.g., in the digital domain). The DAC is then combined with (such as Figure 1 AB drivers are used together with the corresponding speakers 106. In some embodiments, the delay inserted by the delay insertion circuit 804 is determined based on the settling time of the buck converter 420. Since all of the digital inputs experience the same delay, the listener does not experience audio interruptions or distortion.

[0047] In some embodiments, the settling time of the buck converter 420 is determined as the time from a change in the output voltage (e.g., a change in buck_code) until the voltage VCC is within 5% of the target output voltage, for example. Other tolerances, such as 7% or higher, or 2% or lower, may also be used. In some embodiments, the settling time may be different depending on the starting buck_code and the ending buck_code. In such embodiments, the settling time used by the delay insertion circuit 804 may be the longest of the possible settling times of the buck converter 420. In some embodiments, the settling time used by the delay insertion circuit 804 may be longer than the longest of the possible settling times of the buck converter 420.

[0048] Advantages of some embodiments include reduced power consumption compared to conventional Class AB implementations. For example, Figure 9Curve 904 illustrates the power consumption of the internal components of a conventional Class AB amplifier, and curve 902 illustrates the power consumption of the internal components of a Class AB amplifier with an embedded buck converter operating in a Class G configuration according to the present invention. As shown, the Class AB amplifier with an embedded buck converter operating in a Class G configuration (e.g., such as digital input Class AB audio power amplifier 400 with embedded buck controller 408) consumes significantly less power during light loads compared to a conventional Class AB amplifier. In some embodiments, the dissipated power under average listening conditions can be reduced by up to 50% compared to a conventional Class AB amplifier.

[0049] Buck converter 420 can be implemented in various ways. For example, in some embodiments, buck (step-down) converter 420 generates a regulated voltage VCC by driving the control terminal (at terminal GD) of transistor 412 with a pulse width modulated (PWM) signal based on the feedback voltage (at terminal FB). The feedback voltage can be divided using a voltage divider (not shown), and then compared to a reference voltage (not shown) to generate the PWM signal. In some embodiments, code buck_code changes the voltage divider to adjust the output voltage generated by converter 420 at terminal VCC. Other implementations are also possible.

[0050] In some embodiments, a transistor can be used instead of Schottky diode 414. In some embodiments, current can be sensed directly in the output transistor (e.g., transistor 412 and / or a low-side transistor instead of Schottky diode 414), and sense resistor 419 can be omitted. Other implementations are also possible.

[0051] The supply level selector 406 may include a digital comparator that compares (e.g., within a predetermined time window) digital representations of the maximum voltage peaks received from the N audio amplitude detectors 405 and selects a buck_code (e.g., based on a lookup table (LUT) storing a set of possible buck_codes) that corresponds to the lowest VCC voltage with sufficient headroom for the maximum voltage peak received. Other implementations are also possible.

[0052] Audio amplitude detector(s) 405 may be implemented, for example, using digital logic including registers to store a digital representation of the maximum peak voltage detected from the corresponding input (e.g., within a predetermined time window) and / or send the digital representation to supply level selector 406. Other implementations are possible.

[0053] The speaker 106 can be implemented in any manner known in the art. For example, in some embodiments, the speaker 106 can have an impedance of 4Ω. Other implementations are also possible.

[0054] The digital signal processing circuit 802 may be implemented as a custom or general purpose processor, a digital signal processor (DSP), or a controller.Other implementations are also possible.

[0055] The delay insertion circuit 804 may be implemented, for example, by gating a clock that is used to send information from the digital signal processing circuit 802 to the DAC and class AB driver stage 806. Other implementations are possible.

[0056] although Figure 8 Each audio bridge 800 is shown to include a digital signal processing circuit 802 and a delay insertion circuit 804. It should be understood that in some embodiments, a centralized controller, processor or DSP can implement all circuits in the digital signal processing circuit 802 and / or all circuits in the delay insertion circuit 804.

[0057] In some embodiments, the delay for processing the digital input by the digital signal processing circuit 802 may be longer than the settling time of the buck converter 420. In such embodiments, the delay insertion circuit 804 may be optional.

[0058] DAC and class AB driver stage 806 may be implemented with a conventional DAC (eg, using R2R ladder, delta-sigma modulation, or otherwise) and a conventional class AB driver stage, such as using a controller to control a full bridge such as full bridge 102 .

[0059] Example embodiments of the invention are summarized here. Other embodiments are also apparent from the overall context of the specification and claims submitted herein.

[0060] Example 1. An audio amplifier, comprising: a first power supply terminal; a second power supply terminal; a buck controller having a power supply input configured to receive a battery voltage, the buck controller configured to control an output voltage at the first power supply terminal, the output voltage being selected from a set including a plurality of output voltages, wherein when the buck controller changes the output voltage from a first voltage in the set to a second voltage in the set, the output voltage at the first power supply terminal takes a stabilization time to stabilize, the second voltage being higher than the first voltage; a first audio bridge having an input configured to receive a first digital audio stream and an output configured to be coupled to a first speaker, the first audio bridge comprising a class AB driver stage, a digital signal processing circuit, and a delay insertion circuit, the class AB driver stage being coupled to the first power supply terminal, and the class AB driver stage is configured to be coupled to the first speaker, the digital signal processing circuit is coupled to the input of the first audio bridge, and the delay insertion circuit is configured to receive a processed digital stream from the digital signal processing circuit, and the delay insertion circuit is configured to provide the processed digital stream to the class AB driver stage after a delay time after receiving the processed digital stream, wherein the delay time is based on the settling time; and an audio amplitude detector having an input coupled to the input of the first audio bridge, and the audio amplitude detector is configured to detect a first peak amplitude in the first digital audio stream, wherein the buck controller is configured to select a lowest output voltage from the set that is higher than the first peak amplitude plus a headroom voltage.

[0061] Example 2. The audio amplifier of Example 1, wherein the headroom voltage is 2V or less.

[0062] Example 3. The audio amplifier of any of Examples 1 or 2, wherein the set includes three output voltages.

[0063] Example 4. The audio amplifier of any of Examples 1 to 3, wherein the output voltage in the set is the battery voltage.

[0064] Example 5. The audio amplifier of any of Examples 1 to 4, wherein the second supply terminal is coupled to ground.

[0065] Example 6. The audio amplifier of any one of Examples 1 to 5, further comprising: a high-side transistor coupled between the supply input of the buck controller and an intermediate node; a diode coupled between the second supply terminal and the intermediate node; and an inductor coupled between the intermediate node and the input of the first audio bridge.

[0066] Example 7. The audio amplifier of any of Examples 1 to 6, wherein the buck controller and the first audio bridge are integrated into an integrated circuit, and wherein the high-side transistor, the diode, and the inductor are external to the integrated circuit.

[0067] Example 8. The audio amplifier of any of Examples 1 to 7, further comprising a low-side transistor including the diode.

[0068] Example 9. The audio amplifier of any of Examples 1 to 8, wherein the diode is a Schottky diode.

[0069] Example 10. The audio amplifier of any one of Examples 1 to 9, further comprising: a second audio bridge having an input configured to receive a second digital audio stream and an output configured to be coupled to a second speaker, the second audio bridge comprising a second Class AB driver stage, a second digital signal processing circuit, and a second delay insertion circuit, the second Class AB driver stage being coupled to the first power supply terminal and the second Class AB driver stage being configured to be coupled to the second speaker, the second digital signal processing circuit being coupled to the input of the second audio bridge, and the second delay insertion circuit being configured to receive a second digital audio stream from the digital signal processing circuit. the first audio bridge receiving the second processed digital stream, the second delay insertion circuit being configured to provide the second processed digital stream to the class AB driver stage after a second delay time after receiving the processed digital stream, wherein the second delay time is based on the settling time; and a second audio amplitude detector having an input coupled to the input of the second audio bridge, the second audio amplitude detector being configured to detect a second peak amplitude in the second digital audio stream, wherein the buck controller is configured to select a lowest output voltage from the set that is higher than the first peak amplitude plus the headroom voltage and higher than the second peak amplitude plus the headroom voltage.

[0070] Example 11. The audio amplifier of any of Examples 1 to 10, wherein the delay time is greater than or equal to the settling time.

[0071] Example 12. An integrated circuit comprises: a first power supply terminal; a second power supply terminal; a battery power supply terminal; a buck controller having a power supply input coupled to the battery power supply terminal, the buck controller being configured to control an output voltage at the first power supply terminal, the output voltage being selected from a set comprising a plurality of output voltages, wherein when the buck controller changes the output voltage from a first voltage in the set to a second voltage in the set, the output voltage at the first power supply terminal takes a stabilization time to stabilize, the second voltage being higher than the first voltage; a first audio bridge having an input configured to receive a first digital audio stream and an output configured to be coupled to a first speaker, the first audio bridge comprising a class AB driver stage, a digital signal processing circuit, and a delay insertion circuit, the class AB driver stage being coupled to the first power supply terminal, and the class AB driver stage is configured to be coupled to the first speaker, the digital signal processing circuit is coupled to the input of the first audio bridge, and the delay insertion circuit is configured to receive a processed digital stream from the digital signal processing circuit, and the delay insertion circuit is configured to provide the processed digital stream to the class AB driver stage after a delay time after receiving the processed digital stream, wherein the delay time is based on the settling time; and an audio amplitude detector having an input coupled to the input of the first audio bridge, and the audio amplitude detector is configured to detect a first peak amplitude in the first digital audio stream, wherein the buck controller is configured to select a lowest output voltage from the set that is higher than the first peak amplitude plus a headroom voltage.

[0072] Example 13. The integrated circuit of Example 12, further comprising: a second audio bridge having an input configured to receive a second digital audio stream and an output configured to be coupled to a second speaker, the second audio bridge comprising a second Class AB driver stage, a second digital signal processing circuit, and a second delay insertion circuit, the second Class AB driver stage being coupled to the first supply terminal and the second Class AB driver stage being configured to be coupled to the second speaker, the second digital signal processing circuit being coupled to the input of the second audio bridge, the second delay insertion circuit being configured to receive a second processed digital stream from the digital signal processing circuit, and the second delay insertion circuit being configured to provide the second processed digital stream to the Class AB driver stage after a second delay time after receiving the processed digital stream, wherein the second delay time is equal to the delay time; and a second audio amplitude detector having an input coupled to the input of the second audio bridge, the second audio amplitude detector being configured to detect a second peak amplitude in the second digital audio stream, wherein the buck controller is configured to select a lowest output voltage from the set that is higher than the first peak amplitude plus the headroom voltage and higher than the second peak amplitude plus the headroom voltage.

[0073] Example 14. A method includes: receiving a first digital audio stream; detecting a first peak amplitude in the first digital audio stream; selecting an output voltage of a buck converter so that the output voltage is the lowest output voltage in a set of buck output voltages that is higher than the first peak amplitude plus a headroom voltage; converting the first digital audio stream into an analog audio signal; and providing the analog audio signal to a speaker using a class AB driver stage after a delay time after the output voltage of the buck converter stabilizes, wherein the class AB driver stage receives power from the buck converter.

[0074] Example 15. The method of Example 14, wherein the set includes three buck output voltages.

[0075] Example 16. The method of any of Examples 14 or 15, wherein a first output voltage in the set is equal to a battery voltage received by the buck converter.

[0076] Example 17. The method of any of Examples 14 or 16, wherein the headroom voltage is 2V or less.

[0077] Example 18. The method of any one of Examples 14 or 17, further comprising: receiving a second digital audio stream; detecting a second peak amplitude in the second digital audio stream; and selecting an output voltage of the buck converter so that the output voltage is the lowest output voltage in the set that is higher than the first peak amplitude plus the headroom voltage and higher than the second peak amplitude plus the headroom voltage.

[0078] Although the present invention has been described with reference to illustrative embodiments, this description is not intended to be construed in a limiting sense. Various modifications and combinations of the illustrative embodiments, as well as other embodiments of the invention, will be apparent to those skilled in the art in reference to this description. It is therefore intended that the appended claims cover any such modifications or embodiments.

Claims

1. An audio amplifier, comprising: a first power supply terminal; a second power supply terminal; a buck controller having a supply input configured to receive a battery voltage, the buck controller configured to control an output voltage at the first supply terminal, the output voltage being selected from a set including a plurality of output voltages, wherein when the buck controller changes the output voltage from a first voltage in the set to a second voltage in the set, the output voltage at the first supply terminal takes a stabilization time to stabilize, the second voltage being higher than the first voltage; a first audio bridge, an input of the first audio bridge being configured to receive a first digital audio stream and an output of the first audio bridge being configured to be coupled to a first speaker, the first audio bridge comprising: a class AB driver stage coupled to the first supply terminal and configured to be coupled to the first speaker, a digital signal processing circuit coupled to the input of the first audio bridge, and a delay insertion circuit configured to receive a processed digital stream from the digital signal processing circuit, and the delay insertion circuit configured to provide the processed digital stream to the class AB driver stage after a delay time after receiving the processed digital stream, wherein the delay time is based on the settling time; as well as an audio amplitude detector having an input coupled to the input of the first audio bridge and configured to detect a first peak amplitude in the first digital audio stream, wherein the buck controller is configured to select a lowest output voltage from the set that is higher than the first peak amplitude plus a headroom voltage.

2. The audio amplifier of claim 1, wherein the headroom voltage is 2V or less. The audio amplifier of claim 1 , wherein the set comprises three output voltages. The audio amplifier of claim 1 , wherein the output voltage in the set is the battery voltage. The audio amplifier of claim 1 , wherein the second supply terminal is coupled to ground.

6. The audio amplifier of claim 1 , further comprising: a high-side transistor coupled between the supply input of the buck controller and an intermediate node; a diode coupled between the second supply terminal and the intermediate node; as well as An inductor is coupled between the intermediate node and the input of the first audio bridge. 7 . The audio amplifier of claim 6 , wherein the buck controller, the first audio bridge are integrated into an integrated circuit, and wherein the high-side transistor, the diode, and the inductor are external to the integrated circuit. 8 . The audio amplifier of claim 6 , further comprising a low-side transistor, the low-side transistor comprising the diode.

9. The audio amplifier of claim 6, wherein the diode is a Schottky diode.

10. The audio amplifier of claim 1 , further comprising: a second audio bridge, an input of the second audio bridge being configured to receive a second digital audio stream and an output of the second audio bridge being configured to couple to a second speaker, the second audio bridge comprising: a second class AB driver stage coupled to the first supply terminal and configured to be coupled to the second speaker, a second digital signal processing circuit coupled to the input of the second audio bridge, and a second delay insertion circuit configured to receive a second processed digital stream from the digital signal processing circuit, and the second delay insertion circuit configured to provide the second processed digital stream to the class AB driver stage after a second delay time after receiving the processed digital stream, wherein the second delay time is based on the settling time; and a second audio amplitude detector having an input coupled to the input of the second audio bridge and configured to detect a second peak amplitude in the second digital audio stream, wherein the buck controller is configured to select a lowest output voltage from the set that is higher than the first peak amplitude plus the headroom voltage and higher than the second peak amplitude plus the headroom voltage. The audio amplifier of claim 1 , wherein the delay time is longer than or equal to the settling time.

12. An integrated circuit comprising: a first power supply terminal; a second power supply terminal; Battery power supply terminal; a buck controller having a supply input coupled to the battery supply terminal, the buck controller configured to control an output voltage at the first supply terminal, the output voltage being selected from a set including a plurality of output voltages, wherein when the buck controller changes the output voltage from a first voltage in the set to a second voltage in the set, the output voltage at the first supply terminal takes a stabilization time to stabilize, the second voltage being higher than the first voltage; a first audio bridge, an input of the first audio bridge being configured to receive a first digital audio stream and an output of the first audio bridge being configured to be coupled to a first speaker, the first audio bridge comprising: a class AB driver stage coupled to the first supply terminal and configured to be coupled to the first speaker, a digital signal processing circuit coupled to the input of the first audio bridge, and a delay insertion circuit configured to receive a processed digital stream from the digital signal processing circuit, and the delay insertion circuit configured to provide the processed digital stream to the class AB driver stage after a delay time after receiving the processed digital stream, wherein the delay time is based on the settling time; as well as an audio amplitude detector having an input coupled to the input of the first audio bridge and configured to detect a first peak amplitude in the first digital audio stream, wherein the buck controller is configured to select a lowest output voltage from the set that is higher than the first peak amplitude plus a headroom voltage.

13. The integrated circuit of claim 12, further comprising: a second audio bridge, an input of the second audio bridge being configured to receive a second digital audio stream and an output of the second audio bridge being configured to couple to a second speaker, the second audio bridge comprising: a second class AB driver stage coupled to the first supply terminal and configured to be coupled to the second speaker, a second digital signal processing circuit coupled to the input of the second audio bridge, and a second delay insertion circuit configured to receive a second processed digital stream from the digital signal processing circuit, and the second delay insertion circuit configured to provide the second processed digital stream to the class AB driver stage after a second delay time after receiving the processed digital stream, wherein the second delay time is equal to the delay time; and a second audio amplitude detector having an input coupled to the input of the second audio bridge and configured to detect a second peak amplitude in the second digital audio stream, wherein the buck controller is configured to select a lowest output voltage from the set that is higher than the first peak amplitude plus the headroom voltage and higher than the second peak amplitude plus the headroom voltage. The integrated circuit of claim 12 , wherein the delay time is longer than or equal to the settling time.

15. The integrated circuit of claim 12, wherein the set includes three buck output voltages, and wherein the headroom voltage is 2V or less.

16. A method for processing a signal, comprising: receiving a first digital audio stream; detecting a first peak amplitude in the first digital audio stream; selecting an output voltage of the buck converter such that the output voltage is a lowest output voltage of a set of buck output voltages, the set of buck output voltages comprising a plurality of buck output voltages, and each of the plurality of buck output voltages having a value greater than the first peak amplitude plus headroom voltage; converting the first digital audio stream into an analog audio signal; and An analog audio signal is provided to a speaker using a class AB driver stage after a delay time after the output voltage of the buck converter stabilizes, wherein the class AB driver stage receives power from the buck converter. The method of claim 16 , wherein the set comprises three buck output voltages.

18. The method of claim 17, wherein a first output voltage in the set is equal to a battery voltage received by the buck converter. The method of claim 16 , wherein the headroom voltage is 2 V or less.

20. The method of claim 16, further comprising: receiving a second digital audio stream; detecting a second peak amplitude in the second digital audio stream; as well as An output voltage of the buck converter is selected such that the output voltage is a lowest output voltage in the set that is higher than the first peak amplitude plus the headroom voltage and higher than the second peak amplitude plus the headroom voltage.

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