A super-low voltage-drop Schottky diode and a method for preparing the same

Abstract

The main object of the present invention is to provide a novel ultra-low voltage drop Schottky diode and a preparation method thereof. Multiple trenches are first lithographically etched on the upper surface of a high-concentration substrate wafer, and then a low-concentration layer is epitaxially grown. A metal barrier and a front metal electrode are formed on the upper surface and in the trenches, and a back electrode is formed on the back surface. The structure is as follows: 10 is the back electrode; 20 is the high-concentration substrate, on which multiple grooves with a certain depth are etched, and the grooves can be strip-shaped, square, polygonal, etc.; 30 is the low-concentration layer grown by epitaxial method, and the thickness and concentration are determined according to the designed voltage, reverse leakage current, etc. of the device; 40 is the barrier layer; 50 is the edge insulating layer; 60 is the upper electrode metal layer. The multi-groove structure increases the surface area of the barrier region, greatly increases the current per unit chip, and under the same chip area, the forward conduction current increases greatly, and under the same current, the forward voltage drop is greatly reduced, achieving the effect of ultra-low forward voltage.

Description

Technical Field

[0001] The present invention belongs to the technical field of semiconductor devices and their preparation, and particularly relates to an ultra-low voltage drop Schottky diode and a preparation method thereof. Background Art

[0002] Schottky Barrier Diodes (SBDs) are widely used in DC-DC converters, Voltage Regulator Modules (VRMs), Telecom / Servers, AC power adapters, and chargers, etc. In all these applications, the Schottky Barrier Diode needs to ensure a certain breakdown voltage and a low forward voltage drop to ensure low power consumption. According to Schottky theory, the forward voltage drop of a power Schottky during forward conduction is:

[0003] V F = Ф B + KT / q * Ln (J F / AT 2 ) + J F (ρ e × d e + ρ s × d S ) -- Formula 1

[0004] Where: Ф B is the barrier height, J F is the forward conduction current, ρ e , d e are the epitaxial layer resistivity and thickness respectively, ρ s , d S are the substrate resistivity and thickness respectively, and are usually negligible.

[0005] J F = I / S

[0006] Where I is the forward current and S is the surface area of the barrier region.

[0007] It can be seen from the above formula that the forward voltage drop is closely related to the surface area S of the barrier region and the thickness d e of the epitaxial layer. Increasing the surface area of the barrier region will significantly reduce the forward voltage drop, and increasing the thickness of the epitaxial layer will cause the forward voltage drop of the Schottky junction to increase.

[0008] In order to increase the surface area of the barrier region, one approach is to first grow a low-concentration epitaxial layer of the same type (such as an N- layer) on a high-concentration substrate layer (such as an N+ layer), and then lithographically etch multiple trenches, such as Figure 1As shown, the surface area is increased to S = (W + 2nh) × L, where W is the width of the effective chip area, n is the number of grooves etched,

[0009] h is the depth of the groove, and L is the length of the effective chip area. The increased area is 2nhL.

[0010] The problem with the above approach is that, given a fixed reverse breakdown voltage, there is a lower limit to the thickness of the epitaxial layer, i.e., breakdown occurs at the thinnest point. For example, Figure 1 the epitaxial region under W1 is the thinnest region and must meet the lower limit of the breakdown voltage. Then, the epitaxial region under W2 has an increased thickness of h, and according to Equation 1, there is an increase in V F : J F × ρ e × (h × W2 / W + 1 / 2 × 2nh), and the expected reduction in V F cannot be achieved. SUMMARY OF THE INVENTION

[0011] The present invention provides an ultra-low voltage drop Schottky diode, whose structure includes: a high-concentration substrate with multiple grooves etched, a low-concentration epitaxial layer epitaxially grown on the upper surface, bottom, and sides of the grooves, a metal silicide barrier layer formed on the upper surface, bottom, and sides of the epitaxial layer except at the edges, an upper surface edge insulating layer, and upper and lower electrodes for vertical conduction.

[0012] As Figure 2 shown, 10 is the back metal electrode, 20 is the high-concentration substrate, 30 is the low-concentration epitaxial layer, 40 is the barrier region, 50 is the passivation layer, and 60 is the front metal electrode. First, lithograph the high-concentration substrate silicon wafer, etch the grooves by dry or wet methods, then oxidize or deposit an insulating protective layer and perform lithography for edge protection, form metal silicide on the inner upper surface, bottom, and sides of the grooves, and finally deposit and lithograph the front and back metal electrodes. The low-concentration epitaxial layer is grown on the high-concentration substrate with pre-etched grooves and has the shape of the grooves. Since the low-concentration epitaxial layer has the same thickness in each region, the resistance of the epitaxial layer through which the current flows is the same,

[0013] effectively avoiding the increase in resistance caused by epitaxial layers of different thicknesses and minimizing the forward conduction voltage drop VF.

[0014] The preparation method of the present invention includes the steps of: N+ / P+ type substrate wafer - oxidation - coating - lithography - etching SiO2 - stripping - etching silicon - etching SiO2 - epitaxial growth of N- / P- type silicon - oxidation - lithography of the barrier region - sputtering the barrier - silicide formation - evaporation of the front metal - lithography and etching of the metal - back thinning - evaporation of the back metal. The grooves lithographically etched on the high-concentration substrate can be strip-shaped, square, or other polygonal or circular shapes

[0015] etc. The width of the substrate groove should be more than twice the thickness of the epitaxial layer, and the epitaxial layer cannot fill the entire groove, ensuring that the epitaxial layer is also in the shape of the groove. The epitaxial layer grows on the upper surface, the bottom, and the sidewalls of the groove. Description of the Drawings

[0016] Figure 1 The previous low-voltage-drop Schottky diode structure with a groove structure

[0017] Figure 2 The ultra-low-voltage-drop Schottky diode structure of the present invention. Detailed Description of the Invention

[0018] The present invention will be further described below through specific embodiments, but the embodiments do not limit the protection scope of the present invention.

[0019] Embodiment: Chip area: 2×2 mm 2 , 40 strip grooves are etched, the groove depth is 20 μm, the thickness of the epitaxial layer is 5 μm, the resistivity is 0.9 Ω·cm, the barrier is Ni, the forward conduction voltage drop is 0.43 V (I = 10 A), which is 17% lower than the product without grooves.

[0020] Certainly, those of ordinary skill in the art should recognize that the above embodiments are only used to illustrate the present invention and are not intended to limit the present invention. As long as it is within the spirit of the present invention, changes and modifications to the above embodiments will fall within the scope of the claims of the present invention.

Claims

1. A super-low voltage drop Schottky diode, characterized in that, its structure includes: a high-concentration substrate engraved with a plurality of grooves, a low-concentration epitaxial layer epitaxially grown on the upper surface, bottom and sides of the grooves, a metal silicide barrier layer formed on the upper surface, bottom and sides of the epitaxial layer except at the edges, an upper surface edge insulating layer, and upper and lower electrodes for vertical conduction; the width of the substrate grooves should be more than twice the thickness of the epitaxial layer, and the epitaxial layer cannot fill the entire groove, ensuring that the epitaxial layer is also in the shape of a groove.

2. The super-low voltage drop Schottky diode according to claim 1, characterized in that, the low-concentration epitaxial layer is grown on the high-concentration substrate with grooves engraved in advance and has the shape of a groove.

3. A method for manufacturing the super-low voltage drop Schottky diode according to claim 1, characterized in that, its steps include: first photolithographing the high-concentration substrate wafer, etching out grooves by dry or wet methods, then oxidizing or depositing an insulating protective layer and performing edge protection by photolithography, forming metal silicide on the inner upper surface, bottom and sides, and finally depositing and photolithographing the front and back metal electrodes; N+ / P+ type substrate wafer - oxidation - coating with glue - photolithography - etching SiO2 - removing glue - etching silicon - etching SiO2 - epitaxial growth of N- / P- type silicon - oxidation - photolithography of the barrier region - sputtering the barrier - silicide formation - evaporation of the front metal - photolithography and etching of the metal - back thinning - evaporation of the back metal Grooves etched out by photolithography on the high-concentration substrate, the grooves are strip-shaped, square, circular or other polygons; the width of the substrate grooves should be more than twice the thickness of the epitaxial layer, and the epitaxial layer cannot fill the entire groove, ensuring that the epitaxial layer is also in the shape of a groove; the epitaxial layer grows on the upper surface, bottom and sides.

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