A mesa diode of silicon-aluminum-silicon bonding sheet and preparation method thereof
By adopting single-chip bonding method and low-temperature mesa terminal protection process, Schottky barrier diodes with Si-Al-Si silicon wafer structure are formed, solving the problem of high cost of epitaxial wafers, and reducing material costs and improving device performance.
Patent Information
- Application Number
- CN202010220318.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2020-03-25
- Publication Date
- 2025-04-18
- Estimated Expiration
- 2040-03-25
AI Technical Summary
The cost of the existing Schottky barrier diodes is high in the manufacturing process, accounting for more than 70% of the total material cost, resulting in excessive production costs.
A Si-Al-Si silicon wafer structure is formed by single-chip bonding, and a low-temperature tabletop terminal protection process is used during the chip production process to form a new Schottky device structure.
Through this method, the epitaxial growth cost is reduced, the material cost is reduced by more than 30%, while the forward voltage drop is reduced, and the performance of the device is improved.
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Figure CN111261726B_ABST
Abstract
Description
Technical Field
[0001] The invention belongs to the technical field of diodes and preparation thereof, and particularly relates to a low-leakage Schottky barrier diode without epitaxy and low-cost table terminal protection type and a preparation method thereof. Background Art
[0002] Schottky Barrier Diode (SBD) is widely used in DC-DC converters, voltage regulators (VRM), telecommunications transmission / servers, AC power adapters and chargers, etc. Figure 1 is a schematic diagram of the structure of a standard planar Schottky barrier diode, such as Figure 1 As shown, the preparation method of the Schottky barrier diode is to grow SiO2 on a silicon epitaxial wafer at high temperature, then etch a protection ring by photolithography, then inject boron ions, diffuse at high temperature to form a protection ring, then etch a contact hole by photolithography, deposit a barrier metal, or form a metal silicide to form a barrier layer, grow a contact metal thereon, and then etch the metal by photolithography to serve as a lead. Another Schottky diode made using a pure mesa process, such as the authorization announcement number CN203445132U "A Schottky device with simplified process", uses a pure mesa solution on an epitaxial wafer, and coats it with a low-temperature cured organic insulating material, such as Figure 2 shown.
[0003] In all these manufacturing processes, the silicon wafers used are low-concentration epitaxial layers grown directly on high-concentration substrates by epitaxy. Taking N-type silicon wafers as an example, it is an N- / N+ structure. The substrate plays a supporting role, the high-concentration N+ ensures low on-resistance, and the low-concentration N-layer determines the thickness and resistivity of the epitaxial layer according to the voltage and voltage drop of the device. However, the cost of epitaxial wafers is high, accounting for more than 70% of all material costs. Summary of the invention
[0004] In order to reduce the cost of epitaxial growth, the present invention adopts a single wafer bonding method to form a Si-Al-Si (silicon-aluminum-silicon) silicon wafer structure, and adopts a low-temperature table terminal protection process during the chip manufacturing process to form a new Schottky device structure.
[0005] The Schottky barrier diode of the present invention has the following structure: an N+ type semiconductor single crystal is used as a substrate, an aluminum layer is sintered in the middle, an N- type semiconductor single crystal is sintered on the top, and the substrate is thinned and polished to form a substrate. A metal barrier is sputtered on the polished surface to form a front electrode, a table is etched on the edge, and polyimide is cured. A back electrode is deposited on the back of the substrate. Figure 3.
[0006] Silicon-aluminum-silicon substrates are made by growing an aluminum layer for alloy on two silicon wafers to be bonded by evaporation or sputtering, or by placing aluminum foil between two silicon wafers, aligning them with a fixture, applying a certain pressure, and heating them to a certain temperature in a vacuum. The silicon wafer and aluminum are bonded together by alloy melting and resolidification. The alloy temperature of silicon and aluminum is 577°C. When it is lower than this temperature, silicon and aluminum do not react. When the temperature rises to the eutectic temperature of 577°C, aluminum atoms and silicon atoms diffuse with each other at the interface, and a melt composed of 11.3% silicon atoms and 88.7% aluminum atoms is formed at the interface. With the increase of time and the increase of temperature, the interface between the melt and solid silicon gradually extends into the silicon wafer. After a period of constant temperature, the silicon atoms in the alloy melt will reach saturation. After that, the temperature is slowly lowered, the solubility of silicon atoms in the melt will decrease, and the excess silicon atoms will gradually precipitate from the melt to form a recrystallized layer of silicon atoms to bond the silicon wafers together.
[0007] The N- / N+ type silicon substrate grown by direct epitaxial growth has a transition region between the N- and N+ layers, which will lead to an increase in the forward conduction voltage drop, while the silicon-aluminum-silicon substrate does not have a transition region, such as Figure 4 As shown, curve 1 is the concentration distribution of the N- / N+ type silicon substrate grown directly by epitaxial growth, and curve 2 is the silicon-aluminum-silicon substrate with reduced forward voltage drop.
[0008] The substrate of the silicon-aluminum-silicon substrate can use a lower-cost high-concentration low-purity single-crystal silicon, which only plays a supporting and conductive role, further reducing the cost. Thinning and polishing determines the thickness of the chip layer according to the voltage of the device involved.
[0009] The device structure of the present invention must be post-fabricated under low temperature conditions, and all steps cannot exceed 577°C. Therefore, high-temperature processes such as oxidation and diffusion cannot be used. The structure of the present invention is a mesa and polyimide curing protection. After the substrate is completed, the entire tube core manufacturing process is below 570°C.
[0010] The preparation method of the Schottky barrier diode of the present invention comprises the following steps: N+ type substrate sheet - adding aluminum foil - adding N- type or N- / N+ single crystal - sintering - thinning and polishing - evaporating or sputtering barrier metal - metal silicide formation - front evaporation electrode metal - photolithography 1 (table portion) - etching metal - wet or dry etching silicon - coating polyimide and curing - photolithography 2 (welding area) - back metal. The polyimide can be positive or negative, the curing temperature is lower than 400°C, and the thickness is greater than The metal silicide formation temperature is lower than 570°C.
[0011] Compared with the Schottky diode manufactured by the epitaxial method, the material cost of the Schottky diode manufactured by this solution is reduced by more than 30%, and the forward voltage drop is also reduced. BRIEF DESCRIPTION OF THE DRAWINGS
[0012] Figure 1 Schematic diagram of the structure of a standard planar Schottky barrier diode. 1: Upper electrode metal; 2: Barrier metal; 3: N- region of epitaxial wafer; 4: N+ region of epitaxial wafer; 5: Diffusion protection ring.
[0013] Figure 2 The Schottky diode structure made by pure mesa process published
[0014] Figure 3 Schematic diagram of the Schottky diode chip of the silicon-aluminum-silicon substrate structure of the present invention. 10 is an N+ type substrate, 20 is an aluminum layer, 30 is an N-type single crystal (chip layer), 31 is a front barrier and electrode layer, 32 is a polyimide layer, and 5 is a back metal.
[0015] Figure 4 Comparing the transition region, curve 100 is the concentration distribution of the silicon-aluminum-silicon substrate, and curve 2 is the concentration distribution of the N- / N+ type silicon substrate grown directly by epitaxial growth. DETAILED DESCRIPTION
[0016] The present invention is further described below by means of specific examples, but the examples do not limit the protection scope of the present invention.
[0017] Example
[0018] Take a piece of N+ type single crystal (resistivity <2E-3Ω.cm) and a piece of single-side polished N-type single crystal (resistivity 2.5Ω.cm), sandwich a 5um high-purity aluminum foil in the middle, align and clamp it with a fixture, put it in a 600℃ oven for 30 minutes, thin and polish the N-type wafer, leave 10um N-layer, sputter NiPt, 470℃ alloy for 30 minutes, evaporate TiNiAg, photoetch the table, etch the metal, then etch the silicon layer, etch the aluminum layer, then etch the silicon, coat polyimide 500nm, photoetch the polyimide, and cure at 340℃. Finally, thin the N+ substrate to 250um and evaporate TiNiAg on the back.
[0019] The resulting diode has a reverse cutoff (breakdown) voltage of 125V, a reverse leakage current of 5uA, and a forward voltage drop of 0.7V.
[0020] Of course, those skilled in the art should recognize that the above embodiments are only used to illustrate the present invention, and are not intended to limit the present invention. As long as they are within the spirit of the present invention, any changes or modifications to the above embodiments will fall within the scope of the claims of the present invention.
Claims
1. A Schottky barrier diode, characterized in that: include: A silicon-aluminum-silicon semiconductor single crystal wafer is used as a substrate, a barrier layer is formed thereon, and then a metal anode is formed. The edge is shaped into a table structure, and polyimide is used to protect the table. The substrate used in the Schottky barrier diode is a three-layer structure, with metal aluminum in the middle and single crystal silicon on the top and bottom. The edge of the chip is shaped into a table, and the depth of the table is deeper than the chip layer and the aluminum layer.
2. A method for preparing a Schottky barrier diode as claimed in claim 1, characterized in that: The following steps are involved: First, the three silicon-aluminum-silicon layers are alloyed and the chip layer is thinned and polished; then the metal barrier and electrode are formed, the mesa is etched by photolithography, followed by polyimide coating and photolithography, curing and back metal formation.
3. The method for preparing a Schottky barrier diode according to claim 2, characterized in that: The temperature of the aluminum-silicon alloy is higher than the aluminum-silicon eutectic temperature of 577°C, and the temperature used in subsequent chip production is lower than 577°C.
4. The Schottky barrier diode according to claim 2, characterized in that: The mesa etching adopts multi-step etching, etching the front metal-etching silicon-etching aluminum-etching silicon.
Citation Information
Patent Citations
Schottky device with simplified manufacturing process
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