A driving method and device of a current mode charge pump
By detecting the output load conditions and using the output feedback circuit to realize the non-continuous working burst mode of the charge pump, the problem of high power consumption at light loads is solved, and efficient operation under different load conditions is achieved.
Patent Information
- Application Number
- CN202010270993.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2020-04-08
- Publication Date
- 2025-05-02
- Estimated Expiration
- 2040-04-08
AI Technical Summary
The existing current mode charge pumps have high power consumption and low efficiency when the load is light, and the prior art is difficult to effectively reduce power consumption and maintain low output ripple.
By detecting the output load conditions, using the output feedback circuit to generate feedback voltage, it realizes the burst mode of discontinuous operation at light load, skipping multiple switch switching cycles, thereby reducing power consumption; switching to continuous operation mode when the load is large.
While maintaining the controlled output voltage ripple, it significantly reduces the power consumption of the charge pump, improves the working efficiency of the charge pump, and can smoothly transition to different load conditions.
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Figure CN111293879B_ABST
Abstract
Description
Technical Field
[0001] The invention relates to a driving method and a device of a current mode charge pump, belonging to the technical field of charge pump power supply. Background Art
[0002] A charge pump, also known as a switched capacitor voltage converter, is a DC-DC converter that uses so-called "flying" or "pumping" capacitors (rather than inductors or transformers) to store energy. Its working process is to charge and discharge the charge pump under a fixed period of pulses through the switching of switches. A current mode charge pump works by controlling the current of the charge pump through a current source. Generally, the output ripple can be minimized by adjusting the charging and / or discharging current of the charging capacitor according to the load current, so that it is independent of the input voltage and the internal switch resistance. In order to further reduce the impact of output ripple, a multi-phase current mode charge pump is proposed in the prior art, that is, two flying capacitors are alternately charged and transfer charge to the output capacitor in two clock cycles, so that the charge consumption at the output capacitor is kept to a minimum. However, when the load is connected to the output of the charge pump and the load is light, the charge pump, especially the switch of the charge pump, may consume a lot of power during the switching process, resulting in low efficiency. To this end, the pulse driving the switch is selectively disabled during two or more cycles of the clock signal to reduce power consumption.
[0003] Figure 1 The prior art in the art uses output voltage sensing or output average current sensing to detect load changes at the output, and then uses a clock skip controller to skip the pulses of the continuous clock charge pump.
[0004] For a multiphase current mode charge pump, Figure 2 Another prior art technique shown in generates a self-oscillating clock by comparing the voltage on two internal flying capacitors with a reference voltage that drives a flip-flop that generates first and second complementary phase signals.
[0005] Both of the above prior art technologies include a sensing method that reflects the output load change, a comparator that generates a switching frequency that can be adjusted to reduce power consumption with good switch resistance and charging capacitance in the worst case. However, these methods are difficult to implement and become impractical in situations where low output ripple, low load regulation and other noise requirements are required. In addition, the delay and offset of the comparator and the change of the capacitor's ESR will cause a large change in the output voltage ripple. Summary of the invention
[0006] The purpose of the present invention is to provide a driving method and device of a current mode charge pump, which can reduce the power consumption of the charge pump while maintaining the controlled output voltage ripple and improve the working efficiency of the charge pump.
[0007] The technical solution of the present invention is a driving method of a current mode charge pump, characterized in that: by detecting the output load condition, the driving mode is smoothly switched between the burst mode of discontinuous operation and the continuous operation mode; when the output load is small, the burst mode of discontinuous operation is realized by generating pulse jumps on the basis of driving by a preset driving pulse; when the output load is large, it is switched to a continuous operation mode driven by a preset driving pulse. That is, when the load is light, the charge pump can skip multiple switching cycles to reduce power consumption, and the number of skipped cycles depends on the size of the output load, until the output is fully loaded, the charge pump works continuously according to the preset cycle.
[0008] In the above-mentioned driving method of the current mode charge pump, the detection of the output load condition is achieved through the fluctuation of the output voltage.
[0009] In the aforementioned driving method of the current mode charge pump, the fluctuation of the output voltage is used to generate the burst frequency of the burst mode.
[0010] In the aforementioned driving method of the current mode charge pump, the fluctuation of the output voltage is used to generate a feedback current for adjusting the minimum current level of the current source of the current mode charge pump to balance the burst frequency and the output ripple under a lower output load.
[0011] In the aforementioned driving method of the current mode charge pump, the feedback current can also be used to adjust the maximum current level of the current source of the current mode charge pump, and to adjust the ramp rate during the soft start of the current mode charge pump, thereby controlling the start time. The soft start of the current mode charge pump controls the start time and the start slope by controlling the start current. A high clamping current results in a shorter start time, and a low clamping current results in a longer start time.
[0012] A driving device for a current mode charge pump that implements the above-mentioned method includes a charge pump device consisting of a current source, a charging capacitor, an output capacitor and two sets of switching switches; it also includes an output feedback circuit, which is used to detect the fluctuating voltage of the output voltage of the charge pump device and is provided with a first voltage output terminal; the first voltage output terminal is connected to a burst mode controller for generating a pulse skip signal.
[0013] In the aforementioned current mode charge pump driving device, the output feedback circuit includes a transconductance amplifier, one input terminal of the transconductance amplifier is connected to a first reference voltage; the other input terminal is connected to a third reference voltage via a first resistor, and this input terminal is also connected to the output voltage of the charge pump device via a second resistor; the voltage feedback terminal of the transconductance amplifier is a first voltage output terminal.
[0014] In the aforementioned driving device of the current mode charge pump, the current output terminal of the transconductance amplifier is connected to the current source control terminal.
[0015] In the aforementioned driving device of the current mode charge pump, the burst mode controller includes a comparator, two input terminals of the comparator are respectively connected to the second reference voltage and the first voltage output terminal, the output terminal of the comparator is connected to the D interface of the D-type flip-flop, the CLX terminal of the D interface of the D-type flip-flop is connected to the clock signal, the Q interface of the D-type flip-flop is connected to an input terminal of the AND gate, the other input terminal of the AND gate is connected to the D interface of the D-type flip-flop, the output terminal of the AND gate is connected to an input terminal of the NAND gate, the other input terminal of the NAND gate is connected to the output terminal of the NAND gate, the input terminal of the NAND gate is connected to the clock signal, and the output terminal of the NAND gate is connected to the control terminal of the switching switch.
[0016] In the aforementioned driving device of the current mode charge pump, the current output terminal of the transconductance amplifier is grounded through a pull-down resistor and a pull-down capacitor.
[0017] Compared with the prior art, the present invention adds an output feedback circuit for detecting output voltage fluctuations on the basis of the existing current mode charge pump. When the output voltage fluctuates greatly, a feedback voltage is generated, and the comparison result between the feedback voltage and the preset voltage is used to generate a pulse skipping signal that skips the switch switching cycle. Therefore, when the output load is small, the charge pump can enter a burst mode that can skip the preset switch switching cycle, thereby greatly reducing power consumption under light load conditions. At the same time, the output feedback circuit can also provide a minimum current clamp for the current source of the charge pump, which can balance the pulse skipping frequency and output ripple under light load. The present invention can smoothly transition between burst mode and contact mode according to the change in the size of the output load. In addition, the present invention can also clamp the maximum current of the current source, and can adjust the ramp rate of the charge pump during soft start. By Figure 7 It can be seen that the start-up time can be adjusted by adjusting the maximum current. BRIEF DESCRIPTION OF THE DRAWINGS
[0018] Figure 1 It is a schematic diagram of the skip mode control principle of a controlled charge pump in the prior art;
[0019] Figure 2 It is a schematic diagram of the control principle of the self-oscillating clock method in the prior art;
[0020] Figure 3 is a schematic structural diagram of an embodiment of the present invention;
[0021] Figure 4 The burst frequency and output ripple in a light load (load current 5ma) in an application of an embodiment of the present invention are shown.
[0022] Figure 5 The burst frequency and output ripple in a heavy load (load current 80ma) in an application of one embodiment of the present invention are shown.
[0023] Figure 6 The burst frequency and output ripple in a heavy load (load current 100ma) in an application of one embodiment of the present invention are shown.
[0024] Figure 7 Soft starting by maximum current clamping in one embodiment of the present invention is shown. DETAILED DESCRIPTION
[0025] The present invention is further described below in conjunction with the accompanying drawings and embodiments, but they are not intended to limit the present invention.
[0026] Embodiment. A driving device of a current mode charge pump, such as Figure 3 As shown, including the current source I CHG , charging capacitor C1, output capacitor C2 and two sets of switching switches S 1 , S 1b The charge pump device 100 is composed of a charge pump device 100; it also includes an output feedback circuit 300, the output feedback circuit 300 is used to detect the fluctuation voltage of the output voltage Vout of the charge pump device 100, and is provided with a first voltage output terminal 20; the first voltage output terminal 20 is connected to a burst mode controller 310 for generating a pulse skipping signal. The output feedback circuit 300 includes a transconductance amplifier 301, one input terminal of the transconductance amplifier 301 is connected to the first reference voltage V REF1 The other input terminal is connected to the first resistor R1 and the third reference voltage V REF3 The input terminal is also connected to the output voltage Vout of the charge pump device 100 through the second resistor R2; the voltage feedback terminal of the transconductance amplifier 301 is the first voltage output terminal 20. The current output terminal 10 of the transconductance amplifier 301 is connected to the current source I CHG The burst mode controller 310 includes a comparator 101, two input terminals of the comparator 101 are respectively connected to a second reference voltage V REF2 The output terminal of the comparator 101 is connected to the D interface of the D-type flip-flop 102, and the CLX terminal of the D interface of the D-type flip-flop 102 is connected to the clock signal V CLX The Q interface of the D-type flip-flop 102 is connected to an input of the AND gate 103, the other input of the AND gate 103 is connected to the D interface of the D-type flip-flop 102, the output of the AND gate 103 is connected to an input of the NAND gate 104, the other input of the NAND gate 104 is connected to the output of the NOT gate 105, and the input of the NOT gate 105 is connected to the clock signal V CLXThe output end of the NAND gate 104 is connected to the switch S 1 , S 1b The current output terminal 10 of the transconductance amplifier 301 is grounded through a pull-down resistor R3 and a pull-down capacitor C3. The VREF1\VREF3 voltage value determines the final output voltage of the charge pump. The VREF2 voltage setting together with the output 20 of the transconductance amplifier 301 determines the frequency of the burst mode, which can be adjusted according to the application.
[0027] Working principle of the present invention: In order to determine the preferred working mode, the transconductance amplifier can output the load condition and provide a control current (current output terminal 10) to charge or discharge the charging capacitor (flying capacitor). At the same time, it also controls the output voltage V OUT The fluctuation generates a feedback voltage (first voltage output terminal 20). The minimum current clamp on the control current 10 delivers more charge to the charging capacitor set by the transconductance amplifier when the load is light. Therefore, a large output voltage V OUT ripple, which in turn generates a feedback voltage (first voltage output terminal 20) to the burst mode.
[0028] The feedback voltage (first voltage output terminal 20) is coupled to the burst mode controller 310 to determine the operating mode and start the conversion between the two different operating modes of the charge pump 100. To this end, the burst controller 310 provides a control signal for switching the switch to the charge pump 100. The control signal is related to the clock signal V CLK The charge pump 100 is selectively switched between a continuous mode of operation and a discontinuous mode of operation (burst mode) based on the result provided by the transconductance amplifier.
[0029] In summary, the burst mode controller 310 together with the sensing of the output load and the minimum current clamping of the charging or discharging current of the charging capacitor is suitable for controlling the skipping of the drive pulses under light loads applied to the output terminal of the charge pump. The combined approach allows a smooth transition from burst mode to continuous mode and vice versa. The transition itself is independent of the output voltage ripple and is synchronized with the clock signal V CLK synchronous.
[0030] This embodiment is run under three different loads, and the results are as follows.
[0031] Figure 4 The waveforms of the output ripple, burst mode control signal and switch gate control signal to the charge pump device 100 under light load are shown. The setting of the minimum current clamp limits the output ripple to 15 mV and the burst frequency to about 50 kHz. Figure 5 As shown in FIG. 1 , the worst output ripple of only 20 mV occurs at an intermediate load of 80 mA. When the load of the charge pump device 100 reaches its full load, as shown in FIG. Figure 6As shown, the charge pump operates in continuous mode and the output ripple is kept to a minimum of 9mV.
Claims
1. A driving device for a current mode charge pump, characterized in that: Including the current source (I CHG ), charging capacitor (C1), output capacitor (C2) and two sets of switches (S1, S 1b ) composed of a charge pump device (100); further comprising an output feedback circuit (300), the output feedback circuit (300) being used to detect the fluctuation voltage of the output voltage (Vout) of the charge pump device (100), and being provided with a first voltage output terminal (20); the first voltage output terminal (20) being connected to a burst mode controller (310) for generating a pulse skipping signal; the output feedback circuit (300) comprising a transconductance amplifier (301), one input terminal of the transconductance amplifier (301) being connected to a first reference voltage (V REF1 ); the other input terminal is connected to the third reference voltage (V REF3 ), and the input terminal is also connected to the output voltage (Vout) of the charge pump device (100) through a second resistor (R2); the voltage feedback terminal of the transconductance amplifier (301) is the first voltage output terminal (20); the burst mode controller (310) comprises a comparator (101), and the two input terminals of the comparator (101) are respectively connected to the second reference voltage (V REF2 ) is connected to the first voltage output terminal (20), the output terminal of the comparator (101) is connected to the D interface of the D-type flip-flop (102), and the CLX terminal of the D interface of the D-type flip-flop (102) is connected to the clock signal (V CLX ), the Q interface of the D-type flip-flop (102) is connected to an input terminal of the AND gate (103), the other input terminal of the AND gate (103) is connected to the D interface of the D-type flip-flop (102), the output terminal of the AND gate (103) is connected to an input terminal of the NAND gate (104), the other input terminal of the NAND gate (104) is connected to the output terminal of the NOT gate (105), and the input terminal of the NOT gate (105) is connected to the clock signal (V CLX ), the output end of the NAND gate (104) is connected to the switching switch (S1, S 1b ) control end.
2. The driving device of the current mode charge pump according to claim 1, characterized in that: The current output terminal (10) of the transconductance amplifier (301) is connected to a current source (I CHG ) control terminal.
3. The driving device of the current mode charge pump according to claim 2, characterized in that: The current output terminal (10) of the transconductance amplifier (301) is grounded via a pull-down resistor (R3) and a pull-down capacitor (C3).
Citation Information
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Charge pump circuit
CN102684478A
Current mode charge pump device
CN212086064U