A temperature sensor interface with two pins and no polarity restriction

Abstract

The present invention discloses a temperature sensor interface with two pins without polarity limitation, which is used to solve the problem that the pin attributes of the existing temperature sensor chips are fixed, and once the digital signal input terminal and the ground terminal are connected reversely, it will cause the chip to heat up or even burn out. This temperature sensor interface includes: a first pin, a second pin, and a judgment circuit respectively electrically connected to the first pin, the second pin, the power supply circuit, and the signal processing circuit; a signal processing circuit electrically connected to the power supply circuit and the judgment circuit. The present invention has only two external pins and there is no polarity difference between the two pins, and it is not restricted by the connection method. A judgment circuit is provided inside the temperature sensor chip, which can actively judge the voltage levels of the first pin and the second pin, and use the pin with the higher voltage as the digital signal input pin and the pin with the lower voltage as the ground pin, avoiding the problems caused by the reverse connection of the pins, and improving the practicability and safety of the chip.

Description

Technical Field

[0001] The present invention relates to the field of chip technology, and particularly to a temperature sensor interface with two pins and no polarity limitation. Background Art

[0002] Digital temperature sensor: It is a sensor that can convert the physical quantity of temperature into a digital quantity that can be directly read by data acquisition devices such as computers, PLCs, and intelligent meters through a temperature-sensitive element and a corresponding circuit.

[0003] Most of the existing digital temperature sensor chips have three pins: a digital signal I / O terminal, a ground terminal, and an external power supply input terminal. When the sensor works, the digital signal I / O terminal acquires the digital temperature signal, which is directly processed by the signal processing circuit and then output via the digital signal I / O terminal.

[0004] However, the attributes of the three pins of the digital temperature sensor chip in the above-mentioned prior art are fixed. Once the digital signal I / O terminal and the ground terminal are connected reversely, it will cause the digital temperature sensor chip to heat up or even burn out. In addition, the reverse connection of the ports of the digital temperature sensor chip will also result in incorrect output temperature values.

[0005] In summary, it is necessary to propose a temperature sensor chip control circuit that avoids the reverse connection of the pins of the temperature sensor chip. Summary of the Invention

[0006] In order to solve the problems raised in the background art, the present invention provides a digital temperature sensor interface with only two pins, and the two pins have no polarity and are not restricted by the connection method.

[0007] To achieve the above object, the present invention adopts the following technical solutions: A temperature sensor interface with two pins and no polarity limitation, comprising: a first pin, a second pin, a judgment circuit, a power supply circuit, and a signal processing circuit;

[0008] The judgment circuit is electrically connected to the first pin, the second pin, the power supply circuit, and the signal processing circuit respectively;

[0009] The signal processing circuit is electrically connected to the power supply circuit and the judgment circuit.

[0010] Further, the judgment circuit includes: a first MOS transistor M1, a second MOS transistor M2, a third MOS transistor M3, a fourth MOS transistor M4, a fifth MOS transistor M0, a sixth MOS transistor M6, a diode D1, a diode D2, a node DataIn1, and a node DataIn2.

[0011] The first pin is connected to the drain of the fifth MOS transistor, the drain of the first MOS transistor, the positive electrode of the diode D2, and the drain of the third MOS transistor; the source of the fifth MOS transistor is grounded, and the source of the first MOS transistor is grounded; the source of the third MOS transistor is grounded, and the negative electrode of the diode D2 is connected to the power supply circuit.

[0012] The second pin is connected to the drain of the sixth MOS transistor, the drain of the fourth MOS transistor, the positive electrode of the diode D1, and the drain of the second MOS transistor; the source of the sixth MOS transistor is grounded, and the source of the fourth MOS transistor is grounded; the source of the second MOS transistor is grounded, and the negative electrode of the diode D1 is connected to the power supply circuit.

[0013] Furthermore, the power supply circuit includes a capacitor C0;

[0014] One end of the capacitor C0 is respectively connected to the negative electrode of the diode D1 of the judgment circuit, the negative electrode of the diode D2, and the signal processing circuit, and the other end of the capacitor C0 is grounded.

[0015] The present invention has the following advantages:

[0016] (1) A judgment circuit is provided inside, which can actively judge the levels of the input voltages of the two pins, and can use the pin with the higher input voltage as the digital signal input terminal pin and the pin with the lower input voltage as the ground terminal pin. The two pins have no polarity, avoiding the situation where the user connects the pins of the temperature sensor chip reversely during use, resulting in the burning out of the temperature sensor chip or incorrect output.

[0017] (2) The temperature sensor chip has only two pins and the two pins have no polarity, and are not restricted by the connection method, fundamentally improving the practicability and safety of the temperature sensor chip. Description of the Drawings

[0018] Figure 1 It is a connection schematic diagram and a pin schematic diagram of a digital temperature sensor in the prior art;

[0019] Figure 2 It is the internal schematic diagram of the chip and the external pin diagram of the chip provided by the embodiment of the present invention;

[0020] Figure 3 It is the circuit connection schematic diagram of the chip judgment circuit and the power supply circuit provided by the embodiment of the present invention. Detailed Embodiment

[0021] The following are specific embodiments of the present invention and in combination with the drawings, the technical solutions of the present invention are further described, but the present invention is not limited to these embodiments.

[0022] This embodiment provides a temperature sensor interface with two non-polarity-limited pins, such as Figure 2As shown, this interface includes: a first pin, a second pin, a judgment circuit, a power supply circuit, and a signal processing circuit;

[0023] The judgment circuit is electrically connected to the first pin, the second pin, and the power supply circuit respectively;

[0024] The signal processing circuit is electrically connected to the power supply circuit and the judgment circuit.

[0025] When the first pin and the second pin input simultaneously, assuming the input voltage of the first pin is a high voltage and the input voltage of the second pin is a low voltage:

[0026] The judgment circuit judges the two-way input, grounds the second pin with the lower voltage and locks it to power off the temperature sensor chip, and uses the first pin as the digital signal I / O terminal;

[0027] The first pin is connected to the power supply circuit to charge it, and the fully charged power supply circuit can be used as a power supply to supply power to the subsequent signal processing circuit;

[0028] The signal input by the first pin is processed by the signal processing circuit and then output by the first pin again.

[0029] Furthermore, as Figure 2 shown, the judgment circuit includes: a first MOS transistor M1, a second MOS transistor M2, a third MOS transistor M3, a fourth MOS transistor M4, a fifth MOS transistor M0, a sixth MOS transistor M6, a diode D1, a diode D2, a node DataIn1, and a node DataIn2.

[0030] The first pin is connected to the drain of the fifth MOS transistor, the drain of the first MOS transistor, the positive pole of the diode D2, and the drain of the third MOS transistor; the source of the fifth MOS transistor is grounded, and the source of the first MOS transistor is grounded; the source of the third MOS transistor is grounded, and the negative pole of the diode D2 is connected to the power supply circuit;

[0031] The second pin is connected to the drain of the sixth MOS transistor, the drain of the fourth MOS transistor, the positive pole of the diode D1, and the drain of the second MOS transistor; the source of the sixth MOS transistor is grounded, and the source of the fourth MOS transistor is grounded; the source of the second MOS transistor is grounded, and the negative pole of the diode D1 is connected to the power supply circuit.

[0032] The principle of the judgment circuit is as follows:

[0033] Assume that the input voltage of the first pin is a high voltage and the input voltage of the second pin is a low voltage;

[0034] Among them, the second MOS transistor M2 and the third MOS transistor M3 form a latch;

[0035] Since the node DataIn2 is directly connected to the first pin, the input voltage of the first pin is high voltage, the input voltage of the second pin is low voltage, and the second MOS transistor M2 is turned on; at this time, the node DataIn1 is 0 and the node DataIn2 is 1.

[0036] At this time, the current flows from the first pin through the diode D2 to charge the capacitor C0 of the power supply circuit.

[0037] After the capacitor C0 of the power supply circuit is charged, it can be used as VCC to supply power to the subsequent signal processing circuit. The signal processing circuit generates signals LOCK1 and LOCK2 according to the nodes DataIn1 and DataIn2, where LOCK1 is 0 and LOCK2 is 1.

[0038] Since LOCK2 is 1, the sixth MOS transistor is turned on, fixing the second pin to a low level, that is, grounding the second pin and maintaining it until the chip is powered off. And since IO1 is still at a high level, the first pin is used as the digital signal input terminal.

[0039] The first pin is used as the digital signal input terminal to transmit data to the signal processing circuit.

[0040] The signal processing circuit generates Dout control logic according to the input data and generates an output signal at the first pin.

[0041] Among them, Dout is generated according to the actual application. Dout controls the gate of the first MOS transistor M1 to generate a signal opposite to Dout at its drain. Due to the action of the LOCK2 signal, the second pin has been locked at a low level and remains unchanged as the ground terminal, and the Dout signal has no effect on the second pin, that is, the first pin is used as the signal output terminal after being processed by the signal processing circuit.

[0042] Furthermore, the power supply circuit includes a capacitor C0;

[0043] One end of the capacitor C0 is respectively connected to the negative electrode of the diode D1 of the judgment circuit, the negative electrode of the diode D2, and the signal processing circuit, and the other end of the capacitor C0 is grounded.

[0044] The specific embodiments described herein are merely illustrative of the spirit of the present invention. Those skilled in the art of the present invention can make various modifications or supplements to the described specific embodiments or use similar ways to replace them, but will not deviate from the spirit of the present invention or exceed the scope defined by the appended claims.

Claims

1. A temperature sensor interface with no polarity restriction for two pins, characterized in that It includes: A first pin, a second pin, a judgment circuit, a power supply circuit, and a signal processing circuit; The judgment circuit is electrically connected to the first pin, the second pin, the power supply circuit, and the signal processing circuit respectively; The signal processing circuit is electrically connected to the power supply circuit and the judgment circuit; The judgment circuit includes: a first MOS transistor M1, a second MOS transistor M2, a third MOS transistor M3, a fourth MOS transistor M4, a fifth MOS transistor M0, a sixth MOS transistor M6, a diode D1, a diode D2, a node DataIn1, and a node DataIn2; The first pin is connected to the drain of the fifth MOS transistor, the drain of the first MOS transistor, the positive electrode of the diode D2, and the drain of the third MOS transistor; the source of the fifth MOS transistor is grounded, and the source of the first MOS transistor is grounded; the source of the third MOS transistor is grounded, and the negative electrode of the diode D2 is connected to the power supply circuit; The second pin is connected to the drain of the sixth MOS transistor, the drain of the fourth MOS transistor, the positive electrode of the diode D1, and the drain of the second MOS transistor; the source of the sixth MOS transistor is grounded, and the source of the fourth MOS transistor is grounded; the source of the second MOS transistor is grounded, and the negative electrode of the diode D1 is connected to the power supply circuit; The power supply circuit includes a capacitor C0; One end of the capacitor C0 is respectively connected to the negative electrode of the diode D1, the negative electrode of the diode D2 in the judgment circuit, and the signal processing circuit, and the other end of the capacitor C0 is grounded; In the said judgment circuit: The node DataIn2 is directly connected to the first pin. When the input voltage of the first pin is a high voltage and the input voltage of the second pin is a low voltage, the second MOS transistor M2 conducts; at this time, the node DataIn1 is 0, the node DataIn2 is 1, and the current flows from the first pin through the diode D2 to charge the capacitor C0 of the power supply circuit; after the charging is completed, it supplies power to the subsequent signal processing circuit; the signal processing circuit generates signals LOCK1 and LOCK2 according to the node DataIn1 and the node DataIn2; the LOCK1 is 0, and the LOCK2 is 1; Since LOCK2 is 1, the sixth MOS transistor M6 conducts, fixing the second pin to a low level, that is, grounding the second pin and maintaining it until the chip is powered off, while the first pin remains at a high level, then the first pin is used as a digital signal input terminal; the first pin as a digital signal input terminal transmits data to the signal processing circuit; among them, the second MOS transistor M2 and the third MOS transistor M3 form a latch.

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