A Reworking Method for Heterojunction Solar Cells

Abstract

The present invention discloses a rework method for a heterojunction cell, comprising the following steps: (1) immersing the plating-around end of the heterojunction cell in an etching solution for etching, wherein the heterojunction cell is provided with an auxiliary electrode grid line; (2) after the etching is completed, taking out the cell and performing post-treatment. By means of the auxiliary electrode grid line arranged at the edge of the cell and utilizing the isotropic reaction principle of easy etching with high-concentration alkali, the silicon thin film doping layer at the plating-around end of the cell edge is successfully removed, solving the electricity caused by short circuit at the cell edge, turning the heterojunction cell with poor battery parameters from waste into treasure, improving the yield of the cells on the production line, reducing the production cost, and not causing problems with the appearance of the cell itself.

Description

Technical Field

[0001] The present invention relates to the technical field of solar cells, and particularly to a rework method for heterojunction cell wafers. Background Art

[0002] The basic structure of SHJ cell wafers (Silicon Hetero-junction Solar Cell, silicon heterojunction solar cell wafers, hereinafter referred to as heterojunction cell wafers) is as Figure 1 shown, including a single-crystalline silicon wafer 1a, an intrinsic amorphous silicon-based thin film layer 2a, an n-type doped layer 3a, a p-type doped layer electrode 4a, a transparent conductive thin film layer 5a, and electrode grid lines 6a (usually including main grid lines and fine grid lines): Among them, the single-crystalline silicon wafer 1a can be an n-type or p-type single-crystalline silicon wafer with a thickness of 90 - 300 μm; the intrinsic amorphous silicon-based thin film layer 2a, such as an amorphous silicon intrinsic layer a-Si:H(i), an amorphous silicon oxide intrinsic layer a-SiOx:H(i), an amorphous silicon carbide intrinsic layer a-SiCx:H(i), etc., with a thickness < 15 nm; the n-type doped layer 3a, such as an n-type amorphous silicon layer a-Si:H(n), an n-type amorphous silicon oxide layer a-SiOx:H(n), an n-type microcrystalline silicon oxide layer μc-SiOx:H(n), etc., with a thickness < 25 nm; the p-type emitter 4a, such as a p-type amorphous silicon layer a-Si:H(p), a p-type microcrystalline silicon layer μc-SiOx:H(p), a p-type microcrystalline silicon oxide layer μc-SiOx:H(p), etc., with a thickness < 25 nm; optionally, the positions of 3a and 4a can be swapped. That is: if 3a is a p-type doped layer, then 4a is an n-type doped layer; the transparent conductive thin film layer 5a, such as indium tin oxide thin film ITO, indium tungsten oxide thin film IWO, indium cesium oxide thin film ICO, aluminum-doped zinc oxide thin film AZO, etc., with a thickness controlled at 70 - 100 nm; optionally, an anti-reflection layer is added on the transparent conductive oxide layer 5a; the electrode grid lines 6a can be screen-printed Ag electrodes or electroplated Cu electrodes, etc.

[0003] In the prior art, after the IV test of the cell wafers, an infrared imager is used to sort the cell wafers, and it is found that some heterojunction cell wafers have infrared imaging edge leakage. After such heterojunction cell wafers are made into modules, under light conditions, they will break down at the leakage point, resulting in serious battery parameter defects and appearance defects. On the production line, such cell wafers will be defined as scrap products. Summary of the Invention

[0004] Aiming at the deficiencies of the prior art, the object of the present invention is to propose a rework method for heterojunction cell wafers. This rework method can turn waste heterojunction cell wafers with poor battery parameters into useful products in a simple way, improve the yield rate of cell wafers on the production line, reduce production costs, and will not cause problems with the appearance of the cell wafers themselves.

[0005] For the above purposes, a rework method for a heterojunction cell provided by the present invention includes the following steps:

[0006] (1) Immerse the plating-around end of the heterojunction cell in an etching solution. The heterojunction cell is provided with auxiliary electrode grid lines.

[0007] (2) After the etching is completed, take out the cell and perform post-treatment.

[0008] In some embodiments of the present invention, in step, the auxiliary electrode grid lines can be provided simultaneously with the main grid lines and fine grid lines of the heterojunction cell, or on the heterojunction cell provided with main grid lines and fine grid lines, auxiliary electrode grid lines are further provided.

[0009] In some embodiments of the present invention, in step, the auxiliary electrode grid lines are arranged in a circle along the edge of the electroheterojunction cell.

[0010] In some embodiments of the present invention, in step, the auxiliary electrode grid lines are provided on both the front and back surfaces of the heterojunction cell.

[0011] In some embodiments of the present invention, the distance from the auxiliary electrode grid lines to the edge of the heterojunction cell is 1-2 mm.

[0012] In some embodiments of the present invention, in step, the auxiliary electrode grid lines are Ag grid lines. The width of the Ag grid lines is 40-100 μm, and the height of the Ag grid lines is 15 μm-100 μm.

[0013] In some embodiments of the present invention, in step (1), the depth at which the plating-around end of the electroheterojunction cell is immersed in the etching solution is not greater than the distance from the auxiliary electrode grid lines to the edge of the heterojunction cell.

[0014] In some embodiments of the present invention, in step (1), the depth at which the plating-around end of the electroheterojunction cell is immersed in the etching solution is 0.1-1 mm.

[0015] In some embodiments of the present invention, in step (1), the etching solution includes a KOH solution and / or a NaOH solution, and the mass percentage concentration of the KOH solution or the NaOH solution is 20-50%.

[0016] In some embodiments of the present invention, the etching solution is a KOH solution, and the mass percentage concentration of the KOH solution is 40%.

[0017] In some embodiments of the present invention, in step (1), the temperature of the etching is 30-90 °C, and the time of the etching is 10-30 minutes.

[0018] In some embodiments of the present invention, the temperature of the etching is 70 °C and the time of the etching is 20 minutes.

[0019] In some embodiments of the present invention, in the above step, the auxiliary electrode grid lines are arranged by screen printing.

[0020] Compared with the prior art, the present invention has the following beneficial effects:

[0021] By arranging the auxiliary electrode grid lines at the edge of the cell and utilizing the isotropic reaction principle of easy high-concentration alkali etching, the present invention successfully removes the silicon thin film doping layer at the edge plating end of the cell, solves the electricity caused by the short circuit at the edge of the cell, turns the heterojunction cell with poor battery parameters into a useful one, improves the yield rate of the cells on the production line, reduces the production cost, and does not cause the problem of poor appearance of the cell itself. Description of the Drawings

[0022] Figure 1 It is a schematic cross-sectional view of a conventional heterojunction cell;

[0023] Figure 2 It is a schematic diagram of silicon-based thin film edge plating of the cell;

[0024] Figure 3 It is an infrared imaging diagram after edge plating of the cell;

[0025] Figure 4 It is a flowchart of the rework method for the heterojunction cell described in the present invention;

[0026] Figure 5 It is a schematic structural diagram of the auxiliary electrode grid line described in the present invention;

[0027] Figure 6 It is a schematic structural diagram of the processing system of the cell described in the present invention;

[0028] Figure 7 It is a connection relationship diagram of the present invention;

[0029] Figure 8 It is a schematic structural diagram of the bracket described in the present invention;

[0030] Figure 9 It is a schematic structural diagram of the heating element described in the present invention;

[0031] Figure 10 It is an infrared imaging comparison diagram of the heterojunction cell processed by the rework method in Example 1. Detailed Embodiments

[0032] To make the objectives, technical solutions, and advantages of the present invention more clearly understood, the following further describes the present invention in detail with reference to specific embodiments and the accompanying drawings.

[0033] The cross-section of a conventional heterojunction cell is as shown in Figure 1 When the silicon wafer after texturing and cleaning is placed in a PECVD (Plasma Enhanced Chemical Vapor Deposition) or HWCVD (Hot Wire Chemical Vapor Deposition) device to sequentially deposit layers 2a, 3a and 2a, 4a, there will be a small amount of overplating phenomenon within a range of about 1 mm at the edge (as shown in Figure 2 ), which causes a certain proportion of heterojunction cells to have edge short-circuit phenomenon. The main manifestation is that the parallel resistance R of the cell is sh < 50 Ω, and infrared imaging shows edge leakage. As shown in Figure 3 , Figure 3 shows that there is serious leakage at the upper left corner of the cell. After such heterojunction cells are made into modules, under light illumination, they will be broken down at the leakage point, resulting in serious deterioration of battery parameters and appearance defects.

[0034] To solve the problem of edge short-circuit of heterojunction cells caused by the overplating phenomenon, the overplated end of the heterojunction cell is immersed in the etching solution for etching. The inventors found that the etching solution itself has surface tension and siphon phenomenon. During the etching process, in addition to etching the overplated end, the etching solution will also over-etch, such as etching the TCO (Transparent Conductive Oxide) layer, resulting in poor appearance of the cell after etching. To solve the overplating problem and the over-etching problem (such as the poor appearance of the cell after etching), the inventors provide a rework method for heterojunction cells, which can not only remove the silicon thin film doping layers 3a and 4a at the overplated end, but also will not cause over-etching and will not lead to poor appearance problems of the cell itself.

[0035] As shown in Figure 4 , a rework method for heterojunction cells provided in this embodiment includes the following steps:

[0036] (1) Immerse the overplated end of the heterojunction cell 8 in the etching solution 7 for etching. The heterojunction cell 8 is provided with an auxiliary electrode grid line 12;

[0037] (2) After etching is completed, take out the cell and perform post-treatment.

[0038] In the present invention, the post-treatment includes cleaning (such as rinsing with water) and drying (such as blowing dry).

[0039] The existing electrode grid lines include a plurality of main grid lines 13 and a plurality of fine grid lines 14 (for example Figure 1In 6a), several main grid lines 13 are parallel to each other, several fine grid lines 14 are parallel to each other, and the main grid lines 13 and the fine grid lines 14 are perpendicular to each other. In this embodiment, an auxiliary electrode grid line 12 is added to the existing structure of the electrode grid lines (the main grid line 13 and the fine grid line 14). Specifically, the auxiliary electrode grid line 12 is arranged on the heterojunction cell 8. The arrangement of the auxiliary electrode grid line 12 can be carried out simultaneously with the arrangement of the main grid line 13 and the fine grid line 14. After the arrangement is completed, an infrared imager is used to observe whether there is a phenomenon of overplating on the heterojunction cell 8. If there is an overplating phenomenon, the overplated end of the overplated heterojunction cell 8 is immersed in the etching solution 7 for etching; or the auxiliary electrode grid line 12 is arranged on the heterojunction cell 8 on which the main grid line 13 and the fine grid line 14 have been arranged, that is, the main grid line 13 and the fine grid line 14 are arranged first, and then an infrared imager is used to observe whether there is an overplating phenomenon on the heterojunction cell 8. If there is an overplating phenomenon, the auxiliary electrode grid line 12 is arranged on the overplated heterojunction cell 8, and then the overplated end of the overplated heterojunction cell 8 is immersed in the etching solution 7 for etching.

[0040] In other specific embodiments of the present invention, the auxiliary electrode grid line 12 is arranged by means of screen printing. Among them, the main grid line 13 and the fine grid line 14 can also be arranged by means of screen printing.

[0041] In a specific embodiment, in step (1), as Figure 5 shown, the auxiliary electrode grid line 12 is arranged in a circle along the edge of the heterojunction cell 8. In a specific embodiment, the auxiliary electrode grid line 12 is arranged on both the front and back surfaces of the heterojunction cell 8.

[0042] In this embodiment, the distance from the auxiliary electrode grid line 12 to the edge of the heterojunction cell 8 is 1-2 mm.

[0043] In this embodiment, the auxiliary electrode grid line 12 is arranged on the heterojunction cell 8, and the distance from the auxiliary electrode grid line 12 to the edge of the heterojunction cell 8 is 1-2 mm. The auxiliary electrode grid line 12 can strictly control the etching solution 7 below the auxiliary electrode grid line 12, and can effectively prevent the etching solution 7 from continuously etching the TCO (transparent conductive oxide) layer on the front and back surfaces due to the tension and siphon phenomena.

[0044] In the prior art, the method for removing the plating-around end is as follows: First, a mask area is set to protect the area that does not need to be etched (such as the TCO layer), then the silicon thin film doping layer at the plating-around end is removed by using an etching solution, and then the mask area is removed. That is, the steps for removing the plating-around end in the prior art are complex. In this embodiment, since electrode grid lines also need to be set in the prior art, and the present application only needs to use existing equipment without changing the existing equipment, a week of auxiliary electrode grid lines 12 can be set at the edge of the heterojunction cell 8, and the auxiliary electrode grid lines 12 do not need to be removed in the subsequent steps and can be left for use as electrodes.

[0045] As an embodiment, in step (1), the auxiliary electrode grid lines 12 are Ag grid lines. The width of the Ag grid lines is 40 - 100 μm, and the height of the Ag grid lines is 15 μm - 100 μm. A week of Ag grid lines is set at the edge of the heterojunction cell 8, and Ag grid lines are provided on both the front and back. The Ag grid lines can strictly control the etching solution 7 under the Ag grid lines and can effectively prevent the etching solution 7 from continuously etching the TCO layers on the front and back due to tension and siphon phenomena.

[0046] As an embodiment, the depth of the plating-around end of the heterojunction cell 8 immersed in the etching solution 7 is not greater than the distance from the auxiliary electrode grid lines 12 to the edge of the heterojunction cell 8.

[0047] Optionally, the depth of the plating-around end of the heterojunction cell 8 immersed in the etching solution 7 is 0.1 - 1 mm. There will be a small amount of plating-around phenomenon within the range of the edge to 1 mm. Controlling the depth of the plating-around end of the heterojunction cell 8 immersed in the etching solution 7 within the range of 0.1 - 1 mm can successfully remove the silicon thin film doping layers 3a and 4a at the plating-around end. At the same time, due to the blocking effect of the auxiliary electrode grid lines 12 set at the edge of the heterojunction cell 8, the performance and appearance of the cell will not be damaged.

[0048] In this embodiment, the plating-around end of the heterojunction cell 8 provided with the auxiliary electrode grid lines 12 can be placed in a rework device for etching, that is, step (1) is carried out in the cell processing system, as Figure 6 and Figure 7 shown, the rework device includes a container 1, a bracket 2, a detection device 3, and an etching solution 7. The container 1 is used to hold the etching solution 7. The bracket 2 is arranged in the container 1. The bracket 2 is used to carry the cell 8 and immerse the plating-around end of the cell 8 in the etching solution 7;

[0049] The detection device 3 is used to detect the depth of the plating-around end of the cell 8 immersed in the etching solution 7.

[0050] According to some specific embodiments of the present invention, the processing system further includes a controller 4, and the controller 4 is electrically connected to the detection device 3. In a specific embodiment, the detection device 3 includes a liquid level sensor; the liquid level sensor can be used to detect the depth of the plating-around end of the heterojunction cell 8 immersed in the etching solution 7; the controller 4 is electrically connected to the liquid level sensor, and the controller 4 is configured to receive the signal sent by the liquid level sensor and control the depth of the plating-around end of the heterojunction cell 8 immersed in the etching solution 7 to be not greater than the distance from the auxiliary electrode grid line 12 to the edge of the heterojunction cell 8.

[0051] In this embodiment, a liquid inlet pipe 9 (etching solution 7 inlet) and a liquid outlet pipe 10 (etching solution 7 outlet) are provided at the bottom end of the container 1. The liquid inlet pipe 9 is communicated with a replenishing device of the etching solution 7, the liquid outlet pipe 10 can be communicated with an etching solution collection tank, and a liquid inlet switch 5 and a liquid outlet switch 6 are respectively arranged on the liquid inlet pipe 9 and the liquid outlet pipe 10. The liquid inlet switch 5 and the liquid outlet switch 6 are respectively arranged on both sides of the container 1 and are connected to the controller 4, and the controller 4 controls the opening or closing of the liquid inlet switch 5 and the liquid outlet switch 6. The liquid inlet switch 5 and the liquid outlet switch 6 are both electromagnetic switches.

[0052] In practical applications, the liquid level height detected by the detection device 3 (such as a liquid level sensor) is fed back to the controller 4, and then the controller 4 controls the opening or closing of the liquid inlet switch 5 and the liquid outlet switch 6 to control the depth of the plating-around end of the heterojunction cell 8 immersed in the etching solution 7 to be not greater than the distance from the auxiliary electrode grid line 12 to the heterojunction cell 8, that is, to control the depth of the plating-around end of the heterojunction cell 8 immersed in the etching solution 7 to be 0.1 - 1 mm. Specifically, when the detection device 3 detects that the depth of the plating-around end of the heterojunction cell 8 immersed in the etching solution 7 is less than 0.1 mm, a signal is sent to the controller 4, and after receiving the signal, the controller 4 controls the liquid inlet switch 5 to open, and the etching solution 7 flows into the container 1 from the replenishing device through the liquid inlet pipe 9; when the detection device 3 detects that the depth of the plating-around end of the heterojunction cell 8 immersed in the etching solution 7 is greater than 1 mm, a signal is sent to the controller 4, and after receiving the signal, the controller 4 controls the liquid outlet switch 6 to open, and the etching solution 7 flows out of the container 1 through the liquid outlet pipe 10.

[0053] In this embodiment, in step (1), the etching solution 7 is an alkaline etching solution, and the alkaline etching solution 7 is a KOH solution and / or a NaOH solution, and the mass percentage concentration of the KOH solution or the NaOH solution is 20 - 50%. Preferably, the etching solution 7 is a KOH solution, and the mass percentage concentration of the KOH solution is 40%.

[0054] In this embodiment, the processing system of the cell further includes a heating element 11, and the heating element 11 is arranged at the bottom of the container 1 for heating the etching solution 7. For exampleFigure 9 As shown, the heating element 11 is a heating wire, and a corrosion-resistant layer 111 is provided on the outside of the heating wire. The corrosion-resistant material can be polyvinylidene fluoride (PVDF) or polypropylene (PP) to reduce the corrosion of the heating wire by the corrosion liquid 7.

[0055] In this embodiment, in step (1), the temperature of the corrosion by the corrosion liquid 7 is 30 - 90 °C, and the time of the corrosion by the corrosion liquid 7 is 10 - 30 minutes. Preferably, the temperature of the corrosion is 70 °C, and the time of the corrosion is 20 minutes.

[0056] As an embodiment, when the wrap plating occurs at both ends of the heterojunction cell 8, the following steps are further included: immersing the other wrap plating end of the dried heterojunction cell 8 into the corrosion liquid 7 for corrosion.

[0057] As Figure 6 shown, the heterojunction cell 8 can be vertically inserted into the bracket 2, and the bracket 2 plays a role in fixing the heterojunction cell 8. In practical applications, the phenomenon of wrap plating of the heterojunction cell 8 has a certain probability of occurrence. It may not occur or may occur. In practical applications, infrared imaging can be used to observe whether there is a wrap plating phenomenon on the heterojunction cell 8, and whether the wrap plating occurs at one end or both ends of the heterojunction cell 8. If it occurs at one end of the heterojunction cell 8, immerse the wrap plating end of the heterojunction cell 8 into the corrosion liquid 7. After the corrosion liquid 7 removes the silicon thin film doping layers 3a and 4a at the wrap plating end, take out the heterojunction cell 8, rinse it with deionized water (DI Water) and dry it; if it occurs at both ends of the heterojunction cell 8, immerse one wrap plating end of the heterojunction cell 8 into the corrosion liquid 7. After the corrosion liquid 7 removes the silicon thin film doping layers 3a and 4a at the wrap plating end, take out the heterojunction cell 8, rinse it with deionized water (DI Water) and dry it, then immerse the other wrap plating end of the heterojunction cell 8 into the corrosion liquid 7 to continue the corrosion until the silicon thin film doping layers 3a and 4a at this wrap plating end are also removed, and then take out the heterojunction cell 8, rinse it with deionized water (DI Water) and dry it.

[0058] As Figure 8 shown, the bracket 2 includes a vertical plate 21, side vertical plates 22 and a plurality of partition plates 23. On the opposite surfaces of the two side vertical plates 22, partition plates 23 arranged at equal intervals are correspondingly provided, and a tooth groove is formed between adjacent partition plates 23. The heterojunction cell 8 is simultaneously inserted into two opposite tooth grooves 24.

[0059] In this embodiment, the bracket 2 adopts an independent vertical plate 21 and side vertical plates 22, which facilitates maintenance, disassembly and recombination, reduces costs, and enables more thorough cleaning and maintenance; a chamfer is provided on one side of the partition plate 23 away from the side vertical plate 22, which can reduce the fragmentation caused by the sharp corners of the battery cell 8 colliding with the partition plate 23.

[0060] In this embodiment, the bracket 2 is a corrosion-resistant bracket; a handle 25 is provided on the outer wall of the side vertical plate 22, and the provision of the handle 25 facilitates operation.

[0061] In this embodiment, the materials of the bracket 2 and the container 1 are polyvinylidene fluoride (PVDF) or polypropylene (PP).

[0062] When the wrap plating occurs at both ends of the heterojunction battery cell 8, the method in the present invention further includes the following steps: immersing the other wrap plating end of the dried heterojunction battery cell 8 in the etching solution 7 for etching, that is, it can also be carried out in the processing system of the battery cell.

[0063] The following further describes the technical solutions provided by the present invention in conjunction with specific embodiments. The following embodiments are only used to illustrate the present invention and do not limit the protection scope of the present invention.

[0064] Embodiment 1

[0065] A rework method for a heterojunction battery cell provided in this embodiment includes the following steps:

[0066] (1) A week of auxiliary electrode grid lines (Ag grid lines) are provided on the edge of the Figure 3 heterojunction battery cell by screen printing. Auxiliary electrode grid lines (Ag grid lines) are provided on both the front and back of the heterojunction battery cell. The distance from the auxiliary electrode grid lines to the edge of the heterojunction battery cell is 1-2 mm, the width is 70 μm, and the height is 20 μm;

[0067] Immerse the wrap plating end of the heterojunction battery cell provided with the auxiliary electrode grid lines in a KOH solution with a mass percentage concentration of 40% and etch at 70 °C for 20 minutes;

[0068] (2) After the etching is completed, take out the battery cell, rinse it with water and dry it.

[0069] Figure 3 is the infrared imaging diagram after the wrap plating at the edge of the battery cell, showing serious leakage at the upper left corner of the battery, R sh = 13 Ω. Figure 10 The infrared imaging comparison diagram of the SHJ battery processed by the method in Embodiment 1 is given, R sh= 146 Ω. From the comparison results, it can be seen that the heterojunction solar cells on the production line are successfully converted into usable solar cells through the rework method of this embodiment, improving the yield rate of the solar cells on the production line. At the same time, the appearance of the solar cells is good.

[0070] Example 2

[0071] A rework method for heterojunction solar cells provided in this embodiment includes the following steps:

[0072] (1) Using screen printing, a week of auxiliary electrode grid lines (Ag grid lines) are set on the edge of the silicon wafer of the heterojunction solar cell, and auxiliary electrode grid lines (Ag grid lines) are set on both the front and back. The distance from the auxiliary electrode grid lines to the edge of the heterojunction solar cell is 1 - 2 mm, the width is 80 μm, and the height is 25 μm;

[0073] Immerse the plating - around end of the heterojunction solar cell with the auxiliary electrode grid lines (Ag grid lines) in a NaOH solution with a mass percentage concentration of 20%, and corrode at 50 °C for 30 minutes;

[0074] (2) After corrosion, take out the solar cell, rinse it with water and dry it. After detection, there is no plating - around phenomenon, and the appearance of the solar cell is good.

[0075] Example 3

[0076] A rework method for heterojunction solar cells provided in this embodiment includes the following steps:

[0077] Same as Example 1, the difference is that the width of the auxiliary electrode grid lines is 50 μm and the height is 15 μm;

[0078] Immerse the plating - around end of the heterojunction solar cell with the auxiliary electrode grid lines (Ag grid lines) in a KOH solution with a mass percentage concentration of 50%, and corrode at 90 °C for 10 minutes. After detection, there is no plating - around phenomenon, and the appearance of the solar cell is good.

[0079] Those of ordinary skill in the art should understand that: the discussion of any above - mentioned embodiment is only exemplary, and is not intended to imply that the scope of the present disclosure (including the claims) is limited to these examples; under the concept of the present invention, the technical features between the above - mentioned embodiments or different embodiments can also be combined, and there are many other variations in different aspects of the present invention as described above, which are not provided in detail for the sake of brevity. Therefore, any omission, modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included within the protection scope of the present invention.

Claims

1. A rework method for a heterojunction cell, characterized in that It includes the following steps: (1) Immerse the plating-around end of the heterojunction cell in the etching solution for etching. The heterojunction cell is provided with auxiliary electrode grid lines. (2) After the etching is completed, take out the cell and perform post-treatment. In the above step, the setting of the auxiliary electrode grid lines is carried out simultaneously with the setting of the main grid lines and the fine grid lines on the heterojunction cell. In the above step, the auxiliary electrode grid lines are arranged in a circle along the edge of the heterojunction cell. In the above step, the auxiliary electrode grid lines are arranged on both the front and back of the heterojunction cell. In the above step, the distance from the auxiliary electrode grid lines to the edge of the heterojunction cell is 1 - 2 mm. In the above step, the auxiliary electrode grid lines are Ag grid lines. The width of the Ag grid lines is 40 - 100 μm, and the height of the Ag grid lines is 15 - 100 μm. In step (1), the depth of immersion of the plating-around end in the etching solution is not greater than the distance from the auxiliary electrode grid lines to the edge of the heterojunction cell. In step (1), the depth of immersion of the plating-around end in the etching solution is 0.1 - 1 mm. In step (1), the etching solution includes KOH solution and / or NaOH solution, and the mass percentage concentration of the KOH solution or NaOH solution is 20 - 50%. In step (1), the temperature of the etching is 30 - 90 °C, and the time of the etching is 10 - 30 minutes. In the above step, the auxiliary electrode grid lines are set by screen printing.

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