Display device

Abstract

A display device is provided, comprising: a first pixel coupled to a first data line; a second pixel coupled to a second data line; a first node receiving a first node voltage; a first grayscale voltage generator for generating a first grayscale voltage; a second grayscale voltage generator for generating a second grayscale voltage; and a data driver configured to apply a first data signal generated based on one of the first grayscale voltages to the first data line, and to apply a second data signal generated based on one of the first node voltage, the first grayscale voltage, and the second grayscale voltage to the second data line.

Description

[0001] This application claims priority to and the benefit of Korean Patent Application No. 10-2019-0010117 filed on January 25, 2019, in the Korean Intellectual Property Office, the disclosure of which is incorporated herein in its entirety by reference. Technical Field

[0002] The present disclosure generally relates to a display device. Background Art

[0003] As information technology develops, the importance of display devices as a connection medium between users and information is increasing. Therefore, display devices such as liquid crystal display devices and organic light emitting display devices are increasingly used.

[0004] The display device may have a fingerprint sensor for user authentication. The fingerprint sensor may be an optical fingerprint sensor.

[0005] The display device irradiates light having high brightness onto the fingerprint of the user using an irradiation light source, and the optical fingerprint sensor detects reflected light of the irradiation light, thereby being able to detect the shape of the fingerprint of the user.

[0006] The display device may use pixels as an illumination light source. Therefore, it is necessary that the pixels located in the fingerprint sensing area should locally emit light with high brightness. However, the display device according to the prior art includes a single grayscale voltage generator, so when the pixels located in the fingerprint non-sensing area display a high grayscale level, light with high brightness may be unintentionally emitted. Summary of the invention

[0007] The embodiment provides a display device in which display of a fingerprint sensing area can be normally maintained uniform even when a pixel located in a fingerprint non-sensing area locally emits light having high brightness.

[0008] According to one aspect of the present disclosure, a display device is provided, comprising: a first pixel coupled to a first data line; a second pixel coupled to a second data line; a first node receiving a first node voltage; a first grayscale voltage generator configured to generate a first grayscale voltage; a second grayscale voltage generator configured to generate a second grayscale voltage; and a data driver configured to apply a first data signal generated based on one of the first grayscale voltages to the first data line, and to apply a second data signal generated based on the first node voltage, the first grayscale voltage, and one of the second grayscale voltages to the second data line.

[0009] The data driver may include a digital-to-analog conversion unit. The digital-to-analog conversion unit may include: a first digital-to-analog converter having an input terminal coupled to the first gray voltage generator and an output terminal coupled to the first data line; a multiplexer having input terminals coupled to the first node, the first gray voltage generator, and the second gray voltage generator; and a second digital-to-analog converter having an input terminal coupled to the output terminal of the multiplexer and an output terminal coupled to the second data line.

[0010] The first gray voltage generator may generate a first gray voltage by dividing a difference between a first high voltage applied to a first high voltage terminal and a first low voltage applied to a first low voltage terminal, and the second gray voltage generator may generate a second gray voltage by dividing a difference between a second high voltage applied to a second high voltage terminal and a second low voltage applied to a second low voltage terminal.

[0011] The first node may be coupled to the first low voltage terminal.

[0012] The first node may also be coupled to a second low voltage terminal.

[0013] The multiplexer may provide the first grayscale voltage to the second digital-to-analog converter during a first time period, provide the first node voltage to the second digital-to-analog converter during a second time period after the first time period, and provide the second grayscale voltage to the second digital-to-analog converter during a third time period after the second time period. The first time period, the second time period, and the third time period may be included in one image frame time period.

[0014] The multiplexer may provide the first node voltage to the second digital-to-analog converter during a fourth time period after the third time period, and provide the first grayscale voltage to the second digital-to-analog converter during a fifth time period after the fourth time period. The first time period, the second time period, the third time period, the fourth time period, and the fifth time period may be included in one image frame time period.

[0015] The first grayscale voltage generator may include: a first color grayscale voltage generator, configured to generate a first color grayscale voltage from among the first grayscale voltages for representing a first color; a second color grayscale voltage generator, configured to generate a second color grayscale voltage from among the first grayscale voltages for representing a second color different from the first color; and a third color grayscale voltage generator, configured to generate a third color grayscale voltage from among the first grayscale voltages for representing a third color different from the first color and the second color.

[0016] The second grayscale voltage generator may include: a fourth color grayscale voltage generator, configured to generate a fourth color grayscale voltage from the second grayscale voltage for representing a fourth color; and a fifth color grayscale voltage generator, configured to generate a fifth color grayscale voltage from the second grayscale voltage for representing a fifth color different from the fourth color.

[0017] Each of the fourth color and the fifth color may correspond to one of the first color, the second color, and the third color.

[0018] The first pixel may be located in a fingerprint non-sensing area in the display area, and the second pixel may be located in a fingerprint sensing area in the display area.

[0019] According to another aspect of the present disclosure, a display device is provided, the display device including: a first pixel coupled to a first data line, the first pixel being located in a fingerprint non-sensing area in a display area; a second pixel coupled to a second data line, the second pixel being located in a fingerprint sensing area in the display area; a first node, a first node voltage being applied to the first node; a first grayscale voltage generator configured to generate a first grayscale voltage; a second grayscale voltage generator configured to generate a second grayscale voltage; and a data driver configured to apply a first data signal generated based on one of the first node voltage, the first grayscale voltage, and the second grayscale voltage to the first data line, and to apply a second data signal generated based on one of the first node voltage, the first grayscale voltage, and the second grayscale voltage to the second data line.

[0020] The data driver may include a digital-to-analog conversion unit. The digital-to-analog conversion unit may include: a first multiplexer having an input terminal coupled to a first node, a first gray voltage generator, and a second gray voltage generator; a first digital-to-analog converter having an input terminal coupled to an output terminal of the first multiplexer and an output terminal coupled to a first data line; a second multiplexer having an input terminal coupled to the first node, the first gray voltage generator, and the second gray voltage generator; and a second digital-to-analog converter having an input terminal coupled to an output terminal of the second multiplexer and an output terminal coupled to a second data line.

[0021] The first gray voltage generator may generate a first gray voltage by dividing a difference between a first high voltage applied to a first high voltage terminal and a first low voltage applied to a first low voltage terminal, and the second gray voltage generator may generate a second gray voltage by dividing a difference between a second high voltage applied to a second high voltage terminal and a second low voltage applied to a second low voltage terminal.

[0022] The first node may be coupled to the first low voltage terminal.

[0023] The first node may also be coupled to a second low voltage terminal.

[0024] The second multiplexer may provide the first gray voltage to the second digital-to-analog converter during a first time period, provide the first node voltage to the second digital-to-analog converter during a second time period after the first time period, and provide the second gray voltage to the second digital-to-analog converter during a third time period after the second time period. The first time period, the second time period, and the third time period may be included in one image frame time period.

[0025] The second multiplexer can provide the first node voltage to the second digital-to-analog converter during a fourth time period after the third time period, and provide the first grayscale voltage to the second digital-to-analog converter during a fifth time period after the fourth time period. The first time period, the second time period, the third time period, the fourth time period, and the fifth time period are part of an image frame time period. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Example embodiments will now be described more fully hereinafter with reference to the accompanying drawings; however, these example embodiments may be implemented in different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the example embodiments to those skilled in the art.

[0027] Figure 1 and Figure 2 is a view showing a display device according to an embodiment of the present disclosure.

[0028] Figure 3 is a diagram illustrating a display panel according to an embodiment of the present disclosure.

[0029] Figure 4 and Figure 5 is a diagram showing a pixel according to an embodiment of the present disclosure.

[0030] Figures 6 to 9 is a diagram illustrating a first gray voltage generator and a second gray voltage generator according to an embodiment of the present disclosure.

[0031] Fig.10 is a diagram illustrating a data driver according to an embodiment of the present disclosure.

[0032] Fig.11 is a diagram illustrating brightness of a fingerprint sensing area and its surroundings according to an embodiment of the present disclosure.

[0033] Fig.12 is a diagram illustrating a data driver according to another embodiment of the present disclosure. DETAILED DESCRIPTION

[0034] Hereinafter, example embodiments will be described in more detail with reference to the accompanying drawings, wherein the same reference numerals always represent the same elements. However, the present invention can be implemented in various different forms and should not be interpreted as being limited to the embodiments shown here. On the contrary, these embodiments are provided as examples so that this disclosure will be thorough and complete, and will fully convey the aspects and features of the present invention to those skilled in the art. Therefore, processes, elements and techniques that are unnecessary for those of ordinary skill in the art to fully understand the aspects and features of the present invention may not be described. Unless otherwise stated, the same reference numerals represent the same elements throughout the drawings and written descriptions, and therefore, their descriptions may not be repeated. In the drawings, the relative sizes of elements, layers and regions may be exaggerated for clarity.

[0035] It will be understood that, although the terms "first", "second", "third", etc. may be used herein to describe various elements, components, regions, layers and / or parts, these elements, components, regions, layers and / or parts should not be limited by these terms. These terms are used to distinguish one element, component, region, layer or part from another element, component, region, layer or part. Therefore, without departing from the spirit and scope of the present invention, the first element, first component, first region, first layer or first part described below may be named as the second element, second component, second region, second layer or second part.

[0036] For ease of explanation, spatial relative terms such as "under...", "below...", "below", "above...", "on", etc. may be used here to describe the relationship of one element or feature to another element or feature as shown in the figure. It will be understood that, in addition to the orientation depicted in the figure, the spatial relative terms are intended to include different orientations of the device in use or operation. For example, if the device in the figure is turned over, the elements described as "under", "under" or "below" other elements or features will then be oriented "above" the other elements or features. Therefore, the example term "under..." can include both above and below orientations. The device can be positioned otherwise (e.g., rotated 90 degrees or at other orientations), and the spatial relative descriptors used here should be interpreted accordingly.

[0037] It will be understood that when an element or layer is referred to as being “on,” “connected to” or “coupled to” another element or layer, it can be directly on, directly connected to or directly coupled to the other element or layer, or one or more intervening elements or layers may be present. Additionally, it will be understood that when an element or layer is referred to as being between two elements or layers, it can be the only element or layer between the two elements or layers, or one or more intervening elements or layers may also be present.

[0038] The term used here is only for the purpose of describing specific embodiments, and is not intended to limit the present invention. As used here, unless the context clearly indicates otherwise, the "one" and "one (kind / person)" in the singular are also intended to include plural forms. It will also be understood that when the terms "include", "comprise" and variations thereof are used in this specification, the features, integral bodies, steps, operations, elements and / or components stated are explained, but one or more other features, integral bodies, steps, operations, elements, components and / or their groups are not excluded from existence or addition. As used here, the term "and / or" includes any combination and all combinations of one or more of the related listed items. When the expression such as "at least one (kind / person) in ... " is after a column of elements (elements), the expression modifies the elements of the entire column rather than the single element in the column.

[0039] As used herein, the terms "substantially," "approximately," and similar terms are used as terms of approximation, rather than terms of degree, and are intended to describe inherent deviations in measurements or calculations that would be recognized by those of ordinary skill in the art. Additionally, "may" is used when describing embodiments of the present invention to refer to "one or more embodiments of the present invention." As used herein, the term "use" and its variations are considered to be synonymous with the term "utilize" and its variations, respectively. Additionally, the term "exemplary" is intended to indicate an example or illustration.

[0040] The display device and / or any related device or component according to the embodiment of the present invention described here can be implemented using any suitable hardware, firmware (e.g., application specific integrated circuit), software or a combination of software, firmware and hardware. For example, the display device may include multiple pixels, data drivers, data lines, grayscale voltage generators, digital-to-analog converters, multiplexers and other components. The various components of these devices can be formed on an integrated circuit (IC) chip or on a separate IC chip. In addition, the various components of these devices can be implemented on a flexible printed circuit film, a tape carrier package (TCP), a printed circuit board (PCB), or formed on a substrate. In addition, the various components of these devices can be processes or threads that run on one or more processors in one or more computing devices, execute computer program instructions, and interact with other system components for performing the various functions described here. Computer program instructions are stored in a memory, which can be implemented in a computing device using a standard memory device such as a random access memory (RAM) as an example. Computer program instructions can also be stored in other non-temporary computer-readable media such as CD-ROMs or flash drives as examples. In addition, those skilled in the art should appreciate that the functionality of various computing devices may be combined or integrated into a single computing device, or the functionality of a particular computing device may be distributed among one or more other computing devices without departing from the spirit and scope of the exemplary embodiments of the present invention.

[0041] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as those commonly understood by those skilled in the art to which the present invention belongs. It will also be understood that terms (such as those defined in general dictionaries) should be interpreted as having a meaning consistent with their meaning in the context of the relevant art and / or this specification, and should not be interpreted in an idealized or overly formal sense, unless explicitly defined herein.

[0042] In order to clearly describe the present disclosure, parts irrelevant to the description may be omitted, and the same or similar constituent elements may be represented by the same reference numerals throughout the specification. Therefore, the same reference numerals may be used to identify the same or similar elements in different drawings.

[0043] In addition, for better understanding and ease of description, the size and thickness of each component shown in the drawings are arbitrarily shown, but the present disclosure is not limited thereto. For clear representation, the thickness of several parts and regions is exaggerated.

[0044] Figure 1 and Figure 2 is a view showing a display device according to an embodiment of the present disclosure.

[0045] Reference Figure 1 , the display device DD according to an embodiment of the present disclosure may include a display area DA, and the display area DA may include a fingerprint sensing area FA and a fingerprint non-sensing area NFA.

[0046] Figure 2 is along Figure 1 A partial cross-sectional view of the display device DD taken along the line II' in FIG. Figure 2 , the display device DD may include a stacked (eg, sequentially stacked) pad CL, a display panel DP, and a window WD. In addition, the display device DD may further include an optical fingerprint sensor OS.

[0047] The optical fingerprint sensor OS may include a light receiving element, and fingerprint information of the user may be extracted using light incident on the light receiving element.

[0048] The pad CL is provided to reduce the impact of the display panel DP, and may be made of an elastic material. When the pad CL is made of an opaque material, the pad CL may include an opening CO exposing the optical fingerprint sensor OS.

[0049] The display panel DP allows the pixels to emit light based on information about the image frame provided by the external processor, thereby displaying the image frame. Figure 3 The display panel DP is described in more detail.

[0050] The window WD covers the display panel DP to protect the display panel DP from external impacts. The window WD may be made of a transparent material (glass or plastic, etc.).

[0051] When the user places or positions the finger in the fingerprint sensing area FA, the display device DD can use the pixels located in the fingerprint sensing area FA as an illumination light source to irradiate light with high brightness onto the fingerprint, and the user's fingerprint information can be extracted using the reflected light ray1 and ray2 of the irradiated light.

[0052] Figure 3 is a diagram illustrating a display panel according to an embodiment of the present disclosure.

[0053] The display panel DP may include a timing controller 11 , a data driver 12 , a scan driver 13 , a pixel unit 14 , a first gray voltage generator 15 , a second gray voltage generator 16 , and an emission driver 17 .

[0054] The timing controller 11 may receive grayscale values ​​and control signals about an image frame from an external processor. The timing controller 11 may convert the grayscale values ​​and control signals to fit the specifications of the data driver 12, and provide the converted grayscale values ​​and control signals to the data driver 12. In addition, the timing controller 11 may provide control signals to the scan driver 13 and the emission driver 17.

[0055] The data driver 12 may generate data signals to be provided to the data lines DL1 to DLn using the grayscale values ​​and control signals received from the timing controller 11. In this example, n is an integer greater than 0. For example, the data driver 12 may apply data signals to the data lines DL1 to DLn in units of pixel columns. Each data signal may correspond to one of the first grayscale voltage provided from the first grayscale voltage generator 15, the second grayscale voltage provided from the second grayscale voltage generator 16, and the first node voltage applied to the first node N1.

[0056] The scan driver 13 may generate a scan signal to be provided to the scan lines SL1 to SLm by receiving a control signal such as a clock signal and a scan start signal from the timing controller 11. For example, the scan driver 13 may sequentially provide a scan signal having an on-level pulse to the scan lines SL1 to SLm. For example, the scan driver 13 may be configured in the form of a shift register, and generate a scan signal in a manner of sequentially transmitting an off-level pulse of a scan start signal to a next-stage circuit under the control of a clock signal. In this example, m is an integer greater than 0.

[0057] The emission driver 17 may generate an emission signal to be provided to the emission lines EL1 to ELo by receiving a clock signal, an emission stop signal, etc. from the timing controller 11. For example, the emission driver 17 may sequentially provide an emission signal having an off-level pulse to the emission lines EL1 to ELo. For example, the emission driver 17 may be configured in the form of a shift register, and generate an emission signal in a manner that sequentially transmits an off-level pulse of an emission stop signal to a next-stage circuit under the control of a clock signal. In this example, o is an integer greater than 0.

[0058] The pixel unit 14 includes pixels PXij. Each pixel PXij can be coupled to a corresponding data line, a corresponding scan line, and a corresponding emission line. In this example, each of i and j can be an integer greater than 0. The pixel PXij can refer to a pixel having a scan transistor coupled to the i-th scan line and the j-th data line. In some embodiments, when the emission driver 17 is not provided in the display panel DP, the pixel unit 14 may not be coupled to the emission lines EL1 to ELo.

[0059] The pixel unit 14 may include pixels that emit light of a plurality of suitable colors as known to those skilled in the art. For example, the pixel unit 14 may include pixels that emit light of a first color, pixels that emit light of a second color, and pixels that emit light of a third color. The first color, the second color, and the third color may be colors different from each other. For example, the first color may be a color from red, green, and blue, the second color may be another color different from the first color among red, green, and blue, and the third color may be other colors different from the first color and the second color among red, green, and blue. In addition to red, green, and blue, magenta, cyan, and yellow may also be used as the first color to the third color. However, in this embodiment, for ease of description, the case where red, green, and blue are used as the first color to the third color is shown, and magenta is described as a combination of blue and red, cyan is represented as a combination of green and blue, and yellow is represented as a combination of red and green. Although the use of pixels with three colors has been described, any suitable number of colors may be used. For example, in some embodiments, four colors may be used.

[0060] Hereinafter, the position of each pixel PXij is described based on the position of the light emitting diode of the pixel PXij. That is, the position of the pixel circuit coupled to the light emitting diode of the pixel PXij may not correspond to the position of the light emitting diode, but may be appropriately arranged in the display panel DP to achieve space efficiency.

[0061] The first gray voltage generator 15 can generate a first gray voltage. In some embodiments, the size of the first gray voltage can be based on the input maximum brightness value. For example, for ease of description, a total of 256 gray values ​​including values ​​ranging from gray value 0 (minimum gray value) to gray value 255 (maximum gray value) are shown. However, when the gray value is represented as more than 8 bits, a larger number of gray values ​​can be used (e.g., can exist). The minimum gray value can be the darkest gray value, and the maximum gray value can be the brightest gray value.

[0062] The maximum brightness value may be a brightness value corresponding to a maximum grayscale value of light emitted from a pixel. For example, the maximum brightness value may be a brightness value of white light when pixels of a first color forming a dot emit light corresponding to a grayscale value of 255, pixels of a second color forming a dot emit light corresponding to a grayscale value of 255, and pixels of a third color forming a dot emit light corresponding to a grayscale value of 255. The unit for describing the brightness value may be nit (e.g., candela per square meter).

[0063] Therefore, the pixel PXij can display a partially (spatially) dark or bright image frame, but the maximum brightness of the image frame is limited by the maximum brightness value. The maximum brightness value can be manually set by the user's operation on the display device DD, or automatically set by an algorithm related to an illumination sensor, etc. The set maximum brightness value is represented as an input maximum brightness value. The first gray voltage generator 15 can be configured to receive the input maximum brightness value directly from an external processor, or configured to receive the input maximum brightness value through the timing controller 11.

[0064] The maximum brightness value may be changed according to the product. However, for example, the maximum value of the maximum brightness value may be 1200nit, and the minimum value of the maximum brightness value may be 4nit. When the input maximum brightness value changes even if the gray value is the same, the first gray voltage generator 15 provides a different first gray voltage, and thus, the emission brightness of each pixel changes.

[0065] The second gray voltage generator 16 may generate a second gray voltage. In some embodiments, the magnitude of the second gray voltage may be based on the input maximum brightness value. The second gray voltage generator 16 may be configured similarly to the first gray voltage generator 15, and thus, repeated descriptions may be omitted.

[0066] The first gray voltage generated by the first gray voltage generator 15 may be used to display an image frame. The second gray voltage generated by the second gray voltage generator 16 may be used to generate irradiation light for fingerprint detection.

[0067] For example, for the same grayscale value, the emission brightness of the pixel PXij caused by the second grayscale voltage may be higher than the emission brightness of the pixel PXij caused by the first grayscale voltage.

[0068] The first node voltage may be applied to the first node N1. Fig. 9 To describe the first node voltage.

[0069] Figure 4 and Figure 5 is a diagram showing a pixel according to an embodiment of the present disclosure.

[0070] Reference Figure 4 , the pixel PXij may include transistors M1 , M2 , M3 , M4 , M5 , M6 , and M7 , a storage capacitor Cst, and a light emitting diode LD.

[0071] In this embodiment, each of the transistors M1 to M7 is shown as a P-type transistor, for example, a PMOS transistor. However, those skilled in the art may use an N-type transistor (for example, an NMOS transistor) to implement a pixel circuit that performs the same function.

[0072] A first electrode of the storage capacitor Cst is coupled to the first power line ELVDD, and a second electrode of the storage capacitor Cst is coupled to the gate electrode of the transistor M1.

[0073] The first electrode of transistor M1 is coupled to the second electrode of transistor M5, the second electrode of transistor M1 is coupled to the first electrode of transistor M6, and the gate electrode of transistor M1 is coupled to the second electrode of storage capacitor Cst. Transistor M1 may be referred to as a driving transistor. Transistor M1 is used to control the amount of driving current flowing between the first power line ELVDD and the second power line ELVSS according to the potential difference between the gate electrode and the source electrode of transistor M1.

[0074] A first electrode of the transistor M2 is coupled to the data line DLj, a second electrode of the transistor M2 is coupled to the first electrode of the transistor M1, and a gate electrode of the transistor M2 is coupled to the current scan line SLi. The transistor M2 may be referred to as a scan transistor or a switch transistor, etc. When an on-level scan signal is applied to the current scan line SLi, the transistor M2 allows the data voltage of the data line DLj to be input to the pixel PXij.

[0075] The first electrode of transistor M3 is coupled to the second electrode of transistor M1, the second electrode of transistor M3 is coupled to the gate electrode of transistor M1, and the gate electrode of transistor M3 is coupled to the current scan line SLi. When an on-level scan signal is applied to the current scan line SLi, transistor M3 allows transistor M1 to be coupled in a diode form.

[0076] The first electrode of transistor M4 is coupled to the gate electrode of transistor M1, the second electrode of transistor M4 is coupled to the initialization voltage line VINT, and the gate electrode of transistor M4 is coupled to the previous scan line SL(i-1). In another embodiment, the gate electrode of transistor M4 can be coupled to another scan line. When the on-level scan signal is applied to the previous scan line SL(i-1), transistor M4 transmits the initialization voltage to the gate electrode of transistor M1, so that the charge amount of the gate electrode of transistor M1 is initialized.

[0077] A first electrode of transistor M5 is coupled to the first power line ELVDD, a second electrode of transistor M5 is coupled to the first electrode of transistor M1 (and the second electrode of transistor M2), and a gate electrode of transistor M5 is coupled to the emission line ELi. A first electrode of transistor M6 is coupled to the second electrode of transistor M1, a second electrode of transistor M6 is coupled to the first electrode of light emitting diode LD, and a gate electrode of transistor M6 is coupled to the emission line ELi. Each of transistor M5 and transistor M6 may be referred to as an emission transistor. When a conduction level emission signal is applied, transistor M5 and transistor M6 form a drive current path between the first power line ELVDD and the second power line ELVSS to allow the light emitting diode LD to emit light.

[0078] The first electrode of the transistor M7 is coupled to the first electrode of the light emitting diode LD, the second electrode of the transistor M7 is coupled to the initialization voltage line VINT, and the gate electrode of the transistor M7 is coupled to the current scan line SLi. In another embodiment, the gate electrode of the transistor M7 may be coupled to another scan line. For example, the gate electrode of the transistor M7 may be coupled to the previous scan line SL(i-1), the previous scan line before the previous scan line SL(i-1), the next scan line (or the (i+1)th scan line) SL(i+1), or the next scan line after the (i+1)th scan line SL(i+1). When the on-level scan signal is applied to the current scan line SLi, the transistor M7 transmits the initialization voltage to the first electrode of the light emitting diode LD, so that the amount of charge accumulated in the light emitting diode LD is initialized.

[0079] A first electrode of the light emitting diode LD may be coupled to the second electrode of the transistor M6 (and the first electrode of the transistor M7), and a second electrode of the light emitting diode LD may be coupled to the second power line ELVSS. The light emitting diode LD may be an element that emits light having a wavelength corresponding to a color (e.g., a specific color such as the first color, the second color, or the third color). The wavelength of light emitted by the light emitting diode LD may depend on the energy band gap of the light emitting diode LD.

[0080] The light emitting diode LD may correspond to an organic light emitting diode, an inorganic light emitting diode, a nano light emitting diode (nano-LED) or any other suitable light emitting diode as will be understood by those skilled in the art.

[0081] Figure 5 It is shown Figure 4 FIG. 4 is a diagram of an exemplary driving method of a pixel shown in FIG.

[0082] First, a conduction level (low level) scan signal is applied to the previous scan line SL (i-1). Because the transistor M4 is in the conduction state, the initialization voltage is applied to the gate electrode of the transistor M1, thereby initializing the charge amount of the gate electrode of the transistor M1. Because the cut-off level (high level) emission signal is applied to the emission line ELi, the transistors M5 and M6 are in the cut-off state, and the unnecessary emission of the light emitting diode LD caused by the process of applying the initialization voltage is prevented.

[0083] Next, the data voltage DATAij about the current pixel column is applied to the data line DLj, and the on-level scan signal is applied to the current scan line SLi. Therefore, the transistors M2, M1, and M3 are in an on state, and the gate electrodes of the data line DLj and the transistor M1 are electrically coupled to each other. Therefore, the data voltage DATAij is applied to the second electrode of the storage capacitor Cst, so that the storage capacitor Cst accumulates a charge amount corresponding to the difference between the voltage of the first power line ELVDD and the data voltage DATAij.

[0084] Because the transistor M7 is in the on state, the first electrode of the light emitting diode LD and the initialization voltage line VINT are electrically coupled to each other and the light emitting diode LD is precharged or initialized to a charge amount corresponding to a difference between the initialization voltage and the voltage of the second power line ELVSS.

[0085] Subsequently, when the on-level emission signal is applied to the emission line ELi, the transistors M5 and M6 are turned on, and the amount of the driving current flowing through the transistor M1 is adjusted according to the amount of charge accumulated in the storage capacitor Cst, so that the driving current flows through the light emitting diode LD. The light emitting diode LD emits light until the off-level emission signal is applied to the emission line ELi. The time period in which the on-level emission signal is applied to the emission line ELi can be referred to as the emission time period of the corresponding pixel.

[0086] Figures 6 to 9 is a diagram illustrating a first gray voltage generator and a second gray voltage generator according to an embodiment of the present disclosure.

[0087] Since the first gray voltage generated by the first gray voltage generator 15 is used to display an image frame, the first gray voltage generator 15 provides the first gray voltage with respect to all three primary colors, ie, red, green, and blue.

[0088] Therefore, the first gray voltage generator 15 may include a first color gray voltage generator 15R, a second color gray voltage generator 15G, and a third color gray voltage generator 15B.

[0089] The first color gray voltage generator 15R may generate a first color gray voltage for representing a first color among the first gray voltages. As described above, for convenience of description, a case where the first color is red is used.

[0090] The second color gray voltage generator 15G may generate a second color gray voltage for representing a second color different from the first color among the first gray voltages. As described above, for convenience of description, a case where the second color is green is used.

[0091] The third color gray voltage generator 15B may generate a third color gray voltage for representing a third color different from the first color and the second color among the first gray voltages. As described above, for convenience of description, a case where the third color is blue is used.

[0092] The second gray voltage generated by the second gray voltage generator 16 can be used to generate illumination light for fingerprint detection. The high brightness of the illumination light may be a desired factor for fingerprint detection, but the color of the illumination light may not be a necessary factor for fingerprint detection. Therefore, it is not necessary to provide second gray voltages corresponding to all three primary colors.

[0093] Therefore, the second gray voltage generator 16 may include two color gray voltage generators (eg, a fourth color gray voltage generator 16G and a fifth color gray voltage generator 16B).

[0094] The fourth color gray voltage generator 16G may generate a fourth color gray voltage for representing a fourth color from among the second gray voltages.

[0095] The fifth color gray voltage generator 16B may generate a fifth color gray voltage representing a fifth color different from the fourth color from among the second gray voltages.

[0096] Each of the fourth color and the fifth color may correspond to one of the first color, the second color, and the third color. In an example, the fourth color may be green and the fifth color may be blue. In another example, the fourth color may be green and the fifth color may be red. In yet another example, the fourth color may be blue and the fifth color may be red.

[0097] According to the embodiment, since the second gray voltage generator 16 includes only two color gray voltage generators, the configuration cost of the second gray voltage generator 16 can be reduced when compared with the first gray voltage generator 15 including three color gray voltage generators.

[0098] According to another embodiment, the second gray voltage generator 16 may include only one color gray voltage generator. For example, the second gray voltage generator 16 may include only a green gray voltage generator. As known to those skilled in the art, the green color contributes more to the brightness than the red color and the blue color. Therefore, when the brightness required for fingerprint detection is sufficiently ensured using green light, the second gray voltage generator 16 may be configured to include one color gray voltage generator.

[0099] Reference Figure 7 , the first color gray voltage generator 15R is exemplarily shown. The gray voltage generators 15G, 15B, 16G, and 16B of other colors may be configured to be substantially the same as (e.g., substantially identical to) the first color gray voltage generator 15R, and therefore, their repeated description may be omitted. However, the selection value stored in the selection value supply unit of each of the gray voltage generators 15G, 15B, 16G, and 16B of other colors may be different from the selection value stored in the selection value supply unit 1511 of the first color gray voltage generator 15R.

[0100] The first color gray voltage generator 15R may include a selection value providing unit 1511 , a gray voltage output unit 1512 , resistance strings RS1 to RS11 , multiplexers MX1 to MX12 , and resistances R1 to R10 .

[0101] The selection value providing unit 1511 may provide selection values ​​for the multiplexers MX1 to MX12 according to the input maximum brightness value DBVI. The selection values ​​according to the input maximum brightness value DBVI may be pre-stored in an element (eg, a register, etc.).

[0102] The resistor string RS1 may generate an intermediate voltage between a first high voltage applied to the first high voltage terminal VH1 and a first low voltage applied to the first low voltage terminal VL1. The multiplexer MX1 ​​may output a reference voltage VT by selecting one of the intermediate voltages provided from the resistor string RS1 according to a selection value. The multiplexer MX2 may output a 255 grayscale voltage RV255 by selecting one of the intermediate voltages provided from the resistor string RS1 according to a selection value.

[0103] The resistance string RS11 may generate an intermediate voltage between the reference voltage VT and the 255 gray voltage RV255. The multiplexer MX12 may output the 255 gray voltage RV203 by selecting one of the intermediate voltages provided from the resistance string RS11 according to a selection value.

[0104] The resistance string RS10 may generate an intermediate voltage between the reference voltage VT and the 151 gray voltage RV203. The multiplexer MX11 may output the 151 gray voltage RV151 by selecting one of the intermediate voltages provided from the resistance string RS10 according to a selection value.

[0105] The resistance string RS9 may generate an intermediate voltage between the reference voltage VT and the 151 gray voltage RV151. The multiplexer MX10 may output the 87 gray voltage RV87 by selecting one of the intermediate voltages provided from the resistance string RS9 according to the selection value.

[0106] The resistance string RS8 may generate an intermediate voltage between the reference voltage VT and the 87 gray voltage RV87. The multiplexer MX9 may output the 51 gray voltage RV51 by selecting one of the intermediate voltages provided from the resistance string RS8 according to a selection value.

[0107] The resistance string RS7 may generate an intermediate voltage between the reference voltage VT and the 51 gray voltage RV51. The multiplexer MX8 may output the 35 gray voltage RV35 by selecting one of the intermediate voltages provided from the resistance string RS7 according to the selection value.

[0108] The resistor string RS6 may generate an intermediate voltage between the reference voltage VT and the 35 gray voltage RV35. The multiplexer MX7 may output the 23 gray voltage RV23 by selecting one of the intermediate voltages provided from the resistor string RS6 according to a selection value.

[0109] The resistance string RS5 may generate an intermediate voltage between the reference voltage VT and the 23 gray voltage RV23. The multiplexer MX6 may output the 11 gray voltage RV11 by selecting one of the intermediate voltages provided from the resistance string RS5 according to the selection value.

[0110] The resistance string RS4 may generate an intermediate voltage between the first high voltage applied to the first high voltage terminal VH1 and the 11 gray voltage RV11. The multiplexer MX5 may output the 7 gray voltage RV7 by selecting one of the intermediate voltages provided from the resistance string RS4 according to the selection value.

[0111] The resistor string RS3 may generate an intermediate voltage between the first high voltage applied to the first high voltage terminal VH1 and the 7 gray voltage RV7. The multiplexer MX4 may output the 1 gray voltage RV1 by selecting one of the intermediate voltages provided from the resistor string RS3 according to a selection value.

[0112] The resistance string RS2 may generate an intermediate voltage between the first high voltage applied to the first high voltage terminal VH1 and the 1 gray voltage RV1. The multiplexer MX3 may output the 0 gray voltage RV0 by selecting one of the intermediate voltages provided from the resistance string RS2 according to the selection value.

[0113] The above-mentioned gray values ​​(e.g., gray levels) 0, 1, 7, 11, 23, 35, 51, 87, 151, 203, and 255 may be referred to as reference gray values. In addition, the gray voltages RV0, RV1, RV7, RV11, RV23, RV35, RV51, RV87, RV151, RV203, and RV255 generated from the multiplexers MX2 to MX12 may be referred to as reference gray voltages. The number of reference gray values ​​and the number of grays corresponding to the reference gray values ​​may be set differently depending on the product. In the following, for ease of description, the case where gray values ​​0, 1, 7, 11, 23, 35, 51, 87, 151, 203, and 255 are reference gray values ​​is shown.

[0114] The gray voltage output unit 1512 may generate the first color gray voltages RV0 to RV255 by dividing the reference gray voltages RV0, RV1, RV7, RV11, RV23, RV35, RV51, RV87, RV151, RV203, and RV255. For example, the gray voltage output unit 1512 may generate the first color gray voltages RV2 to RV6 by dividing the reference gray voltages RV1 and RV7.

[0115] Reference Figure 8 , white light curves WC1, WC2, ..., WC(k-1), and WCk of output brightness with respect to grayscale values ​​are shown. Here, k may be an integer greater than 0.

[0116] The maximum brightness values ​​of the white light curves WC1 to WCk may be different from each other. For example, the maximum brightness value of the white light curve WC1 (eg, 4 nits) may be the lowest, while the maximum brightness value of the white light curve WCk (eg, 1200 nits) may be the highest.

[0117] In order to generate white light, it is assumed that a data voltage regarding the same grayscale value is input to pixels PXij of all colors.

[0118] Figure 8The imaginary points shown on the white light curves WC1 to WCk shown in may correspond to selection values ​​pre-stored in the selection value providing unit 1511. When the number of selection values ​​increases, a more accurate white light curve may be directly represented. However, physical elements such as multiplexers and registers corresponding to the increased number of selection values ​​may also be required, and thus there may be practical limitations. Therefore, selection values ​​regarding the reference gray voltage described above may be pre-stored and used, and other gray voltages may be generated by dividing the reference gray voltage. For the same reason, selection values ​​of some maximum brightness values ​​(e.g., reference maximum brightness values) between 4nit and 1200nit may be pre-stored and used, and other maximum brightness values ​​may be generated by interpolating the selection values.

[0119] Pre-stored selection values ​​may be set for each individual product through multiple-time programming (MTP). That is, in order to emit white light with a desired brightness relative to the grayscale value, the selection value may be set through repeated measurements to be stored in the product.

[0120] According to an embodiment, although the same input maximum brightness value DBVI is input to the first gray voltage generator 15 and the second gray voltage generator 16, the first white light curve corresponding to the first gray voltage generator 15 and the second white light curve corresponding to the second gray voltage generator 16 may be different from each other. For example, with respect to the same gray value, the emission brightness of the second pixel that emits light based on the second gray voltage of the second gray voltage generator 16 may be higher than the emission brightness of the first pixel that emits light based on the first gray voltage of the first gray voltage generator 15. For example, when the first white light curve is WCx, the second white light curve may be WCy. Here, x may be an integer, and y may be an integer greater than x.

[0121] Reference Fig. 9 , shows a combination configuration of the first gray voltage generator 15, the second gray voltage generator 16, and the first node N1 according to an embodiment.

[0122] As reference Figure 7 As described, the first gray voltage generator 15 may generate a first gray voltage by dividing a difference between a first high voltage applied to the first high voltage terminal VH1 and a first low voltage applied to the first low voltage terminal VL1. The generated first gray voltage may be applied to the output line OLS1.

[0123] Similarly, the second gray voltage generator 16 may generate a second gray voltage by dividing a difference between a second high voltage applied to the second high voltage terminal VH2 and a second low voltage applied to the second low voltage terminal VL2 .

[0124] According to an embodiment, a common low voltage terminal VLC may be provided. The first low voltage terminal VL1 and the second low voltage terminal VL2 may be coupled to the common low voltage terminal VLC. The first node N1 may be coupled to the first low voltage terminal VL1 and the second low voltage terminal VL2.

[0125] According to another embodiment, the common low voltage terminal VLC may not be provided. The first low voltage terminal VL1 and the second low voltage terminal VL2 may be separated from each other. The first node N1 may be coupled only to the first low voltage terminal VL1. In addition, the first node N1 may be coupled only to the second low voltage terminal VL2.

[0126] According to each embodiment, a stable first node voltage can be maintained at the first node N1. For example, the first low voltage and the second low voltage are basic voltages for generating gray voltages. Unlike the gray voltages, the first low voltage and the second low voltage can be relatively stable voltages that do not change according to the input maximum brightness value DBVI.

[0127] Fig.10 is a diagram illustrating a data driver according to an embodiment of the present disclosure.

[0128] Reference Fig.10 , the data driver 12 according to an embodiment of the present disclosure may selectively include a shift register unit SHR, a sampling latch unit SLU, a holding latch unit HLU, a digital-to-analog conversion unit DAU, and a buffer unit BFU.

[0129] The shift register unit SHR, sampling latch unit SLU, holding latch unit HLU and buffer unit BFU may be configured using existing techniques. Hereinafter, exemplary configurations of the shift register unit SHR, sampling latch unit SLU, holding latch unit HLU and buffer unit BFU are shown.

[0130] The shift register unit SHR may be provided with a source start pulse and a source shift clock from the timing controller 11. The shift register unit SHR may sequentially generate a sampling signal while shifting the source start pulse in each time period of the source shift clock. The number of sampling signals may correspond to the number of data lines (e.g., DL1a, DL1b, DL1c, ..., DL2a, DL2b, DL2c, ..., DL3a, DL3b, DL3c, ..., etc.). In an example, the number of sampling signals may be equal to the number of data lines DL1a to DL3c. In another example, when the display panel DP also includes a demultiplexer between the data driver 12 and the data lines DL1a to DL3c, the number of sampling signals may be less than the number of data lines DL1a to DL3c. In the following, for ease of explanation, a case where the number of sampling signals is equal to the number of data lines DL1a to DL3c is described.

[0131] The sampling latch unit SLU may include sampling latches corresponding to the number of data lines DL1a to DL3c, and is sequentially supplied with gray values ​​for an image frame from the timing controller 11. The sampling latch unit SLU may store gray values ​​sequentially supplied from the timing controller 11 in the corresponding sampling latches in response to sampling signals sequentially supplied from the shift register unit SHR.

[0132] The holding latch unit HLU may include holding latches corresponding to the number of the data lines DL1a to DL3c. When a source output enable signal is input from the timing controller 11, the holding latch unit HLU may store the grayscale value stored in the sampling latch in the holding latch.

[0133] The digital-to-analog conversion unit DAU may include a plurality of digital-to-analog converters (e.g., DAC1, DAC2, and DAC3) and a multiplexer (e.g., MUX). In this embodiment, the number of digital-to-analog converters DAC1 to DAC3 may correspond to the number of data lines DL1a to DL3c. For example, the number of digital-to-analog converters DAC1 to DAC3 may be equal to the number of data lines DL1a to DL3c. However, the number of multiplexers MUX may not correspond to the number of data lines DL1a to DL3c. For example, the number of multiplexers MUX may be less than the number of digital-to-analog converters DAC1 to DAC3.

[0134] The input terminal of the first digital-to-analog converter DAC1 and the input terminal of the third digital-to-analog converter DAC3 may not be coupled to the multiplexer MUX. The coupling configuration of the first digital-to-analog converter DAC1 and the coupling configuration of the third digital-to-analog converter DAC3 are substantially the same. Hereinafter, the coupling configuration will be described based on the first digital-to-analog converter DAC1. The input terminal of the first digital-to-analog converter DAC1 may be coupled to the first grayscale voltage generator 15, and the output terminal of the first digital-to-analog converter DAC1 may be coupled to the first data line DL1b. For example, the output terminal of the first digital-to-analog converter DAC1 may be coupled to the first data line DL1b through the buffer BUF1. As will be described later, when the buffer unit BFU is omitted, the output terminal of the first digital-to-analog converter DAC1 may be directly coupled to the first data line DL1b.

[0135] In another example, the input terminal of the second digital-to-analog converter DAC2 can be coupled to the multiplexer MUX. The input terminal of the second digital-to-analog converter DAC2 can be coupled to the output terminal of the multiplexer MUX, and the output terminal of the second digital-to-analog converter DAC2 can be coupled to the second data line DL2b. For example, the output terminal of the second digital-to-analog converter DAC2 can be coupled to the second data line DL2b through the buffer BUF2. As will be described later, when the buffer unit BFU is omitted, the output terminal of the second digital-to-analog converter DAC2 can be directly coupled to the second data line DL2b.

[0136] An input terminal of the multiplexer MUX may be coupled to the first node N1 , the first gray voltage generator 15 , and the second gray voltage generator 16 .

[0137] Each of the digital-to-analog converters DAC1, DAC2, and DAC3 may apply a first grayscale voltage or a second grayscale voltage corresponding to a grayscale value stored in a corresponding holding latch to a corresponding data line. However, when a first node voltage (e.g., from a first node N1) is provided to the second digital-to-analog converter DAC2 through the multiplexer MUX, the second digital-to-analog converter DAC2 may output the first node voltage regardless of the grayscale value stored in the holding latch.

[0138] The buffer unit BFU may include a plurality of buffers (e.g., BUF1, BUF2, and BUF3). For example, the buffers BUF1 to BUF3 may be implemented in the form of amplifiers. The buffers BUF1 to BUF3 may generate data signals corresponding to the grayscale voltages supplied from the digital-to-analog converters DAC1 to DAC3, and supply the generated data signals to the data lines DL1a to DL3c. When the gain of the buffers BUF1 to BUF3 is 1, the voltage magnitudes of the grayscale voltages and the data signals may be substantially unchanged by the buffers BUF1 to BUF3. According to the display panel DP, the buffer unit BFU may be removed from the data driver 12. The digital-to-analog conversion unit DAU may be directly coupled to the data lines DL1a to DL3c.

[0139] The first data lines DL1a, DL1b, and DL1c may be coupled to first pixels PX1ak, PX1bk, and PX1ck located in the fingerprint non-sensing area NFA. The second data lines DL2a, DL2b, and DL2c may be coupled to second pixels PX2ak, PX2bk, and PX2ck located in the fingerprint sensing area FA. The third data lines DL3a, DL3b, and DL3c may be coupled to third pixels PX3ak, PX3bk, and PX3ck located in the fingerprint non-sensing area NFA.

[0140] The first pixels PX1ak, PX1bk, and PX1ck, the second pixels PX2ak, PX2bk, and PX2ck, and the third pixels PX3ak, PX3bk, and PX3ck may be coupled to the same kth scan line SLk. For example, the gate electrode of the switching transistor M2 of each of the pixels PX1ak to PX3ck may be coupled to the kth scan line SLk (see FIG. Figure 4 ). Here, k can be an integer of 1 or greater.

[0141] Fig.11 is a diagram showing the brightness of the fingerprint sensing area and its surroundings according to an embodiment of the present disclosure. Fig.11 When also referring to Fig.10 .

[0142] exist Fig.11 , the area other than the fingerprint sensing area FA is referred to as a fingerprint non-sensing area. The pixels PX2ak, PX2bk, and PX3ck located in the fingerprint sensing area FA may emit illumination light with high brightness based on the second grayscale voltage during the fingerprint sensing period. The fingerprint sensing period may correspond to a plurality of image frame periods.

[0143] During the first time period, the multiplexer MUX may provide the first gray voltage to the second digital-to-analog converter DAC2. Therefore, during the first time period, the second data signal based on the first gray voltage may be applied to the second data lines DL2a, DL2b, and DL2c. During the first time period, the first data signal based on the first gray voltage may be applied to the first data lines DL1a, DL1b, and DL1c, and the third data signal based on the first gray voltage may be applied to the third data lines DL3a, DL3b, and DL3c.

[0144] In the first time period, when the on-level scan signal is supplied to the scan line SL(k-2), the data signal corresponding to the first gray voltage may be written in the pixels PX1a(k-2) to PX3c(k-2) coupled to the scan line SL(k-2). During the emission time period, the pixels PX1a(k-2) to PX3c(k-2) may emit light corresponding to the first gray voltage.

[0145] Then, during a second time period after the first time period, the multiplexer MUX may provide the first node voltage to the second digital-to-analog converter DAC2. Therefore, during the second time period, a second data signal based on the first node voltage may be applied to the second data lines DL2a, DL2b, and DL2c. During the second time period, a first data signal based on the first gray voltage may be applied to the first data lines DL1a, DL1b, and DL1c, and a third data signal based on the first gray voltage may be applied to the third data lines DL3a, DL3b, and DL3c.

[0146] In the second time period, when the on-level scan signal is supplied to the scan line SL(k-1), the data signal corresponding to the first gray voltage may be written in the first pixel PX1a(k-1) to PX1c(k-1) and the third pixel PX3a(k-1) to PX3c(k-1) coupled to the scan line SL(k-1). During the emission time period, the first pixel PX1a(k-1) to PX1c(k-1) and the third pixel PX3a(k-1) to PX3c(k-1) may emit light corresponding to the first gray voltage.

[0147] In addition, in the second period, the data signal corresponding to the first node voltage may be written into the second pixels PX2a(k-1) to PX2c(k-1) coupled to the scan line SL(k-1). Return to Reference Figure 4 , Figure 7 and Fig. 9, the first node voltage corresponds to the lowest voltage among the grayscale voltages to be generated, and the driving transistor M1 is implemented as a P-type transistor. Therefore, during the emission period, the second pixels PX2a(k-1) to PX2c(k-1) can emit light having a white grayscale value (e.g., the brightest grayscale value). In another embodiment, when Figure 4 When the pixel circuit shown in FIG. 1 is implemented with an N-type transistor, the second pixels PX2 a (k-1) to PX2 c (k-1) may emit light having a black gray value (the darkest gray value) during an emission period.

[0148] Then, during a third time period after the second time period, the multiplexer MUX may provide a second gray voltage to the second digital-to-analog converter DAC2. During the third time period, a second data signal based on the second gray voltage may be applied to the second data lines DL2a, DL2b, and DL2c. During the third time period, a first data signal based on the first gray voltage may be applied to the first data lines DL1a, DL1b, and DL1c, and a third data signal based on the first gray voltage may be applied to the third data lines DL3a, DL3b, and DL3c.

[0149] In the third time period, when the on-level scan signal is supplied to the scan line SLk, the data signal corresponding to the first gray voltage may be written in the first and third pixels PX1ak to PX1ck and PX3ak to PX3ck coupled to the scan line SLk. During the emission time period, the first and third pixels PX1ak to PX1ck and PX3ak to PX3ck may emit light corresponding to the first gray voltage.

[0150] Furthermore, in the third period, data signals corresponding to the second gray voltage may be written in the second pixels PX2ak to PX2ck coupled to the scan line SLk. During the emission period, the second pixels PX2ak to PX2ck may emit light corresponding to the second gray voltage.

[0151] The first time period, the second time period, and the third time period may be included in one image frame time period.

[0152] Then, during a fourth time period after the third time period, the multiplexer MUX may provide the first node voltage to the second digital-to-analog converter DAC2. Therefore, during the fourth time period, a second data signal based on the first node voltage may be applied to the second data lines DL2a, DL2b, and DL2c. During the fourth time period, a first data signal based on the first gray voltage may be applied to the first data lines DL1a, DL1b, and DL1c, and a third data signal based on the first gray voltage may be applied to the third data lines DL3a, DL3b, and DL3c.

[0153] In the fourth time period, when the on-level scan signal is supplied to the scan line SL(k+3), the data signal corresponding to the first gray voltage may be written in the first pixels PX1a(k+3) to PX1c(k+3) and the third pixels PX3a(k+3) to PX3c(k+3) coupled to the scan line SL(k+3). During the emission time period, the first pixels PX1a(k+3) to PX1c(k+3) and the third pixels PX3a(k+3) to PX3c(k+3) may emit light corresponding to the first gray voltage.

[0154] In addition, in the fourth time period, the data signal corresponding to the first node voltage may be written in the second pixels PX2a(k+3) to PX2c(k+3) coupled to the scan line SL(k+3). As described above, during the emission time period, the second pixels PX2a(k+3) to PX2c(k+3) may emit light having a white gray value (or a black gray value).

[0155] Then, during a fifth time period after the fourth time period, the multiplexer MUX may provide the first gray voltage to the second digital-to-analog converter DAC2. During the fifth time period, a second data signal based on the first gray voltage may be applied to the second data lines DL2a, DL2b, and DL2c. During the fifth time period, a first data signal based on the first gray voltage may be applied to the first data lines DL1a, DL1b, and DL1c, and a third data signal based on the first gray voltage may be applied to the third data lines DL3a, DL3b, and DL3c.

[0156] In the fifth period, when the on-level scan signal is supplied to the scan line SL(k+4), the data signal corresponding to the first gray voltage may be written in the pixels PX1a(k+4) to PX3c(k+4) coupled to the scan line SL(k+4). During the emission period, the pixels PX1a(k+4) to PX3c(k+4) may emit light corresponding to the first gray voltage.

[0157] The first time period, the second time period, the third time period, the fourth time period, and the fifth time period may be included in one image frame time period.

[0158] According to this embodiment, during one image frame period, a data signal corresponding to the second grayscale voltage is supplied to the second pixels PX2ak, PX2bk, and PX2ck located in the fingerprint sensing area FA, so that the second pixels PX2ak, PX2bk, and PX2ck can emit irradiation light with high brightness, thereby enabling fingerprint sensing. In addition, during the same image frame period, other pixels located in the fingerprint non-sensing area are driven corresponding to the first grayscale voltage, so that the display quality of the image frame can be maintained.

[0159] When the second data lines DL2a, DL2b, and DL2c are changed from a state in which the second data lines DL2a, DL2b, and DL2c are coupled to the first gray voltage generator 15 to a state in which the second data lines DL2a, DL2b, and DL2c are coupled to the second gray voltage generator 16, it is necessary to ensure a time required for the state change of the second data lines DL2a, DL2b, and DL2c and a time for the voltage of the second data lines DL2a, DL2b, and DL2c to stabilize. When such an idle time is not ensured, an erroneous data signal may be written into the second pixels PX2a(k-1), PX2b(k-1), PX2c(k-1), PX2ak, PX2bk, and PX2ck, and a display failure may occur.

[0160] In this embodiment, when the second data lines DL2a, DL2b, and DL2c are changed from a state in which the second data lines DL2a, DL2b, and DL2c are coupled to the first gray voltage generator 15 to a state in which the second data lines DL2a, DL2b, and DL2c are coupled to the second gray voltage generator 16, the first node voltage is supplied to the second data lines DL2a, DL2b, and DL2c through the multiplexer MUX, so that display failure can be prevented. The second pixels PX2a (k-1), PX2b (k-1), and PX2c (k-1) can emit light having a strong white gray value, and therefore, the emitted light can be used as illumination light for fingerprint sensing.

[0161] Although a single color (white or black) edge combining the second pixels PX2a(k-1), PX2b(k-1) and PX2c(k-1) may be viewed by the user, a data signal corresponding to a white gray value (or a black gray value) is supplied to the fingerprint non-sensing area surrounding the fingerprint sensing area FA so that a natural edge can be viewed by the user.

[0162] In addition, since the first node voltage is a stable basic voltage as described above, the first node voltage can quickly stabilize the voltages of the second data lines DL2a, DL2b, and DL2c, and thus the time required for voltage stabilization can be reduced. That is, when the first node voltage is used, the thickness of the edge of a single color display can also be reduced, and it can also be ensured that the pixels in the fingerprint non-sensing area of ​​the image frame can be displayed.

[0163] The above description can be applied (for example, similarly applied) to the case where the second data lines DL2a, DL2b and DL2c are changed from a state in which the second data lines DL2a, DL2b and DL2c are coupled to the second grayscale voltage generator 16 to a state in which the second data lines DL2a, DL2b and DL2c are coupled to the first grayscale voltage generator 15, and therefore, repeated or redundant descriptions can be omitted.

[0164] Fig.12 is a diagram illustrating a data driver according to another embodiment of the present disclosure.

[0165] Reference Fig.12 ,and Fig.10 Compared with the data driver 12 shown in FIG. 1 , the data driver 12′ includes a modified digital-to-analog conversion unit DAU′. Fig.10 The components shown in the figure repeat the description of the components.

[0166] The data driver 12 ′ may apply a first data signal generated based on one of the first node voltage, the first gray voltage, and the second gray voltage to the first data line DL1 b , and apply a second data signal generated based on one of the first node voltage, the first gray voltage, and the second gray voltage to the second data line DL2 b .

[0167] The digital-to-analog conversion unit DAU' may include multiplexers MUX1, MUX2, MUX3, ... and digital-to-analog converters DAC1, DAC2, DAC3, ... In this embodiment, the number of multiplexers MUX1 to MUX3 may correspond to the number of digital-to-analog converters DAC1 to DAC3. For example, the number of multiplexers MUX1 to MUX3 may be equal to the number of digital-to-analog converters DAC1 to DAC3.

[0168] An input terminal of the first multiplexer MUX1 may be coupled to the first node N1 , the first gray voltage generator 15 , and the second gray voltage generator 16 .

[0169] An input terminal of the first digital-to-analog converter DAC1 may be coupled to an output terminal of the first multiplexer MUX1 , and an output terminal of the first digital-to-analog converter DAC1 may be coupled to the first data line DL1 b .

[0170] An input terminal of the second multiplexer MUX2 may be coupled to the first node N1 , the first gray voltage generator 15 , and the second gray voltage generator 16 .

[0171] An input terminal of the second digital-to-analog converter DAC2 may be coupled to an output terminal of the second multiplexer MUX2 , and an output terminal of the second digital-to-analog converter DAC2 may be coupled to the second data line DL2 b .

[0172] In the display device according to the present disclosure, even when a pixel located in the fingerprint sensing area locally emits light of high brightness, the display of the fingerprint non-sensing area can be normally maintained.

[0173] Example embodiments have been disclosed herein, and although specific terms are employed, they are used and will be interpreted only in a general and descriptive sense and not for purposes of limitation. In some cases, it will be clear to one of ordinary skill in the art that, unless otherwise specifically indicated, features, characteristics, and / or elements described in conjunction with a specific embodiment may be used alone or in combination with features, characteristics, and / or elements described in conjunction with other embodiments. Therefore, it will be understood by those skilled in the art that various changes in form and details may be made without departing from the spirit and scope of the present disclosure as set forth in the claims and their equivalents.

Claims

1. A display device, comprising: A first pixel coupled to a first data line, wherein the first pixel is located in a fingerprint non-sensing area in a display area; a second pixel coupled to a second data line, the second pixel being located in a fingerprint sensing area in the display area; A first node receiving a first node voltage; a first gray voltage generator configured to generate a first gray voltage by dividing a difference between a first high voltage applied to the first high voltage terminal and a first low voltage applied to the first low voltage terminal; a second gray voltage generator configured to generate a second gray voltage by dividing a difference between a second high voltage applied to the second high voltage terminal and a second low voltage applied to the second low voltage terminal; as well as a data driver configured to apply a first data signal generated based on one of the first gray voltages to the first data line, and to apply a second data signal generated based on one of the first node voltage, the first gray voltage, and the second gray voltage to the second data line, Wherein, the first node is coupled to the first low voltage terminal and the second low voltage terminal.

2. The display device according to claim 1, wherein: The data driver includes a digital-to-analog conversion unit, and the digital-to-analog conversion unit includes: a first digital-to-analog converter having an input terminal coupled to the first grayscale voltage generator and an output terminal coupled to the first data line; a multiplexer having an input terminal coupled to the first node, the first gray voltage generator, and the second gray voltage generator; and A second digital-to-analog converter has an input terminal coupled to the output terminal of the multiplexer and an output terminal coupled to the second data line.

3. The display device according to claim 2, wherein: The multiplexer is configured as: During a first time period, providing the first grayscale voltage to the second digital-to-analog converter; providing the first node voltage to the second digital-to-analog converter during a second time period after the first time period; During a third time period after the second time period, providing the second grayscale voltage to the second digital-to-analog converter; providing the first node voltage to the second digital-to-analog converter during a fourth time period after the third time period; as well as during a fifth time period after the fourth time period, providing the first grayscale voltage to the second digital-to-analog converter, The first time period, the second time period, the third time period, the fourth time period and the fifth time period are included in one image frame time period.

4. The display device according to claim 1, wherein: The first grayscale voltage generator comprises: A first color grayscale voltage generator configured to generate a first color grayscale voltage for representing a first color from among the first grayscale voltages; a second color gray voltage generator configured to generate a second color gray voltage representing a second color different from the first color from among the first gray voltages; and a third color gray voltage generator configured to generate a third color gray voltage representing a third color different from the first color and the second color from among the first gray voltages; Wherein, the second grayscale voltage generator comprises: a fourth color gray voltage generator configured to generate a fourth color gray voltage representing a fourth color from among the second gray voltages; and a fifth color gray voltage generator configured to generate a fifth color gray voltage representing a fifth color different from the fourth color from among the second gray voltages, and Wherein, each of the fourth color and the fifth color corresponds to one of the first color, the second color, and the third color.

5. A display device, comprising: A first pixel coupled to a first data line, wherein the first pixel is located in a fingerprint non-sensing area in a display area; a second pixel coupled to a second data line, the second pixel being located in a fingerprint sensing area in the display area; A first node receiving a first node voltage; a first gray voltage generator configured to generate a first gray voltage by dividing a difference between a first high voltage applied to the first high voltage terminal and a first low voltage applied to the first low voltage terminal; a second gray voltage generator configured to generate a second gray voltage by dividing a difference between a second high voltage applied to the second high voltage terminal and a second low voltage applied to the second low voltage terminal; as well as a data driver configured to apply a first data signal generated based on one of the first node voltage, the first gray voltage, and the second gray voltage to the first data line, and to apply a second data signal generated based on one of the first node voltage, the first gray voltage, and the second gray voltage to the second data line, Wherein, the first node is coupled to the first low voltage terminal and the second low voltage terminal.

6. The display device according to claim 5, wherein: The data driver includes a digital-to-analog conversion unit, and the digital-to-analog conversion unit includes: a first multiplexer having input terminals coupled to the first node, the first gray voltage generator, and the second gray voltage generator; a first digital-to-analog converter having an input terminal coupled to the output terminal of the first multiplexer and an output terminal coupled to the first data line; a second multiplexer having an input terminal coupled to the first node, the first gray voltage generator, and the second gray voltage generator; and a second digital-to-analog converter having an input terminal coupled to the output terminal of the second multiplexer and an output terminal coupled to the second data line, Wherein, the second multiplexer is configured as: During a first time period, providing the first grayscale voltage to the second digital-to-analog converter; providing the first node voltage to the second digital-to-analog converter during a second time period after the first time period; and During a third time period after the second time period, providing the second grayscale voltage to the second digital-to-analog converter; The first time period, the second time period and the third time period are part of an image frame time period. Wherein, the second multiplexer is further configured as: providing the first node voltage to the second digital-to-analog converter during a fourth time period after the third time period; and During a fifth time period after the fourth time period, the first grayscale voltage is provided to the second digital-to-analog converter, and The first time period, the second time period, the third time period, the fourth time period and the fifth time period are included in one image frame time period.

Images