A multi-channel power-on and power-off timing control circuit and control method

The integrated power-on and power-off sequencing control circuit for multiple-output power supplies addresses the complexity of traditional delay circuits by using voltage sampling and comparison circuits with dropout maintenance, ensuring reliable and flexible sequencing.

CN111538267BActive Publication Date: 2025-07-15NO 43 INST OF CHINA ELECTRONICS TECH GRP CETC
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Patent Information

Application Number
CN202010333448.0
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2020-04-24
Publication Date
2025-07-15
Estimated Expiration
2040-04-24

AI Technical Summary

Technical Problem

The traditional multi-output power-on timing control circuit is complex, making it difficult to achieve effective power-off timing control, and the circuit design is not suitable for expansion.

Method used

The circuit structure consisting of a reference circuit, a power supply and a timing control unit is adopted. The sampling voltage and the reference voltage are compared through a hysteresis comparator to control the on-off state of the load unit, and combined with the power-down maintenance circuit to delay the voltage drop, so as to achieve synchronous control of power-up and power-down timing.

Benefits of technology

The circuit design is simplified, and the unified control of power-on timing and power-off timing of multiple power supplies is realized. The new timing control unit can be expanded, ensuring the reliability and stability of the system.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present invention discloses a multi-channel power supply power-on and power-off timing control circuit and a control method in the field of power switch timing control, which includes a reference circuit, a first power supply, a second power supply, and at least N groups of timing control units, where N ∈ N* and N ≥ 2; each group of timing control units includes a voltage sampling circuit, a voltage comparison circuit, an output control circuit, and a load unit; among them, the voltage sampling circuit samples the supply voltage of the first power supply, the voltage comparison circuit compares the sampled voltage and the reference voltage through a hysteresis comparator, and the reference voltages provided by the reference circuits in any two groups of timing control units are not equal; the load unit is connected to the output control circuit, and the output control circuit switches its on-off state according to the comparison level output by the voltage comparison circuit. The present invention integrates the power-on timing control and the power-off timing control into one, with a simple circuit, and can expand new timing control units at any time, with strong creativity and high practicability.
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Description

Technical Field

[0001] The present invention relates to the field of power switch timing control, and specifically to a multi-channel power supply power-on and power-off timing control circuit and control method. Background Art

[0002] Switching power supplies are widely used in the industrial and national defense fields and are important components in military and civilian electronic systems such as aerospace, aviation, ships, weapons, railways, communications, medical electronics, and industrial automation equipment. The switching power supplies in the system generally have multiple outputs, and sometimes the power-on and power-off timings of each voltage are required to ensure the reliable and stable operation of the system. Traditional multi-output power supply power-on timing control circuits mostly use different delay circuits for design, but there is generally no good control method for the power-off timing. The power-on timing control circuit designed with a delay circuit has a relatively complex circuit and is not very suitable for the timing control during power-off. Often, a set of circuits is required to implement the power-off timing control. Summary of the Invention

[0003] The purpose of the present invention is to provide a multi-channel power supply power-on and power-off timing control circuit and control method, which can not only conveniently implement the power-on timing control of the multi-output power supply, but also implement the power-off timing control, and the scheme can be conveniently extended for the timing control of multiple voltages.

[0004] To achieve the above purpose, the present invention provides the following technical solutions:

[0005] A multi-channel power supply power-on and power-off timing control circuit includes a reference circuit, a first power supply, a second power supply, and at least N sets of timing control units, where N ∈ N* and N ≥ 2; each set of timing control units includes a voltage sampling circuit, a voltage comparison circuit, an output control circuit, and a load unit; wherein, the voltage sampling circuit samples the supply voltage of the first power supply, and the second power supply provides the supply voltage for the reference circuit and the voltage comparison circuit;

[0006] The voltage comparison circuit compares the sampled voltage and the reference voltage provided by the reference circuit through a hysteresis comparator, and the reference voltages provided by the reference circuits in any two sets of timing control units are not equal;

[0007] The load unit is connected to the output control circuit; the output control circuit switches its on-off state according to the comparison level output by the voltage comparison circuit, thereby controlling the on-off of the load unit.

[0008] As an improvement of the present invention, in order to further change the slope of the power supply voltage drop in different groups of timing control units, a power-down maintenance circuit for maintaining the voltage when the first power supply drops is further included in the N-1 groups of timing control units; the power-down maintenance circuit includes a power diode and a maintenance capacitor, the anode end of the power diode is connected to the first power supply, the cathode is connected to the first end of the maintenance capacitor, and the second end of the maintenance capacitor is grounded; the common end of the power diode and the maintenance capacitor is connected to the voltage sampling circuit.

[0009] As an improvement of the present invention, in order to facilitate the control of the power-on and power-off timings, the timing control unit is divided into two groups. The timing control unit of the first group includes a first voltage sampling circuit, a first voltage comparison circuit, a first output control unit and a first load unit. The first voltage sampling circuit is connected between the first power supply and the input ground, and its output end is connected to the inverting input end of the first voltage comparison circuit; the non-inverting input end of the first voltage comparison circuit is connected to the reference circuit, and its output end is connected to the first output control circuit.

[0010] As an improvement of the present invention, in order to facilitate the control of the power-on and power-off timings, the timing control circuit of the second group includes a second voltage sampling circuit, a second voltage comparison circuit, a second output control unit, a second load unit and a power-down maintenance circuit. The first voltage sampling circuit is connected between the power-down maintenance circuit and the input ground, and its output end is connected to the inverting input end of the second voltage comparison circuit; the non-inverting input end of the second voltage comparison circuit is connected to the reference circuit, and its output end is connected to the second output control circuit.

[0011] As an improvement of the present invention, the reference circuit includes a first current-limiting resistor R5 and a voltage reference source N3. The anode end of the voltage reference source N3 is grounded, its reference end is connected to the cathode end, the first end of the first current-limiting resistor R5 is connected to the second power supply Vcc, and the second end is connected to the cathode end of the voltage reference source N3.

[0012] As an improved solution of the present invention, the first voltage sampling circuit includes a first sampling resistor R1 and a second sampling resistor R2. The first voltage comparison circuit includes a first voltage-dividing resistor R10, a second voltage-dividing resistor R11, a first positive feedback resistor R6 and a first hysteresis comparator N1. The first output control circuit includes a second current-limiting resistor R8 and a first switching triode V2. The first end of the first sampling resistor R1 is connected to the first power supply Vin, and the second end is connected to the inverting input end of the first hysteresis comparator N1 and the first end of the second sampling resistor R2. The power supply end of the first hysteresis comparator N1 is connected to the second power supply Vcc, and its non-inverting input end is connected to the second end of the first voltage-dividing resistor R10, the first end of the second voltage-dividing resistor R11 and the first end of the first positive feedback resistor R6. The first end of the first voltage-dividing resistor R10 is connected to the second end of the first current-limiting resistor R5. The second end of the first positive feedback resistor R6 is connected to the first end of the second current-limiting resistor R8. The second end of the second current-limiting resistor R8 is connected to the base of the first switching triode V2. The collector of the first switching triode V2 is connected to the control end of the first load unit, and its emitter, the second end of the second sampling resistor R2 and the second end of the second voltage-dividing resistor R11 are all grounded.

[0013] As an improved solution of the present invention, the second voltage sampling circuit includes a third sampling resistor R3 and a fourth sampling resistor R4. The second voltage comparison circuit includes a third voltage-dividing resistor R12, a fourth voltage-dividing resistor R13, a second positive feedback resistor R7 and a second hysteresis comparator N2. The second output control circuit includes a third current-limiting resistor R9 and a second switching triode V3. The first end of the third sampling resistor R3 is connected to the power-off timing circuit. The second end of the third sampling resistor R3 is connected to the first end of the fourth sampling resistor R4 and the inverting input end of the second hysteresis comparator N2. The power supply end of the second hysteresis comparator N2 is connected to the second power supply Vcc, and its non-inverting input end is connected to the second end of the third voltage-dividing resistor R12, the first end of the fourth voltage-dividing resistor R13 and the first end of the second positive feedback resistor R7. The first end of the third voltage-dividing resistor R12 is connected to the second end of the first current-limiting resistor R5. The second end of the second positive feedback resistor R7 is connected to the first end of the third current-limiting resistor R9. The second end of the third current-limiting resistor R9 is connected to the base of the second switching triode V3. The collector of the second switching triode V3 is connected to the control end of the second load unit, and its emitter, the second end of the fourth sampling resistor R4 and the second end of the fourth voltage-dividing resistor R13 are all grounded.

[0014] A control method for a multi-channel power-on and power-off timing control circuit is further proposed for the above technical solution. The control steps include:

[0015] S1: When the first power supply Vin is powered on, the reference voltages in the timing control units from Group 1 to Group N are Vr1 to Vrn in sequence, and Vr1 > Vr2 >... > Vrn; when the first power supply Vin is powered off, the reference voltages in the timing control units from Group 1 to Group N are Vd1 to Vdn in sequence, and Vd1 > Vd2 >... > Vdn;

[0016] S2: The voltage comparison circuits in each group of timing control units compare the sampled voltage of the voltage sampling circuit and the reference voltage provided by the reference circuit;

[0017] S3: When the first power supply Vin is powered on, as the voltage of the first power supply Vin rises, the sampled voltages V01 to Vn of the voltage sampling circuits in each group of timing control units are not less than their corresponding reference voltages Vr1 to Vrn respectively after passing through the time Trn, Tr(n - 1),..., Tr1; the power - on time difference ΔTr between any two groups a and b of timing control units is |Trb - Tra|;

[0018] S4: When the first power supply Vin is powered off, as the voltage of the first power supply Vin drops, the sampled voltages V01 to Vn of the voltage sampling circuits in each group of timing control units are not less than their corresponding reference voltages Vd1 to Vdn respectively after passing through the time Td1, Td2,..., Tdn; the power - off time difference ΔTd between any two groups a and b of timing control units is |Tdb - Tda|.

[0019] Advantageous effects: The present invention utilizes the rising slope of the supply voltage. By setting the reference turn - on voltages of each group and using the time difference between the sampling voltage values of each group reaching their corresponding reference turn - on voltage values as the time difference for establishing the output voltages of each group, the power - on timing control is realized; by setting different reference turn - off voltages for each group and using the time difference between the sampling voltage values of each group reaching their corresponding reference turn - off voltage values to realize the power - off timing of the output voltages of each group, the power - off maintenance circuit provides energy for the load units that need to be turned off later, slowing down the falling rate of the power supply of the post - turn - off circuit, and a longer power - off time difference can be achieved, ensuring the time - difference requirements during power - off. The present invention integrates the power - on timing control and the power - off timing control into one, with a simple circuit, and can expand new timing control units at any time, having strong creativity and high practicality. Description of the Drawings

[0020] Figure 1 It is a circuit schematic diagram of Embodiment 2 of the present invention;

[0021] Figure 2 It is a schematic diagram of the generation of the power - on time difference of the present invention;

[0022] Figure 3 It is a schematic diagram of the generation of the power - on time difference of the present invention;

[0023] Figure 4 This is the circuit diagram for the application of multiple timing control units of the present invention. Detailed implementation manners

[0024] The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all of the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the protection scope of the present invention.

[0025] Embodiment 1, a multi-channel power-on and power-off timing control circuit, includes a reference circuit, a first power supply, a second power supply, and at least N groups of timing control units, where N ∈ N* and N ≥ 2; each group of timing control units includes a voltage sampling circuit, a voltage comparison circuit, an output control circuit, and a load unit; wherein, the voltage sampling circuit samples the supply voltage of the first power supply, and the second power supply provides the supply voltage for the reference circuit and the voltage comparison circuit; the voltage comparison circuit compares the sampled voltage with the reference voltage provided by the reference circuit through a hysteresis comparator, and the reference voltages provided by the reference circuits in any two groups of timing control units are not equal; the load unit is connected to the output control circuit; the output control circuit switches its on-off state according to the comparison level output by the voltage comparison circuit, and further controls the power-on and power-off of the load unit.

[0026] In this embodiment, by using the rising slope of the supply voltage, the reference voltages (turn-on) of each group of timing control units are set. As the voltage of the first power supply rises, the time for the sampled voltages of each group of timing control units to reach the reference voltage is different, that is, the time for the on-off state of the output control circuit to change is different. Therefore, by using the time difference of power-on turn-on of each group as the time difference for establishing the output voltages of each group, the timing control of power-on can be realized.

[0027] When the first power supply loses power, the reference voltages (turn-off) of each group of timing control units are set. The principle is similar to that of turn-on. Due to the different reference voltages, the time for the sampled voltages of each group of timing control units to reach the reference voltage is different, and the time for the on-off state of the output control circuit to change is different. Therefore, by using the time difference for each group of sampled voltages to reach the corresponding reference turn-off voltage value to realize the power-off timing of the output voltages of each group, a longer power-off time difference can be achieved, ensuring the time difference requirements during power-off.

[0028] A control method in this embodiment includes control steps:

[0029] S1: When the first power supply Vin is powered on, the reference voltages in the timing control units of groups 1 to N are Vr1 to Vrn in sequence, and Vr1 > Vr2 >... > Vrn; when the first power supply Vin is powered off, the reference voltages in the timing control units of groups 1 to N are Vd1 to Vdn in sequence, and Vd1 > Vd2 >... > Vdn;

[0030] S2: The voltage comparison circuits in each group of timing control units compare the sampled voltage of the voltage sampling circuit and the reference voltage provided by the reference circuit;

[0031] S3: When the first power supply Vin is powered on, as the voltage of the first power supply Vin rises, the sampled voltages V01 to Vn of the voltage sampling circuits in each group of timing control units are not less than their corresponding reference voltages Vr1 to Vrn after passing through the times Trn, Tr(n - 1),..., Tr1 respectively; the power - on time difference ΔTr between any two groups a and b of timing control units is |Trb - Tra|;

[0032] S4: When the first power supply Vin is powered off, as the voltage of the first power supply Vin drops, the sampled voltages V01 to Vn of the voltage sampling circuits in each group of timing control units are not less than their corresponding reference voltages Vd1 to Vdn after passing through the times Td1, Td2,..., Tdn respectively; the power - off time difference ΔTd between any two groups a and b of timing control units is |Tdb - Tda|.

[0033] Embodiment 2, the N - 1 groups of timing control units further include a power - off maintenance circuit for maintaining the voltage when the first power supply is powered off; the power - off maintenance circuit includes a power diode and a maintenance capacitor. The anodic end of the power diode is connected to the first power supply, the cathode is connected to the first end of the maintenance capacitor, and the second end of the maintenance capacitor is grounded; the common end of the power diode and the maintenance capacitor is connected to the voltage sampling circuit.

[0034] The maintenance capacitor in the power - off maintenance circuit can store electrical energy. When the first power supply is powered off, the maintenance capacitor discharges, which can delay the falling slope of the supply voltage when powered off. Further, by using the differences in the reference voltages in different groups of timing control units, the turn - off time can be extended.

[0035] Embodiment 3, see Figure 1, taking two groups of timing control units as an example, the timing control unit of the first group includes a first voltage sampling circuit, a first voltage comparison circuit, a first output control unit and a first load unit. The first voltage sampling circuit is connected between the first power supply and the input ground, and its output terminal is connected to the inverting input terminal of the first voltage comparison circuit; the non-inverting input terminal of the first voltage comparison circuit is connected to the reference circuit, and its output terminal is connected to the first output control circuit. The timing control circuit of the second group includes a second voltage sampling circuit, a second voltage comparison circuit, a second output control unit, a second load unit and a power-down maintenance circuit. The first voltage sampling circuit is connected between the power-down maintenance circuit and the input ground, and its output terminal is connected to the inverting input terminal of the second voltage comparison circuit; the non-inverting input terminal of the second voltage comparison circuit is connected to the reference circuit, and its output terminal is connected to the second output control circuit.

[0036] In this embodiment, the reference circuit includes a first current-limiting resistor R5 and a voltage reference source N3. The anodic end of the voltage reference source N3 is grounded, its reference end is connected to the cathodic end, the first end of the first current-limiting resistor R5 is connected to the second power supply Vcc, and the second end is connected to the cathodic end of the voltage reference source N3.

[0037] In this embodiment, the first voltage sampling circuit includes a first sampling resistor R1 and a second sampling resistor R2. The first voltage comparison circuit includes a first voltage-dividing resistor R10, a second voltage-dividing resistor R11, a first positive feedback resistor R6 and a first hysteresis comparator N1. The first output control circuit includes a second current-limiting resistor R8 and a first switching triode V2; the first end of the first sampling resistor R1 is connected to the first power supply Vin, the second end is connected to the inverting input terminal of the first hysteresis comparator N1 and the first end of the second sampling resistor R2; the power supply terminal of the first hysteresis comparator N1 is connected to the second power supply Vcc, its non-inverting input terminal is connected to the second end of the first voltage-dividing resistor R10, the first end of the second voltage-dividing resistor R11 and the first end of the first positive feedback resistor R6. The first end of the first voltage-dividing resistor R10 is connected to the second end of the first current-limiting resistor R5, the second end of the first positive feedback resistor R6 is connected to the first end of the second current-limiting resistor R8, the second end of the second current-limiting resistor R8 is connected to the base of the first switching triode V2, the collector of the first switching triode V2 is connected to the control end of the first load unit, and its emitter, the second end of the second sampling resistor R2 and the second end of the second voltage-dividing resistor R11 are all grounded. A capacitor c1 is also connected between the first power supply Vin and the input ground.

[0038] In this embodiment, the power-down maintenance circuit includes a first diode V1 and a maintenance capacitor C2. The second voltage sampling circuit includes a third sampling resistor R3 and a fourth sampling resistor R4. The second voltage comparison circuit includes a third voltage-dividing resistor R12, a fourth voltage-dividing resistor R13, a second positive feedback resistor R7, and a second hysteresis comparator N2. The second output control circuit includes a third current-limiting resistor R9 and a second switching triode V3. The anode of the first diode V1 is connected to the first power supply Vin, and its cathode is connected to the first end of the maintenance capacitor C2, the input end of the second load unit, and the first end of the third sampling resistor R3. The second end of the third sampling resistor R3 is connected to the first end of the fourth sampling resistor R4 and the inverting input end of the second hysteresis comparator N2. The power supply end of the second hysteresis comparator N2 is connected to the second power supply Vcc, its non-inverting input end is connected to the second end of the third voltage-dividing resistor R12, the first end of the fourth voltage-dividing resistor R13, and the first end of the second positive feedback resistor R7. The first end of the third voltage-dividing resistor R12 is connected to the second end of the first current-limiting resistor R5. The second end of the second positive feedback resistor R7 is connected to the first end of the third current-limiting resistor R9. The second end of the third current-limiting resistor R9 is connected to the base of the second switching triode V3. The collector of the second switching triode V3 is connected to the control end of the second load unit, and its emitter, the second end of the fourth sampling resistor R4, and the second end of the fourth voltage-dividing resistor R13 are all grounded.

[0039] Therefore, referring to Figure 2 , the reference voltage Vr1 of the first voltage comparison circuit and the reference voltage Vr2 of the second voltage comparison circuit are set. Vr1 > Vr2. When power is initially applied, the voltage of the first power supply Vin is zero. Since the sampled voltage value of the voltage sampling circuit is less than the reference voltage value, the outputs of the two voltage comparison circuits are high levels, and the collectors of the two output control circuits output low levels. Taking the load unit as a DC / DC converter as an example, the outputs of the two load units are turned off. When the voltage of the first power supply Vin rises to the sampled voltage of the second voltage sampling circuit reaching Vr2, the time at this moment is Tr2, and the comparison voltage output by the second voltage comparison circuit becomes a low level. The collector output of the second output control circuit becomes high impedance, and the output voltage of the DC / DC converter 2 is established. At this time, the output of the first output control circuit is still a low level, and the output of the DC / DC converter 1 is still turned off. Until the voltage of the first power supply Vin continues to rise such that the sampled voltage of the first voltage sampling circuit reaches Vr1, the time at this moment is Tr1, and the comparison level output by the first voltage comparison circuit becomes a low level, causing the collector output of the first output control circuit to become high impedance, and the output of the DC / DC converter 1 is established. The output voltages of the two timing control units are established successively, realizing the power-on timing control of the output voltage, and the time difference is (Tr1 - Tr2).

[0040] Referring to Figure 3When the first power supply Vin is powered off, the supply voltage will drop rapidly. Since the second set of timing control units has a power-down maintenance circuit for power supply, the voltage VA will drop more slowly than the voltage of the first power supply Vin. Point A is the cathode end of the first diode V1 in Figure 1.

[0041] When power-down starts, the second power supply VCC continues to supply power to the first voltage comparison circuit and the second voltage comparison circuit. Set the reference voltage Vd1 of the first voltage comparison circuit and the reference voltage Vd2 of the second voltage comparison circuit. Vd1 > Vd2. The voltage of the first power supply Vin starts to drop from the steady-state value, and VA also starts to drop from the steady-state value. However, at this time, the sampled voltage is still greater than the reference voltage. Therefore, the comparison levels output by the two voltage comparison circuits are both low levels, the outputs of the two output control circuits are high impedance, and the outputs of the two DC / DC converters are normal.

[0042] When the voltage of the first power supply Vin drops to make the sampled voltage of the first voltage sampling circuit less than Vd1, at this time the time is Td1, the comparison level output by the first voltage comparison circuit becomes a high level, the output of the first output control circuit becomes a low level, and the output voltage of the DC / DC converter 1 is turned off. At this time, the output of the second output control circuit is still high impedance, and the output of the DC / DC converter 2 is still normal until the output voltage of the power-down maintenance circuit drops to make the sampled voltage of the second voltage sampling circuit less than Vd2, at this time the time is Td2, the comparison level output by the second voltage comparison circuit becomes a high level, the output of the second output control circuit becomes a low level, and the output voltage of the DC / DC converter 2 is turned off. The two output voltages achieve that the DC / DC converter 1 is turned off first and the DC / DC converter 2 is turned off later, completing the power-down timing control, and the time difference is (Td2 - Td1).

[0043] See Figure 4 Three sets of timing control units are set. The reference voltage provided by the reference circuit in the third set of timing control units is different from that of the first two sets of timing control units. Therefore, when the first power supply unit is powered on or off, the power-on and power-off sequences of these three sets are inconsistent. The jump time can be adjusted by setting the resistance value of the positive feedback resistor in the hysteresis comparator, and further control the power-on and power-off timing of the three sets.

[0044] The present invention utilizes the rising slope of the supply voltage. By setting the reference turn-on voltages of each group, the time difference between the sampling voltage values of each group reaching the corresponding reference turn-on voltage values is used as the time difference for establishing the output voltages of each group, thereby realizing the power-on timing control. The power-down maintenance circuit provides energy for the load units that need to be turned off later, slowing down the falling rate of the power supply of the power-down circuit. Then, by setting different reference turn-off voltages for each group, the time difference between the sampling voltage values of each group reaching the corresponding reference turn-off voltage values is used to realize the power-down timing of the output voltages of each group, which can achieve a longer power-down time difference and ensure the time difference requirements during power-down. The present invention integrates the power-on timing control and the power-down timing control into one, with a simple circuit, and can expand new timing control units at any time, featuring strong creativity and high practicality.

[0045] Although this specification is described according to the embodiments, not every embodiment only contains an independent technical solution. This narrative way of the specification is only for clarity. Those skilled in the art should regard the specification as a whole, and the technical solutions in each embodiment can also be appropriately combined to form other embodiments that can be understood by those skilled in the art.

[0046] In the description of the present invention, it should be noted that relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the terms "comprising", "including" or any other variant thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements not only includes those elements, but also includes other elements not expressly listed, or also includes elements inherent to such process, method, article or device. Without further limitation, an element defined by the statement "including a..." does not exclude the existence of additional identical elements in the process, method, article or device including the element.

[0047] In the description of the present invention, it should also be noted that the orientation or positional relationship indicated by terms such as "upper", "lower", "inner", "outer", etc. is based on the orientation or positional relationship shown in the drawings, or the orientation or positional relationship in which the product of the present invention is usually placed during use. It is only for the convenience of describing the present invention and simplifying the description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of the present invention.

[0048] In the description of the present invention, it should also be noted that, unless otherwise clearly specified and defined, the terms "arranged" and "connected" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be directly connected or indirectly connected through an intermediate medium, and it can be the communication inside two components. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to specific situations.

[0049] Therefore, the above description is only a preferred embodiment of the present application and is not used to limit the scope of implementation of the present application; that is, all equivalent transformations made according to the scope of the claims of the present application are within the protection scope of the claims of the present application.

Claims

1. A control method for a power-on and power-off sequence control circuit of multiple power supplies. The control circuit includes a reference circuit, a first power supply, a second power supply, and at least N sets of timing control units, where N ∈ N* and N ≥ 2; each set of timing control units includes a voltage sampling circuit, a voltage comparison circuit, an output control circuit, and a load unit; among them, The voltage sampling circuit samples the supply voltage of the first power supply, and the second power supply provides the supply voltage for the reference circuit and the voltage comparison circuit. It is characterized in that the voltage comparison circuit compares the sampled voltage and the reference voltage provided by the reference circuit through a hysteresis comparator, and the reference voltages provided by the reference circuits in any two groups of timing control units are not equal; the load unit is connected to the output control circuit; the output control circuit switches its on / off state according to the comparison level output by the voltage comparison circuit, thereby controlling the power on / off of the load unit. Its control method includes: S1: When the first power supply Vin is powered on, the reference voltages in the timing control units from group 1 to group N are Vr1 to Vrn in sequence, and Vr1 > Vr2 >... > Vrn; when the first power supply Vin is powered off, the reference voltages in the timing control units from group 1 to group N are Vd1 to Vdn in sequence, and Vd1 > Vd2 >... > Vdn. S2: The voltage comparison circuits in each group of timing control units compare the sampled voltage of the voltage sampling circuit and the reference voltage provided by the reference circuit. S3: When the first power supply Vin is powered on, as the voltage of the first power supply Vin rises, the sampled voltages V01 to Vn of the voltage sampling circuits in each group of timing control units are not less than their corresponding reference voltages Vr1 to Vrn after passing through times Trn, Tr(n - 1),..., Tr1 respectively; the power-on time difference ΔTr between any two groups a and b of timing control units is |Trb - Tra|. S4: When the first power supply Vin is powered off, as the voltage of the first power supply Vin drops, the sampled voltages V01 to Vn of the voltage sampling circuits in each group of timing control units are not less than their corresponding reference voltages Vd1 to Vdn after passing through times Td1, Td2,..., Tdn respectively; the power-off time difference ΔTd between any two groups a and b of timing control units is |Tdb - Tda|.

2. The control method of a multi-channel power-on and power-off timing control circuit according to claim 1, characterized in that, The N - 1 groups of timing control units also include a power-off maintenance circuit for maintaining the voltage when the first power supply is powered off; the power-off maintenance circuit includes a power diode and a maintenance capacitor. The anode terminal of the power diode is connected to the first power supply, the cathode is connected to the first end of the maintenance capacitor, and the second end of the maintenance capacitor is grounded; the common terminal of the power diode and the maintenance capacitor is connected to the voltage sampling circuit.

3. The control method of a multi-channel power supply power-on and power-off timing control circuit according to claim 2, characterized in that, The timing control unit is in two groups. The first group of timing control unit includes a first voltage sampling circuit, a first voltage comparison circuit, a first output control circuit and a first load unit. The input terminal of the first voltage sampling circuit is connected between the first power supply and the input ground, and its output terminal is connected to the inverting input terminal of the first voltage comparison circuit; the non-inverting input terminal of the first voltage comparison circuit is connected to the reference circuit, and its output terminal is connected to the first output control circuit.

4. The control method of a multi-channel power supply power-on and power-off timing control circuit according to claim 3, characterized in that, The timing control unit of the second group includes a second voltage sampling circuit, a second voltage comparison circuit, a second output control circuit, a second load unit, and a power-down maintenance circuit. The input end of the second voltage sampling circuit is connected between the power-down maintenance circuit and the input ground, and its output end is connected to the inverting input end of the second voltage comparison circuit. The non-inverting input end of the second voltage comparison circuit is connected to a reference circuit, and its output end is connected to the second output control circuit.

5. The control method of a multi-channel power supply power-on and power-off timing control circuit according to claim 4, characterized in that, The reference circuit includes a first current-limiting resistor R5 and a voltage reference source N3. The anodic end of the voltage reference source N3 is grounded, its reference end is connected to the cathodic end, the first end of the first current-limiting resistor R5 is connected to the second power supply Vcc, and the second end is connected to the cathodic end of the voltage reference source N3.

6. The control method of a multi-channel power supply power-on and power-off timing control circuit according to claim 5, characterized in that, The first voltage sampling circuit includes a first sampling resistor R1 and a second sampling resistor R2. The first voltage comparison circuit includes a first voltage-dividing resistor R10, a second voltage-dividing resistor R11, a first positive feedback resistor R6, and a first hysteresis comparator N1. The first output control circuit includes a second current-limiting resistor R8 and a first switching triode V2. The first end of the first sampling resistor R1 is connected to the first power supply Vin, the second end is connected to the inverting input end of the first hysteresis comparator N1 and the first end of the second sampling resistor R2. The power supply end of the first hysteresis comparator N1 is connected to the second power supply Vcc. Its non-inverting input end is connected to the second end of the first voltage-dividing resistor R10, the first end of the second voltage-dividing resistor R11, and the first end of the first positive feedback resistor R6. The first end of the first voltage-dividing resistor R10 is connected to the second end of the first current-limiting resistor R5. The second end of the first positive feedback resistor R6 is connected to the first end of the second current-limiting resistor R8. The second end of the second current-limiting resistor R8 is connected to the base of the first switching triode V2. The collector of the first switching triode V2 is connected to the control end of the first load unit, and its emitter, the second end of the second sampling resistor R2, and the second end of the second voltage-dividing resistor R11 are all grounded.

7. A control method for a multi-channel power supply power-on and power-off timing control circuit according to claim 5 or 6, characterized in that, The second voltage sampling circuit includes a third sampling resistor R3 and a fourth sampling resistor R4. The second voltage comparison circuit includes a third voltage dividing resistor R12, a fourth voltage dividing resistor R13, a second positive feedback resistor R7, and a second hysteresis comparator N2. The second output control circuit includes a third current limiting resistor R9 and a second switching triode V3. The first end of the third sampling resistor R3 is connected to the common end of the power diode and the maintaining capacitor in the power-off maintaining circuit. The second end of the third sampling resistor R3 is connected to the first end of the fourth sampling resistor R4 and the inverting input end of the second hysteresis comparator N2. The power supply end of the second hysteresis comparator N2 is connected to the second power supply Vcc. Its non-inverting input end is connected to the second end of the third voltage dividing resistor R12, the first end of the fourth voltage dividing resistor R13, and the first end of the second positive feedback resistor R7. The first end of the third voltage dividing resistor R12 is connected to the second end of the first current limiting resistor R5. The second end of the second positive feedback resistor R7 is connected to the first end of the third current limiting resistor R9. The second end of the third current limiting resistor R9 is connected to the base of the second switching triode V3. The collector of the second switching triode V3 is connected to the control end of the second load unit. Its emitter, the second end of the fourth sampling resistor R4, and the second end of the fourth voltage dividing resistor R13 are all grounded.

Citation Information

Patent Citations

  • Power-on and power-off time sequence control circuit for multiple paths of power supplies

    CN211928411U