LED Driver Chip and LED Driver System

Abstract

Embodiments of the present invention provide an LED driver chip and an LED driver system. The LED driver chip includes: a bit rate detection module for detecting a bit rate parameter corresponding to display data input from a previous-level component to the current-level LED driver chip; a data buffer module for caching the display data input from the previous-level component to the current-level LED driver chip; a data encoding and decoding module for receiving the bit rate parameter sent by the bit rate detection module, extracting the display data from the data buffer module, and decoding the display data according to the bit rate parameter to obtain decoded display data; and a display output module for controlling an LED light to display according to the decoded display data, thereby achieving the effect of dynamically decoding the display data.

Description

Technical Field

[0001] The embodiments of the present invention relate to the technical field of LED (Light Emitting Diode), and in particular to an LED driver chip and an LED driver system. Background Art

[0002] With the rapid development of LEDs, more and more types of LED driver chips are beginning to appear.

[0003] Currently, commonly used controllers decode the video to obtain display data and send it to the LED driver chip at a fixed bit rate of 800KHz for display. Since the controller sends the display data to the LED driver chip at a fixed bit rate for display, the decoding method of the LED driver chip is also fixed.

[0004] However, controllers have emerged that adapt to different bit rates to send display data based on video images, and the fixed decoding method of commonly used LED driver chips can no longer meet the requirements of decoding display data according to dynamic bit rates. Therefore, there is an urgent need for an LED driver chip that can dynamically decode display data. Summary of the Invention

[0005] The embodiments of the present invention provide an LED driver chip and an LED driver system to achieve the effect of dynamically decoding display data.

[0006] In a first aspect, an embodiment of the present invention provides an LED driver chip, comprising:

[0007] The code rate detection module is used to detect the code rate parameters corresponding to the display data input from the previous level component to the current level LED driver chip;

[0008] A data buffer module, configured to cache the display data input from the previous level component to the current level LED driver chip;

[0009] a data encoding and decoding module, configured to receive the bit rate parameter sent by the bit rate detection module, extract the display data from the data buffer module, and decode the display data according to the bit rate parameter to obtain decoded display data;

[0010] The display output module is used to control the LED light to display according to the decoded display data.

[0011] Optionally, also include:

[0012] A filtering module is provided before the bit rate detection module and the data buffer module, and is used for filtering the display data and sending the filtered display data to the bit rate detection module and the data buffer module.

[0013] Optionally, the filtering module is configured to filter out noise and repair waveforms disturbed by the noise, where the noise includes at least one of complex noise and glitch noise.

[0014] Optionally, the display output module is a PWM display output module, and the PWM display output module is configured to convert the decoded display data into a PWM signal to control the LED lamp for display.

[0015] Optionally, the display data is one frame of image data of a video to be displayed.

[0016] Optionally, the LED driving chip is connected in series between an upper-level component and a lower-level LED driving chip, the display data includes current-level display data and display data of each subsequent LED driving chip, and the data encoding and decoding module is specifically configured to extract the current-level display data from the display data, decode the current-level display data according to the code rate parameter, and send the decoded data to the display output module.

[0017] Optionally, the data encoding module is further configured to send the display data of each subsequent LED driving chip to the lower-level LED driving chip according to the code rate parameter.

[0018] Optionally, the data encoding and decoding module is specifically configured to determine a decoding threshold associated with the code rate parameter, and decode the display data according to the decoding threshold.

[0019] Optionally, the decoding threshold = 1 / (preset coefficient * code rate parameter), where the preset coefficient is greater than 1;

[0020] Wherein, if the display data is high-level data greater than the decoding threshold, the logic of the display data is 1;

[0021] If the display data is high-level data less than the decoding threshold, the logic of the display data is 0.

[0022] In a second aspect, an embodiment of the present invention provides an LED driving system, including a controller configured to send display data according to the code rate parameter; the LED driving system further includes n LED driving chips according to any embodiment of the present invention, and the n LED driving chips are connected in series to form a cascaded driving circuit, and the input end of the first-level LED driving chip is connected to the output end of the controller.

[0023] The LED driver chip of the embodiment of the present invention includes a bit rate detection module for detecting the bit rate parameter corresponding to the display data input from the upper-level component to the current-level LED driver chip; a data buffer module for caching the display data input from the upper-level component to the current-level LED driver chip; a data encoding and decoding module for receiving the bit rate parameter sent by the bit rate detection module, extracting the display data from the data buffer module, and decoding the display data according to the bit rate parameter to obtain decoded display data; and a display output module for controlling the LED lamp to display according to the decoded display data, thereby solving the problem that the fixed decoding method of the commonly used LED driver chip can no longer meet the requirements of decoding the display data according to the dynamic bit rate, and achieving the effect of dynamically decoding the display data. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] Figure 1 A schematic structural diagram of an LED driver chip provided by an embodiment of the present invention;

[0025] Figure 2 A schematic diagram of a clock signal provided by an embodiment of the present invention;

[0026] Figure 3 A schematic diagram of a cascade structure of three LED driver chips provided by an embodiment of the present invention;

[0027] Figure 4 A schematic structural diagram of another LED driver chip provided by an embodiment of the present invention;

[0028] Figure 5 A schematic structural diagram of an LED driving system provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0029] The present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It is to be understood that the specific embodiments described herein are only used to explain the present invention, rather than to limit the present invention. It should also be noted that, for ease of description, only parts related to the present invention, rather than all structures, are shown in the accompanying drawings.

[0030] In the description of the present invention, it should be noted that the terms "center," "up," "down," "left," "right," "vertical," "horizontal," "inside," and "outside" and the like, indicating orientations or positional relationships, are based on the orientations or positional relationships shown in the accompanying drawings and are intended only to facilitate the description of the present invention and simplify the description. They do not indicate or imply that the devices or components referred to must have a specific orientation, be constructed, or operate in a specific orientation. Therefore, they should not be construed as limitations on the present invention. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance. The terms "first position" and "second position" refer to two different positions.

[0031] In the description of the present invention, it should be noted that, unless otherwise expressly specified or limited, the terms "mounted," "connected," and "connected" should be understood broadly. For example, they may refer to fixed or detachable connections; mechanical or electrical connections; direct or indirect connections through an intermediary; and internal communication between two components. Those skilled in the art will understand the specific meanings of the above terms in the present invention.

[0032] Figure 1 This is a schematic diagram of the structure of the LED driver chip provided by the embodiment of the present invention. Figure 1 As shown, an embodiment of the present invention provides an LED driver chip 100, comprising a bit rate detection module 110, a data buffer module 120, a data encoding and decoding module 130, and a display output module 140. The LED driver chip 100 of this embodiment is used to adaptively decode the received display data according to the bit rate parameters corresponding to the received display data.

[0033] The bit rate detection module 110 is used to detect the bit rate parameter corresponding to the display data input from the previous level component to the current level LED driver chip 100;

[0034] The data buffer module 120 is used to cache the display data input from the previous level component to the current level LED driver chip 100;

[0035] The data encoding and decoding module 130 is used to receive the bit rate parameter sent by the bit rate detection module 110, extract the display data from the data buffer module 120, and decode the display data according to the bit rate parameter to obtain decoded display data;

[0036] The display output module 140 is used to control the LED lights to display according to the decoded display data.

[0037] Among them, the code rate parameter is a specific code rate reference value, for example, the code rate parameter is 800KHz (Hertz) or 1.6MHz, etc., which is not specifically limited here, and is determined according to the code rate of the display data sent by the upper-level component. The data transmission of this embodiment can be controlled by a clock signal. Optionally, the display output module 140 can be a DC display output module 140 using a DC dimming method, or it can be a PWM display output module 140, which is not limited here. DC dimming is to change the brightness of the screen by increasing or decreasing the power of the screen panel circuit. Since power is equal to voltage * current, the screen brightness can be changed by simply changing the voltage or current. Taking the PWM display output module 140 as an example, the PWM display output module 140 outputs to the LED lamp in the form of PWM modulation for display, and converts the decoded display data into a PWM signal to control the LED lamp for display.

[0038] Optionally, the display data is one frame of image data of a video to be displayed, that is, the n LED driver chips 100 control the LED lights to display one frame of image at a time.

[0039] In this embodiment, the previous-level component sends display data at a dynamic bit rate to the current-level LED driver chip 100. When the current-level LED driver chip 100 receives the display data, the bit rate detection module 110 detects the bit rate parameters corresponding to the display data, while the data buffer module 120 caches the display data. Once the bit rate detection module 110 completes detection, the data encoding and decoding module 130 extracts the display data from the data buffer module 120, decodes the display data according to the bit rate parameters, and sends it to the display output module 140. The display output module 140 then controls the LED display based on the decoded display data.

[0040] For example, consider a video file with a dynamic motion image: the first half has a 60-frame rate, while the second half is a nearly static image at 10 frames per second. A typical controller decodes the video and sends it to the LED driver chip 100 at a fixed bitrate of 800 kHz for display. Assuming each LED driver chip 100 requires 24 bits of data, and cascading 1080 chips is required to achieve high-definition display, the frame rate is 1s / (1080*24*1.25us) = 30.86 frames. Therefore, when using this method for display, 30 frames of the 60-frame fast image are lost, and 20 frames of the 10-frame image are wasted, resulting in a poor overall image quality. The controller can use different bit rates to send display data based on the display requirements. In this embodiment, when the bit rate detection module 110 detects that the display data input from the upper-level component to the current-level LED driver chip 100 is a dynamic image, the display data is sent to the lower-level LED driver chip 100 at a first bit rate. When the bit rate detection module 110 detects that the display data input from the upper-level component to the current-level LED driver chip 100 is a static image, the display data is sent to the lower-level LED driver chip 100 at a second bit rate. The first bit rate is greater than the second bit rate. Specifically, for example, when the display data is a highly dynamic image, the display data is sent at a bit rate of 1.6 MHz. When the display data is static or nearly static, the display data is sent at a bit rate of 266 kHz. Accordingly, the LED driver chip 100 of this embodiment can adaptively decode the display data sent at a dynamic bit rate by the upper-level component, thereby dynamically decoding the display data. In addition, the controller sends display data in a dynamic bit rate manner, and the LED driver chip 100 performs adaptive decoding. High dynamic images use high bit rates to transmit larger amounts of data, displaying high frame rate images, and low bit rates are used for static or slow motion images, thereby saving power consumption.

[0041] It should be noted that the display data sent by the upper-level component is sent in the form of return-to-zero code. Return-to-zero code is a code that represents 0 and 1 in two digital level signals with different duty cycles. The data encoding and decoding module 130 converts the return-to-zero code into ordinary binary code. The data encoding and decoding module 130 encodes the display data, which essentially converts the data signal represented by the return-to-zero code sent from the upper-level component into a data signal represented by ordinary binary code. Specifically, within a time period for collecting data, high level time > low level time = binary code 1, low level time > high level time = binary code 1. Optionally, when the duration of the low level is greater than the preset time, the signal is considered to be the reset synchronization signal RESET.

[0042] In one embodiment, the data encoding and decoding module 130 is specifically configured to determine a decoding threshold associated with the bit rate parameter, and decode the display data according to the decoding threshold.

[0043] Specifically, the decoding threshold refers to the threshold used to decode display data and is associated with the bitrate parameter. Among them, the decoding threshold = 1 / (preset coefficient * bitrate parameter), where the preset coefficient is greater than 1, that is, 1 / preset coefficient is less than 1. For example, 1 / preset coefficient can be 1 / 2, or 1 / 3, etc., a number close to 1 / 2, such as a number whose difference from 1 / 2 is not greater than 1 / 6, etc., which can be set as needed and is not specifically limited here. Preferably, the decoding threshold = 1 / (2 * bitrate parameter). Exemplarily, when the bitrate parameter is 1 Mbps, the period is 1 us (microsecond), the preset coefficient is 2, then the decoding threshold is 500 ns (nanosecond). Then, in one time period, when the high-level time of the data signal of the display data is 250 ns which is less than 500 ns, the binary code is 0; when the high-level time is 750 ns which is greater than 500 ns, the binary code is 1.

[0044] In one embodiment, there are multiple data encoding and decoding modules 130. Among them, each data encoding and decoding module 130 is configured to receive the input data input by the upper-level component and decode the input data.

[0045] The display output module 140 is electrically connected to the multiple data encoding and decoding modules 130 in sequence. The display output module 140 is configured to receive the decoded display data sent by the data encoding and decoding module 130 when the input data is display data, so as to control the LED lights to display according to the decoded display data.

[0046] In this embodiment, each data encoding and decoding module 130 is configured to receive the input data input by the upper-level component and decode the input data. Among them, the input data can be display data, configuration data, or other data, etc., which is not specifically limited here. The display data is used to control the LED lights to display, and the configuration data is used to configure the parameters of the LED driver chip 100, such as the number of data encoding and decoding modules 130 configured to work. When the input data is display data, the display output module 140 receives the decoded display data to control the LED to display. The number of data encoding and decoding modules 130 can be increased as needed and is not specifically limited here. The multiple data encoding and decoding modules 130 refer to that the number of data encoding and decoding modules 130 is at least two.

[0047] It can be understood that regardless of whether the input data is configuration data or display data, when a part of the multiple data encoding and decoding modules 130 is damaged or abnormal, as long as one data encoding and decoding module 130 is normal, the input data can be normally received for normal decoding, and then configuration or display can be performed.

[0048] In one embodiment, optionally, multiple data encoding and decoding modules 130 sequentially receive the display data sent by the upper-level component at a preset time interval; the display output module 140 sequentially receives the display data sent by the multiple data encoding and decoding modules 130.

[0049] Optionally, the display data is a frame of image data of a video to be displayed, and the preset time interval = the ratio of the continuous display time of each frame of image data to the number of working data encoding and decoding modules 130.

[0050] In this embodiment, the upper-level component may be a controller, the upper-level LED driving chip 100, and / or the upper n-level LED driving chips 100, etc., which is determined according to specific circumstances and is not specifically limited here. It can be understood that by sequentially receiving the display data sent by the upper-level component through multiple data encoding and decoding modules 130, the display quality of the picture can be improved without improving the performance of a single data encoding and decoding module 130.

[0051] For example, the video frame rate is 140 frames per second. Assuming that the maximum bitstream that the data encoding and decoding module 130 can encode and decode is 800 KHz, then 24 * 1.25 μs * 1080 = 32.4 ms, which is approximately 30 frames per second. That is to say, when cascading 1080 LED driving chips 100, only 30 frames of the picture can be decoded in a single channel, and the traditional single-channel chip decoding 30 frames is the limit. However, through the technical solution of this embodiment, when there are 4 data encoding and decoding modules 130, 4 * 30 frames (for a single data encoding and decoding module 130) = 140 frames. Without improving the performance of a single data encoding and decoding module 130, that is, without increasing the maximum bitstream that the data encoding and decoding module 130 can encode and decode to 800 KHz, 4 data encoding and decoding modules 130 can improve the display quality of the picture and achieve a picture display of 140 frames per second.

[0052] It should be noted that multiple data encoding and decoding modules 130 sequentially receive the display data sent by the upper-level component at preset time intervals. The preset time interval = the ratio of the continuous display time of each frame of image data to the number of working data encoding and decoding modules 130. Exemplarily, assuming that each frame of image data is 32 ms and there are 4 data encoding and decoding modules 130 and all 4 data encoding and decoding modules 130 are working, then the first frame of display data is sent to the first data encoding and decoding module 130 first. After (32 / 4) = 8 ms, the second frame of display data is sent to the second data encoding and decoding module 130. After another 8 ms, the third frame of display data is sent to the third data encoding and decoding module 130. After another 8 ms, the fourth frame of display data is sent to the fourth data encoding and decoding module 130. It can be understood that when there are 4 data encoding and decoding modules 130 and each frame of data is 32 ms, when there is 1 data encoding and decoding module 130, then a frame of data is refreshed every 32 ms, and the frame rate is approximately 30. However, when there are 4 data encoding and decoding modules 130, then a frame of data can be refreshed every 8 ms, thereby improving the display frame rate of the video. It can be understood that when the number of working data encoding and decoding modules 130 is 2, a frame of image data is sent at an interval of 32 / 2 = 16 ms.

[0053] In one embodiment, optionally, the output end of the LED driving chip 100 is connected in series with the lower-level LED driving chip 100. Each of the data encoding and decoding modules 130 is further configured to send the output data to the lower-level LED driving chip 100, where the output data serves as the input data of the lower-level LED driving chip 100.

[0054] Specifically, multiple LED driving chips 100 form a cascaded circuit in a series connection form.

[0055] Reference Figure 2 , Figure 2 is a schematic diagram of a clock signal provided in this embodiment. Through Figure 2 it can be seen that data is collected at the rising edge signal. Within one collection period, when the time of the high level is less than the decoding threshold, it is binary code 0; when the time of the high level is greater than the decoding threshold, it is binary code 1.

[0056] Specifically, the current-stage LED driver chip 100 receives display data sent by the previous-stage component. The previous-stage component can be a controller or a previous-stage LED driver chip 100, without specific limitations here and determined based on actual circumstances. For example, when the current-stage LED driver chip 100 is directly connected to the controller and receives display data sent by the controller, the previous-stage component is the controller. When n LED driver chips 100 are cascaded and the current-stage LED driver chip 100 is not the first-stage LED driver chip 100, the previous-stage component is the previous-stage LED driver chip 100.

[0057] refer to Figure 3 , Figure 3 This is a schematic diagram of a cascade structure of three LED driver chips provided by an embodiment of the present invention. Figure 3 It can be seen that if the current-stage LED driver chip 100 is a first-stage LED driver chip 100, the previous-stage component is the controller 200. If the current-stage LED driver chip 100 is a second-stage LED driver chip 100, the previous-stage component is the first-stage LED driver chip 100. If the current-stage LED driver chip 100 is a third-stage LED driver chip 100, the previous-stage component is the second-stage LED driver chip 100.

[0058] In one embodiment, the LED driver chip 100 is connected in series between the previous level component and the next level LED driver chip 100, and the display data includes the current level display data and the display data of each subsequent level LED driver chip 100. The data encoding and decoding module 130 is specifically used to extract the current level display data from the display data, decode the current level display data according to the bit rate parameter, and then send it to the display output module 140.

[0059] In this embodiment, n LED driver chips 100 are connected in series to form a cascade circuit. First, the display data for the entire cascade circuit is controlled and transmitted. The first-stage LED driver chip 100 extracts the display data for the current stage, decodes it according to the bit rate, and then controls the LED light display. The display data for each subsequent stage of LED driver chips 100 is then transmitted to the second-stage LED driver chip 100. The second-stage LED driver chip 100 repeats the process of extracting and decoding the display data for the current stage until the last stage of the cascade circuit completes decoding and displays the data.

[0060] Preferably, the data encoding module is further configured to send the display data of each subsequent stage of LED driver chip 100 to the next stage of LED driver chip 100 according to the code rate parameter.

[0061] Specifically, the data encoding module re-encodes the display data of each subsequent stage of LED driver chip 100 and transmits it to the next stage of LED driver chip 100 at the best adapted code rate.

[0062] refer to Figure 4 , Figure 4 This is a schematic diagram of the structure of another LED driver chip provided by this embodiment. Figure 4 It can be seen that the LED driver chip 100 further includes a filter module 150, wherein:

[0063] The filtering module 150 is disposed before the bit rate detection module 110 and the data buffer module 120 , and is configured to filter the display data and send the filtered display data to the bit rate detection module 110 and the data buffer module 120 .

[0064] It is understood that the display data entering the current-stage LED driver chip 100 is a data signal. If there is morning, it directly affects the bit rate detection module 110's detection of the bit rate parameter corresponding to the display data. Therefore, accurate bit rate parameter detection by the filtering module 150 is very important. By filtering the display data through the filtering module 150 and detecting the filtered display data by the bit rate detection module 110, the detection result is more accurate.

[0065] Specifically, the filtering module 150 is used to filter out noise and repair the waveform interfered by the noise, wherein the noise includes at least one of complex noise and glitch noise.

[0066] The technical solution of the embodiment of the present invention is that the LED driver chip includes a bit rate detection module for detecting the bit rate parameters corresponding to the display data input from the previous level component to the current level LED driver chip; a data buffer module for caching the display data input from the previous level component to the current level LED driver chip; a data encoding and decoding module for receiving the bit rate parameters sent by the bit rate detection module, extracting the display data from the data buffer module, and decoding the display data according to the bit rate parameters to obtain decoded display data; and a display output module for controlling the LED light to display according to the decoded display data. After detecting the bit rate, decoding is performed according to the bit rate. When the bit rate is dynamically floating, the LED driver chip of this embodiment can also decode normally, achieving the technical effect of dynamically decoding the display data. In addition, the LED driver chip performs adaptive decoding. High-dynamic images use a high bit rate to transmit a larger amount of data, displaying high frame rate images, and using a low bit rate for static or slow motion images, thereby saving power consumption.

[0067] Figure 5 Schematic diagram of the structure of an LED driving system provided by an embodiment of the present invention.Figure 5 As shown, an embodiment of the present invention provides an LED driving system, including a controller 200 and n LED driver chips 100, wherein the n LED driver chips 100 are connected in series to form a cascade driving circuit, and the input end of the first-stage LED driver chip 100 is connected to the output end of the controller 200.

[0068] The controller 200 is used to send display data according to the bit rate parameter;

[0069] Each LED driver chip 100 includes a bit rate detection module 110 , a data buffer module 120 , a data encoding and decoding module 130 and a display output module 140 .

[0070] The bit rate detection module 110 is used to detect the bit rate parameter corresponding to the display data input from the previous level component to the current level LED driver chip 100;

[0071] The data buffer module 120 is used to cache the display data input from the previous level component to the current level LED driver chip 100;

[0072] The data encoding and decoding module 130 is used to receive the bit rate parameter sent by the bit rate detection module 110, extract the display data from the data buffer module 120, and decode the display data according to the bit rate parameter to obtain decoded display data;

[0073] The display output module 140 is used to control the LED lights to display according to the decoded display data.

[0074] In this embodiment, the controller 200 sends display data with dynamic bit rate parameters according to the different picture requirements of a video file. Each LED driver chip 100 in the cascade drive circuit can adapt to decoding, so that a high bit rate can be used to transmit a larger amount of data when displaying high-dynamic pictures, and a low bit rate can be used for transmission when displaying high-frame rate pictures, static or slow-motion pictures, thereby saving power consumption.

[0075] In this embodiment, specifically, the LED driver chip 100 at the current level sends data to the LED driver chip 100 at the next level. It should be noted that data is sent to the LED driver chip 100 at the next level via the data encoding and decoding module 130 of the LED driver chip 100. Specifically, after decoding the data, the data encoding and decoding module 130 re-encodes the data required by the remaining LED driver chips 100 and then sends it to the LED driver chip 100 at the next level, so that the remaining LED driver chips 100 can also receive the data normally.

[0076] In one embodiment, the LED driving chip 100 further includes a filtering module, which is arranged before the bit rate detection module and the data buffer module, and is used to filter the display data and send the filtered display data to the bit rate detection module and the data buffer module. It should be noted that the data encoded and sent to the subsequent LED driving chip 100 should be sent with appropriate 0 and 1 data signals on the premise that the 0 code and 1 code are as far away from the threshold as possible and are not filtered out as glitches. For example, when the decoding threshold is 500 ns, the encoded 0 is sent with a high-level time of 250 ns in the middle, and the encoded 1 is sent with a high-level time of 750 ns in the middle.

[0077] In addition, when data is transmitted from the previous LED driving chip 100 to the next LED driving chip 100 through the cascade line, due to the load of the transmission medium, the transmitted data signal will be clipped, resulting in the narrowing of the low-level time or high-level time of the data signal. If the clipping is too large, the encoded 0 and 1 may be considered as glitch noise and filtered out, or there may be bit errors, such as 0 becoming 1, or 1 becoming 0, etc. Therefore, it is necessary to adjust the high-level time in the middle. For bit errors, it will cause the display screen to flash, and the playback effect is very poor. Specifically, when the clipping is of the high level, the high level will become narrower and the low level will become wider; when the clipping is of the low level, the low level will become narrower and the high level will become wider. The specific clipping method is related to the working mode and is not specifically limited here, and the high-level time and low-level time can be adjusted according to the type of clipping.

[0078] Specifically, when the clipping is of the low level and the binary code is 0, the high-level time is adjusted so that the high-level time is far away from the decoding threshold and the difference between the high-level time and the decoding threshold is greater than the clipping amplitude; when the clipping is of the low level and the binary code is 1, the high-level time is adjusted so that the high-level time is close to the decoding threshold and the high-level time is greater than the decoding threshold; when the clipping is of the high level and the binary code is 0, the high-level time is adjusted so that the high-level time is close to the decoding threshold and the high-level time is less than the decoding threshold; when the clipping is of the high level and the binary code is 1, the high-level time is adjusted so that the high-level time is far away from the decoding threshold and the difference between the high-level time and the decoding threshold is greater than the clipping amplitude.

[0079] For example, when the decoding threshold is 500 ns, generally, a high-level time of 250 ns is used as the data signal for encoding 0, and a high-level time of 750 ns is used as the data signal for encoding 1. When the clipping is to clip the low level and the encoding is 0, the high-level time can be adjusted to 150 ns for transmission; when the clipping is to clip the low level and the encoding is 1, the high-level time can be adjusted to 650 ns; when the clipping is to clip the high level and the encoding is 0, the high-level time can be adjusted to 350 ns; when the clipping is to clip the high level and the encoding is 1, the high-level time can be adjusted to 850 ns.

[0080] It can be understood that a configuration data can be sent before transmitting the data to inform each LED driving chip 100 of the working mode, so that the LED driving chip 100 re-encodes the data according to the clipping mode related to the working mode and sends it to the next-level LED driving chip 100.

[0081] In one embodiment, optionally, one end of each of the LED driving chips 100 is electrically connected to the positive pole of the common power supply line;

[0082] The other end of each of the LED driving chips 100 is electrically connected to the negative pole of the common power supply line;

[0083] Wherein, the positive pole and the negative pole of the common power supply line are respectively connected to the controller 200, and the controller 200 is configured to transmit the data to each of the LED driving chips 100 in the form of an initial carrier signal on the positive pole of the common power supply line.

[0084] In this embodiment, the data is transmitted to each LED driving chip 100 in the form of an initial carrier signal on the positive pole of the common power supply line, then each LED driving chip 100 can control the LED lights to display according to the received data or configure the working state of the LED driving chip 100. It can be understood that by transmitting the data to each LED driving chip 100 in the form of an initial carrier signal on the positive pole of the common power supply line, the complexity is lower, and even if one of the LED driving chips 100 is damaged, it will not affect the transmission of other LED driving chips 100, improving the stability of data transmission.

[0085] For example, when the LED driving circuit 100 transmits display data for picture display, when one of the LED driving chips 100 is damaged, only this LED driving chip 100 cannot drive the LED lights to display, and other LED driving chips 100 can normally drive the LED lights to display. The manifestation of the fault is only that the LED lights driven by the damaged LED driving chip 100 do not light up, and the bad point can also be quickly located.

[0086] It should be noted that the data in this embodiment can be configuration data and / or display data, that is, the data can be display data or configuration data alone, or both display data and configuration data can be sent. The configuration data is used to configure the operating state of the LED driver chip 100. Optionally, the configuration data can be used to configure one or more of the gamma coefficient, current adjustment, and grayscale accuracy. The display data is used to drive the LED driver chip 100 to control the LED light for display. The n LED driver chips in the LED driver circuit 100 of this embodiment are not cascaded.

[0087] In this embodiment, each LED driver chip 100 in the LED driver circuit 100 is pre-configured with an address. It is understood that the pre-configured address can be a fixed address initialized before leaving the factory, so there is no need to cascade the LED driver chips 100; in addition, the pre-configured address can be a fixed address that is not initialized before leaving the factory, so the LED driver chips 100 need to be cascaded to initialize the address.

[0088] According to the technical solution of the embodiment of the present invention, the LED driving system includes a controller and n LED driver chips, the controller is configured to send display data according to the bit rate parameter, the n LED driver chips are connected in series to form a cascade driving circuit, the input end of the first-stage LED driver chip is connected to the output end of the controller, and each LED driver chip includes a bit rate detection module for detecting the bit rate parameter corresponding to the display data input from the previous-stage component to the current-stage LED driver chip; a data buffer module for buffering the display data input from the previous-stage component to the current-stage LED driver chip; a data encoding and decoding module for receiving the bit rate parameter sent by the bit rate detection module, extracting the display data from the data buffer module, and decoding the display data according to the bit rate parameter to obtain decoded display data; and a display output module for controlling the LED light to display according to the decoded display data. After detecting the bit rate, decoding is performed according to the bit rate. When the bit rate is dynamically floating, the LED driver chip of this embodiment can also decode normally, thereby achieving the technical effect of dynamically decoding the display data. In addition, the controller sends display data with different bit rate parameters according to different picture requirements, and the LED driver chip performs adaptive decoding. High-dynamic pictures use high bit rates to transmit larger amounts of data and display high frame rate pictures. Low bit rates are used for static or slow-motion pictures, thereby saving power consumption.

[0089] Note that the above is only a preferred embodiment of the present invention and the technical principles applied. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein. Various obvious changes, re-adjustments, and substitutions can be made by those skilled in the art without departing from the protection scope of the present invention. Therefore, although the present invention has been described in more detail through the above embodiments, the present invention is not limited to the above embodiments. Without departing from the concept of the present invention, more other equivalent embodiments can be included, and the scope of the present invention is determined by the scope of the appended claims.

Claims

1. An LED driver chip, characterized in that: The LED driver chip includes: The code rate detection module is used to detect the code rate parameters corresponding to the display data input from the previous level component to the current level LED driver chip; A data buffer module, configured to cache the display data input from the previous level component to the current level LED driver chip; a data encoding and decoding module, configured to receive the bit rate parameter sent by the bit rate detection module, extract the display data from the data buffer module, and decode the display data according to the bit rate parameter to obtain decoded display data; A display output module, used to control the LED light to display according to the decoded display data; There are multiple data encoding and decoding modules, wherein each of the data encoding and decoding modules is used to receive input data input by the upper-level component and decode the input data; The display output module is electrically connected to the multiple data encoding and decoding modules in sequence; The plurality of data encoding and decoding modules sequentially receive the display data sent by the upper-level component at preset time intervals; The display output module sequentially receives the display data sent by the multiple data encoding and decoding modules; The preset time interval is equal to the ratio of the continuous display time of each frame of image data to the working number of the multiple data encoding and decoding modules.

2. The LED driving chip according to claim 1, characterized in that Also includes: A filtering module is provided before the bit rate detection module and the data buffer module, and is used for filtering the display data and sending the filtered display data to the bit rate detection module and the data buffer module.

3. The LED driving chip according to claim 2, wherein The filtering module is used to filter out noise and repair the waveform interfered by the noise, wherein the noise includes at least one of complex noise and burr noise.

4. The LED driving chip according to claim 1, wherein The display output module is a PWM display output module, and the PWM display output module is used to convert the decoded display data into a PWM signal to control the LED light to display.

5. The LED driving chip according to claim 1, wherein The display data is a frame of image data of a video to be displayed.

6. The LED driver chip according to claim 1, wherein: The LED driver chip is connected in series between the previous-level component and the next-level LED driver chip. The display data includes the current-level display data and the display data of each subsequent-level LED driver chip. The data encoding and decoding module is specifically used to extract the current-level display data from the display data, decode the current-level display data according to the bit rate parameter, and then send it to the display output module.

7. The LED driving chip according to claim 6, wherein The data encoding and decoding module is further configured to send the display data of each subsequent stage of LED driver chips to the next stage of LED driver chips according to the code rate parameter.

8. The LED driving chip according to claim 1, wherein, The data encoding and decoding module is specifically configured to determine a decoding threshold associated with the bit rate parameter, and decode the display data according to the decoding threshold.

9. The LED driving chip according to claim 8, wherein, The decoding threshold = 1 / (preset coefficient * bit rate parameter), where the preset coefficient is greater than 1; Wherein, if the display data is high-level data greater than the decoding threshold, the logic of the display data is 1; If the display data is high-level data that is less than the decoding threshold, the logic of the display data is 0.

10. An LED driving system, characterized in that, include: a controller, the controller being configured to send display data according to the bit rate parameter; The LED driving system further includes n LED driving chips according to any one of claims 1 to 9, wherein the n LED driving chips are connected in series to form a cascade driving circuit, and the input end of the first-stage LED driving chip is connected to the output end of the controller.

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