Display device and method of manufacturing the same

Abstract

The present application relates to a display device and a method for manufacturing the display device. A display device according to an embodiment of the present disclosure may include a substrate, a display element layer, an encapsulation layer, a polarization layer, a first protective layer, and a second protective layer, wherein the display element layer is on the substrate, the encapsulation layer is on the display element layer to seal the display element layer, the polarization layer is on the encapsulation layer, the first protective layer is on the substrate and is separated from the polarization layer, and the second protective layer is on the substrate and covers a portion of the first protective layer, wherein the first protective layer has a thickness greater than that of the second protective layer.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to and the benefit of Korean Patent Application No. 10-2019-0028574, filed on Mar. 13, 2019, which is hereby incorporated by reference in its entirety. Background Art

[0003] The present disclosure herein relates to a display device having improved display quality and improved product reliability and a method of manufacturing the display device.

[0004] The display devices are classified into liquid crystal display (LCD) devices, organic light emitting diode display (OLED display) devices, plasma display panel (PDP) devices, electrophoretic display devices, and the like.

[0005] In recent years, flexible display devices have been developed. Since flexible display devices can be used when folded or bent, flexible display devices can be used in various fields. In flexible display devices, display elements can be located on a flexible substrate.

[0006] A flexible display device can achieve a narrow frame by bending at least one side of the display device. Here, cracks may often occur in the metal wire located at the bending area or in the flexible substrate. Cracks generated in the flexible substrate or the metal wire may cause defects in the flexible display device. Summary of the invention

[0007] The present disclosure provides a display device having improved display quality and improved product reliability and a method of manufacturing the same.

[0008] An embodiment of the present disclosure provides a display device, which includes: a substrate, a display element layer, an encapsulation layer, a polarization layer, a first protective layer, and a second protective layer, wherein the display element layer is on the substrate, the encapsulation layer is on the display element layer to seal the display element layer, the polarization layer is on the encapsulation layer, the first protective layer is on the substrate and separated from the polarization layer, and the second protective layer is on the substrate and covers a portion of the first protective layer, wherein the first protective layer has a thickness greater than that of the second protective layer.

[0009] The substrate may include a first region and a second region bent from the first region, wherein the polarization layer is at the first region, and wherein the second protection layer is at the second region.

[0010] The first protective layer may overlap a boundary between the first region and the second region in a plane.

[0011] The display device may further include a supporting layer below the first area.

[0012] A portion of the support layer may overlap with at least a portion of the first protective layer in a plane, wherein an overlapping region between the support layer and the first protective layer has a width of about 140 μm.

[0013] The second protection layer may be separated from the polarizing layer, and the first protection layer is located between the second protection layer and the polarizing layer.

[0014] The first protection layer may be spaced apart from the display element layer and the encapsulation layer.

[0015] An embodiment of the present disclosure provides a method for manufacturing a display device, the method comprising: forming a display element layer on a substrate; forming an encapsulation layer on the display element layer; forming a polarization layer on the encapsulation layer; forming a first protective layer on the substrate, the first protective layer being separated from the polarization layer and having a first thickness; and forming a second protective layer, the second protective layer being separated from the polarization layer and having a second thickness less than the first thickness, the first protective layer being located between the second protective layer and the polarization layer.

[0016] The substrate may include a first region and a second region, wherein the display element layer is located at the first region, and the first protection layer and the second protection layer are located at the second region, wherein the method further includes bending the second region.

[0017] Forming a first protective layer may include forming a first preliminary protective layer and curing the first preliminary protective layer to form the first protective layer, and forming a second protective layer may include: forming a second preliminary protective layer, the second preliminary protective layer being configured to cover at least a portion of the first protective layer; and curing the second preliminary protective layer to form a second protective layer, and curing the first preliminary protective layer may occur before curing the second preliminary protective layer. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] The accompanying drawings are included to provide a further understanding of the present disclosure and are incorporated into and constitute a part of this specification. The accompanying drawings illustrate embodiments of the present disclosure and together with the description are used to explain various aspects of the present disclosure. In the drawings:

[0019] Figure 1 is a perspective view showing a display device according to an embodiment of the present disclosure;

[0020] Figure 2 is a perspective view showing a display device folded about a folding axis according to an embodiment of the present disclosure;

[0021] Figure 3 is a perspective view showing a display device folded about a folding axis according to an embodiment of the present disclosure;

[0022] Figure 4 is a plan view showing a display device according to an embodiment of the present disclosure;

[0023] Figure 5 is an equivalent circuit diagram showing one pixel among a plurality of pixels according to an embodiment of the present disclosure;

[0024] Figure 6 is a cross-sectional view showing a display module according to an embodiment of the present disclosure;

[0025] Fig. 7A is a diagram showing an embodiment of the present disclosure Figure 4 A cross-sectional view of the display device taken along line II′ in FIG.

[0026] Figure 7B It is shown Fig. 7A A cross-sectional view of a state in which the display device is bent relative to a bending axis;

[0027] Figure 8 is a diagram showing an embodiment of the present disclosure Figure 4 A cross-sectional view of the display device taken along line II′ in FIG.

[0028] Fig. 9 is a diagram showing an embodiment of the present disclosure Figure 4 A cross-sectional view of the display device taken along line II′ in FIG.

[0029] Fig.10 and Fig.11 is a cross-sectional view illustrating a method of manufacturing a display device according to an embodiment of the present disclosure;

[0030] Figures 12 to 15 is a cross-sectional view illustrating a method of manufacturing a display device according to an embodiment of the present disclosure; and

[0031] Fig.16 is an enlarged cross-sectional view showing a portion of a display device according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0032] In this specification, it will also be understood that when a component (or region, layer, part) is referred to as being on, "connected to" or "coupled to" another component, it can be directly on, directly connected to or directly coupled to the component, or a third component may be present in between.

[0033] In the whole text, the same reference numerals refer to the same elements. In addition, in the drawings, the thickness, proportion and size of components are exaggerated for the sake of clear explanation.

[0034] The term "and / or" includes any and all combinations of one or more of the associated listed items.

[0035] It will be understood that although terms such as "first" and "second" are used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one component from other components. For example, a first element referred to as a first element in one embodiment may be referred to as a second element in another embodiment without departing from the scope of the appended claims. Unless otherwise indicated, terms in the singular may include plural forms.

[0036] In addition, “under”, “below”, “over”, “upper”, etc. are used to explain the relationship between components shown in the drawings. These terms may be relative concepts and may be described based on the directions shown in the drawings.

[0037] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meanings as those generally understood by those skilled in the art. Terms defined in commonly used dictionaries should be interpreted as having the same meanings as in the relevant technical context, and unless explicitly defined in the description, these terms are not ideally or excessively interpreted as having formal meanings.

[0038] The meaning of “include” or “comprise” specifies a property, a fixed number, a step, an operation, an element, a component or a combination thereof, but does not exclude other properties, fixed numbers, steps, operations, elements, components or a combination thereof.

[0039] Hereinafter, embodiments of the present disclosure will be described with reference to the accompanying drawings.

[0040] Figure 1 is a perspective view showing a display device according to an embodiment of the present disclosure.

[0041] refer to Figure 1 , the display device DD may include a plurality of areas distinguished on a display surface. The display surface is distinguished by a display area DA and a non-display area NDA determined according to whether an image IM is displayed. The display area DA is an area on which an image IM is displayed, and the non-display area NDA is an area on which an image IM is not displayed. For example, Figure 1 The display device DD in the embodiment may be configured as a smart phone having a rectangular shape. The display device DD may display an image IM showing weather information and icons. The non-display area NDA may be positioned adjacent to the display area DA and / or may surround the display area DA. In addition, in other embodiments, the non-display area NDA may be omitted.

[0042] The display surface may be parallel to a surface defined by the first direction DR1 and the second direction DR2. The normal direction of the display surface may correspond to the third direction DR3 and may also correspond to the thickness direction of the display device DD. The front and rear surfaces of each member may be distinguished by referring to the third direction DR3.

[0043] However, the directions indicated by the first direction DR1, the second direction DR2, and the third direction DR3 may be relative concepts and may be converted relative to each other. Hereinafter, the first direction, the second direction, and the third direction may be indicated by the first direction DR1, the second direction DR2, and the third direction DR3, and may be designated by the same reference numerals, respectively. In addition, in the present specification, the surface defined by the first direction DR1 and the second direction DR2 may be defined as a plane, and the expression "observed on a plane" may be defined by a state observed in the third direction DR3 (e.g., a plan view).

[0044] The third direction DR3 may intersect each of the first direction DR1 and the second direction DR2. The first direction DR1, the second direction DR2, and the third direction DR3 may be perpendicular to each other.

[0045] The display device DD may include a folding area FA foldable relative to a folding axis FX, and may include a first non-folding area NFA1 and a second non-folding area NFA2 spaced apart from each other, and the folding area FA is located between the first non-folding area NFA1 and the second non-folding area NFA2. The folding axis FX may extend in a second direction DR2. The first non-folding area NFA1 may extend from one end of the folding area FA in a first direction DR1 (e.g., in a direction opposite to the first direction DR1). The second non-folding area NFA2 may extend from the other end of the folding area FA in the first direction DR1.

[0046] The top surface DD-US of the display device DD may include a first display surface PA1 overlapping the folding area FA, a second display surface PA2 overlapping the first non-folding area NFA1, and a third display surface PA3 overlapping the second non-folding area NFA2. The bottom surface DD-DS of the display device DD may be opposite to the top surface DD-US. Each of the first display surface PA1, the second display surface PA2, and the third display surface PA3 may display an image.

[0047] In the embodiments of the present disclosure, although the display device DD is shown as a foldable display device, the present disclosure is not limited thereto as an example. For example, the display device DD may include various display devices such as a flexible display device, a curved display device, a rollable display device, and / or a retractable display device. In addition, the display device DD according to the embodiments of the present disclosure may be used for large-sized electronic devices such as televisions or outdoor advertising boards and / or small and medium-sized electronic devices such as personal computers, notebook computers, personal digital terminals, vehicle navigation units, game consoles, portable electronic devices, wristwatch-type electronic devices, and cameras.

[0048] Figure 2 is a perspective view showing a display device folded about a folding axis according to an embodiment of the present disclosure.

[0049] refer to Figure 1 and Figure 2 , the folding area FA can be folded relative to the folding axis FX so that the second display surface PA2 and the third display surface PA3 face each other. The folding area FA can be folded relative to the first rotation direction RT1. Figure 2 When folded along the folding axis FX in the manner shown in , the bottom surface DD-DS of the display device DD may remain exposed to the outside, which may be defined as an inner fold.

[0050] Figure 3 is a perspective view showing a display device folded about a folding axis according to an embodiment of the present disclosure.

[0051] refer to Figure 1 and Figure 3 The folding area FA can be folded relative to the folding axis FX so that the second display surface PA2 and the third display surface PA3 are exposed to the outside. The folding area FA can be folded along the second rotation direction RT2, and the top surface DD-US of the display device DD can remain exposed to the outside.

[0052] The display device DD may be folded along the folding axis FX such that each of the second display surface PA2 of the first non-folding area NFA1 and the third display surface PA3 of the second non-folding area NFA2 faces outward, and this may be defined as an outer folding.

[0053] Figure 4 is a plan view showing a display device according to an embodiment of the present disclosure.

[0054] refer to Figure 4 , display device DD (reference Figure 1 ) may include a display module DM, a circuit board FP and a driving element IC.

[0055] Although the display module DM according to the embodiment of the present disclosure may be a light-emitting display module, the present disclosure is not particularly limited thereto. For example, the display module DM may be an organic light-emitting display module or a quantum dot light-emitting display module. The organic light-emitting display module may include a light-emitting layer including an organic light-emitting material. The quantum dot light-emitting display module may include a light-emitting layer including quantum dots and quantum rods. Hereinafter, the display module DM will be described as an organic light-emitting display module.

[0056] The display module DM may include a scan driving circuit DCV, signal lines SGL, and pixels PX. An area where the pixels PX are located may be defined as a display area DA.

[0057] The scanning driving circuit DCV may be at the non-display area NDA. The scanning driving circuit DCV may generate a scanning signal. The scanning signal may be sequentially output to the gate lines GL. The scanning driving circuit DCV may further output other control signals to the driving circuit of the pixel PX.

[0058] The scan driving circuit DCV may include a thin film transistor formed by the same process as that used to form the driving circuit of the pixel PX. For example, the process may include a low temperature polysilicon (LTPS) process or a low temperature polycrystalline oxide (LTPO) process.

[0059] The signal line SGL may include a conductive material. The signal line SGL may include a metal material having flexibility to reduce or minimize the Figure 6 ) is bent. For example, each of the signal lines SGL may be made of a conductive material having excellent ductility, such as gold (Au), silver (Ag), aluminum (Al), and copper (Cu). However, the present disclosure is not limited to the material of the signal line SGL. For example, each of the signal lines SGL may be made of a conductive material used to manufacture a display device DD (refer to FIG. Figure 1 ) is made of one of a variety of conductive materials.

[0060] The signal lines SGL may include data lines DL, power lines PL, control signal lines CSL, gate lines GL, and light emission control lines LCL.

[0061] Each of the data lines DL may be connected to one or more corresponding pixels among the pixels PX. Each of the pixels PX may be connected to a corresponding data line among the data lines DL.

[0062] The power line PL may be connected to the pixel PX. The control signal line CSL may provide a control signal to the scan driving circuit DCV.

[0063] Each of the gate lines GL may extend in the second direction DR2. Each of the gate lines GL may be connected to one or more corresponding pixels of the pixels PX. The gate lines GL may be connected to the scan driving circuit DCV.

[0064] Each of the light emission control lines LCL may extend in the second direction DR2. Each of the light emission control lines LCL may be connected to one or more corresponding pixels among the pixels PX. The light emission control lines LCL may be connected to the scan driving circuit DCV.

[0065] Some of the data lines DL, the power lines PL, the control signal lines CSL, and the gate lines GL may be located at the same layer as each other, and some of them may be located at different layers from each other.

[0066] The display module DM may include a first area NBA1, a second area BA, and a third area NBA2. The bending axis BX may be substantially parallel to the second direction DR2. The second area BA may be bent relative to the bending axis BX. The first area NBA1 and the third area NBA2 may be spaced apart from each other, and the second area BA is located between the first area NBA1 and the third area NBA2.

[0067] The first area NBA1, which is an area for displaying an image, may include Figure 1 Described are the folding area FA, the first non-folding area NFA1 and the second non-folding area NFA2.

[0068] A portion of the circuit board FP may be at the third area NBA2. The circuit board FP may be electrically connected to the display module DM through a plurality of signal lines SGL. For example, the circuit board FP may be electrically connected to the circuit element layer DP-CL (refer to Figure 6 ).

[0069] The driving element IC may be at the circuit board FP. The driving element IC may output a driving signal and an image signal for displaying an image. The driving element IC may be electrically connected to a conductive pattern at an area of ​​the circuit board FP. The image signal and the driving signal output from the driving element IC may be transmitted to the display module DM (reference Figure 1 ).exist Figure 4 Although one driving element IC is located at the circuit board FP, the present disclosure is not limited thereto. A plurality of driving elements for displaying an image may be located at the circuit board FP.

[0070] Figure 5 is an equivalent circuit diagram showing one pixel among a plurality of pixels according to an embodiment of the present disclosure.

[0071] exist Figure 5In the embodiment, the pixel PX connected to the i-th gate line GLi and the i-th light emission control line LCLi is taken as an example for description. However, the present disclosure is not limited to the configuration of the pixel PX of this embodiment. For example, the configuration of the pixel PX can be variously changed.

[0072] refer to Figure 5 , the pixel PX may include a light emitting element OLED and a pixel circuit CC. The pixel circuit CC may include a plurality of transistors T1 to T7 and a capacitor CP. The pixel circuit CC controls the amount of current flowing through the light emitting element OLED corresponding to a data signal.

[0073] The light emitting element OLED may emit light (eg, light having a predetermined brightness) corresponding to the amount of current supplied from the pixel circuit CC. The first power source ELVDD may have a voltage or power level greater than that of the second power source ELVSS.

[0074] Each of the plurality of transistors T1 to T7 may include an input electrode (or source electrode), an output electrode (or drain electrode), and a control electrode (or gate electrode). In the present disclosure, for convenience, one of the input electrode and the output electrode may be referred to as a first electrode, and the other may be referred to as a second electrode.

[0075] The first electrode of the first transistor T1 may be connected to the fifth transistor T5 to be electrically connected to the first power source ELVDD. The second electrode of the first transistor T1 may be connected to the sixth transistor T6 to be electrically connected to the anode of the light emitting element OLED. In this specification, the first transistor T1 may be referred to as a driving transistor.

[0076] The first transistor T1 may control the amount of current flowing to the light emitting element OLED corresponding to a voltage applied to a control electrode of the first transistor T1 .

[0077] The second transistor T2 may be connected between the data line DL and the first electrode of the first transistor T1. The control electrode of the second transistor T2 may be connected to the i-th gate line GLi. When the i-th gate signal is provided to the i-th gate line GLi, the second transistor T2 may be turned on to electrically connect the data line DL and the first electrode of the first transistor T1.

[0078] The third transistor T3 may be connected between the second electrode of the first transistor T1 and the control electrode of the first transistor T1. The control electrode of the third transistor T3 may be connected to the i-th gate line GLi. When the i-th gate signal is provided to the i-th gate line GLi, the third transistor T3 may be turned on to electrically connect the second electrode of the first transistor T1 and the control electrode of the first transistor T1. When the third transistor T3 is turned on, the first transistor T1 may be diode-connected / connected in a diode form.

[0079] The fourth transistor T4 may be connected between the node ND and an initialization power generation unit for providing an initialization voltage Vint. The control electrode of the fourth transistor T4 may be connected to the i-1th gate line GLi-1. When the i-1th gate signal is provided to the i-1th gate line GLi-1, the fourth transistor T4 may be turned on and provide the initialization voltage Vint to the node ND.

[0080] The fifth transistor T5 may be connected between the power line PL and the first electrode of the first transistor T1. A control electrode of the fifth transistor T5 may be connected to the i-th light emitting control line LCLi.

[0081] The sixth transistor T6 may be connected between the second electrode of the first transistor T1 and the anode of the light emitting element OLED. A control electrode of the sixth transistor T6 may be connected to the i-th light emitting control line LCLi.

[0082] The seventh transistor T7 may be connected between the initialization power generation unit and the anode of the light emitting element OLED. The control electrode of the seventh transistor T7 may be connected to the i+1th gate line GLi+1. When the i+1th gate signal is provided to the i+1th gate line GLi+1, the seventh transistor T7 may be turned on and the initialization voltage Vint may be provided to the anode of the light emitting element OLED.

[0083] The seventh transistor T7 can improve the black performance of the pixel PX. When the seventh transistor T7 is turned on, the parasitic capacitor of the light emitting element OLED can be discharged. When black brightness is achieved, the light emitting element OLED may not emit light due to the leakage current from the first transistor T1, and thus the black performance can be improved.

[0084] Although in Figure 5 The control electrode of the seventh transistor T7 is connected to the i+1th gate line GLi+1, but the present disclosure is not limited thereto. In another embodiment of the present disclosure, the control electrode of the seventh transistor T7 may be connected to the i-th gate line GLi or the i-1-th gate line GLi-1.

[0085] Although the example is shown based on the use of PMOS transistors Figure 5 , but the present disclosure is not limited thereto. In another embodiment of the present disclosure, the pixel circuit CC may be configured using an NMOS transistor. In another embodiment of the present disclosure, the pixel PX may be configured by a combination of an NMOS transistor and a PMOS transistor.

[0086] The capacitor CP may be located between the power line PL and the node ND. The capacitor CP may store a voltage corresponding to the data signal. According to the voltage stored in the capacitor CP, the amount of current flowing through the first transistor T1 when the fifth transistor T5 and the sixth transistor T6 are turned on may be determined. The present disclosure is not limited to Figure 5 In another embodiment of the present disclosure, the pixel PX may be implemented in various forms that allow the light emitting element OLED to emit light.

[0087] Figure 6 is a cross-sectional view showing a display module according to an embodiment of the present disclosure.

[0088] refer to Figure 6 , the substrate SUB may be made of a ductile material. For example, the substrate SUB may have a film shape including one selected from the group consisting of a polyester-based polymer, a silicon-based polymer, an acrylic-based polymer, a polyolefin-based polymer, and a copolymer thereof. However, the present disclosure is not limited to the material of the substrate SUB. For example, the substrate SUB may be made of a glass material.

[0089] On the substrate SUB, a display element layer DP and an encapsulation layer ENC may be sequentially positioned.

[0090] The display element layer DP may include a circuit element layer DP-CL and a light emitting element layer DP-OLED.

[0091] The circuit element layer DP-CL may include a signal line SGL (refer to Figure 4 ). The circuit element layer DP-CL may include a buffer layer BFL, first and second intermediate inorganic layers 10 and 20 as inorganic layers, and an intermediate organic layer 30 as an organic layer. However, the present disclosure is not particularly limited to the material of each of the inorganic layer and the organic layer.

[0092] The buffer layer BFL may provide a flat surface on the substrate SUB and may block impurity elements from being introduced into the substrate SUB. In an embodiment of the present disclosure, the buffer layer BFL may be optionally provided or omitted.

[0093] On the buffer layer BFL, a first semiconductor pattern OSP1 having a first transistor T1 and a second semiconductor pattern OSP2 having a second transistor T2 may be positioned. Each of the first semiconductor pattern OSP1 and the second semiconductor pattern OSP2 may include polysilicon or amorphous silicon. Each of the first semiconductor pattern OSP1 and the second semiconductor pattern OSP2 may include a metal oxide semiconductor.

[0094] The first intermediate inorganic layer 10 may be on the first semiconductor pattern OSP1 and the second semiconductor pattern OSP2 . The first control electrode GE1 of the first transistor T1 and the second control electrode GE2 of the second transistor T2 may be on the first intermediate inorganic layer 10 .

[0095] The second intermediate inorganic layer 20 covering the first and second control electrodes GE1 and GE2 may be located on the first intermediate inorganic layer 10 . The first input electrode DE1 and the first output electrode SE1 of the first transistor T1 and the second input electrode DE2 and the second output electrode SE2 of the second transistor T2 may be located on the second intermediate inorganic layer 20 .

[0096] The second input electrode DE2 and the second output electrode SE2 may be connected to the second semiconductor pattern OSP2 through the first and second through holes CH1 and CH2 passing through the first and second intermediate inorganic layers 10 and 20, respectively. The first input electrode DE1 and the first output electrode SE1 may be connected to the first semiconductor pattern OSP1 through the third and fourth through holes CH3 and CH4 passing through the first and second intermediate inorganic layers 10 and 20, respectively. For example, in another embodiment of the present disclosure, one of the first transistor T1 and the second transistor T2 may have a bottom gate structure.

[0097] The intermediate organic layer 30 covering the first input electrode DE1, the second input electrode DE2, the first output electrode SE1, and the second output electrode SE2 may be located on the second intermediate inorganic layer 20. The intermediate organic layer 30 may provide a flat surface.

[0098] The light emitting element layer DP-OLED may be located on the intermediate organic layer 30. The light emitting element layer DP-OLED may include a pixel defining layer PDL and a light emitting element OLED. For example, the light emitting element OLED may include an organic light emitting diode. The pixel defining layer PDL may include an organic material.

[0099] The first electrode AE ​​may be on the middle organic layer 30. The first electrode AE ​​may be electrically connected to the first output electrode SE1 through the fifth through hole CH5 passing through the middle organic layer 30. Figure 6 The first electrode AE ​​is directly connected to the first output electrode SE1, but the first electrode AE ​​can be connected to the first output electrode SE1 through the sixth transistor T6 (reference Figure 5 ) is electrically connected to the first output electrode SE1.

[0100] An opening OM may be defined in the pixel defining layer PDL. The opening OM of the pixel defining layer PDL may expose at least a portion of the first electrode AE.

[0101] In an embodiment of the present disclosure, the light emitting area OPA may overlap at least one of the first transistor T1 and the second transistor T2. In other embodiments, the opening OM may increase in area / size, and the first electrode AE ​​and the light emitting layer EML may also increase in area / size.

[0102] The hole control layer HCL may be located in the light emitting area OPA and the non-light emitting area NPA. The light emitting layer EML may be on the hole control layer HCL. The light emitting layer EML may be located in a region corresponding to the opening OM. The light emitting layer EML may include an organic material and / or an inorganic material. The light emitting layer EML may generate colored light (e.g., colored light having a predetermined color).

[0103] The electron control layer TCL may be on the light emitting layer EML. The second electrode CE is located on the electron control layer TCL.

[0104] The encapsulation layer ENC may be on the second electrode CE. The encapsulation layer ENC may cover the second electrode CE. In other embodiments, the covering layer covering the second electrode CE may be located between the encapsulation layer ENC and the second electrode CE. Here, the encapsulation layer ENC may directly cover the covering layer. The encapsulation layer ENC may be set as a single encapsulation layer or multiple films.

[0105] Fig. 7A is a diagram showing an embodiment of the present disclosure Figure 4 A cross-sectional view of the display device taken along line II′ in FIG. Figure 7B It is shown Fig. 7A A cross-sectional view of a state in which a display device is bent relative to a bending axis.

[0106] refer to Fig. 7A and Figure 7B , display device DD (reference Figure 1 ) may include a substrate SUB, a light emitting element layer DP-OLED, an encapsulation layer ENC, a polarization layer POL, a protection layer BPL, a circuit element layer DP-CL, a circuit board FP, a first support layer PF1 and a second support layer PF2.

[0107] The substrate SUB may include a first area NBA1, a second area BA bent from the first area NBA1, and a third area NBA2 extending from the second area BA.

[0108] The light emitting element layer DP-OLED may be on the substrate SUB. The light emitting element layer DP-OLED may be at the first area NBA1.

[0109] The encapsulation layer ENC may be on the light emitting element layer DP-OLED. The encapsulation layer ENC may be at the first area NBA1. The encapsulation layer ENC may reduce or prevent external air such as moisture and oxygen from being introduced into the light emitting element layer DP-OLED. In addition, in other embodiments, a barrier film for protecting the light emitting element layer DP-OLED may be additionally stacked on the encapsulation layer ENC.

[0110] The polarization layer POL may be on the encapsulation layer ENC. The polarization layer POL may cover the entire top surface of the encapsulation layer ENC. The polarization layer POL may be at the first area NBA1. The polarization layer POL may compensate for the display device DD (reference Figure 1 ) optical properties. For example, the polarization layer POL can reduce the reflectivity of external light incident from the outside. In some embodiments, among the light transmitted from the outside, the polarization layer POL can transmit only specific polarized light and can absorb or block the rest of the light transmitted from the outside. In addition, the polarization layer POL can reduce or prevent external light reflection.

[0111] The protective layer BPL may be on the substrate SUB. The protective layer BPL may be at least a portion of the first area NBA1, at least a portion of the third area NBA2, and at the second area BA. The protective layer BPL may reduce or prevent damage to the circuit element layer DP-CL at the second area BA of the substrate SUB.

[0112] The protection layer BPL may be spaced apart from the encapsulation layer ENC and the display element layer DP in the first direction DR1. The protection layer BPL may be spaced apart from the polarization layer POL in the first direction DR1. For example, a width WT1 between the protection layer BPL and the polarization layer POL may be about 10 μm or more.

[0113] According to an embodiment of the present disclosure, the protective film POL-P (refer to Fig.10 ) may be on the top surface POL-U of the polarizing layer POL. The polarizing layer POL and the protective film POL-P (reference Fig.10 ) can be separated from the protective layer BPL. Therefore, the protective layer BPL can be prevented from being Fig.10 ) surface tension contact protection film POL-P (reference Fig.10 ) and the polarizing layer POL and protrudes more than the polarizing layer POL. Therefore, the window at the polarizing layer POL can be prevented from being bent / deformed due to the protruding protective layer BPL, and the display device DD (reference Figure 1 ) product reliability.

[0114] A thickness HT1 between the top surface SUB-U of the substrate SUB and the top surface POL-U of the polarization layer POL may be the same as a thickness HT2 between the top surface SUB-U of the substrate SUB and the top surface BPL-U of the protection layer BPL.

[0115] The circuit element layer DP-CL may be on the substrate SUB. The circuit element layer DP-CL may electrically connect the light emitting element layer DP-OLED of the first area NBA1 and the circuit board FP of the third area NBA2.

[0116] The circuit board FP may be on the substrate SUB. The circuit board FP may be at the third area NBA2. The circuit board FP may be connected to the driving element IC (reference Figure 4 ) receives the driving signal and transmits it to the display element layer DP. The circuit board FP may include a printed circuit board (PCB) or a flexible printed circuit board (FPCB). The circuit board FP may be spaced apart from the protective layer BPL in the first direction DR1.

[0117] At least a portion of the first area NBA1 may overlap at least a portion of the protective layer BPL in a plane. For example, a width WT2 of an overlapped area where the first area NBA1 overlaps the protective layer BPL may be in a range from about 140 μm to about 550 μm.

[0118] For example, when the width WT2 of the overlapping area where the first area NBA1 overlaps the protective layer BPL is less than about 140 μm, unlike the present embodiment, the protective layer BPL may be separated from the substrate SUB due to the force applied when the substrate SUB is bent. However, according to the present embodiment, when the width WT2 is about 140 μm or more, the protective layer BPL may adhere to the first area NBA1. Therefore, the protective layer BPL may be sufficiently adhered to the substrate SUB so that the portion of the protective layer BPL at the first area NBA1 is not bent. When the substrate SUB is bent, the protective layer BPL may allow a neutral surface to be provided at the circuit element layer DP-CL. The protective layer BPL may prevent cracks from being generated in the circuit element layer DP-CL. Therefore, the display device DD (reference Figure 1 ) can have improved reliability and improved display quality.

[0119] For example, unlike the present embodiment, when the width WT2 of the overlapped region between the first area NBA1 and the protective layer BPL on a plane exceeds about 550 μm, the protective layer BPL may contact the polarizing layer POL. Fig.10 ) may be on the top surface POL-U of the polarization layer POL. When the width WT2 exceeds about 550 μm, the protection layer BPL may contact the protection film POL-P (refer to Fig.10). And the protective layer BPL can be connected with the protective film POL-P (reference Fig.10 ) due to the surface tension of the polarizing layer POL. Therefore, the window at the polarizing layer POL may be bent / deformed due to the protruding protective layer BPL. However, according to an embodiment of the present disclosure, since the polarizing layer POL and the protective layer BPL are separated from each other, the protective layer BPL can be prevented from being deformed due to contact with the protective film POL-P (reference Fig.10 ) due to the surface tension of the polarizing layer POL. In addition, the window at the polarizing layer POL can be prevented from being bent / deformed due to the protruding protective layer BPL. Therefore, the display device DD (reference Figure 1 ) product reliability.

[0120] The first supporting layer PF1 may be on the rear surface of the substrate SUB. The first supporting layer PF1 may be at a portion corresponding to the first area NBA1. On a plane, at least a portion of the first supporting layer PF1 may overlap with the polarization layer POL. In addition, the first supporting layer PF1 may overlap with a portion of the protective layer BPL at the first area NBA1. For example, the width of the overlapping area where the first supporting layer PF1 overlaps the protective layer BPL may be in a range from about 140 μm to about 550 μm. The first supporting layer PF1 may support the first area NBA1 so that a portion of the first area NBA1 does not bend when the substrate SUB is bent. The first supporting layer PF1 may include a PET film.

[0121] The second supporting layer PF2 may be located below the substrate SUB. The second supporting layer PF2 may be at a portion corresponding to the third area NBA2. On a plane, at least a portion of the second supporting layer PF2 may overlap with a portion of the circuit board FP. On a plane, a portion of the second supporting layer PF2 may overlap with a portion of the protective layer BPL. The second supporting layer PF2 may support the substrate SUB so that the portion of the substrate SUB in the third area NBA2 does not bend when the substrate SUB is bent. The second supporting layer PF2 may include a PET film.

[0122] The substrate SUB may be bent with respect to the bending axis BX. The bending axis BX may extend in the second direction DR2. When the substrate SUB is bent, the first supporting layer PF1 and the second supporting layer PF2 may face each other.

[0123] Since the driver IC (reference Figure 4 ) is arranged on the rear surface of the first area NBA1, so the display device DD according to the embodiment of the present disclosure (reference Figure 1 ) can achieve a narrow border.

[0124] Figure 8 is a diagram showing an embodiment of the present disclosure Figure 4A cross-sectional view of the display device taken along line II′ in FIG. Fig. 7A and Figure 7B The components described in the accompanying drawings will be referred to by the same reference numerals, respectively, and repeated description of these components will be omitted.

[0125] refer to Figure 8 , display device DD (reference Figure 1 ) may further include a first polarizing layer POL-1. The first polarizing layer POL-1 may be on a side surface of the encapsulation layer ENC. The first polarizing layer POL-1 may cover the entire side surface of the encapsulation layer ENC. The first polarizing layer POL-1 may be integrated with the polarizing layer POL. The polarizing layer POL and the first polarizing layer POL-1 may cover the encapsulation layer ENC.

[0126] Fig. 9 is a diagram showing an embodiment of the present disclosure Figure 4 A cross-sectional view of the display device taken along line II′ in FIG. Fig. 7A and Figure 7B The components described in the accompanying drawings will be referred to by the same reference numerals, respectively, and repeated description of these components will be omitted.

[0127] refer to Fig. 9 , the first protective layer BPL-1 may be on the substrate SUB. The first protective layer BPL-1 may be separated from the polarization layer POL in the first direction DR1. The first protective layer BPL-1 may be separated from the encapsulation layer ENC and the light emitting element layer DP-OLED in the first direction DR1.

[0128] The second protective layer BPL-2 may be on the substrate SUB. The second protective layer BPL-2 may be at least a portion of the third area NBA2 and the second area BA.

[0129] The first protective layer BPL-1 may be located between the polarization layer POL and the second protective layer BPL-2. The second protective layer BPL-2 may cover a portion of the first protective layer BPL-1.

[0130] The first protective layer BPL-1 may have a thickness HT-1 in the third direction DR3, which is greater than a thickness HT-2 of the second protective layer BPL-2 in the third direction DR3. Therefore, the second protective layer BPL-2 may not pass through the first protective layer BPL-1 due to the thickness HT-1 of the first protective layer BPL-1, and may not be located between the polarization layer POL and the first protective layer BPL-1. The first protective layer BPL-1 may allow the second protective layer BPL-2 to be separated from the polarization layer POL. The first protective layer BPL-1 and the second protective layer BPL-2 may be separated from the polarization layer POL in the first direction DR1. For example, the width WT1 between the first protective layer BPL-1 and the polarization layer POL may be about 10 μm or more.

[0131] According to an embodiment of the present disclosure, the first protective layer BPL-1 and the second protective layer BPL-2 may be separated from the polarizing layer POL. Fig.10 ) may be on the top surface POL-U of the polarization layer POL. The first protection layer BPL-1 may be connected to the protection film POL-P (reference Fig.10 ) is separated. Therefore, the first protective layer BPL-1 can be prevented from being separated from the protective film POL-P (reference Fig.10 ) surface tension contact protection film POL-P (reference Fig.10 ) and the polarizing layer POL and protrudes more than the polarizing layer POL. In addition, the window at the polarizing layer POL can be prevented from being bent / deformed due to the protruding first protective layer BPL-1, and the display device DD (reference Figure 1 ) product reliability.

[0132] At least a portion of the first area NBA1 may overlap at least a portion of the first protective layer BPL-1 on a plane. For example, a width WT2 of an overlapped area where the first area NBA1 overlaps the first protective layer BPL-1 may be in a range from about 140 μm to about 550 μm.

[0133] For example, unlike the present embodiment, when the width WT2 of the overlapping area where the first area NBA1 overlaps the first protective layer BPL-1 is less than about 140 μm, the first protective layer BPL-1 may not be sufficiently adhered to the substrate SUB, and the first protective layer BPL-1 may be separated from the substrate SUB due to the force applied when the substrate SUB is bent. However, according to the present embodiment, when the width WT2 is about 140 μm or more, the first protective layer BPL-1 may be sufficiently adhered to the substrate SUB in the first area NBA1. When the substrate SUB is bent, the first protective layer BPL-1 and the second protective layer BPL-2 may allow a neutral surface to be provided at the circuit element layer DP-CL. The first protective layer BPL-1 and the second protective layer BPL-2 may prevent cracks from being generated in the circuit element layer DP-CL. Therefore, the display device DD (refer to Figure 1 ) can have improved reliability and improved display quality.

[0134] As an example, and unlike the present embodiment, when the width WT2 of the overlapped area between the first area NBA1 and the first protective layer BPL-1 on a plane exceeds about 550 μm, the first protective layer BPL-1 may contact the polarizing layer POL. Fig.10 ) may be on the top surface POL-U of the polarization layer POL. The first protection layer BPL-1 may contact the protection film POL-P (refer to Fig.10 ). And the first protective layer BPL-1 can be connected with the protective film POL-P (reference Fig.10 ) due to the surface tension of the polarizing layer POL. Therefore, the window at the polarizing layer POL may be bent / deformed due to the protruding first protective layer BPL-1. However, according to the present disclosure, since the polarizing layer POL and the first protective layer BPL-1 are separated from each other, the first protective layer BPL-1 can be prevented from being deformed due to contact with the protective film POL-P (reference Fig.10 ) due to the surface tension of the polarizing layer POL. That is, the window at the polarizing layer POL can be prevented from being bent / deformed due to the protruding first protective layer BPL-1. Therefore, the display device DD (reference Figure 1 ) product reliability.

[0135] A portion of the first protection layer BPL-1 may be at the first area NBA1 and may overlap the first supporting layer PF1. The first protection layer BPL-1 may ensure an overlapping area with the first supporting layer PF1. For example, a width WT2 of the overlapping area may be in a range from about 140 μm to about 550 μm.

[0136] Fig.10 is a cross-sectional view showing a portion of a process for forming a preliminary protective layer according to an embodiment of the present disclosure. Fig. 7Aand Figure 8 The components described in the accompanying drawings will be referred to by the same reference numerals, respectively, and repeated description of these components will be omitted.

[0137] refer to Fig.10 , a light emitting element layer DP-OLED may be formed on the substrate SUB. An encapsulation layer ENC may be formed on the light emitting element layer DP-OLED. A polarization layer POL may be formed on the encapsulation layer ENC. A protection film POL-P for protecting a top surface POL-U of the polarization layer POL may be formed on the polarization layer POL.

[0138] A preliminary protective layer BPLa may be formed on the substrate SUB. The preliminary protective layer BPLa may include a resin. For example, the preliminary protective layer BPLa may include an organic resin such as an acrylic resin. However, the present disclosure is not limited thereto.

[0139] The preliminary protection layer BPLa may be applied on the substrate SUB by the spraying apparatus JT. The spraying apparatus JT may spray the resin RS. The spraying apparatus JT may apply the resin RS in the first direction DR1 and in the second direction DR2.

[0140] The spraying device JT may apply the resin RS so that the preliminary protection layer BPLa is at least a portion of the first area NBA1 , at least a portion of the third area NBA2 , and at the second area BA.

[0141] The spraying device JT may apply the resin RS so that a thickness HT1 between the top surface SUB-U of the substrate SUB and the top surface POL-U of the polarization layer POL is the same as a thickness HT2-1 between the top surface SUB-U of the substrate SUB and the top surface BPLa-U of the preliminary protection layer BPLa.

[0142] The spraying device JT may apply the resin RS so that the polarizing layer POL is spaced apart from the preliminary protection layer BPLa.

[0143] The spraying device JT may apply the resin RS so that the circuit board FP is spaced apart from the preliminary protection layer BPLa.

[0144] Fig.11 is a cross-sectional view showing a portion of a process for forming a protective layer according to an embodiment of the present disclosure. FIG. 7A to FIG. 8 and Fig.10 The components described in the accompanying drawings will be referred to by the same reference numerals, respectively, and repeated description of these components will be omitted.

[0145] refer to Fig.10 and Fig.11The preliminary protective layer BPLa may be cured by irradiating the preliminary protective layer BPLa with light UV. As the preliminary protective layer BPLa is cured, the protective layer BPL may be formed.

[0146] The preliminary protection layer BPLa may include a UV curable resin, a heat curable resin, or an electron beam curable resin.

[0147] For example, when the preliminary protective layer BPLa is a UV curable resin, the light UV may be ultraviolet rays, when the preliminary protective layer BPLa is an electron beam curable resin, the light UV may be an electron beam, and when the preliminary protective layer BPLa is a heat curable resin, heat may be applied to cure the preliminary protective layer BPLa.

[0148] The protection layer BPL may be spaced apart from the polarization layer POL in the first direction DR1. For example, a width WT1 between the protection layer BPL and the polarization layer POL may be about 10 μm or more.

[0149] According to an embodiment of the present disclosure, the protective layer BPL may be separated from the polarizing layer POL. The protective layer BPL may be separated from the protective film POL-P. The protective layer BPL may be prevented from protruding more than the polarizing layer POL due to contacting the protective film POL-P and the polarizing layer POL through surface tension with the protective film POL-P. Therefore, the window at the polarizing layer POL may be prevented from being bent / deformed due to the protruding protective layer BPL, and the display device DD (reference Figure 1 ) product reliability.

[0150] The protection film POL-P may be removed before forming the window.

[0151] The preliminary protection layer BPLa may be solidified to overlap the first area NBA1 on a plane. The protection layer BPL may ensure an overlapping area with the first area NBA1. For example, a width WT2 of the overlapping area may be in a range from about 140 μm to about 550 μm. The protection layer BPL may overlap the first support layer PF1 on a plane.

[0152] According to an embodiment of the present disclosure, the protective layer BPL may be sufficiently adhered to the substrate SUB. The protective layer BPL may allow a neutral surface to be formed in the circuit element layer DP-CL, thereby preventing cracks from being generated in the circuit element layer DP-CL. Therefore, the display device DD (refer to Figure 1 ) reliability.

[0153] Fig.12 is a cross-sectional view showing a portion of a process of forming a first preliminary protective layer according to an embodiment of the present disclosure. Fig. 9 The components described in the accompanying drawings will be referred to by the same reference numerals, respectively, and repeated description of these components will be omitted.

[0154] refer to Fig.12 , a first preliminary protective layer BPL-1a may be formed on the substrate SUB. The first preliminary protective layer BPL-1a may include a resin. For example, the first preliminary protective layer BPL-1a may include an organic resin such as an acrylic resin. However, the present disclosure is not limited thereto.

[0155] The first preliminary protection layer BPL-1a may be applied on the substrate SUB by the spraying apparatus JT. The spraying apparatus JT may spray the resin RS. The spraying apparatus JT may apply the resin RS in the first direction DR1 and the second direction DR2.

[0156] The spraying device JT may apply the resin RS so that the polarizing layer POL and the first preliminary protective layer BPL-1a are spaced apart from each other.

[0157] Fig.13 is a cross-sectional view showing a portion of a process of forming a first preliminary protective layer according to an embodiment of the present disclosure. Fig. 9 and Fig.12 The components described in the accompanying drawings will be referred to by the same reference numerals, respectively, and repeated description of these components will be omitted.

[0158] refer to Fig.12 and Fig.13 , the first preliminary protective layer BPL-1a may be cured by irradiating the first preliminary protective layer BPL-1a with light UV. As the first preliminary protective layer BPL-1a is cured, the first protective layer BPL-1 may be formed.

[0159] The first preliminary protective layer BPL-1a may include a UV curable resin, a heat curable resin, or an electron beam curable resin.

[0160] For example, when the first preliminary protective layer BPL-1a is a UV curable resin, the light UV may be ultraviolet rays, when the first preliminary protective layer BPL-1a is an electron beam curable resin, the light UV may be an electron beam, and when the first preliminary protective layer BPL-1a is a heat curable resin, heat may be applied to cure the first preliminary protective layer BPL-1a.

[0161] The first protection layer BPL-1 may be spaced apart from the polarization layer POL in the first direction DR1.

[0162] Fig.14 is a cross-sectional view showing a portion of a process of forming a second preliminary protective layer according to an embodiment of the present disclosure. Fig. 9 , Fig.12 and Fig.13 The components described in the accompanying drawings will be referred to by the same reference numerals, respectively, and repeated description of these components will be omitted.

[0163] refer to Fig.14 , a second preliminary protective layer BPL-2a may be formed on the substrate SUB. The second preliminary protective layer BPL-2a may include substantially the same material as the first preliminary protective layer BPL-1a.

[0164] The second preliminary protective layer BPL-2a may be applied on the substrate SUB by the spraying apparatus JT.

[0165] The spraying device JT may apply the resin RS so that the first protective layer BPL-1 is located between the polarizing layer POL and the second preliminary protective layer BPL-2a.

[0166] The spraying device JT may apply the resin RS so that the second preliminary protection layer BPL-2a is at the second area BA and at least a portion of the third area NBA2.

[0167] The second preliminary protective layer BPL-2a may have a thickness HT-2a in the third direction DR3, which is less than the thickness HT-1 of the first protective layer BPL-1 in the third direction DR3. Due to the thickness HT-1 of the first protective layer BPL-1, the second preliminary protective layer BPL-2a may not pass through the first protective layer BPL-1 and may not be applied between the first protective layer BPL-1 and the polarizing layer POL. The first protective layer BPL-1 may prevent the second preliminary protective layer BPL-2a from contacting the polarizing layer POL. The injection device JT may apply the resin RS so that the polarizing layer POL and the second preliminary protective layer BPL-2a are separated from each other. The injection device JT may apply the resin RS so that the circuit board FP and the second preliminary protective layer BPL-2a are separated from each other.

[0168] Fig.15 is a cross-sectional view showing a portion of a process of forming a second preliminary protective layer according to an embodiment of the present disclosure. Fig. 9 and Figure 12 to Figure 14 The components described in the accompanying drawings will be referred to by the same reference numerals, respectively, and repeated description of these components will be omitted.

[0169] refer to Fig.14 and Fig.15 The second preliminary protective layer BPL-2a may be cured by irradiating the second preliminary protective layer BPL-2a with light UV. As the second preliminary protective layer BPL-2a is cured, the second protective layer BPL-2 may be formed.

[0170] The first protective layer BPL-1 may be hardened by irradiating the first protective layer BPL-1 with light UV.

[0171] The first and second protective layers BPL-1 and BPL-2 may be spaced apart from the polarization layer POL in the first direction DR1.

[0172] According to an embodiment of the present disclosure, the first protective layer BPL-1 may be separated from the polarizing layer POL. The second protective layer BPL-2 may be separated from the protective film POL-P. Therefore, the second protective layer BPL-2 may be prevented from protruding more than the polarizing layer POL due to contacting the protective film POL-P and the polarizing layer POL through surface tension with the protective film POL-P. The window at the polarizing layer POL may be prevented from being bent / deformed due to the protruding second protective layer BPL-2. Therefore, the display device DD (reference Figure 1 ) product reliability.

[0173] The protection film POL-P may be removed before forming the window.

[0174] In a plane, a portion of the first protection layer BPL-1 may overlap with the first area NBA1. In a plane, a portion of the first protection layer BPL-1 may overlap with the first supporting layer PF1.

[0175] According to an embodiment of the present disclosure, the first protective layer BPL-1 and the second protective layer BPL-2 may allow a neutral surface to be formed at the circuit element layer DP-CL. The first protective layer BPL-1 and the second protective layer BPL-2 may prevent cracks from being generated in the circuit element layer DP-CL. Therefore, the display device DD (reference Figure 1 ) reliability.

[0176] Fig.16 is an enlarged cross-sectional view showing a portion of a display device according to an embodiment of the present disclosure.

[0177] refer to Fig.16 , display device DD (reference Figure 1 ) may include a protective layer BPL. The protective layer BPL may include a first protective layer BPL-1 and a second protective layer BPL-2. The first protective layer BPL-1 and the second protective layer BPL-2 may be integrated with each other. The first protective layer BPL-1 and the second protective layer BPL-2 may be made of substantially the same material as each other.

[0178] Each of the first to fifth thicknesses HT1 to HT5 may be measured in the second area BA. The first thickness HT1 may be measured at the thickest position of the protective layer BPL (e.g., at the first position). The first position may be a position of the first protective layer BPL-1. The second to fifth positions may be separated from the first position (e.g., separated by a predetermined distance) in the direction away from the polarization layer POL in the first direction DR1, wherein the second to fifth thicknesses HT2 to HT5 are measured at the second to fifth positions, respectively. The first position may be closer to the first area NBA1 than each of the second to fifth positions. The first thickness HT1 may be greater than each of the second, third, fourth, and fifth thicknesses HT2, HT3, HT4, and HT5.

[0179] Table 1 shows the results of using Figures 12 to 15 Each of the plurality of protective layers TT1 to TT9 formed by the process has a first thickness HT1 to a fifth thickness HT5.

[0180] [Form 1]

[0181]

[0182] Referring to Table 1, the first thickness HT1 of each of the plurality of protective layers TT1 to TT9 may be greater than each of the second thickness HT2 to the fifth thickness HT5 of each of the plurality of protective layers TT1 to TT9. The average thickness of the plurality of protective layers TT1 to TT9 may be about 88 μm. Here, the minimum thickness may be about 82 μm. The maximum thickness may be about 99 μm. The maximum thickness may be the first thickness HT1.

[0183] According to an embodiment of the present disclosure, a display device may include a polarizing layer and a protective layer on a substrate. A protective film for protecting the polarizing layer may be on the top surface of the polarizing layer. The polarizing layer and the protective film may be separated from the protective layer. Therefore, the protective layer may be prevented from protruding more than the polarizing layer due to contacting the protective film and the polarizing layer through surface tension with the protective film. Therefore, the window at the polarizing layer may be prevented from being bent / deformed due to the protruding protective layer, and the product reliability of the display device may be improved.

[0184] Although the embodiments of the present invention have been described, it should be understood that the present invention should not be limited to these embodiments, but various changes and modifications can be made by those of ordinary skill in the art within the spirit and scope of the invention to be protected. Therefore, the actual protection scope of the present disclosure should be determined by the technical scope of the attached claims and its functional equivalents to be included therein.

Claims

1. Display equipment, including: substrate; A display element layer, on the substrate; an encapsulation layer on the display element layer to seal the display element layer; a polarizing layer, on the encapsulation layer; a first protective layer, on the substrate and separated from the polarizing layer; as well as a second protective layer, on the substrate and covering a portion of the first protective layer, The first protective layer has a thickness greater than that of the second protective layer, the substrate includes a first region and a second region bent from the first region, and the first protective layer overlaps a boundary between the first region and the second region in a plane.

2. The display device according to claim 1, wherein: The polarizing layer is at the first region, and The second protective layer is at the second region.

3. The display device according to claim 2, wherein: A bottom surface of the first protection layer and a bottom surface of the second protection layer are coplanar. The display device according to claim 2 , further comprising a supporting layer below the first area.

5. The display device according to claim 4, in, A portion of the support layer overlaps with at least a portion of the first protective layer in a plane, and The overlapping region between the support layer and the first protective layer has a width of 140 μm.

6. The display device according to claim 1, wherein: The second protection layer is separated from the polarization layer, and the first protection layer is located between the second protection layer and the polarization layer.

7. The display device according to claim 1, wherein: The first protection layer is separated from the display element layer and the encapsulation layer.

8. The display device according to claim 1, wherein: The second protective layer is spaced apart from the encapsulation layer in a direction orthogonal to a thickness direction of the display device, and the first protective layer is between the second protective layer and the encapsulation layer.

9. A method for manufacturing a display device, comprising: forming a display element layer on the substrate; forming an encapsulation layer on the display element layer; forming a polarizing layer on the encapsulation layer; forming a first protective layer on the substrate, the first protective layer being separated from the polarizing layer and having a first thickness; as well as forming a second protective layer, the second protective layer being separated from the polarizing layer and having a second thickness less than the first thickness, wherein the first protective layer is located between the second protective layer and the polarizing layer, wherein, The substrate includes a first region and a second region extending from the first region, the method further comprising bending the second region, and The first protection layer overlaps with a boundary between the first region and the second region in a plane.

10. The method according to claim 9, wherein: The display element layer is located at the first region, and the second protection layer is located at the second region.

11. The method according to claim 9, in, The forming of the first protective layer comprises: forming a first preliminary protective layer; and curing the first preliminary protective layer to form the first protective layer, Wherein, forming the second protective layer comprises: forming a second preliminary protective layer, wherein the second preliminary protective layer is configured to cover at least a portion of the first protective layer; and curing the second preliminary protective layer to form the second protective layer, Wherein, curing the first preliminary protective layer occurs before curing the second preliminary protective layer.

12. The method according to claim 9, wherein: Forming the second protective layer further includes forming the second protective layer to be spaced apart from the encapsulation layer in a direction orthogonal to a thickness direction of the display device with the first protective layer between the second protective layer and the encapsulation layer.

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