Display device

Abstract

A display device is provided, comprising: a substrate; a first conductive layer disposed on the substrate; a first insulating layer disposed on the first conductive layer, the first insulating layer comprising a contact hole exposing the first conductive layer; a second insulating layer disposed on the first insulating layer; the second conductive layer disposed on the first insulating layer and electrically connected to the first conductive layer through the contact hole; a first electrode disposed on the second insulating layer and the second conductive layer, the first electrode being electrically connected to the second conductive layer; a light-emitting layer disposed on the first electrode; and a second electrode disposed on the light-emitting layer.

Description

[0001] This application claims priority from Korean Patent Application No. 10-2019-0035734 filed on March 28, 2019, in the Korean Intellectual Property Office, the entire contents of which are incorporated herein by reference. Technical Field

[0002] The disclosure relates to a display device, and more particularly, to a configuration for a display device that minimizes overall thickness and improves image resolution. Background Art

[0003] The use of various types of display devices, such as liquid crystal display (LCD) devices and organic light emitting diode (OLED) display devices, has become increasingly important with the widespread development of multimedia.

[0004] OLED displays use OLEDs to generate light that differently constructs images based on the recombination of electrons and holes across the entire display area of ​​the display device. OLED displays have advantages including fast response speed, high brightness, a wide viewing angle, and low power consumption.

[0005] To date, the resolutions of some of the display devices described above have included 4K ultra high definition (UHD), and 8K ultra high definition (8K UHD) is under development. UHD refers to a resolution of 3840×2160 pixels, and 8K UHD refers to a resolution of 7680×4320 pixels. Summary of the Invention

[0006] The disclosed aspects provide a display device that can realize a high-resolution OLED display device according to the UHD principle discussed above, which minimizes the thickness of the display device and indeed minimizes the thickness of the display device while maximizing the efficiency of manufacturing the display device.

[0007] According to the disclosed embodiments, a display device may include: a substrate; a first conductive layer disposed on the substrate; a first insulating layer disposed on the first conductive layer, the first insulating layer including a contact hole exposing the first conductive layer; a second insulating layer disposed on the first insulating layer; a second conductive layer disposed on the first insulating layer and electrically connected to the first conductive layer through the contact hole; a first electrode disposed on the second insulating layer and the second conductive layer, the first electrode being electrically connected to the second conductive layer; a light-emitting layer disposed on the first electrode; and a second electrode disposed on the light-emitting layer, wherein the average distance between the upper surface of the second conductive layer and the surface of the substrate may be substantially equal to the average distance between the upper surface of the second insulating layer and the surface of the substrate.

[0008] An upper surface of the second insulating layer may extend in a thickness direction together with an upper surface of the second conductive layer to be coplanar.

[0009] The second insulating layer may be disposed around the second conductive layer, and a sidewall of the second conductive layer may contact a sidewall of the second insulating layer.

[0010] An angle between a sidewall of the second conductive layer and a lower surface of the second conductive layer may be an acute angle, and an angle between a sidewall of the second insulating layer and a lower surface of the second insulating layer may be an obtuse angle.

[0011] The first electrode and the second conductive layer may be in direct contact with each other.

[0012] The thickness of the second conductive layer may be the same as the thickness of the second insulating layer.

[0013] The thickness of the second insulating layer may be smaller than that of the first insulating layer.

[0014] The substrate may include a display area and a non-display area.

[0015] The display device may further include: a plurality of data lines arranged across the display area and the non-display area; a plurality of connection lines arranged in the display area and the non-display area, the plurality of connection lines being respectively connected to the plurality of data lines.

[0016] The display device may further include: a third conductive layer disposed on the first conductive layer and the second conductive layer, wherein the second conductive layer may include a plurality of connection lines, and the first conductive layer may include a plurality of data lines.

[0017] The display device may further include: a third insulating layer arranged between the first electrode and the second insulating layer, wherein an average distance between an upper surface of the third conductive layer and a surface of the substrate is substantially equal to an average distance between an upper surface of the third insulating layer and a surface of the substrate.

[0018] The third insulating layer may include an organic insulating material.

[0019] The effects of the present disclosure are not limited to the effects described above, and other effects not described herein will become apparent to those skilled in the art through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] The above and other aspects and features of the disclosure will become more apparent by describing in detail embodiments of the disclosure with reference to the accompanying drawings, in which:

[0021] Figure 1 is a perspective view of a display device according to an embodiment;

[0022] Figure 2 It shows Figure 1 A plan view showing the manufacturing state of the display device;

[0023] Figure 3 It shows Figure 1 A schematic cross-sectional view of a pixel of a display device;

[0024] Figure 4 is a plan view of a display device according to another embodiment;

[0025] Figure 5 It is along Figure 4 A schematic cross-sectional view taken along line V-V';

[0026] Figure 6 It shows Figure 4 A schematic cross-sectional view of a pixel of a display device;

[0027] Figure 7 is a schematic cross-sectional view showing a pixel of a display device according to another embodiment; and

[0028] Figures 8 to 12 is a schematic cross-sectional view illustrating a method of manufacturing the display device according to the embodiment. DETAILED DESCRIPTION

[0029] Aspects of the embodiments will now be described more fully below with reference to the accompanying drawings. Although the disclosed aspects can be modified in various ways and have additional embodiments, the embodiments are shown in the drawings and will be primarily described in the specification. However, the scope of the disclosure is not limited to the embodiments shown in the drawings and description, and should be construed to include all modifications, equivalents, and alternatives included within the spirit and scope of the disclosure.

[0030] In order to describe various embodiments, some of parts (components) not related to the description may not be provided, and the same reference numerals refer to the same elements throughout the specification.

[0031] In addition, in the specification, the phrase "in a plan view" means a state when the object portion is viewed from above, and the phrase "in a schematic cross-sectional view" means a state when a cross section taken by vertically cutting the object portion is viewed from the side. In addition, the term "overlay" or "overlaying" means that a first object can be above, below, or to the side of a second object, and vice versa.

[0032] When a layer, position, substrate or region is referred to as "on" another layer, position, substrate or region, the layer, position, substrate or region can be directly on the other layer, position, substrate or region, or there can be an intermediate layer, position, substrate or region therebetween. On the contrary, when a layer, position, substrate or region is referred to as "directly on" another layer, position, substrate or region, there can be no intermediate layer, position, substrate or region therebetween. In addition, when a layer, position, substrate or region is referred to as "below" another layer, position, substrate or region, the layer, position, substrate or region can be directly below the other layer, position, substrate or region, or there can be an intermediate layer, position, substrate or region therebetween. On the contrary, when a layer, position, substrate or region is referred to as "directly on" another layer, position, substrate or region, there can be no intermediate layer, position, substrate or region therebetween. In addition, "on ..." or "on ..." can include being placed on or below an object and does not necessarily mean a direction based on gravity.

[0033] For ease of description, spatially relative terms such as "below," "beneath," "below," "above," "above," etc. may be used herein to describe the relationship between one element or component and another element or component as shown in the accompanying drawings. It will be understood that spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the accompanying drawings. For example, where the device shown in the accompanying drawings is flipped, a device that is positioned "below" or "beneath" another device may be placed "above" another device. Thus, the illustrative term "below" may include both a position below and a position above. The device may also be oriented in other directions, and therefore the spatially relative descriptors may be interpreted differently depending on that orientation.

[0034] Throughout this specification, when an element is referred to as being "connected" to another element, the element may be "directly connected" to the other element, or "electrically connected" to the other element, with one or more intermediate elements placed between the element and the other element. It will also be understood that when the terms "comprise" and / or "include" are used in this specification, they or it may specify the presence of the stated features, wholes, steps, operations, elements and / or components, but do not exclude the presence or addition of other features, wholes, steps, operations, elements, components and / or any combination thereof. As used herein, the term "and / or" includes any and all combinations of one or more of the relevant listed items.

[0035] It will be understood that although the terms "first," "second," "third," etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are used to distinguish one element from another or to facilitate description and illustration. For example, when discussing a "first element" in the specification, the "first element" may be named a "second element" or a "third element," and the "second element" and "third element" may be named in a similar manner without departing from the teachings herein.

[0036] Unless otherwise defined, all terms used herein (including technical and scientific terms) have the same meaning as commonly understood by one of ordinary skill in the art to which the present invention belongs. It will also be understood that terms (such as those defined in commonly used dictionaries) should be interpreted as having a meaning consistent with their meaning in the context of the relevant art and will not be interpreted in an idealized or overly formal sense unless clearly defined in the specification.

[0037] Figure 1 is a perspective view of a display device according to an embodiment. Figure 2 It shows Figure 1 A plan view of the display device in the manufacturing state.

[0038] Reference Figure 1 and Figure 2 The display device 1 can display an image. For example, the display device 1 can be an organic light-emitting diode (OLED) display, a liquid crystal display (LCD), a plasma display (PDP), a field emission display (FED), an electrophoretic display (EPD), etc. Hereinafter, an organic light-emitting diode (OLED) display device will be described as an example of the display device 1, but the disclosure is not limited thereto.

[0039] The display device 1 can be applied to various products such as televisions, laptop computers, monitors, billboards, and the Internet of Things, as well as portable electronic devices (such as mobile phones, smart phones, tablet personal computers (tablet PCs), smart watches, watch phones, mobile communication terminals, electronic notebooks, electronic books, portable multimedia players (PMPs), navigation systems, and ultra-mobile PCs (UMPCs)).

[0040] The display device 1 may include a main display surface 10 and sub-display surfaces 11 to 14 .

[0041] The main display surface 10 may have a substantially planar shape and may be positioned on one plane of the display device 1. The main display surface 10 may have the largest area (or size) among the main display surface 10 and the sub-display surfaces 11 to 14. For example, the main display surface 10 may be positioned on the upper surface of the display device 1. The main display surface 10 may have a planar shape such as a polygonal shape (such as a rectangular shape, a circular shape, or an elliptical shape).

[0042] The sub-display surfaces 11 to 14 may be provided on a plane different from the plane on which the main display surface 10 is provided. Each of the sub-display surfaces 11 to 14 may have an area smaller than that of the main display surface 10, and the sub-display surfaces 11 to 14 may be provided on different planes. The sub-display surfaces 11 to 14 may be respectively connected to the side edges of the main display surface 10 and may be bent from the main display surface 10 (or from the side edges of the main display surface 10).

[0043] For example, when the main display surface 10 has a rectangular shape, the display device 1 includes first to fourth sub display surfaces 11 to 14, and the first to fourth sub display surfaces 11 to 14 may be connected to four sides of the rectangle, respectively.

[0044] The first sub-display surface 11 may be connected to a first long side of the main display surface 10 and may be bent in a vertical direction from the main display surface 10 to constitute a left side surface of the display device 1. Similarly, the second sub-display surface 12 may be connected to a second long side of the main display surface 10 and may be bent in a vertical direction from the main display surface 10 to form a right side surface of the display device 1. The third sub-display surface 13 may be connected to a first short side of the main display surface 10 to form an upper side surface of the display device 1, and the fourth sub-display surface 14 may be connected to a second short side of the main display surface 10 to form a lower side surface of the display device 1.

[0045] The display device 1 may be a three-dimensional multi-surface display device that displays images on the upper surface and side surfaces of the display device 1. Figure 2 It is shown that the lower surface of the display device 1 does not include a display surface, but this is merely exemplary and the disclosure is not limited thereto. For example, the display device 1 may further include a lower surface that displays an image.

[0046] The display device 1 may include a display area DA and a non-display area NDA. The display area DA is an area where an image is displayed and may include pixels PX as light emitting units for displaying an image. The non-display area NDA is an area where no image is displayed and may not include pixels PX. Figure 3 Describes the pixel PX.

[0047] The display area DA may include a main display area DA0 and first to fourth sub display areas DA1 to DA4.

[0048] The main display area DA0 may be provided on the main display surface 10. For example, the main display surface 10 may include only the main display area DA0. The first sub-display area DA1 may be provided on the first sub-display surface 11, and the first sub-display area DA1 may be connected to the main display area DA0. Similarly, the second to fourth sub-display areas DA2 to DA4 may be provided on the second to fourth sub-display surfaces 12 to 14, respectively, and each of the second to fourth sub-display areas DA2 to DA4 may be connected to the main display area DA0.

[0049] The non-display area NDA may be provided along the edge of the display area DA (or the outermost edges of the main display surface 10 and the sub-display surfaces 11 to 14). Drive wiring, drive circuits, etc. may be provided in the non-display area NDA. The non-display area NDA may include, but is not limited to, a black matrix for blocking light leakage, decorative ink, etc.

[0050] The non-display area NDA may include first to fourth non-display areas NDA1 to NDA4 (or first to fourth sub-non-display areas). The first non-display area NDA1 may be positioned on the first sub-display surface 11. Similarly, the second to fourth non-display areas NDA2 to NDA4 may be disposed on the second to fourth sub-display surfaces 12 to 14, respectively.

[0051] The non-display area NDA (or display device 1) may include first to fourth corner wings 21 to 24 (i.e., corner portions, corner regions, corner wing regions). Each of the first to fourth corner wings 21 to 24 may be positioned adjacent to a corner of the main display surface 10 (i.e., a portion where two sides meet). The first to fourth corner wings 21 to 24 may be substantially identical to one another except for their positions. Hereinafter, common features of the first to fourth corner wings 21 to 24 will be described with reference to the first corner wing 21.

[0052] The first corner wing 21 may provide a space for passing or arranging a data line. When the first sub-display surface 11 and the fourth sub-display surface 14 are bent, the first corner wing 21 may be folded inward (i.e., folded in a direction toward the center of gravity of the display device 1). For example, the first corner wing 21 may be folded along the folding line 20 so that one end of the first corner wing 21 (i.e., the first portion adjacent to the first sub-display surface 11) and the other end of the first corner wing 21 (i.e., the second portion adjacent to the fourth sub-display surface 14) may face each other. One end and the other end of the first corner wing 21 may be in contact with each other or may be bonded by a bonding layer or the like.

[0053] Since the first corner wing 21 is folded inward when the first sub-display surface 11 and the fourth sub-display surface 14 are folded, the first corner wing 21 can be hidden from the outside. Similarly, the second corner wing 22, the third corner wing 23, and the fourth corner wing 24 can be hidden from the outside. Therefore, the first to fourth corner wings 21 to 24 can be included in the non-display area NDA.

[0054] The non-display area NDA may further include a driving area 30, and the driving area 30 may be connected to at least one of the first to fourth sub-display surfaces 11 to 14. For example, the driving area 30 may be connected to one side of the fourth sub-display surface 14 (e.g., the lower side of the fourth sub-display surface 14).

[0055] like Figure 1 As shown in FIG, when the fourth sub-display surface 14 is vertically bent relative to the main display surface 10, the driving region 30 is further bent relative to the fourth sub-display surface 14 (i.e., bent at an angle of 180° relative to the main display surface 10) and is disposed below the main display surface 10 in the thickness direction of the main display surface 10. The driving region 30 may overlap with and be parallel to the main display surface 10.

[0056] The display device 1 may include a driver chip 40 (or a pad (also called a "pad" or "solder pad") portion on which the driver chip 40 is provided and electrically connected to the driver chip 40), and the driver chip 40 may be provided in the driving area 30. The driver chip 40 may generate a driving signal required for driving the pixel PX and provide the driving signal to the display area DA (or the pixel PX). For example, the driver chip 40 may generate a data signal that determines the light emission brightness of the pixel PX. For example, as described later, the driver chip 40 may provide the data signal to the pixel PX through a driving wiring formed in the driving area 30 and a data wiring formed on one or more of the sub-display surfaces 11 to 14 and the main display surface 10.

[0057] Hereinafter, the configuration of the pixel PX of the display device 1 will be described in detail.

[0058] Figure 3 It shows Figure 1 Schematic cross-sectional view of an example of a display device.

[0059] Reference Figures 1 to 3The display device 1 may include a substrate 101, a buffer layer 102, a semiconductor layer 105, a first insulating layer 171, a first gate conductive layer 110, a second insulating layer 172, a second gate conductive layer 120, a third insulating layer 173, a first source / drain conductive layer 130, a fourth insulating layer 174, a second source / drain conductive layer 140, a fifth insulating layer 175, a first electrode layer 150, a light-emitting element layer, and a second electrode layer 160. Thin film transistors may be formed in a region ranging from the semiconductor layer 105 to the second gate conductive layer 120. Therefore, the region ranging from the semiconductor layer 105 to the second gate conductive layer 120 may be collectively referred to as a driving element layer.

[0060] The substrate 101 may support the various layers disposed thereon. The substrate 101 may be made of an insulating material. The substrate 101 may be made of an inorganic material such as glass or quartz, or may be made of an organic material such as polyimide. The substrate 101 may be a rigid substrate or a flexible substrate.

[0061] A buffer layer 102 may be provided on the substrate 101. The buffer layer 102 may prevent the diffusion of impurity ions, prevent the penetration of moisture or external air, and perform a surface planarization function. The buffer layer 102 may include silicon nitride, silicon oxide, silicon oxynitride, or the like. The buffer layer 102 may be omitted depending on the type of substrate 101, manufacturing considerations, and the like.

[0062] The semiconductor layer 105 may be disposed on the buffer layer 102. The semiconductor layer 105 may include a first semiconductor pattern 105_1 and a second semiconductor pattern 105_2, and the first semiconductor pattern 105_1 and the second semiconductor pattern 105_2 may constitute a channel of a transistor. For example, the first semiconductor pattern 105_1 may form a channel of a driving transistor, and the second semiconductor pattern 105_2 may form a channel of a switching transistor.

[0063] The semiconductor layer 105 may include polycrystalline silicon. In the semiconductor layer 105, portions connected to the source electrode and drain electrode of the thin film transistor (e.g., the source region and the drain region) may be doped with impurity ions (e.g., p-type impurity ions). A trivalent dopant such as boron (B) may be used as the p-type impurity ions. The semiconductor layer 105 may include single crystal silicon, low temperature polycrystalline silicon, amorphous silicon, or an oxide semiconductor such as ITZO or IGZO instead of polycrystalline silicon.

[0064] The first insulating layer 171 may be provided on the semiconductor layer 105. The first insulating layer 171 may be a gate insulating layer having a gate insulating function.

[0065] The first gate conductive layer 110 may be disposed on the first insulating layer 171. The first gate conductive layer 110 may include a first gate conductive pattern 110_1 and a second gate conductive pattern 110_2. The first gate conductive pattern 110_1 and the second gate conductive pattern 110_2 may each include a gate electrode of a transistor. For example, the first gate conductive pattern 110_1 may include a gate electrode of a driving transistor, and the second gate conductive pattern 110_2 may include a gate electrode of a switching transistor.

[0066] The first gate conductive layer 110 may include at least one metal selected from the group consisting of molybdenum (Mo), aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), calcium (Ca), titanium (Ti), tantalum (Ta), tungsten (W), and copper (Cu).

[0067] The second insulating layer 172 may be disposed on the first gate conductive layer 110. The second insulating layer 172 may be an interlayer insulating layer.

[0068] The second gate conductive layer 120 may be provided on the second insulating layer 172. The second gate conductive layer 120 may include a material exemplified as a constituent material of the first gate conductive layer 110.

[0069] The second gate conductive layer 120 may include a third gate conductive pattern 121. The third gate conductive pattern 121 may include a second electrode of a sustain capacitor. The third gate conductive pattern 121 may overlap the first gate conductive pattern 110_1, with a second insulating layer 172 interposed therebetween to form a capacitor. The third gate conductive pattern 121 may include a material such as that of the first gate conductive layer 110.

[0070] A third insulating layer 173 may be disposed on the second gate conductive layer 120 .

[0071] The first source / drain conductive layer 130 may be disposed on the third insulating layer 173 .

[0072] The first source / drain conductive layer 130 may include at least one metal selected from the group consisting of molybdenum (Mo), aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), calcium (Ca), titanium (Ti), tantalum (Ta), tungsten (W), and copper (Cu). The first source / drain conductive layer 130 may be a single layer or a multilayer. For example, the first source / drain conductive layer 130 has a stacked structure of Ti / Al / Ti, Mo / Al / Mo, Mo / AlGe / Mo, or Ti / Cu.

[0073] The first source / drain conductive layer 130 may include a first source electrode 131 and a first drain electrode 132 of a driving transistor, a second source electrode 133 and a second drain electrode 134 of a switching transistor, a data wiring 135 , and a first power wiring 136 .

[0074] The first source electrode 131 may make contact with the first semiconductor pattern 105_1 through a contact hole passing through the first, second, and third insulating layers 171 , 172 , and 173 to expose one end of the first semiconductor pattern 105_1 .

[0075] In addition, the first drain electrode 132 may contact the first semiconductor pattern 105_1 through a contact hole that passes through the first insulating layer 171 , the second insulating layer 172 , and the third insulating layer 173 to expose the other end of the first semiconductor pattern 105_1 .

[0076] In addition, the second source electrode 133 may contact the second semiconductor pattern 105_2 through a contact hole that passes through the first insulating layer 171 , the second insulating layer 172 , and the third insulating layer 173 to expose one end of the second semiconductor pattern 105_2 .

[0077] In addition, the second drain electrode 134 may contact the second semiconductor pattern 105_2 through a contact hole that passes through the first insulating layer 171 , the second insulating layer 172 , and the third insulating layer 173 to expose the other end of the second semiconductor pattern 105_2 .

[0078] The fourth insulating layer 174 may be disposed on the first source / drain conductive layer 130, and the second source / drain conductive layer 140 may be disposed on the fourth insulating layer 174. The second source / drain conductive layer 140 may include the metal forming the first source / drain conductive layer 130.

[0079] The second source / drain conductive layer 140 may include a first connection electrode 141. The first connection electrode 141 may be disposed to overlap the first source electrode 131 in a plan view. The first connection electrode 141 may be electrically connected to the first source electrode 131 of the driving transistor through a contact hole passing through the fourth insulating layer 174.

[0080] The upper surface of the first connection electrode 141 may contact the lower surface of the anode electrode 151. The lower surface of the first connection electrode 141 may contact the upper surface of the fourth insulating layer 174. The side surface of the first connection electrode 141 may be disposed between the upper and lower surfaces of the first connection electrode 141.

[0081] A fifth insulating layer 175 may be disposed on the second source / drain conductive layer 140. The fifth insulating layer 175 may include an organic insulating material.

[0082] The upper surface of the fifth insulating layer 175 may be in contact with the lower surface of the anode electrode 151, and the lower surface of the fifth insulating layer 175 may be in contact with the upper surface of the fourth insulating layer 174. Furthermore, the fifth insulating layer 175 may surround the first connection electrode 141, and the side surface of the first connection electrode 141 may be in contact with the side surface of the fifth insulating layer 175. The side surface of the first connection electrode 141 may have an acute inclination, and the sidewall of the fifth insulating layer 175 in contact with the side surface of the first connection electrode 141 may have an obtuse inclination. In other words, the side surface of the first connection electrode 141 may be inclined at an acute angle between the side surface of the first connection electrode 141 and the lower surface of the first connection electrode 141, and the sidewall of the fifth insulating layer 175 may be inclined at an obtuse angle between the sidewall of the fifth insulating layer 175 and the lower surface of the fifth insulating layer 175.

[0083] The thickness of the first connection electrode 141 and the thickness of the fifth insulating layer 175 can be substantially equal to each other. As used herein, the term "substantially" can mean assigning a deviation of 5 percent or less to the relevant parameter. For example, one of the aforementioned thicknesses can differ from another of the aforementioned thicknesses by 5 percent or less and still be considered substantially equal to the other thickness. Because the aforementioned is merely exemplary, other percentages may also be applicable.

[0084] The upper surface of the first connection electrode 141 and the upper surface of the fifth insulating layer 175 can be disposed at the same level from the substrate 101. For example, such disposition of the respective upper surfaces at the same level from the surface of the substrate 101 can mean that the distance from the surface of the substrate 101 to each upper surface is substantially the same. That is, the average distance from the upper surface of the first connection electrode 141 to the upper surface of the substrate 101 can be substantially equal to the average distance from the upper surface of the fifth insulating layer 175 to the upper surface of the substrate 101. As a result, the upper surface of the first connection electrode 141 can extend to meet with portions of the upper surface of the fifth insulating layer 175 and extend together with those upper surface portions of the fifth insulating layer 175, so that the upper surface of the first connection electrode 141 and the upper surface of the fifth insulating layer 175 are disposed in a common plane (that is, the upper surface of the first connection electrode 141 and the upper surface of the fifth insulating layer 175 are coplanar).

[0085] An average distance from an upper surface of the first connection electrode 141 to an upper surface of the fourth insulating layer 174 may be substantially equal to an average distance from an upper surface of the fifth insulating layer 175 to an upper surface of the fourth insulating layer 174 .

[0086] The term "average distance" can be understood as a distance that includes the intermediate space between two parts (e.g., the first connection electrode 141 and the fourth insulating layer 174). That is, the average distance can include and take into account all surface profiles, material thicknesses, and material depositions that form the aforementioned two parts, as well as the surface profiles, material thicknesses, and material depositions of any intermediate part or any intermediate parts between the two parts. In this way, the average distance can describe a relative distance that accurately reflects the relationship between the two parts regardless of their configuration and the configuration of one or more parts between them.

[0087] The first connection electrode 141 and the fifth insulating layer 175 may not overlap each other in the thickness direction. There may be an exception region to this non-overlap between the first connection electrode 141 and the fifth insulating layer 175 in the thickness direction. For example, the exception region may include a region where the inclined side surface of the first connection electrode 141 contacts the inclined sidewall of the fifth insulating layer 175. In other words, the side surface of the first connection electrode 141 and the sidewall of the fifth insulating layer 175 may overlap each other in the thickness direction.

[0088] A side surface of the first connection electrode 141 may not contact the anode electrode 151. An upper surface of the first connection electrode 141 may not contact the fifth insulating layer 175.

[0089] The thickness of the first connection electrode 141 may be greater than the thickness of the fifth insulating layer 175 .

[0090] An average distance from the upper surface of the first connection electrode 141 to the upper surface of the substrate 101 may be greater than an average distance from the upper surface of the fifth insulating layer 175 to the upper surface of the substrate 101 .

[0091] An average distance from an upper surface of the first connection electrode 141 to an upper surface of the fourth insulating layer 174 may be greater than an average distance from an upper surface of the fifth insulating layer 175 to an upper surface of the fourth insulating layer 174 .

[0092] A side surface of the first connection electrode 141 may partially contact the anode electrode 151 . An upper surface of the first connection electrode 141 may not contact the fifth insulating layer 175 .

[0093] The thickness of the fifth insulating layer 175 may be smaller than the thickness of the second insulating layer 172 , the third insulating layer 173 , and / or the fourth insulating layer 174 .

[0094] The surface roughness of the upper surface of the fifth insulating layer 175 may be greater than the surface roughness of the upper surfaces of the second insulating layer 172 , the third insulating layer 173 , and / or the fourth insulating layer 174 .

[0095] In addition, the surface roughness of the upper surface of the fifth insulating layer 175 may be greater than the surface roughness of the upper surface of the first connection electrode 141 .

[0096] The surface roughness of the upper surface of the first connection electrode 141 may be greater than the surface roughness of the side surface of the first connection electrode 141 .

[0097] The first electrode layer 150 may be provided on the fifth insulating layer 175. The first electrode layer 150 may include an anode electrode 151 of the light emitting element. The anode electrode 151 may be in direct contact with the first connection electrode 141.

[0098] The anode electrode 151 can have a uniform thickness. Specifically, the average distance from the upper surface of the anode electrode 151 to the upper surface of the fifth insulating layer 175 can be substantially the same as the average distance from the upper surface of the anode electrode 151 to the upper surface of the first connection electrode 141. In other words, the anode electrode 151 can directly contact the first connection electrode 141 without requiring a separate contact hole. Therefore, since the contact pad region can be omitted, the area of ​​the pixel PX can be optimized while also achieving high resolution.

[0099] The light emitting element layer may be provided on the first electrode layer 150 , and the light emitting element layer may include a pixel defining layer 177 and an organic light emitting layer EL.

[0100] The pixel defining layer 177 may be disposed on the anode electrode 151 along its edge and may include an opening OP exposing the anode electrode 151. The opening OP may overlap a region where the anode electrode 151 and the first connection electrode 141 contact each other.

[0101] The organic light-emitting layer EL may be disposed in the opening OP of the pixel defining layer 177. The organic light-emitting layer EL may include an organic emission layer, a hole injection layer / hole transport layer, and an electron injection layer / electron transport layer. The organic light-emitting layer EL may overlap the region where the anode electrode 151 and the first connection electrode 141 contact each other.

[0102] The second electrode layer 160 may be disposed on the organic light emitting layer EL and the pixel defining layer 177. The cathode electrode 161 of the light emitting element may be disposed in the second electrode layer 160. The cathode electrode 161 may be a common electrode disposed across the entire display area DA of the display device 1.

[0103] As described above, in the display device 1, the anode electrode 151 and the first connection electrode 141 can directly contact each other without requiring a separate contact hole. Therefore, since the contact pad region can be omitted, the area of ​​the pixel PX can be optimized, while also easily achieving high resolution. Furthermore, by omitting the contact hole formation process, the number of hole-forming masks can be reduced, thereby reducing the costs associated with simplifying the manufacturing process of the pixel PX.

[0104] In addition, since the anode electrode 151 and the organic light emitting layer EL can be formed to be flat with a uniform thickness, the display quality of an image can be further improved.

[0105] Figure 4 is a plan view of a display device according to another embodiment. Figure 5 It is along Figure 4 Schematic cross-sectional view taken along line V-V'. Figure 6 It shows Figure 4 Schematic cross-sectional view of a pixel of a display device.

[0106] Reference Figures 4 to 6 , the display device 1_1 according to the embodiment may include a data wiring 135 , a connection wiring 145 , and a driving wiring 60 .

[0107] Meanwhile, the arrangement of the data wiring 135, the connection wiring 145, and the drive wiring 60 may be symmetrical with respect to a reference axis (not shown) extending in the first direction W1 and passing through the center of the area of ​​the display device 1_1. Hereinafter, the data wiring 135, the connection wiring 145, and the drive wiring 60 relatively adjacent to the first sub-display surface 11 will be mainly described.

[0108] The data wiring 135 may include data lines D1 to Dm (wherein m is an integer of 3 or greater).

[0109] The data lines D1 to Dm may extend in a first direction W1 and may be sequentially arranged at specific intervals along a second direction W2. Each of the data lines D1 to Dm may extend across the display area DA in the first direction W1. Here, among the data lines D1 to Dm, the first to kth data lines may be arranged on one display surface (where k is a positive integer equal to or greater than 2 but less than m). Hereinafter, a case where k is 7 and m is not greater than 14 will be described as an example.

[0110] The connection wiring 145 may electrically connect a portion of the data wiring 135 and a portion of the driving wiring 60. The connection wiring 145 may be provided on a layer different from the layer on which the data wiring 135 is provided, and the connection wiring 145 may be insulated from the data wiring 135 by an insulating layer, which will be referred to later. Figure 6 Provide a description.

[0111] The connection wiring 145 may include first to kth connection lines DM1 to DMk corresponding to the first to mth data lines D1 to Dm. When k is 7, the connection wiring 145 may include first to seventh connection lines DM1 to DM7. The connection lines DM1 to DM7 may correspond to the data lines D1 to D7 disposed on the first sub-display surface 11, respectively.

[0112] The connection lines DM1 to DMk may extend from the fourth non-display area NDA4 of the fourth sub-display surface 14 (e.g., the lower portion of the fourth non-display area NDA4) via the display area DA to one end of the corresponding data wiring 135 (e.g., the lower portion of the first corner wing 21 and the first non-display area NDA1 of the first sub-display surface 11). The connection lines DM1 to DMk may be separated from each other by a predetermined interval gap. The interval gap between each adjacent two of the connection lines DM1 to DMk may be equal to the interval gap between each adjacent two of the data lines D1 to Dm.

[0113] In addition, the connecting lines DM1 to DMk can extend from the fourth non-display area NDA4 of the fourth sub-display surface 14 (e.g., the lower portion of the fourth non-display area NDA4) along the first direction W1 (e.g., upward), extend to change the direction to the second direction W2 (e.g., leftward) in the display area DA, and extend to one end of the corresponding data wiring 135 (i.e., the lower portion of the first non-display area NDA1 of the first sub-display surface 11) in an area adjacent to or intersecting with the corresponding data wiring 135.

[0114] Each of the connection lines DM1 to DMk may include a first portion extending from the fourth non-display area NDA4 along the first direction W1, a second portion extending from one end of the first portion along the second direction W2, and a third portion extending from one end of the second portion along the first direction W1 (or a direction opposite to the first direction W1).

[0115] like Figure 4 As shown in FIG, in a plan view, a first portion of each of the connection lines DM1 to DMk may overlap with a corresponding data line among the data lines D1 to Dm in the display area DA. For example, a first portion of the first connection line DM1 may overlap with the eighth data line D8, and a first portion of the seventh connection line DM7 may overlap with the fourteenth data line D14. However, this is merely exemplary, and the disclosure is not limited thereto. For example, in a plan view, a first portion of each of the first to seventh connection lines DM1 to DM7 may not overlap with a corresponding data line among the eighth to fourteenth data lines D8 to D14 in the display area DA.

[0116] In addition, if Figure 4As shown in FIG, in a plan view, a third portion of each of the connection lines DM1 to DMk may be disposed to overlap a corresponding data line among the data lines D1 to Dm. For example, a third portion of the first connection line DM1 may overlap the seventh data line D7, and a third portion of the second connection line DM2 may overlap the sixth data line D6.

[0117] At the same time, despite Figure 4 The connection wiring 145 is shown bent at a right angle, but the disclosure is not limited thereto.

[0118] The connection wiring 145 does not intersect with each other in a plan view and can be arranged to bypass other connection lines relatively close to the first corner wing 21. For example, the second connection line DM2 can be arranged to bypass the first connection line DM1. In other words, since the connection wiring 145 can be arranged closer to the corner wing (for example, the first corner wing 21), the connection wiring 145 can bend at a position closer to the driving area 30, and since the connection wiring 145 can be arranged farther away from the corner wing, the connection wiring 145 can bend at a position farther away from the driving area 30.

[0119] Since the connection wires relatively separated from the first corner wing 21 can be arranged to bypass other connection wires relatively adjacent to the first corner wing 21, the connection wiring 145 can have different lengths. For example, the length of the second connection wire DM2 can be longer than the length of the first connection wire DM1. In other words, the length of the i+1th connection wire DMi+1 can be longer than the length of the i-th connection wire DMi (where i is a positive integer).

[0120] The connection wiring 145 can be directly connected to the data wiring 135 on a one-to-one basis through contact holes CNT formed in the first corner wing 21 and the lower portion of the first non-display area NDA1 (i.e., contact holes CNT formed in the non-display area NDA). For example, the first connection line DM1 can be electrically connected to the seventh data line D7, and the seventh connection line DM7 can be electrically connected to the first data line D1. That is, the i-th connection line DMi can be electrically connected to the k+1-i-th data line DMk+1-i.

[0121] For example, Figure 5 As shown in FIG, the sixth data line D6 may be disposed on the third insulating layer 173, and the second to fourth connection lines DM2 to DM4 may be disposed on the fourth insulating layer 174, and the second to fourth connection lines DM2 to DM4 may be insulated from the sixth data line D6 by the fourth insulating layer 174. The second connection line DM2 may extend to one end of the sixth data line D6 and may be electrically connected to the sixth data line D6 via a contact hole CNT passing through the fourth insulating layer 174 to expose the one end of the sixth data line D6.

[0122] The driving wiring 60 may include driving lines 61a to 67a and 61b to 67b (or pad wiring and pad connection wiring), and the driving lines 61a to 67a and 61b to 67b may extend from the driving chip 40 (or the pad portion on which the driving chip 40 is provided) to the fourth non-display area NDA4 of the fourth sub-display surface 14 (or a tangent line 51 between the fourth sub-display surface 14 and the driving area 30).

[0123] The driving wires 61 a to 67 a and 61 b ​​to 67 b may be divided into a first driving wiring group 60 a and a second driving wiring group 60 b .

[0124] The driving wires 61a to 67a included in the first driving wiring group 60a may be arranged on a layer different from the layer on which the driving wires 61b to 67b included in the second driving wiring group 60b may be arranged. In a plan view, the driving wires 61a to 67a included in the first driving wiring group 60a may intersect with the driving wires 61b to 67b included in the second driving wiring group 60b. The driving wires 61a to 67a included in the first driving wiring group 60a may be insulated from the driving wires 61b to 67b included in the second driving wiring group 60b by a separate insulating layer.

[0125] The driving lines 61a to 67a included in the first driving wiring group 60a may be electrically connected to the data lines D1 to D7 provided on the first sub display surface 11 through the connection wires DM1 to DM7, respectively. The driving lines 61b to 67b included in the second driving wiring group 60b may be electrically connected to the data lines D8 to D14 provided on the main display surface 10, respectively.

[0126] As described above, the display device 1_1 may include a connection wiring 145 provided in an area including the display area DA, and an image signal may be provided from the driver chip 40 to the data lines D1 to Dm provided on the first sub-display surface 11 (and the second sub-display surface 12) through the connection wiring 145. Therefore, the dead space that would be required to directly connect the data wiring 135 provided on the first sub-display surface 11 (and the second sub-display surface 12) to the drive wiring 60 may be unnecessary. In other words, since the image signal from the driver chip 40 can be provided to the data wiring 135 (or the data lines D1 to Dm) through the connection wiring 145 (or the connection lines DM1 to DM7), no dead space is required to connect the data wiring 135 to the drive wiring 60. As a result, the entire dead space of the display device 1_1 can be reduced, and an increase in the entire dead space of the display device 1_1 can be prevented.

[0127] Furthermore, by forming the contact hole CNT electrically connecting the data wiring 135 to the connection wiring 145 in the non-display area NDA, it is possible to prevent the contact hole CNT from interfering with the pixel PX (or a constituent signal provided to the pixel PX). Therefore, the display quality of the display device 1_1 can be improved.

[0128] The pixel configuration of the display device 1_1 described above will be described in more detail below. In addition to the second source / drain conductive layer 140, the third source / drain conductive layer 180, the fifth insulating layer 175' and the sixth insulating layer 176, Figure 6 The display device 1_1 can be used with Figure 3 The display devices 1 are substantially the same or similar.

[0129] The second source / drain conductive layer 140 may include a connection wiring 145 (ie, referring to Figure 4 The connection wiring 145 may be disposed to overlap with the data wiring 135 in a plan view.

[0130] A fifth insulating layer 175′ may be disposed on the second source / drain conductive layer 140, and a third source / drain conductive layer 180 may be disposed on the fifth insulating layer 175′. The third source / drain conductive layer 180 may include a metal constituting the first source / drain conductive layer 130 and / or the second source / drain conductive layer 140.

[0131] The third source / drain conductive layer 180 may include a second connection electrode 181. In a plan view, the second connection electrode 181 may be disposed to overlap the first connection electrode 141. The second connection electrode 181 may contact the first connection electrode 141 through a contact hole passing through the fifth insulating layer 175' and may be electrically connected to the first source electrode 131 of the driving transistor.

[0132] The upper surface of the second connection electrode 181 may contact the lower surface of the anode electrode 151. The lower surface of the second connection electrode 181 may contact the upper surface of the fifth insulating layer 175'. The side surface of the second connection electrode 181 may be disposed between the upper and lower surfaces of the second connection electrode 181.

[0133] A sixth insulating layer 176 may be disposed on the third source / drain conductive layer 180. The sixth insulating layer 176 may include an organic insulating material.

[0134] The upper surface of the sixth insulating layer 176 may be in contact with the lower surface of the anode electrode 151, and the lower surface of the sixth insulating layer 176 may be in contact with the upper surface of the fifth insulating layer 175'. Furthermore, the sixth insulating layer 176 may be disposed around or enclose the second connection electrode 181, and the side surfaces of the second connection electrode 181 may be in contact with the side surfaces of the sixth insulating layer 176. The side surfaces of the second connection electrode 181 may be inclined at an acute angle, and the sidewalls of the sixth insulating layer 176 that are in contact with the side surfaces of the second connection electrode 181 may be inclined at an obtuse angle. In other words, the side surfaces of the second connection electrode 181 may be inclined at an acute angle between the side surfaces of the second connection electrode 181 and the lower surface of the second connection electrode 181, and the sidewalls of the sixth insulating layer 176 may be inclined at an obtuse angle between the side surfaces of the sixth insulating layer 176 and the lower surface of the sixth insulating layer 176.

[0135] The thickness of the second connection electrode 181 and the thickness of the sixth insulating layer 176 may be substantially equal to each other.

[0136] The upper surface of the second connection electrode 181 and the upper surface of the sixth insulating layer 176 may be disposed at the same level from the substrate 101. That is, the average distance from the upper surface of the second connection electrode 181 to the upper surface of the substrate 101 may be substantially equal to the average distance from the upper surface of the sixth insulating layer 176 to the upper surface of the substrate 101.

[0137] An average distance from an upper surface of the second connection electrode 181 to an upper surface of the fifth insulating layer 175 ′ may be substantially equal to an average distance from an upper surface of the sixth insulating layer 176 to an upper surface of the fifth insulating layer 175 ′.

[0138] The second connection electrode 181 and the sixth insulating layer 176 may overlap each other in a thickness direction.

[0139] However, the disclosure is not limited thereto, and the thickness of the second connection electrode 181 may be greater than that of the sixth insulating layer 176 .

[0140] For example, an average distance from the upper surface of the second connection electrode 181 to the upper surface of the substrate 101 may be greater than an average distance from the upper surface of the sixth insulating layer 176 to the upper surface of the substrate 101 .

[0141] In addition, an average distance from the upper surface of the second connection electrode 181 to the upper surface of the fifth insulating layer 175 ′ may be greater than an average distance from the upper surface of the sixth insulating layer 176 to the upper surface of the fifth insulating layer 175 ′.

[0142] In addition, the thickness of the sixth insulating layer 176 may be smaller than the thickness of the second insulating layer 172 , the third insulating layer 173 , the fourth insulating layer 174 , and / or the fifth insulating layer 175 ′.

[0143] The surface roughness of the upper surface of the sixth insulating layer 176 may be greater than the surface roughness of the upper surfaces of the second insulating layer 172 , the third insulating layer 173 , the fourth insulating layer 174 , and / or the fifth insulating layer 175 ′.

[0144] In addition, the surface roughness of the upper surface of the sixth insulating layer 176 may be greater than the surface roughness of the upper surface of the second connection electrode 181 .

[0145] The surface roughness of the upper surface of the second connection electrode 181 may be greater than the surface roughness of the side surface of the second connection electrode 181 .

[0146] The first electrode layer 150 may be provided on the sixth insulating layer 176. The first electrode layer 150 may include an anode electrode 151 of the light emitting element. The anode electrode 151 may be in direct contact with the second connection electrode 181.

[0147] One surface of the sixth insulating layer 176 may be in contact with a lower surface of the anode electrode 151 .

[0148] The average distance from the upper surface of the anode electrode 151 to the upper surface of the sixth insulating layer 176 may be substantially the same as the average distance from the upper surface of the anode electrode 151 to the upper surface of the second connection electrode 181. That is, the anode electrode 151 may directly contact the second connection electrode 181 without a separate contact hole.

[0149] A contact area between the anode electrode 151 and the second connection electrode 181 may be larger than a contact area between the sixth insulating layer 176 and the second connection electrode 181 .

[0150] Although not shown in the drawings, the driving lines included in the first driving wiring group 60a (i.e., the driving lines connected to the connection wiring 145) may be disposed on the second gate conductive layer 120, and the driving lines included in the second driving wiring group 60b (i.e., the driving lines directly connected to the data wiring 135) may be disposed on the first gate conductive layer 110.

[0151] In the display device 1_1, the anode electrode 151 and the second connection electrode 181 can directly contact each other without a separate contact hole. Therefore, as described above, high resolution can be achieved by omitting the contact pad region, and the manufacturing process can be simplified by omitting the contact hole formation process.

[0152] Figure 7 is a cross-sectional view illustrating a pixel of a display device according to still another embodiment.

[0153] Reference Figure 7 , the display device 1_2 according to the embodiment and Figure 6 The embodiment is different in that the second connection electrode 181 ′ may contact the first connection electrode 141 without a separate contact hole.

[0154] An upper surface of the second connection electrode 181 ′ may make contact with a lower surface of the anode electrode 151 , and a lower surface of the second connection electrode 181 ′ may directly make contact with upper surfaces of the first connection electrode 141 and the fifth insulating layer 175 ′.

[0155] An upper surface of the sixth insulating layer 176 ′ may be in contact with a lower surface of the anode electrode 151 , and a lower surface of the sixth insulating layer 176 ′ may be in contact with an upper surface of the fifth insulating layer 175 ′.

[0156] The thickness of the sixth insulating layer 176 ′ may be the same as that of the second connection electrode 181 ′.

[0157] An average distance from an upper surface of the sixth insulating layer 176 ′ to an upper surface of the fifth insulating layer 175 ′ may be substantially the same as an average distance from an upper surface of the second connection electrode 181 ′ to an upper surface of the first connection electrode 141 .

[0158] In addition, an average distance from the upper surface of the sixth insulating layer 176 ′ to the upper surface of the fifth insulating layer 175 ′ may be substantially the same as an average distance from the upper surface of the second connection electrode 181 ′ to the upper surface of the fifth insulating layer 175 ′.

[0159] An upper surface of the first connection electrode 141 may be in contact with a lower surface of the second connection electrode 181 ′, and a lower surface of the first connection electrode 141 may be in contact with an upper surface of the fourth insulating layer 174 .

[0160] An upper surface of the connection wiring 145 may be in contact with a lower surface of the sixth insulating layer 176 ′, and a lower surface of the connection wiring 145 may be in contact with an upper surface of the fourth insulating layer 174 .

[0161] The thickness of the first connection electrode 141 and the thickness of the connection wiring 145 may be the same as the thickness of the fifth insulating layer 175 ′.

[0162] An average distance from an upper surface of the fifth insulating layer 175 ′ to an upper surface of the fourth insulating layer 174 may be substantially the same as an average distance from an upper surface of the first connection electrode 141 to an upper surface of the fourth insulating layer 174 .

[0163] An average distance from an upper surface of the fifth insulating layer 175 ′ to an upper surface of the fourth insulating layer 174 may be substantially the same as an average distance from an upper surface of the connection wiring 145 to an upper surface of the fourth insulating layer 174 .

[0164] The thickness of the anode electrode 151 may be uniform.

[0165] An average distance from the upper surface of the anode electrode 151 to the upper surface of the fifth insulating layer 175 ′ may be substantially the same as an average distance from the upper surface of the anode electrode 151 to the upper surface of the first connection electrode 141 .

[0166] A contact area between the anode electrode 151 and the second connection electrode 181 ′ may be larger than a contact area between the sixth insulating layer 176 ′ and the second connection electrode 181 ′.

[0167] The thickness of the sixth insulating layer 176 ′ and / or the fifth insulating layer 175 ′ may be smaller than the thickness of the fourth insulating layer 174 , the third insulating layer 173 , and / or the second insulating layer 172 .

[0168] The surface roughness of the upper surfaces of the sixth insulating layer 176 ′ and the fifth insulating layer 175 ′ may be greater than the surface roughness of the upper surfaces of the fourth insulating layer 174 , the third insulating layer 173 , and / or the second insulating layer 172 .

[0169] The surface roughness of the upper surfaces of the sixth and fifth insulating layers 176 ′ and 175 ′ may be greater than the surface roughness of the upper surfaces of the first and second connection electrodes 141 and 181 ′.

[0170] The surface roughness of the upper surfaces of the first and second connection electrodes 141 and 181 ′ may be greater than the surface roughness of the side surfaces of the first and second connection electrodes 141 and 181 ′.

[0171] In the display device 1_2, the anode electrode 151 and the second connection electrode 181' can directly contact each other without requiring a separate contact hole, and the second connection electrode 181' and the first connection electrode 141 can directly contact each other without requiring a separate contact hole. Therefore, by setting the size of the contact holes as described above, the thickness of the display device 1_2 can be reduced, and thus, the flexibility of the display device 1_2 can be increased due to the reduced thickness. As similarly described above with respect to the embodiments discussed above, it is also possible to achieve a higher resolution of the display device 1_2 by omitting the contact pad region, and the manufacturing process can also be simplified.

[0172] Compared to, for example Figure 1-Figure 3 The display device 1 according to the embodiment is provided below. A method for manufacturing the display device 1 according to the embodiment is provided below.

[0173] Figures 8 to 12 Schematic cross-sectional views showing steps of a method of manufacturing a display device.

[0174] Reference Figure 8 The method for manufacturing a display device according to an embodiment includes the following steps: forming a buffer layer 102, a semiconductor layer 105, a first insulating layer 171, a first gate conductive layer 110, a second insulating layer 172, a second gate conductive layer 120, a third insulating layer 173, a first source / drain conductive layer 130, a fourth insulating layer 174 and a second source / drain conductive layer 140 on a substrate 101.

[0175] Specifically, the buffer layer 102 may be made of silicon oxide (SiO x ) film, silicon nitride (SiN x The buffer layer 102 may be formed by chemical vapor deposition.

[0176] The first and second semiconductor patterns 105_1 and 105_2 may be formed by depositing a semiconductor film on one surface of the buffer layer 102 and then patterning the semiconductor film through an etching process using a photoresist pattern.

[0177] The first insulating layer 171 may be made of silicon oxide (SiO x ) film, silicon nitride (SiN x ) film or a multilayer film thereof is formed on the semiconductor layer 105. The first insulating layer 171 can be formed by chemical vapor deposition.

[0178] The first gate conductive pattern 110_1 and the second gate conductive pattern 110_2 may be formed by depositing a first gate conductive film on the first insulating layer 171 and then patterning the first gate conductive film.

[0179] The second insulating layer 172 may be made of silicon oxide (SiO x ) film, silicon nitride (SiN x ) film or a multilayer film thereof is formed on the first gate conductive layer 110. The second insulating layer 172 can be formed by chemical vapor deposition.

[0180] The third gate conductive pattern 121 may be formed by depositing a second gate conductive film on one surface of the second insulating layer 172 and then patterning the second gate conductive film.

[0181] The third insulating layer 173 may be made of silicon oxide (SiO x ) film, silicon nitride (SiN x ) film or a multilayer film thereof is formed on the second gate conductive layer 120. The third insulating layer 173 can be formed by chemical vapor deposition.

[0182] A first source / drain conductive film may be deposited on one surface of the third insulating layer 173 and then patterned to form a first source electrode 131 , a first drain electrode 132 , a second source electrode 133 , a second drain electrode 134 , a data wiring 135 , and a first power wiring 136 .

[0183] The fourth insulating layer 174 may be made of silicon oxide (SiO x ) film, silicon nitride (SiN x ) film or a multilayer film thereof is formed on the first source / drain conductive layer 130. The fourth insulating layer 174 may be formed by chemical vapor deposition.

[0184] The first connection electrode 141 may be formed by depositing a second source / drain conductive film on one surface of the fourth insulating layer 174 and then patterning the second source / drain conductive film.

[0185] Reference Figure 9 , a fifth insulating film 175_1 may be formed on the second source / drain conductive layer 140. The fifth insulating film 175_1 may be formed of an organic film such as acrylic resin, epoxy resin, phenol resin, polyamide resin, polyimide resin, or the like.

[0186] Reference Figure 10 , the surfaces of the first connection electrode 141 and the fifth insulating film 175_1 may be planarized by a chemical mechanical polishing (CMP) process to form the fifth insulating layer 175. Since the difference in level between the first connection electrode 141 and the fifth insulating layer 175 may be removed by the polishing process, reflection of external light due to the difference may be prevented, thereby improving the display quality of a displayed image.

[0187] Reference Figure 11 , an anode electrode 151 is formed on the fifth insulating layer 175. The anode electrode 151 may be formed of a metal material having high reflectivity, such as a stack structure of aluminum (Al) and titanium (Ti) (Ti / Al / Ti), a stack structure of Al and ITO (ITO / Al / ITO), an APC alloy, a stack structure of an APC alloy and ITO (ITO / APC / ITO), etc.

[0188] Since the anode electrode 151 can directly contact the first connection electrode 141, a separate contact hole formation process can be omitted. Therefore, the number of masks required to provide contact holes for contact between the first connection electrode 141 and the anode electrode 151 can be reduced. This can also reduce the cost and complexity of the manufacturing process.

[0189] Since the anode electrode 151 may be deposited on the planarized surfaces of the first connection electrode 141 and the fifth insulating layer 175 , the anode electrode 151 may be formed with a uniform thickness, thereby further improving the display quality of an image to be displayed.

[0190] Reference Figure 12 , a pixel defining layer 177, an organic light emitting layer EL, and a cathode electrode 161 may be formed on the anode electrode 151 to complete a display device such as Figure 3 The display device 1 shown in FIG.

[0191] The pixel defining layer 177 may be formed to partially cover the anode electrode 151, thereby dividing the pixel PX. The pixel defining layer 177 may be formed by forming an organic layer including at least one organic material selected from the group consisting of benzocyclobutene (BCB), polyimide (PI), polyamide (PA), acrylic resin, and phenolic resin, and then patterning the organic layer through exposure and development processes.

[0192] The cathode electrode 161 may be formed of a transparent conductive material (TCO) that can transmit light, such as ITO or IZO, or a semi-transmissive conductive material, such as magnesium (Mg), silver (Ag), or an alloy of Mg and Ag.

[0193] As described above, the method of manufacturing a display device can enable the anode electrode 151 and the first connection electrode 141 to directly contact each other. As a result, a separate contact hole formation process that was originally intended for such direct contact can be omitted. Therefore, the cost and complexity of the manufacturing process can be reduced.

[0194] While the invention has been shown and described with reference to embodiments thereof, it will be apparent to those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the disclosure and claims.

Claims

1. A display device, comprising: substrate; a first conductive layer, disposed on the substrate; a first insulating layer disposed on the first conductive layer, the first insulating layer comprising a contact hole exposing the first conductive layer; a second conductive layer disposed on the first insulating layer and electrically connected to the first conductive layer through the contact hole; a second insulating layer, disposed on the first insulating layer; a first electrode, disposed on the second insulating layer and the second conductive layer, the first electrode being electrically connected to the second conductive layer; a light-emitting layer, disposed on the first electrode; as well as a second electrode disposed on the light-emitting layer, wherein the average distance between the upper surface of the second conductive layer and the surface of the substrate is equal to the average distance between the upper surface of the second insulating layer and the surface of the substrate, wherein the sidewalls of the second insulating layer and the second conductive layer overlap at a boundary region between the second insulating layer and the second conductive layer, and The bottom surface of the second conductive layer facing the substrate is in contact with the first insulating layer.

2. The display device according to claim 1, wherein The upper surface of the second insulating layer extends together with the upper surface of the second conductive layer in a thickness direction to be coplanar.

3. The display device according to claim 1, wherein The first electrode and the second conductive layer are in direct contact with each other.

4. The display device according to claim 1, wherein The thickness of the second conductive layer is the same as the thickness of the second insulating layer.

5. The display device according to claim 4, wherein The thickness of the second insulating layer is smaller than the thickness of the first insulating layer. The display device according to claim 4 , wherein: The substrate includes a display area and a non-display area, The display device further includes: a plurality of data lines arranged across the display area and the non-display area; and a plurality of connection lines arranged in the display area and the non-display area, the plurality of connection lines being respectively connected to the plurality of data lines.

7. The display device according to claim 6, further comprising: The third conductive layer is disposed on the first conductive layer and the second conductive layer, wherein the second conductive layer includes the plurality of connection lines, and the first conductive layer includes the plurality of data lines.

8. The display device according to claim 7, further comprising: A third insulating layer is arranged between the first electrode and the second insulating layer, wherein an average distance between an upper surface of the third conductive layer and the surface of the substrate is equal to an average distance between an upper surface of the third insulating layer and the surface of the substrate.

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