A variable gain amplifier suitable for biomedical signal acquisition analog front end

Abstract

The present invention discloses a variable gain amplifier suitable for a biomedical signal acquisition analog front end, comprising capacitors C1 and C2, NMOS tubes M1, M2, M5 and M6, PMOS tubes M3, M4 and M5. FB1 、M FB2 、M FB3 、M FB4 , resistor R cm1 , R cm2 , Rs, current source I L1 ,I L2 , and transconductance amplifiers A1 and A2. NMOS tubes M1 and M2 are used as input tubes, PMOS tubes M3 and M4 are used as active loads, and resistor Rcm not only outputs common mode voltage Vcm for the circuit, but also adjusts the gate voltage and output voltage Vout of PMOS tubes M3 and M4 at the same time. PMOS tubes MFB1 and MFB2 and transconductance amplifier A1 convert the output voltage into a small signal current output and are connected to the gates of NMOS tubes M5 and M6 to form a negative feedback network. The present invention can achieve higher loop gain and lower total harmonic distortion, and has better linearity. Within the range of input signal amplitude of 0 to 30 mV, the total harmonic distortion corresponding to the maximum input signal amplitude is not greater than 0.5%.

Description

Technical Field

[0001] The present invention relates to the technical field of integrated circuit design, and in particular to a variable gain amplifier suitable for a biomedical signal acquisition analog front end. Background Art

[0002] With the development of microelectronics technology, medical equipment is rapidly developing towards portability. How to effectively extract biomedical signals is the focus and difficulty of portable device research. The basic structure of the biomedical signal acquisition analog front end is shown in the attached figure. Figure 1 As shown. The AC coupled capacitor feedback amplifier amplifies and filters the signal obtained from the sensor, and can suppress baseline drift. Considering that biomedical signals are low-frequency, low-amplitude signals, the low cutoff point needs to be set at a lower frequency point (0.5Hz). In order to achieve a large time constant, a pseudo-resistance structure Rpseu is used in the analog front end. The MOS tube in the pseudo-resistance structure works in the sub-threshold region, and the pseudo-resistance value can reach 10 12 Ω or more. After being amplified by the OTA amplifier, the biomedical signal enters the variable gain amplifier (VGA), which changes the gain according to the input signal amplitude to maintain a fairly constant output voltage range, and sends the signal to the buffer amplifier for amplification after gain amplification. After that, the ADC converts the analog signal into a digital signal output, and then goes through a series of DSP (digital signal processing calculations) to obtain the required biomedical signal.

[0003] In the analog front end, the variable gain amplifier plays a role in changing the gain, stabilizing the output signal, and ensuring the circuit's large bandwidth, low power consumption, and high linearity requirements. Currently, the widely used variable gain amplifiers are Figure 2 As shown in (a) and (b), both variable gain amplifiers are variable gain amplifiers with source negative feedback Rs, and both can change the gain by changing the resistance value of Rs. However, since the loop gain of these two variable gain amplifiers is relatively low, the linearity of these two variable gain amplifiers is relatively low. Summary of the invention

[0004] The present invention aims to solve the problem of low linearity and loop gain of the existing variable gain amplifier, and provides a variable gain amplifier suitable for a biomedical signal acquisition analog front end.

[0005] To solve the above problems, the present invention is achieved through the following technical solutions:

[0006] A variable gain amplifier suitable for biomedical signal acquisition analog front end, comprising capacitors C1, C2, NMOS tubes M1, M2, M5, M6, PMOS tubes M3, M4, M5, M6,FB1 、M FB2 、M FB3 、M FB4 , resistor R cm1 , R cm2 , Rs, current source I L1 ,I L2 , and transconductance amplifiers A1 and A2. The gate of NMOS tube M1 forms the positive input terminal V of the variable gain amplifier. in+ The source of the NMOS tube M1, one end of the resistor Rs and the drain of the NMOS tube M5 are connected; the drain of the NMOS tube M1, the drain of the PMOS tube M3, the resistor R cm1 One end of the PMOS tube M FB1 The gate of the variable gain amplifier is connected to one end of the capacitor C1 to form the positive output terminal V out+ The gate of PMOS tube M2 forms the negative input terminal V of the variable gain amplifier. in -; The source of the PMOS tube M2, the other end of the resistor Rs and the drain of the NMOS tube M6 are connected; the drain of the PMOS tube M2, the drain of the PMOS tube M4, the resistor R cm2 One end of the PMOS tube M FB2 The gate of the variable gain amplifier is connected to one end of the capacitor C2 to form the negative output terminal V out -. The positive input terminal of the transconductance amplifier A1 and the positive input terminal of the transconductance amplifier A2 are connected to the voltage VB; the PMOS tube M FB1 The drain of PMOS tube M FB3 The source of the PMOS tube M is connected to the negative input terminal of the transconductance amplifier A1; FB2 The drain of PMOS tube M FB4 The source of the PMOS tube M is connected to the negative input terminal of the transconductance amplifier A2; FB3 The gate of the PMOS tube M is connected to the output end of the transconductance amplifier A1; FB4 The gate of the PMOS tube M3, the gate of the PMOS tube M4, and the resistor R cm1 One end and resistor R cm2 One end of the PMOS tube M FB3 The drain of the NMOS tube M5, the gate of the NMOS tube M5 and the current source I L1 One end of the PMOS tube M FB4 The drain of the NMOS tube M6, the gate of the NMOS tube M6 and the current source I L2 The source of the PMOS tube M3, the source of the PMOS tube M4, and the source of the MOS tube M FB1 The source and PMOS tube M FB2The source of the NMOS tube M5, the source of the NMOS tube M6, the other end of the capacitor C1, the other end of C2, the current source I L1 The other end and the current source I L2 The other end is grounded.

[0007] In the above scheme, capacitors C1 and C2 are of the same type, and resistor R cm1 and R cm2 The models of NMOS tubes M1 and M2 are the same, the models of NMOS tubes M5 and M6 are the same, the models of PMOS tubes M3 and M4 are the same, and the models of PMOS tubes M FB1 and M FB2 The same model, PMOS tube M FB3 and M FB4 The model is the same as the current source I L1 and I L2 The same model.

[0008] In the above scheme, the transconductance amplifier A1 and the transconductance amplifier A2 have the same structure, and both include NMOS tubes M9, M10, M11, M12, PMOS tubes M7, M8, M13, M14, M15, M16, and a current source I L3 The gate of PMOS tube M7 forms the positive input terminal V of the transconductance amplifier. in+ The gate of the PMOS tube M8 forms the negative input terminal V of the transconductance amplifier. in- The drain of the PMOS tube M7, the gate and drain of the NMOS tube M10 and the gate of the NMOS tube M9 are connected; the drain of the PMOS tube M8, the gate and drain of the NMOS tube M11 and the gate of the NMOS tube M12 are connected. The source of the PMOS tube M7 is connected to the substrate, the source of the PMOS tube M8 is connected to the substrate and the drain of the PMOS tube M16; the drain of the NMOS tube M12 is connected to the drain of the PMOS tube to form the output terminal V of the transconductance amplifier. out The drain of the NMOS tube M9, the drain and gate of the PMOS tube M13 and the gate of the PMOS tube M14 are connected; the gate and drain of the PMOS tube M16, the gate and drain of the PMOS tube M15 and the current source I L3 The source of the PMOS tube M13, the source of the PMOS tube M14, the source of the PMOS tube M15 and the source of the PMOS tube M16 are connected to the power supply voltage V DD The source of the NMOS tube M9, the source of the NMOS tube M10, the source of the NMOS tube M11, the source of the NMOS tube M12 and the current source I L3 The other end is grounded.

[0009] In the above solution, the PMOS tubes M7 and M8 are of the same model, the PMOS tubes M13 and M14 are of the same model, the PMOS tubes M15 and M16 are of the same model, and the NMOS tubes M9, M10, M11 and M12 are of the same model.

[0010] Compared with the prior art, the variable gain amplifier of the present invention can achieve higher loop gain and lower total harmonic distortion, and has better linearity. Within the input signal amplitude range of 0 to 30 mV, the total harmonic distortion corresponding to the maximum input signal amplitude is no more than 0.5%. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] Figure 1 The basic block diagram of the analog front end for existing biomedical signal acquisition;

[0012] Figure 2 (a) and (b) are circuit diagrams of two existing variable gain amplifiers;

[0013] Figure 3 The circuit diagram of the variable gain amplifier of the present invention applicable to the biomedical signal acquisition analog front end;

[0014] Figure 4 for Figure 3 Circuit diagram of the medium transconductance amplifiers A1 and A2;

[0015] Figure 5 This is a comparison chart of total harmonic distortion curves;

[0016] Figure 6 The following is a comparison chart of the dual-frequency test results. DETAILED DESCRIPTION

[0017] In order to make the objectives, technical solutions and advantages of the present invention more clearly understood, the present invention is further described in detail below in combination with specific examples and with reference to the accompanying drawings.

[0018] A variable gain amplifier suitable for biomedical signal acquisition analog front end, the overall circuit architecture of which is as follows Figure 3 As shown, the circuit includes: capacitors C1, C2, NMOS tubes M1, M2, M5, M6, PMOS tubes M3, M4, M FB1 、M FB2 、M FB3 、M FB4 , resistor R cm1 , R cm2 , Rs, current source I L1 ,I L2 , and transconductance amplifiers A1 and A2. The gate of NMOS tube M1 forms the positive input terminal V of the variable gain amplifier. in+The source of NMOS tube M1, one end of resistor Rs and the drain of NMOS tube M5 are connected. The drain of NMOS tube M1, the drain of PMOS tube M3, the resistor R cm1 One end of the PMOS tube M FB1 The gate of the variable gain amplifier is connected to one end of the capacitor C1 to form the positive output terminal V out+ The gate of PMOS tube M2 forms the negative input terminal V of the variable gain amplifier. in -. The source of the PMOS tube M2, the other end of the resistor Rs and the drain of the NMOS tube M6 are connected. The drain of the PMOS tube M2, the drain of the PMOS tube M4, the resistor R cm2 One end of the PMOS tube M FB2 The gate of the variable gain amplifier is connected to one end of the capacitor C2 to form the negative output terminal V out -. The positive input terminal of the transconductance amplifier A1 and the positive input terminal of the transconductance amplifier A2 are connected to the voltage VB. FB1 The drain of PMOS tube M FB3 The source of the PMOS tube M is connected to the negative input terminal of the transconductance amplifier A1. FB2 The drain of PMOS tube M FB4 The source of the PMOS tube M is connected to the negative input terminal of the transconductance amplifier A2. FB3 The gate of the PMOS tube M is connected to the output terminal of the transconductance amplifier A1. FB4 The gate of the PMOS tube M3, the gate of the PMOS tube M4, and the resistor R cm1 One end and resistor R cm2 One end of the PMOS tube M FB3 The drain of the NMOS tube M5, the gate of the NMOS tube M5 and the current source I L1 One end of the PMOS tube M FB4 The drain of the NMOS tube M6, the gate of the NMOS tube M6 and the current source I L2 The source of the PMOS tube M3, the source of the PMOS tube M4, and the source of the MOS tube M FB1 The source and PMOS tube M FB2 The source of the NMOS tube M5, the source of the NMOS tube M6, the other end of the capacitor C1, the other end of C2, the current source I L1 The other end and the current source I L2 The other end is grounded. The capacitors C1 and C2 are of the same model, and the resistor R cm1 and R cm2 The models of NMOS tubes M1 and M2 are the same, the models of NMOS tubes M5 and M6 are the same, the models of PMOS tubes M3 and M4 are the same, and the models of PMOS tubes M FB1 and MFB2 The same model, PMOS tube M FB3 and M FB4 The model is the same as the current source I L1 and I L2 The same model.

[0019] The structures of the above transconductance amplifiers A1 and A2 are the same, and their circuit structures are as follows: Figure 4 As shown, the circuit includes: NMOS tubes M9, M10, M11, M12, PMOS tubes M7, M8, M13, M14, M15, M16, and a current source I L3 The gate of PMOS tube M7 forms the positive input terminal V of the transconductance amplifier. in+ -. The gate of PMOS tube M8 forms the negative input terminal V of the transconductance amplifier in- The drain of the PMOS tube M7, the gate and drain of the NMOS tube M10 and the gate of the NMOS tube M9 are connected. The drain of the PMOS tube M8, the gate and drain of the NMOS tube M11 and the gate of the NMOS tube M12 are connected. The source of the PMOS tube M7 is connected to the substrate, the source of the PMOS tube M8 is connected to the substrate and the drain of the PMOS tube M16. The drain of the NMOS tube M12 is connected to the drain of the PMOS tube to form the output terminal V of the transconductance amplifier. out The drain of the NMOS tube M9, the drain and gate of the PMOS tube M13 and the gate of the PMOS tube M14 are connected. The gate of the PMOS tube M16, the gate and drain of the PMOS tube M15 and the current source I L3 The source of the PMOS tube M13, the source of the PMOS tube M14, the source of the PMOS tube M15 and the source of the PMOS tube M16 are connected to the power supply voltage V DD The source of the NMOS tube M9, the source of the NMOS tube M10, the source of the NMOS tube M11, the source of the NMOS tube M12 and the current source I L3 The other end is grounded. Among them, the PMOS tubes M7 and M8 are of the same model, the PMOS tubes M13 and M14 are of the same model, the PMOS tubes M15 and M16 are of the same model, and the NMOS tubes M9, M10, M11 and M12 are of the same model.

[0020] Figure 2 The variable gain amplifier shown in (a) can change the gain of the amplifier by adjusting the resistance of the negative feedback resistor Rs. As can be seen from equation (1), the negative feedback resistor Rs not only increases the loop gain of the amplifier to gm 1,2 Rs, and also improves the linearity of the amplifier.

[0021]

[0022] Figure 2 (a) shows a variable gain amplifier, whose source is connected to two tail power supplies I L The purpose is to reduce the DC voltage difference between the two ends of the resistor Rs. However, this circuit structure has some problems, that is, the noise of the circuit will be higher than that without the negative feedback resistor Rs. Because there is no negative feedback resistor Rs, the tail power supply I L The noise is output as a common-mode signal, and with the negative feedback resistor Rs, each tail power supply will generate some noise. L The impedance looking into the source of M1 and the negative feedback resistor Rs is 1 / gm1,2 and Rs+1 / gm1,2 respectively, so the output reference current noise is equal to:

[0023]

[0024] Figure 2 The design idea of ​​the variable gain amplifier shown in (b) is to increase the loop gain by adding an additional feedback path through the negative feedback resistor Rs. The gate of the PMOS tube MFB is connected to the output and feeds the small signal current back to the source of the input tubes M1 and M2. Its loop gain is:

[0025]

[0026] Because of the negative feedback, Figure 2 (b) The variable gain amplifier ratio Figure 2 (a) The variable gain amplifier has lower common-mode impedance, so no additional common-mode feedback loop is required. However, due to the addition of the PMOS tube MFB, the circuit noise will increase slightly compared to before. Because the operating point of the transistor changes with the input signal, the distortion of the output signal increases as the amplitude of the input signal increases. As the amplitude of the input signal increases, the total harmonic distortion also increases. Because Figure 2 The variable gain amplifier of (a) has low loop gain, so its linearity is not good. Figure 2 (b) The variable gain amplifier is good, the total harmonic distortion ratio Figure 2 (b) The variable gain amplifier is high.

[0027] In the variable gain amplifier structure of the present invention, NMOS tubes M1 and M2 are used as input tubes, PMOS tubes M3 and M4 are used as active loads, and the resistor Rcm not only outputs the common mode voltage Vcm for the circuit, but also adjusts the gate voltage and output voltage Vout of the PMOS tubes M3 and M4 at the same time. The PMOS tubes MFB1 and MFB2 and the transconductance amplifier A1 convert the output voltage into a small signal current output and connect it to the gate of the NMOS tubes M5 and M6 to form a negative feedback network. The loop gain is:

[0028] LG=A1·(gmro)1(gmro) FB1 (gmro) FB2 (gmro)5 (4)

[0029] It can be seen from formula (4) that the loop gain of the present invention is increased to A1 times, which is much higher than Figure 2 Since the loop gain of the present invention is much greater than Figure 2 (b), so the distortion of the circuit will be reduced, as shown in equation (5):

[0030]

[0031] The feasibility of the present invention is verified by simulating technical parameters using Cadence Spectre simulation design environment and TSMC 0.18um.

[0032] Figure 5 The variable gain amplifier of the present invention and Figure 2 (a) and (b) are comparison diagrams of the total harmonic distortion curves of the conventional variable gain amplifier. When the input signal amplitude is in the range of 0 to 30 mV, the total harmonic distortion of the variable gain amplifier of the present invention at the maximum signal amplitude is only 0.44%. Figure 2 The total harmonic distortion of the variable gain amplifiers of (a) and (b) at the maximum signal amplitude is 4.6% and 2.8% respectively. For a high-sensitivity biomedical signal acquisition analog front end, the total harmonic distortion corresponding to the maximum input signal amplitude should be less than 2.5%. Obviously, the linearity of the traditional variable gain amplifier does not meet the requirements of the biomedical signal acquisition analog front end. The variable gain amplifier of the present invention can achieve higher loop gain and lower total harmonic distortion, and has better linearity. In the input signal amplitude range of 0 to 30mV, the total harmonic distortion corresponding to the maximum input signal amplitude is no more than 0.5%.

[0033] Figure 6 The variable gain amplifier of the present invention and Figure 2 (b) shows the comparison of the results of the dual-frequency test of the conventional variable gain amplifier. The input signals are 9.5kHz and 10.5kHz respectively. At the frequency of 11.5kHz, it can be seen that the variable gain amplifier of the present invention is better than that of the conventional variable gain amplifier. Figure 2 (b) The third-order harmonic distortion of the variable gain amplifier is reduced by 14dB.

[0034] It should be noted that although the embodiments of the present invention described above are illustrative, they are not intended to limit the present invention, and therefore the present invention is not limited to the above specific embodiments. Without departing from the principles of the present invention, any other embodiments obtained by those skilled in the art under the guidance of the present invention are deemed to be within the protection of the present invention.

Claims

1. A variable gain amplifier suitable for biomedical signal acquisition analog front end, characterized in that: Including capacitor C 1. C 2, NMOS tubes M1, M2, M5, M6, PMOS tubes M3, M4, M FB1 、M FB2 、M FB3 、M FB4 ,resistance R cm1 , R cm2 , R s, current source I L1 , I L2 , and transconductance amplifiers A1 and A2; The gate of NMOS tube M1 forms the positive input terminal of the variable gain amplifier V in+ ; Source of NMOS tube M1, resistor R One end of s is connected to the drain of NMOS tube M5; the drain of NMOS tube M1, the drain of PMOS tube M3, and the resistor R cm1 One end of the PMOS tube M FB1 The gate and capacitance C 1 is connected to form the positive output terminal of the variable gain amplifier V out+ ; The gate of PMOS tube M2 forms the negative input terminal of the variable gain amplifier V in- ; Source of PMOS tube M2, resistor R The other end of s is connected to the drain of NMOS tube M6; the drain of PMOS tube M2, the drain of PMOS tube M4, and the resistor R cm2 One end of the PMOS tube M FB2 The gate and capacitance C 2 is connected to form the negative output terminal of the variable gain amplifier V out- ; The positive input terminal of the transconductance amplifier A1 and the positive input terminal of the transconductance amplifier A2 are connected to the voltage VB; the PMOS tube M FB1 The drain of PMOS tube M FB3 The source of the PMOS tube M is connected to the negative input terminal of the transconductance amplifier A1; FB2 The drain of PMOS tube M FB4 The source of the PMOS tube M is connected to the negative input terminal of the transconductance amplifier A2; FB3 The gate of the PMOS tube M is connected to the output end of the transconductance amplifier A1; FB4 The gate is connected to the output terminal of the transconductance amplifier A2; The gate of PMOS tube M3, the gate of PMOS tube M4, and the resistor R cm1 One end and resistor R cm2 One end of the PMOS tube M FB3 The drain of NMOS tube M5 and the current source I L1 One end of the PMOS tube M FB4 The drain of NMOS tube M6, the gate of NMOS tube M6 and the current source I L2 One end of and connected to; The source of the PMOS tube M3, the source of the PMOS tube M4, and the source of the MOS tube M FB1 The source and PMOS tube M FB2 The source of the NMOS tube M5, the source of the NMOS tube M6, and the capacitor C The other end of 1, capacitor C The other end of 2, current source I L1 The other end and current source I L2 The other end is grounded.

2. A variable gain amplifier suitable for biomedical signal acquisition analog front end according to claim 1, characterized in that: capacitance C 1 and C 2 are the same model, the resistance R cm1 and R cm2 The models of NMOS tubes M1 and M2 are the same, the models of NMOS tubes M5 and M6 are the same, the models of PMOS tubes M3 and M4 are the same, and the models of PMOS tubes M FB1 and M FB2 The same model, PMOS tube M FB3 and M FB4 The same model, current source I L1 and I L2 The same model.

3. A variable gain amplifier suitable for biomedical signal acquisition analog front end according to claim 1, characterized in that: The transconductance amplifier A1 and the transconductance amplifier A2 have the same structure, both including NMOS tubes M9, M10, M11, M12, PMOS tubes M7, M8, M13, M14, M15, M16, and current source I L3 ; The gate of PMOS tube M7 forms the positive input terminal of the transconductance amplifier. V in+ The gate of the PMOS tube M8 forms the negative input terminal of the transconductance amplifier. V in- connected; The drain of the PMOS tube M7, the gate and drain of the NMOS tube M10 and the gate of the NMOS tube M9 are connected; the drain of the PMOS tube M8, the gate and drain of the NMOS tube M11 and the gate of the NMOS tube M12 are connected; The source of the PMOS tube M7 is connected to the substrate, the source of the PMOS tube M8 is connected to the substrate and the drain of the PMOS tube M16; the drain of the NMOS tube M12 is connected to the drain of the PMOS tube to form the output end of the transconductance amplifier. V out ; The drain of the NMOS tube M9, the drain and gate of the PMOS tube M13 and the gate of the PMOS tube M14 are connected; the gate of the PMOS tube M16, the gate and drain of the PMOS tube M15 and the current source I L3 One end is connected; The source of the PMOS tube M13, the source of the PMOS tube M14, the source of the PMOS tube M15 and the source of the PMOS tube M16 are connected to the power supply voltage V DD ; The source of the NMOS tube M9, the source of the NMOS tube M10, the source of the NMOS tube M11, the source of the NMOS tube M12 and the current source I L3 The other end is grounded.

4. A variable gain amplifier suitable for biomedical signal acquisition analog front end according to claim 3, characterized in that: The PMOS tubes M7 and M8 are of the same model, the PMOS tubes M13 and M14 are of the same model, the PMOS tubes M15 and M16 are of the same model, and the NMOS tubes M9, M10, M11 and M12 are of the same model.

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