Current Sensor Test System

Abstract

The present invention provides a current sensor testing system, which includes: a signal generator that outputs a pulse signal; a current generating circuit connected to a first node A, which outputs a corresponding pulse current based on the pulse signal; a current-carrying conductor connected between a third node E and a fourth node F, wherein a reference current sensor and a current sensor to be measured are connected in series on the current-carrying conductor; a switching network connected between the first node A, the second node B, the third node E and the fourth node F, which is configured to control the direction of the current flowing through the current-carrying conductor; a first detection unit for collecting the output of the reference current sensor; and a second detection unit for collecting the output of the current sensor to be measured. In this way, the present invention uses a pulse current as the current to be measured, greatly suppressing the generation of Joule heat, thereby ensuring the stability of the testing system and improving the testing accuracy.

Description

Technical Field

[0001] The present invention relates to the field of testing, and in particular, to a current sensor testing system based on pulsed current.

Background Art

[0002] Traditional current sensor testing systems generate a constant current through a DC power supply, which has two drawbacks: on the one hand, it has high requirements for the driving ability of the DC power supply; on the other hand, in the case of large currents, a large amount of Joule heat will be generated, thus affecting the stability of the system.

[0003] Therefore, it is necessary to propose a technical solution to overcome the above problems.

Summary of the Invention

[0004] One object of the present invention is to provide a current sensor testing system, which uses pulsed current as the measured current, greatly suppressing the generation of Joule heat, thus ensuring the stability of the testing system and improving the testing accuracy.

[0005] According to one aspect of the present invention, there is provided a current sensor testing system, comprising: a signal generator that outputs a pulsed signal; a current generation circuit connected to a first node A, which outputs a corresponding pulsed current based on the pulsed signal, and the magnitude of the pulsed current is related to the amplitude of the pulsed signal; a current-carrying conductor connected between a third node E and a fourth node F, wherein a reference current sensor and a current sensor to be measured are connected in series on the current-carrying conductor; a switching network connected between the first node A, the second node B, the third node E, and the fourth node F, which is configured to control the direction of the current flowing through the current-carrying conductor; a first detection unit for collecting the output of the reference current sensor; and a second detection unit for collecting the output of the current sensor to be measured.

[0006] Compared with the prior art, in the current sensor testing system of the present invention, a pulsed current is controlled to be generated by a signal generator, and this pulsed current serves as the measured current flowing through the reference current sensor and the current sensor to be measured, greatly suppressing the generation of Joule heat, thus ensuring the stability of the testing system and improving the testing accuracy.

Description of the Drawings

[0007] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for the description of the embodiments will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the present invention, and those of ordinary skill in the art can also obtain other drawings based on these drawings without creative efforts. Among them:

[0008] Figure 1Schematic structural diagram of the current sensor test system in one embodiment of the present invention;

[0009] Figure 2 is Figure 1 Timing sequence of signals at each port of the current sensor test system shown in the case of generating a positive current in one embodiment.

[0010] Figure 3 Dependency curve of the output of the current sensor under test measured by the typical current sensor test system in the present invention with respect to the current obtained by the reference current sensor.

Specific Embodiments

[0011] To make the above objects, features, and advantages of the present invention more obvious and understandable, the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0012] As used herein, the term "one embodiment" or "embodiment" refers to a specific feature, structure, or characteristic that may be included in at least one implementation of the present invention. The appearances of "in one embodiment" in different places in this specification do not all refer to the same embodiment, nor are they separate or alternative embodiments that exclude each other. Unless otherwise specified, the words indicating electrical connection such as "connected", "coupled", and "joined" herein all mean direct or indirect electrical connection.

[0013] Please refer to Figure 1 shown, which is the schematic structural diagram 100 of the current sensor test system in one embodiment of the present invention. Figure 1 The current sensor test system 100 shown includes a signal generator 101, a current generation circuit 108, a first detection unit 102, a second detection unit 103, a switch network 107 for controlling the current direction, a reference current sensor 104, a current sensor under test 105, and a current-carrying conductor 106.

[0014] Among them, the signal generator 101 outputs a pulse signal through its output terminal Output; the output terminal of the current generation circuit 108 is connected to the first node A, and it outputs a corresponding pulse current based on the pulse signal, and the magnitude of the pulse current is related to the amplitude of the pulse signal. The first detection unit 102 is used to collect the output of the reference current sensor 104; the second detection unit 103 is used to collect the output of the current sensor to be measured 105; the current-carrying conductor 106 is connected between the third node E and the fourth node F, and the reference current sensor 104 and the current sensor to be measured 105 are connected in series on the current-carrying conductor 106. The switch network 107 is connected between the first node A, the second node B, the third node E and the fourth node F, and is used to control the direction of the current flowing through the current-carrying conductor 106. For example, flowing from the third node E to the fourth node F, that is, the positive current direction, or flowing from the fourth node F to the third node E, that is, the negative current direction. Based on the output of the first detection unit 102, the reference current (or true current) measured by the reference current sensor 104 is obtained, and based on the output of the second detection unit 103, the measured current measured by the current sensor to be measured 105 is obtained, and then the dependence relationship between the measured current and the reference current is obtained, such as Figure 3 As shown, that is, the dependence relationship curve of the output of the current sensor to be measured on the current obtained by the reference current sensor.

[0015] The current generation circuit 108 includes a power amplifier. The input terminal of the power amplifier is connected to the output terminal of the signal generator 101, receives the pulse signal output by the signal generator 101, the output terminal of the power amplifier is connected to the first node A, and the second node B is grounded. The output signal at the output terminal of the power amplifier is v O = Av I , where A is the gain of the power amplifier, v I is the pulse signal output by the signal generator 101, and the pulse current flowing through the current-carrying conductor 106 is I = v O / R = Av I / R, where R is the resistance between the output terminal of the power amplifier and the ground terminal, and the pulse current output by the current generation circuit passes through the first node A, the switch network 107 and flows through the current-carrying conductor 106.

[0016] The first detection unit 102 can be a first multimeter, and the second detection unit 103 can be a second multimeter.

[0017] In one embodiment, the switch network 107 operates in a first switch combination state or a second switch combination state. In the first switch combination state, the first node A is connected to the third node E, the first node A is disconnected from the fourth node F, the second node B is connected to the fourth node F, and the second node B is disconnected from the third node E. At this time, the current sensor test system 100 performs a positive current test, and the measured current flows from the third node E to the fourth node F. In the second switch combination state, the first node A is disconnected from the third node E, the first node A is connected to the fourth node F, the second node B is disconnected from the fourth node F, and the second node B is connected to the third node E. At this time, the current sensor test system 100 performs a negative current test, and the measured current flows from the fourth node F to the third node E.

[0018] Specifically, the switch network 107 includes a first switch connected between the first node A and the third node E, a second switch connected between the first node A and the fourth node F, a third switch connected between the second node B and the third node E, and a fourth switch connected between the second node B and the fourth node F. In the first switch combination state, the first switch is turned on, the second switch is turned off, the fourth switch is turned on, and the third switch is turned off. In the second switch combination state, the first switch is turned off, the second switch is turned on, the fourth switch is turned off, and the third switch is turned on. The switch network 107 is controlled by a first control signal V C1 and a second control signal V C2 to operate in the first switch combination state or the second switch combination state.

[0019] More specifically, the first switch is the first PMOS transistor PMOS1, the second switch is the second PMOS transistor PMOS2, the third switch is the second NMOS transistor NMOS2, and the fourth switch is the first NMOS transistor NMOS1. The drain of the first PMOS transistor PMOS1, the drain of the second NMOS transistor NMOS2, and the third node E are interconnected; the drain of the second PMOS transistor PMOS2, the drain of the first NMOS transistor NMOS1, and the fourth node F are interconnected; the sources of the first PMOS transistor PMOS1 and the second PMOS transistor PMOS2 are connected to the first node A; the sources of the first NMOS transistor NMOS1 and the second NMOS transistor NMOS2 are connected to the second node B. The switch network 107 further includes a first inverter INV1 and a second inverter INV2. The first control signal V C1 is respectively interconnected with the input terminal of the first inverter INV1 and the gate of the first NMOS transistor NMOS1, and the output terminal of the first inverter INV1 is interconnected with the gate of the first PMOS transistor PMOS1; the second control signal V C2They are respectively interconnected with the input terminal of the second inverter INV2 and the gate of the second NMOS transistor NMOS2, and the output terminal of the second inverter INV2 is interconnected with the gate of the second PMOS transistor PMOS2.

[0020] As Figure 2 (a), 2(b) shows, the first control signal V C1 is a pulse signal. When the second control signal V C2 is at a low level, the switching network 107 operates in the first switching combination state. When the first control signal V C1 is at a low level and the second control signal V C2 is a pulse signal, the switching network 107 operates in the second switching combination state. With reference to Figure 2 (c), the pulse signal output by the signal generator 101 is synchronized with the pulse signal of the control signal V C1 or V C2 .

[0021] In one embodiment, the synchronization terminal Sync of the signal generator 101 is interconnected with the external trigger terminal Ext Trig of the first detection unit 102 and the external trigger terminal Ext Trig of the second detection unit 103. The output terminal Output of the reference current sensor 104 is interconnected with the positive input terminal Input HI of the first detection unit 102, and its ground terminal GND is interconnected with the negative input terminal Input LO of the first detection unit 102. The output terminal Output of the current sensor under test 105 is interconnected with the positive input terminal Input HI of the second detection unit 103, and its ground terminal GND is interconnected with the negative input terminal Input LO of the second detection unit 103. When the current sensor test system performs a positive current test or a negative current test, the signal generator 101 outputs a pulse signal to the input terminal of the power amplifier 108, and its synchronization terminal Sync outputs a synchronization signal to the external trigger terminal Ext Trig of the first detection unit 102 and the external trigger terminal Ext Trig of the second detection unit 103 to trigger the first detection unit 102 to synchronously collect the output of the reference current sensor 104 and trigger the second detection unit 103 to synchronously collect the output of the current sensor under test 105.

[0022] When the current sensor test system 100 performs a positive current test, the waveforms of the pulse signals of the control signals V C1 and V C2 are as shown in Figure 2 (a) and 2(b), V C1 is a high-level pulse, V C2is at a low level. At this time, the first node A and the third node E are connected, the fourth node F and the second node B are connected, and the signal generator 101 outputs a pulse signal (the waveform is as Figure 2 (c)); the power amplifier 108 generates a pulse current based on the pulse signal (the pulse current generated based on the Figure 2 (e) pulse voltage). The pulse current flows through the third node E, the fourth node F to the ground terminal GND in sequence; at the same time, the signal generator 101 outputs a synchronization signal (as Figure 2 (d) shows), the first detection unit 102 synchronously collects the output of the reference current sensor 104, as Figure 2 (f); the second detection unit 103 synchronously collects the output of the current sensor 105 to be measured, as Figure 2 (g). Please refer to Figure 2 shown, which is the timing diagram 200 of the signals at each port of the current sensor test system 100 shown in Figure 1 in an embodiment when generating a positive current.

[0023] Specifically, when the first control signal V C1 is a high-level pulse and the second control signal V C2 is at a low level, the Output terminal (output terminal) of the signal generator 101 generates a pulse signal v I [as Figure 2 (c) shows], as the input signal of the power amplifier 108, the output signal of the output terminal Output of the power amplifier 108 is v O = Av I [as Figure 2 (e) shows], where A is the gain of the power amplifier 108, and the pulse current flowing into the current-carrying conductor 106 is I = v O / R = Av I / R, where R is the resistance between the output terminal of the power amplifier 108 and the ground terminal GND. The pulse current flows through the first PMOS transistor PMOS1, the third node E, the fourth node F and the first NMOS transistor NMOS1 in sequence, and finally flows into the ground terminal GND; the Sync terminal (synchronization terminal) of the signal generator 101 generates a synchronization signal [as Figure 2 (d) shows], as the Ext Trig (external trigger) of the first multimeter 102 and the second multimeter 103. After the trigger delay, the first multimeter 102 collects the output of the reference current sensor 104 [as Figure 2 (f) shows], and the second multimeter 103 collects the output of the current sensor 105 to be measured. The signal generator 101 can make pulse currents with different current values be formed on the current generation circuit 108 by controlling the amplitude of the output pulse signal v I .

[0024] When the current sensor test system 100 performs a negative current test, V C1 is at a low level, V C2 is a high-level pulse, and the switching network 107 connects the first node A and the fourth node F, and the third node E and the second node B; the signal generator 101 outputs a pulse signal; the power amplifier 108 generates a pulse current, and the pulse current flows through the fourth node F, the third node E to the ground terminal GND in sequence; the first detection unit 102 collects the output of the reference current sensor 104; the second detection unit 103 collects the output of the current sensor 105 to be measured.

[0025] More specifically, the process for the current sensor test system 100 to generate a negative current is as follows: the first control signal V C1 is at a low level, causing the first PMOS transistor PMOS1 and the first NMOS transistor NMOS1 to be in the cut-off state, and the second control signal V C2 is a high-level pulse, causing the second PMOS transistor PMOS2 and the second NMOS transistor NMOS2 to be in the conducting state; when the first control signal V C1 is at a low level and the second control signal V C2 is a high-level pulse, a pulse signal v I is generated at the Output terminal of the signal generator 101, and the output signal of the output terminal Output of the power amplifier 108 is v O = Av I [as shown in Figure 2 (e)], where A is the gain of the power amplifier 108, and the pulse current flowing into the current-carrying conductor 106 is I = v O / R = Av I / R, where R is the resistance between the output terminal of the power amplifier 108 and the ground terminal GND. The pulse current flows through the second PMOS transistor PMOS2, the fourth node F, the third node E, the second NMOS transistor NMOS2, and finally to the ground terminal GND; the Sync terminal (synchronization terminal) of the signal generator 101 generates a synchronization signal, which serves as the Ext Trig (external trigger) of the first multimeter 102 and the second multimeter 103. After the trigger delay, the first multimeter 102 collects the output of the reference current sensor 104, and the second multimeter 103 collects the output of the current sensor 105 to be measured.

[0026] The electrical connections between the first detection unit 102, the second detection unit 103, the signal generator 101, and the current generation circuit 108 can be achieved through coaxial cables.

[0027] The true current (or the measured current) can be obtained by referring to the output of the current sensor 104, thereby obtaining the dependence of the output of the current sensor 105 to be measured on the true current. Please refer to Figure 3 As shown, it is the dependence curve 300 of the output of the current sensor 105 to be measured on the current obtained by the reference current sensor 104, which is measured by a typical current sensor test system in the present invention, and it includes a part where the measured current is negative and a part where the measured current is positive.

[0028] Compared with the prior art, in the current sensor test system of the present invention, the signal generator 101 is used to control the power amplifier to generate a pulsed current. The positive and negative (or flow direction) of the pulsed current can be regulated by the switch network 107 that controls the current direction. The magnitude of the pulsed current can be controlled by the amplitude of the pulsed signal generated by the signal generator 101, which greatly suppresses the generation of Joule heat, thereby ensuring the stability of the test system and improving the test accuracy.

[0029] In the present invention, terms indicating electrical connection such as "connected", "linked", "joined", and "connected" mean direct or indirect electrical connection unless otherwise specified.

[0030] The above are only the preferred embodiments of the present invention, and the protection scope of the present invention is not limited to the above embodiments. Any equivalent modifications or changes made by those of ordinary skill in the art according to the disclosure of the present invention should be included in the protection scope recorded in the claims.

Claims

1. A current sensor test system, characterized in that, It includes: A signal generator, whose output terminal outputs a pulse signal; A current generating circuit, whose input terminal is connected to the output terminal of the signal generator, and whose output terminal is connected to the first node A. The current generating circuit outputs a corresponding pulse current based on the pulse signal, and the magnitude of the pulse current is related to the amplitude of the pulse signal; A current-carrying conductor connected between the third node E and the fourth node F, wherein a reference current sensor and a current sensor to be measured are connected in series on the current-carrying conductor; A switching network connected between the first node A, the second node B, the third node E and the fourth node F, which is configured to control the direction of the current flowing through the current-carrying conductor. The switching network operates in a first switching combination state or a second switching combination state. In the first switching combination state, the first node A and the third node E are connected, the first node A and the fourth node F are disconnected, the second node B and the fourth node F are connected, and the second node B and the third node E are disconnected. In the second switching combination state, the first node A and the third node E are disconnected, the first node A and the fourth node F are connected, the second node B and the fourth node F are disconnected, and the second node B and the third node E are connected; A first detection unit, whose input terminal is connected to the output terminal of the reference current sensor, and the first detection unit is used to collect the output of the reference current sensor; A second detection unit, whose input terminal is connected to the current sensor to be measured, and the second detection unit is used to collect the output of the current sensor to be measured.

2. The current sensor testing system according to claim 1, wherein Based on the output of the first detection unit, the reference current measured by the reference current sensor is obtained. Based on the output of the second detection unit, the measured current measured by the current sensor to be measured is obtained, and then the dependence relationship between the measured current and the reference current is obtained.

3. The current sensor test system according to claim 1, wherein The current generating circuit includes a power amplifier. The input terminal of the power amplifier is connected to the output terminal of the signal generator, receives the pulse signal output by the signal generator, the output terminal of the power amplifier is connected to the first node A, and the second node is grounded. The output signal at the output terminal of the power amplifier is v O = Av I , where A is the gain of the power amplifier, and v I is the pulse signal output by the signal generator. The pulse current flowing through the current-carrying conductor is I = v O / R = Av I / R, where R is the resistance between the output terminal of the power amplifier and the ground terminal The pulse current output by the current generating circuit flows through the current-carrying conductor through the first node A and the switching network.

4. The current sensor testing system according to claim 1, wherein The switching network includes a first switch connected between the first node A and the third node E, a second switch connected between the first node A and the fourth node F, a third switch connected between the second node B and the third node E, and a fourth switch connected between the second node B and the fourth node F. In the first switching combination state, the first switch is turned on, the second switch is turned off, the fourth switch is turned on, and the third switch is turned off. In the second switching combination state, the first switch is turned off, the second switch is turned on, the fourth switch is turned off, and the third switch is turned on. The switch network is controlled by a first control signal V C1 and a second control signal V C2 to operate in a first switch combination state or a second switch combination state.

5. The current sensor test system according to claim 4, wherein The first switch is the first PMOS transistor PMOS1, the second switch is the second PMOS transistor PMOS2, the third switch is the second NMOS transistor NMOS2, the fourth switch is the first NMOS transistor NMOS1. The drain of the first PMOS transistor PMOS1, the drain of the second NMOS transistor NMOS2, and the third node E are interconnected; the drain of the second PMOS transistor PMOS2, the drain of the first NMOS transistor NMOS1, and the fourth node F are interconnected; the sources of the first PMOS transistor PMOS1 and the second PMOS transistor PMOS2 are connected to the first node A; the sources of the first NMOS transistor NMOS1 and the second NMOS transistor NMOS2 are connected to the second node B.

6. The current sensor testing system according to claim 5, wherein The switching network further includes a first inverter INV1 and a second inverter INV2. The first control signal V C1 are respectively interconnected with the input terminal of the first inverter INV1 and the gate of the first NMOS transistor NMOS1, and the output terminal of the first inverter INV1 is interconnected with the gate of the first PMOS transistor PMOS1; The second control signal V C2 are respectively interconnected with the input terminal of the second inverter INV2 and the gate of the second NMOS transistor NMOS2, and the output terminal of the second inverter INV2 is interconnected with the gate of the second PMOS transistor PMOS2.

7. The current sensor test system according to claim 6, wherein The first control signal V C1 is a pulse signal. When the second control signal V C2 is at a low level, the switching network operates in the first switching combination state. When the first control signal V C1 is at a low level and the second control signal V C2 is a pulse signal, the switching network operates in the second switching combination state, and the pulse signal output by the signal generator is synchronized with the pulse signal of the control signal.

8. The current sensor test system according to claim 1, characterized in that The synchronization terminal of the signal generator is interconnected with the external trigger terminals of the first detection unit and the second detection unit. The output terminal of the reference current sensor is interconnected with the positive input terminal of the first detection unit, and its ground terminal GND is interconnected with the negative input terminal of the first detection unit; the output terminal of the current sensor under test is interconnected with the positive input terminal of the second detection unit, and its ground terminal GND is interconnected with the negative input terminal of the second detection unit.

9. The current sensor test system according to claim 8, wherein When the current sensor test system performs a positive current test or a negative current test, the signal generator outputs a pulse signal to the current generation circuit, and its synchronization terminal outputs a synchronization signal to the external trigger terminals of the first detection unit and the second detection unit to trigger the first detection unit to collect the output of the reference current sensor and trigger the second detection unit to collect the output of the current sensor under test.

10. The current sensor test system according to claim 1, wherein The magnitude of the current output by the current generation circuit is controlled by the amplitude of the pulse signal generated by the signal generator, and the direction of the current flowing through the current-carrying conductor is controlled by the switching network.

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