A polishing pad, a polishing apparatus, and a method for polishing a silicon wafer

Abstract

The present invention provides a polishing pad, a polishing apparatus and a method for polishing a silicon wafer. The polishing pad includes a polishing surface that contacts the silicon wafer, and at least one groove is formed in the polishing surface. The grooving position of the groove is such that when the silicon wafer is polished, at least a part of the edge of the silicon wafer is suspended above the groove. According to the polishing pad, the polishing apparatus and the method for polishing a silicon wafer of the present invention, the polishing rate of the whole wafer can be kept substantially unchanged, and only the polishing rate at the edge position of the silicon wafer can be reduced, thereby improving the flatness of the edge thickness of the silicon wafer and enhancing the product yield.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and more particularly to a polishing pad, a polishing apparatus, and a method for polishing a silicon wafer. Background Art

[0002] With the continuous development of IC (Integrated Circuit) technology, the semiconductor industry has increasingly higher requirements for silicon wafers. In order to prevent defocus during exposure, the flatness requirements for silicon wafers have become increasingly stringent.

[0003] The surface polishing of a silicon wafer often needs to be completed through two polishing steps: double-sided polishing (DSP) and front-side final polishing (FP). Double-sided polishing is used to grind both the front and back sides of the wafer, and the desired wafer shape can be achieved through the control of the polishing disc. The final polishing only polishes the front side of the silicon wafer.

[0004] For the final polishing process of a silicon wafer, the thickness control at the extreme edges is a difficult point in the process. During the polishing process, the polishing liquid is easily accumulated at the edges of the silicon wafer, resulting in a thinner thickness at the edges of the silicon wafer. With the existing conventional process equipment and process capabilities, it is often impossible to accurately adjust at the position of about 145 mm to 149 mm at the edges of the silicon wafer. Especially when keeping the polishing rate of the whole wafer basically unchanged and only reducing the polishing rate at the edge position of the silicon wafer, it is even more difficult to achieve by adjusting the existing process parameters.

[0005] The present invention provides a polishing pad and a method for polishing a silicon wafer to solve the problems in the prior art. Summary of the Invention

[0006] A series of simplified concepts are introduced in the Summary of the Invention section, which will be further detailed in the Detailed Description section. The Summary of the Invention section of the present invention does not mean to attempt to define the key features and essential technical features of the claimed technical solution, nor does it mean to attempt to determine the protection scope of the claimed technical solution.

[0007] To solve the problems in the prior art, an embodiment of the present invention provides a polishing pad for polishing a silicon wafer. The polishing pad includes a polishing surface in contact with the silicon wafer, and at least one groove is formed on the polishing surface. The grooving position of the groove is such that when polishing the silicon wafer, at least a part of the edge of the silicon wafer is suspended above the groove.

[0008] In one embodiment, the groove includes a first annular groove near the periphery of the polishing pad and a second annular groove near the center of the polishing pad.

[0009] In one embodiment, the distance between the inner edge of the first annular groove and the outer edge of the second annular groove is less than the diameter of the silicon wafer, and the distance between the outer edge of the first annular groove and the inner edge of the second annular groove is greater than or equal to the diameter of the silicon wafer.

[0010] In one embodiment, the polishing pad, the first annular groove, and the second annular groove are concentrically arranged.

[0011] In one embodiment, the width of the first annular groove is 3 mm to 8 mm, the depth is 0.5 mm to 2 mm, the outer edge radius is 335 mm to 340 mm, and the inner edge radius is 330 mm to 335 mm.

[0012] In one embodiment, the width of the second annular groove is 3 mm to 8 mm, the depth is 0.5 mm to 2 mm, the outer edge radius is 35 mm to 45 mm, and the inner edge radius is 30 mm to 40 mm.

[0013] Another aspect of the embodiments of the present invention provides a polishing device for polishing a silicon wafer, and the polishing device includes: the above-mentioned polishing pad;

[0014] A polishing pad driving device, the polishing pad is arranged on the polishing pad driving device, and the polishing pad driving device is used to drive the polishing pad to rotate;

[0015] A polishing head for fixing the silicon wafer, so that the front surface of the silicon wafer contacts the polishing surface of the polishing pad, and the edge of the silicon wafer is suspended above the groove of the polishing pad.

[0016] Another aspect of the embodiments of the present invention provides a polishing method for a silicon wafer, including:

[0017] Fixing the silicon wafer to be polished through the polishing head;

[0018] Driving the silicon wafer by the polishing head, so that the front surface of the silicon wafer contacts the polishing surface of the polishing pad, and the edge position of the silicon wafer is suspended above the groove of the polishing surface of the polishing pad;

[0019] Driving the polishing head and the polishing pad to rotate, so as to polish the front surface of the silicon wafer by the polishing pad.

[0020] In one embodiment, the polishing pad rotates in the same direction as the polishing head.

[0021] In one embodiment, the method further includes:

[0022] Adjusting the contact area between the edge of the silicon wafer and the groove by controlling the movement of the polishing head, so as to adjust the polishing rate of the edge position of the silicon wafer.

[0023] In one embodiment, controlling the movement of the polishing head includes:

[0024] Controlling the polishing head to reciprocate in the radial direction of the polishing pad.

[0025] According to the polishing pad, polishing equipment and polishing method of the silicon wafer of the present invention, the polishing rate of the whole wafer can be kept basically unchanged while only reducing the polishing rate at the edge position of the silicon wafer, thereby improving the flatness of the edge thickness of the silicon wafer and increasing the product yield. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] The following drawings of the present invention are used as part of the present invention to understand the present invention. The embodiments of the present invention shown in the drawings and their descriptions are used to explain the principles of the present invention.

[0027] In the drawings:

[0028] Figure 1 is a schematic structural diagram of a polishing pad according to an embodiment of the present invention;

[0029] Figure 2 is a schematic diagram of polishing a silicon wafer with a polishing pad according to an embodiment of the present invention;

[0030] Figure 3 is a cross-sectional view of a polishing pad and a silicon wafer according to an embodiment of the present invention;

[0031] Figure 4 is a schematic diagram of the dimensions of the grooves of a polishing pad according to an embodiment of the present invention;

[0032] Figure 5 is a movement trajectory diagram of the grooves relative to the edge position of the silicon wafer when polishing the silicon wafer with a polishing pad according to an embodiment of the present invention;

[0033] Figure 6 is a schematic diagram of a polishing apparatus according to an embodiment of the present invention;

[0034] Figure 7 is a schematic flowchart of a polishing method for a silicon wafer according to an embodiment of the present invention;

[0035] Figure 8 is a schematic diagram of the movement of the polishing head during the execution of the polishing method for a silicon wafer according to an embodiment of the present invention;

[0036] Figure 9 is a diagram of the relationship between the radius and the relative removal thickness of the silicon wafer when the edge of the silicon wafer enters different depths of the groove in the polishing method of the silicon wafer according to an embodiment of the present invention. DETAILED DESCRIPTION OF THE INVENTION

[0037] In the following description, numerous specific details are set forth in order to provide a more thorough understanding of the present invention. However, it will be apparent to one of ordinary skill in the art that the present invention may be practiced without one or more of these specific details. In other instances, well-known features have not been described in order to avoid obscuring the invention.

[0038] It should be understood that the present invention can be embodied in various forms and should not be construed as limited to the embodiments set forth herein. On the contrary, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. In the drawings, for the sake of clarity, the dimensions and relative dimensions of layers and regions may be exaggerated. Like reference numerals throughout the drawings denote like elements.

[0039] It should be understood that when an element or layer is referred to as being "on", "adjacent to", "connected to" or "coupled to" another element or layer, it can be directly on, adjacent to, connected or coupled to the other element or layer, or intervening elements or layers may be present. In contrast, when an element is referred to as being "directly on", "directly adjacent to", "directly connected to" or "directly coupled to" another element or layer, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc. may be used herein to describe various elements, components, regions, layers and / or sections, these elements, components, regions, layers and / or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Thus, a first element, component, region, layer or section discussed below may be denoted as a second element, component, region, layer or section without departing from the teachings of the present invention.

[0040] Spatial relationship terms such as "below", "beneath", "under", "underneath", "above", "over", etc. may be used herein for convenience in describing the relationship of one element or feature to another element or feature shown in the figures. It should be understood that, in addition to the orientation shown in the figures, spatial relationship terms are intended to encompass different orientations of the device in use and operation. For example, if the device in the figures is flipped, then an element or feature described as "below" or "beneath" or "under" another element or feature will be oriented "above" the other element or feature. Thus, the exemplary terms "below" and "beneath" can include both an upper and a lower orientation. The device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatial descriptors used herein are to be interpreted accordingly.

[0041] The purpose of the terms used herein is only to describe specific embodiments and is not a limitation of the present invention. As used herein, the singular forms "a", "an" and "the" are also intended to include the plural forms unless the context clearly dictates otherwise. It should also be understood that the terms "comprising" and / or "including", when used in this specification, specify the presence of the stated features, integers, steps, operations, elements and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or groups. As used herein, the term "and / or" includes any and all combinations of the related listed items.

[0042] To solve the problem of difficult thickness control at the edge of a silicon wafer, an embodiment of the present invention provides a polishing pad on the one hand. The polishing pad includes a polishing surface in contact with the silicon wafer, and at least one groove is formed in the polishing surface. The grooving position of the groove is such that when the silicon wafer is polished, at least a part of the edge of the silicon wafer is suspended above the groove.

[0043] On the other hand, an embodiment of the present invention provides a polishing apparatus, including: the polishing pad provided in the first aspect of the embodiment of the present invention; a polishing pad driving device, the polishing pad is disposed on the polishing pad driving device, and the polishing pad driving device is used to drive the polishing pad to rotate; a polishing head for fixing the silicon wafer so that the front surface of the silicon wafer is in contact with the polishing pad and the edge of the silicon wafer is suspended above the groove of the polishing pad.

[0044] On yet another aspect, an embodiment of the present invention provides a method for polishing a silicon wafer, including: fixing the silicon wafer to be polished by a polishing head; driving the silicon wafer by the polishing head to make the front surface of the silicon wafer contact the polishing surface of the polishing pad and make the edge position of the silicon wafer suspended above the groove of the polishing surface of the polishing pad; driving the polishing head and the polishing pad to rotate so that the front surface of the silicon wafer is polished by the polishing pad.

[0045] According to the polishing pad, polishing apparatus and method for polishing a silicon wafer of the embodiments of the present invention, since a groove is provided below the edge of the silicon wafer, the contact area between the polishing pad and the edge of the silicon wafer is reduced or the contact time between the polishing pad and the edge position of the silicon wafer is reduced. Thereby, the mechanical action on the edge of the silicon wafer in the polishing process is weakened, and the polishing rate of only the edge position of the silicon wafer is reduced while keeping the polishing rate of the whole wafer basically unchanged, so that the flatness of the edge thickness of the silicon wafer can be improved and the product yield can be increased.

[0046] To fully understand the present invention, detailed structures and / or steps will be set forth in the following description to explain the technical solutions proposed by the present invention. The preferred embodiments of the present invention are described in detail below. However, in addition to these detailed descriptions, the present invention may have other embodiments.

[0047] The following will refer to Figures 1-5 to describe in detail a polishing pad according to an embodiment of the present invention.

[0048] As Figure 1 shown, the polishing pad 100 of an embodiment of the present invention may be a circular polishing pad, and the grooves formed on its polishing surface include a first annular groove 101 near the periphery of the polishing pad and a second annular groove 102 near the center of the polishing pad. The polishing surface between the first annular groove 101 and the second annular groove 102 may be kept flat. Exemplarily, the first annular groove 101 and the second annular groove 102 are concentrically arranged with the polishing pad, and the cross-sections of the first annular groove 101 and the second annular groove 102 include but are not limited to being rectangular.

[0049] In some embodiments, the distance between the inner edge of the first annular groove 101 and the outer edge of the second annular groove 102 is less than the diameter of the silicon wafer, and the distance between the outer edge of the first annular groove 101 and the inner edge of the second annular groove 102 is greater than or equal to the diameter of the silicon wafer. Thus, when polishing the silicon wafer with the polishing pad 100, referring to Figure 2 and Figure 3 , the silicon wafer 200 is arranged between the first annular groove 101 and the second annular groove 102, so that two opposite edges of the silicon wafer 200 are simultaneously suspended above the first annular groove 101 and the second annular groove 102. As an example, the width of the edge of the silicon wafer 200 suspended above the first annular groove 101 is substantially the same as the width suspended above the second annular groove 102. Among them, the silicon wafer may be a silicon wafer after double-sided polishing. Exemplarily, the silicon wafer includes but is not limited to semiconductor silicon wafers such as single-crystal silicon wafers, sapphire silicon wafers, and silicon carbide wafers.

[0050] For a 12-inch silicon wafer, the following shows some specific parameters of the polishing pad 100 that can improve the polishing effect at the positions of 145 - 149 mm of the silicon wafer edge. Referring to Figure 4 , in a specific embodiment, the width D1 of the first annular groove 101 may be 3 mm - 8 mm, for example, it may be 5 mm, and the depth H1 is between 0.5 mm - 2 mm. The radius of its outer edge (i.e., the outer circle near the edge of the polishing pad) is between 335 mm - 340 mm, for example, it may be 339 mm, and the radius of its inner edge (i.e., the inner circle near the center of the polishing pad) is between 330 mm - 335 mm, for example, it may be 334 mm.

[0051] The depth and width of the second annular groove 102 may be the same as or approximate to those of the first annular groove 101. That is, the width D2 of the second annular groove 102 may be 3 mm to 8 mm, for example, it may be 5 mm, and the depth H2 is between 0.5 mm and 2 mm. The radius of its outer edge (i.e., the outer ring near the edge of the polishing pad) is between 35 mm and 45 mm, for example, it may be 40 mm, and the radius of its inner edge (i.e., the inner ring near the center of the polishing pad) is between 30 mm and 40 mm, for example, it may be 35 mm.

[0052] Further, with continued reference to Figure 4 , if the distance between the outer edge of the first annular groove 101 and the inner edge of the second annular groove 102 is greater than the diameter of the silicon wafer, then when the silicon wafer is disposed between the first annular groove 101 and the second annular groove 102, both the first annular groove 101 and the second annular groove 102 are partially located below the silicon wafer 200 and partially located outside the silicon wafer 200. Thus, during polishing, the contact area between the silicon wafer 200 and the groove can be adjusted by controlling the left - right movement of the silicon wafer 200 along the radial direction of the polishing pad 100, thereby adjusting the polishing rate of the silicon wafer 200.

[0053] As an example, the distance D3 between the outer edge of the first annular groove 101 and the edge of the silicon wafer 200 and the distance D6 between the inner edge of the second annular groove 102 and the edge of the silicon wafer 200 may be 1 mm to 2 mm, and the distance D4 between the inner of the first annular groove 101 and the edge of the silicon wafer 200 and the distance D5 between the outer edge of the second annular groove 102 and the edge of the silicon wafer 200 may be 2 mm to 3 mm. That is, the width of the edge of the silicon wafer 200 in contact with the groove is 2 mm to 3 mm, and the amplitude of the left - right movement may be 2 mm to 4 mm.

[0054] It should be noted that although some specific parameters of the polishing pad 100 are given above, the parameters of the polishing pad are not limited thereto. Those skilled in the art can adjust them according to the size of the silicon wafer or other actual needs.

[0055] Figure 5 shows the movement trajectory of the groove of the polishing pad relative to the edge position of the silicon wafer 200 when polishing the silicon wafer using the polishing pad 100 according to an embodiment of the present invention. As Figure 5 shown, since when the polishing pad 100 rotates, the polishing head drives the silicon wafer 200 to rotate in the same direction. If the silicon wafer 200 is regarded as stationary, it is equivalent to the polishing pad 100 rotating around the center of the silicon wafer 200. That is, the first annular groove 101 and the second annular groove 102 on the polishing pad 100 rotate around the center of the silicon wafer 200, thereby forming the movement trajectory as shown in Figure 5 . Figure 5 In, the area of the silicon wafer 200 surrounded by two dashed lines is the area where the edge of the silicon wafer passes through the groove, and its width is Figure 4D4 or D5 therein. Thus, compared with the area within the edge of the silicon wafer, the presence of the first annular groove and the second annular groove reduces the contact area between the edge of the silicon wafer and the polishing pad and reduces the contact time between the edge of the silicon wafer and the polishing pad.

[0056] Furthermore, from Figure 5 it can be seen that since the silicon wafer 200 rotates when being polished driven by the polishing head, when only the first annular groove 101 or only the second annular groove 102 is provided on the polishing pad 100, the grooves can also traverse all positions of the edge of the silicon wafer 200. Therefore, in some embodiments, only the first annular groove 101 or only the second annular groove 102 can be opened on the polishing pad 100.

[0057] In one embodiment, the polishing pad 100 further includes one or more drain grooves 103 opened on its polishing surface. The drain grooves 103 communicate with the grooves and the edge of the polishing pad 100 to drain the polishing liquid in the grooves. As Figure 1 shown, one end of the drain groove 103 of an embodiment of the present invention communicates with the second annular groove 102, penetrates through the first annular groove 101, and the other end communicates with the edge of the polishing pad 100, so as to drain the polishing liquid in the first annular groove 101 and the second annular groove 102 during the rotation of the polishing pad 100, avoiding the problem that the polishing liquid and waste chips cannot be drained in time and accumulate in the grooves to damage the surface of the silicon wafer.

[0058] See Figure 2 , in one embodiment, the drain groove 103 is arc-shaped, and the convex direction of the arc faces the rotation direction of the polishing pad, which helps to drain the polishing liquid in the grooves by using the centrifugal force when the polishing pad 100 rotates. Exemplarily, the drain groove 103 can be tangent to the outer edge of the second annular groove 102.

[0059] As an example, the depth of the drain groove 103 is not less than the depths of the first annular groove 101 and the second annular groove 102, which helps the polishing liquid in the first annular groove 101 and the second annular groove 102 to flow into the drain groove. The drain grooves 103 can be symmetrically arranged around the center of the polishing pad 100; their depths can be evenly distributed or gradually increase from the center to the edge of the polishing pad 100. The drain grooves 103 can be as Figure 1 and Figure 2 shown start from the second annular groove 102, penetrate through the first annular groove 101 and extend to the edge of the polishing pad 100, or the drain grooves connecting the second annular groove 102 and the first annular groove 101 and the drain grooves connecting the first annular groove 101 and the edge of the polishing pad can also be independently arranged, and the numbers of the two can be the same or different, as long as they can drain the polishing liquid in the first annular groove 101 and the second annular groove 102.

[0060] In addition, although Figure 1and Figure 2 As shown in Figure 2 , the number of liquid discharge grooves 103 is 4, but the number is not limited thereto. The specifications such as the number, width, depth, and radian of the liquid discharge grooves can be adjusted by those skilled in the art according to factors such as the flow rate of the polishing liquid, the rotation speed of the polishing pad, and the sizes of the first annular groove 101 and the second annular groove 102, so as to better discharge the polishing liquid in the first annular groove 101 and the second annular groove 102.

[0061] According to the polishing pad of the embodiment of the present invention, the polishing rate of the whole wafer can be kept basically unchanged while only reducing the polishing rate at the edge position of the silicon wafer, thereby improving the flatness of the edge thickness of the silicon wafer and increasing the product yield.

[0062] Another aspect of the embodiment of the present invention provides a polishing apparatus. Referring to Figure 6 , the polishing apparatus includes a polishing pad 100, a polishing pad driving device 400, and a polishing head 300. Among them, the polishing pad 100 can be the polishing pad described above, that is, at least one groove is formed in the polishing surface of the polishing pad 100, and when polishing the silicon wafer, at least part of the groove is located below the edge of the silicon wafer. The polishing pad 100 is disposed on the polishing pad driving device 400, and the polishing pad driving device 400 is used to drive the polishing pad 100 to rotate. The polishing head 300 is used to fix the silicon wafer so that the front surface of the silicon wafer contacts the polishing pad 100 and the edge of the silicon wafer is suspended above the groove of the polishing pad 100.

[0063] Among them, the polishing pad driving device 400 can be a large turntable, which is disposed below the polishing pad 100 and is used to drive the polishing pad 100 to rotate clockwise or counterclockwise.

[0064] The polishing head 300 is disposed above the polishing pad 100 and is used to load the silicon wafer. Exemplarily, the polishing head 300 includes a base, a back-up pad, and a fixing portion. When loading the silicon wafer, the chamber between the base and the back-up pad is evacuated to suck the silicon wafer. When polishing, a pressure is applied to the back surface of the silicon wafer by the polishing head 300, and at the same time, the silicon wafer is driven to rotate at a certain speed. The rotation direction of the silicon wafer can be the same as the rotation direction of the polishing pad 100.

[0065] Exemplarily, a polishing liquid supply port is disposed above the polishing pad for supplying polishing liquid to the polishing pad.

[0066] Due to the use of a polishing pad with a groove disposed below the edge of the silicon wafer, the polishing apparatus according to the embodiment of the present invention can perform polishing in cooperation with the above polishing pad based on the existing polishing apparatus. While keeping the polishing rate of the whole wafer basically unchanged, only the polishing rate at the edge position of the silicon wafer is reduced, thereby improving the flatness of the edge thickness of the silicon wafer and increasing the product yield.

[0067] The embodiment of the present invention further provides a polishing method. Referring toFigure 7 , Figure 7 shows a schematic flowchart of a polishing method 700 according to an embodiment of the present invention. As Figure 7 shown, the polishing method 700 includes the following steps:

[0068] In step S710, a silicon wafer to be polished is fixed by a polishing head.

[0069] Wherein, the silicon wafer may be a silicon wafer after double-sided polishing. The polishing head can suck the silicon wafer by means of vacuum pumping.

[0070] In step S720, the polishing head drives the silicon wafer to make the front surface of the silicon wafer contact the polishing surface of the polishing pad, and makes the edge position of the silicon wafer hang over the groove of the polishing surface of the polishing pad.

[0071] Exemplarily, a first annular groove near the periphery of the polishing pad and / or a second annular groove near the center of the polishing pad are formed on the polishing surface of the polishing pad. The polishing head can drive the silicon wafer to fix the silicon wafer between the first annular groove and the second annular groove. At this time, two edges of the silicon wafer on the same diameter respectively hang over the first annular groove and the second annular groove. At this time, a certain area of the silicon wafer edge hangs over the first annular groove and the second annular groove and does not contact the polishing pad. As an example, the distance between the outer edge of the first annular groove and the inner edge of the second annular groove is greater than the diameter of the silicon wafer, so as to reserve a certain space for the left and right movement of the silicon wafer.

[0072] For the specific structure of the polishing pad and the positional relationship between the silicon wafer and the polishing pad, reference can be made to the above, and details are not described here.

[0073] In step S730, the polishing head and the polishing pad are driven to rotate so that the front surface of the silicon wafer is polished by the polishing pad.

[0074] Specifically, during polishing, the polishing head applies pressure to the back surface of the silicon wafer and drives the silicon wafer to rotate at a certain speed; at the same time, the polishing pad is driven to rotate by a polishing pad driving device. The rotation direction of the silicon wafer can be the same as the rotation direction of the polishing pad, both being counterclockwise or both being clockwise. During the rotation of the polishing pad and the silicon wafer, since a certain width of the silicon wafer edge continuously passes through the first annular groove and the second annular groove, the contact time between the silicon wafer edge and the polishing surface of the polishing pad and the contact area between the silicon wafer edge and the polishing surface of the polishing pad at each moment are reduced. Thus, while keeping the polishing rate inside the silicon wafer edge position basically unchanged, only the polishing rate of the silicon wafer edge position is reduced, and the flatness of the silicon wafer edge position is improved.

[0075] In some embodiments, in addition to the pressurizing and rotating actions, the polishing head can also adjust the area of the silicon wafer located above the groove by controlling the movement of the polishing head, so as to adjust the polishing rate of the silicon wafer edge position. Specifically, referring toFigure 8 It is possible to control the reciprocating movement of the polishing head along the radius direction of the polishing pad. It can be understood that the larger the amplitude of the left and right movement of the wafer, the greater the width of the wafer edge passing over the groove.

[0076] Referring to Figure 9 , wherein Figure 9 shows the relationship curves between the wafer radius and the relative removal thickness on the wafer surface during the polishing process when the contact distance between the wafer edge and the groove is 0, 2 mm, and 4 mm. From Figure 9 it can be seen that the larger the contact distance between the wafer edge and the groove, the smaller the relative removal thickness at the position of the wafer edge (within the range of 145 mm to 149 mm in radius), that is, the slower the polishing rate at the wafer edge position.

[0077] The above shows the main steps of the polishing method of the wafer according to the embodiment of the present invention. According to the polishing method of the wafer of the present invention, it is possible to only reduce the polishing rate at the wafer edge position while keeping the polishing rate of the whole wafer basically unchanged, thereby improving the flatness of the wafer edge thickness and increasing the product yield.

[0078] In the specification provided here, a large number of specific details are described. However, it can be understood that the embodiments of the present invention can be practiced without these specific details. In some instances, well-known methods, structures, and technologies are not shown in detail so as not to obscure the understanding of this specification.

[0079] Similarly, it should be understood that, in order to streamline the present invention and help understand one or more of the various inventive aspects, in the description of the exemplary embodiments of the present invention, the various features of the present invention are sometimes grouped together into a single embodiment, figure, or description thereof. However, the method of the present invention should not be construed as reflecting the intention that the claimed invention requires more features than those expressly recited in each claim. Rather, as reflected by the corresponding claims, the inventive point lies in that it is possible to solve the corresponding technical problems with features less than all the features of a single disclosed embodiment. Therefore, the claims following the specific implementation manners are hereby expressly incorporated into the specific implementation manners, where each claim itself serves as a separate embodiment of the present invention.

[0080] Those skilled in the art can understand that, except for features that are mutually exclusive, any combination can be adopted for all the features disclosed in this specification (including the accompanying claims, abstract, and drawings) and all the processes or units of any method or device so disclosed. Unless otherwise expressly stated, each feature disclosed in this specification (including the accompanying claims, abstract, and drawings) can be replaced by an alternative feature that provides the same, equivalent, or similar purpose.

[0081] In addition, those skilled in the art can understand that although some embodiments described herein include certain features included in other embodiments rather than other features, the combination of features of different embodiments means that it is within the scope of the present invention and forms different embodiments. For example, in the claims, any one of the claimed embodiments can be used in any combination.

[0082] It should be noted that the above embodiments illustrate the present invention rather than limit the present invention, and those skilled in the art can design alternative embodiments without departing from the scope of the appended claims. In the claims, any reference signs placed between parentheses shall not be construed as limiting the claim. The present invention can be implemented by means of hardware including several different elements and by means of a suitably programmed computer. In the unit claims listing several devices, several of these devices can be embodied by the same item of hardware. The use of the words first, second, and third, etc. does not denote any order. These words can be interpreted as names.

[0083] As described above, it is only the specific implementation manner or the description of the specific implementation manner of the present invention. The protection scope of the present invention is not limited thereto. Any changes or substitutions that can be easily thought of by those skilled in the art within the technical scope disclosed by the present invention should be covered by the protection scope of the present invention. The protection scope of the present invention shall be subject to the protection scope of the claims.

Claims

1. A polishing pad for polishing a silicon wafer, characterized in that, The polishing pad includes a polishing surface in contact with the silicon wafer, and at least one groove is formed in the polishing surface. The grooving position of the groove is such that when polishing the silicon wafer, at least a part of the edge of the silicon wafer is suspended above the groove. The groove includes a first annular groove near the periphery of the polishing pad and a second annular groove near the center of the polishing pad. The distance between the inner edge of the first annular groove and the outer edge of the second annular groove is less than the diameter of the silicon wafer, and the distance between the outer edge of the first annular groove and the inner edge of the second annular groove is greater than the diameter of the silicon wafer. The distance between the inner edge of the first annular groove and the edge of the silicon wafer is 2 mm to 4 mm, and the distance between the outer edge of the second annular groove and the edge of the silicon wafer is 2 mm to 4 mm. The polishing pad further includes one or more drain grooves formed in the polishing surface. One end of the drain groove communicates with the second annular groove, penetrates through the first annular groove, and the other end communicates with the edge of the polishing pad to drain the polishing liquid in the groove.

2. The polishing pad according to claim 1, wherein, The polishing pad, the first annular groove and the second annular groove are concentrically arranged.

3. The polishing pad according to claim 1, characterized in that, The width of the first annular groove is 3 mm to 8 mm, the depth is 0.5 mm to 2 mm, the outer edge radius is 335 mm to 340 mm, and the inner edge radius is 330 mm to 335 mm.

4. The polishing pad according to claim 1, wherein The width of the second annular groove is 3 mm to 8 mm, the depth is 0.5 mm to 2 mm, the outer edge radius is 35 mm to 45 mm, and the inner edge radius is 30 mm to 40 mm.

5. A polishing device for polishing a silicon wafer, characterized in that, The polishing equipment includes: The polishing pad as described in any one of claims 1-4; A polishing pad driving device, the polishing pad is arranged on the polishing pad driving device, and the polishing pad driving device is used to drive the polishing pad to rotate. A polishing head for fixing the silicon wafer so that the front surface of the silicon wafer is in contact with the polishing pad and the edge of the silicon wafer is suspended above the groove of the polishing pad.

6. A polishing method for a silicon wafer, characterized in that, Including: Fixing the silicon wafer to be polished through the polishing head; Driving the silicon wafer by the polishing head to make the front surface of the silicon wafer contact the polishing surface of the polishing pad as described in any one of claims 1-4, and making the edge position of the silicon wafer suspended above the groove of the polishing surface of the polishing pad. Driving the polishing head and the polishing pad to rotate so that the front surface of the silicon wafer is polished by the polishing pad.

7. The method according to claim 6, wherein The polishing pad rotates in the same direction as the polishing head.

8. The method according to claim 7, wherein It further includes: Adjusting the contact area between the edge of the silicon wafer and the groove by controlling the movement of the polishing head, so as to adjust the polishing rate at the edge position of the silicon wafer.

9. The method according to claim 8, wherein The controlling the movement of the polishing head includes: Controlling the polishing head to reciprocate along the radial direction of the polishing pad.

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