A non-volatile memory read processing method and device

Abstract

An embodiment of the present invention provides a non-volatile memory read processing method and device, the method comprising: verifying the level state of a first storage page when performing a read process on the non-volatile memory; reading data from the first storage page when the level state of the first storage page is a low level, and jumping to a second storage page according to a first preset jump value to verify the level state of the second storage page; wherein the second storage address of the second storage page is: the sum of the first storage address of the first storage page and the first preset jump value; the first preset jump value is a natural number. In the embodiment of the present invention, because the first preset jump value can be any natural number, the read processing method of the embodiment of the present invention can flexibly adapt to different reading methods, so that invalid verification will not be caused, and the efficiency of the read processing can be effectively improved.

Description

Technical Field

[0001] The present invention relates to the field of memory processing technology, and in particular to a non-volatile memory read processing method and device. Background Art

[0002] With the development of various electronic devices and embedded systems, non-volatile memory devices have been developed. For example, taking the non-volatile memory NAND Flash Memory as an example, NAND Flash Memory stores data by reading, writing and erasing memory cells (storage units). It has the advantages of fast rewriting speed and large storage capacity, and is widely used in electronic products. When the non-volatile memory performs a read operation, it is usually read in units of storage pages (pages). The read operation can include two stages. The first stage verifies the level state of the page. After determining that the page is in a low level state, it enters the second stage. The second stage is the stage of reading data from the page.

[0003] In the prior art, in order to improve the efficiency of read processing, a cache read (cache memory read processing) method is usually used. For example, Figure 1 As shown, in the cache read mode, after verifying that the level of one of the pages is low in the first stage, in the second stage, while reading data from the page, the operation of verifying the level state of the next page adjacent to the page is performed in parallel. For example, the address of one of the above pages is m. Figure 1 As shown, after verifying that the level of one of the pages is low, the process of reading data from one of the pages and jumping to the next page with address m+1 for level verification is executed in parallel, and so on. Each jump is just based on the previous page address plus 1.

[0004] However, the inventors found in the process of studying the above technical solution that the above technical solution has the following defects: when a user writes data to a page, it is not necessarily written in a continuous address. For example, when writing, the user may only write in the page with an even address. According to the method in the prior art that each jump is performed by adding 1 to the previous page address, each time data is read at an even address, it will jump to the page with an odd address, and no data is written in the page with the odd address, and data cannot be read, that is, the jump is an invalid jump and cannot play a role in improving the efficiency of the read processing. Summary of the invention

[0005] In view of the above problems, a non-volatile memory read processing method and device according to an embodiment of the present invention are proposed to improve the efficiency of the read processing.

[0006] According to a first aspect of the present invention, a non-volatile memory read processing method is provided, the method comprising:

[0007] In the case of performing a read process on the nonvolatile memory, verifying a level state of the first storage page;

[0008] When the level state of the first storage page is a low level, data is read from the first storage page, and jumps to the second storage page according to a first preset jump value to verify the level state of the second storage page; wherein the second storage address of the second storage page is: the sum of the first storage address of the first storage page and the first preset jump value; the first preset jump value is a natural number.

[0009] Optionally, when the first storage page is at a low level, before reading data from the first storage page and jumping to the second storage page according to a first preset jump value to verify the level state of the second storage page, the method further includes:

[0010] A first jump instruction is received; wherein the first jump instruction includes: the first preset jump value.

[0011] Optionally, when the first storage page is at a low level, data is read from the first storage page, and after jumping to the second storage page according to a first preset jump value to verify the level state of the second storage page, the method further includes:

[0012] When the level state of the second storage page is at a low level, data is read from the second storage page, and, according to a first preset jump value, it jumps to a third storage page to verify the level state of the third storage page; wherein the third storage address of the third storage page is: the sum of the second storage address and the first preset jump value.

[0013] Optionally, when the first storage page is at a low level, data is read from the first storage page, and after jumping to the second storage page according to a first preset jump value to verify the level state of the second storage page, the method further includes:

[0014] Receive a second jump instruction; wherein the second jump instruction includes: the second preset jump value; the second preset jump value is a natural number.

[0015] Optionally, after receiving the second jump instruction, the method further includes:

[0016] When the level state of the second storage page is at a low level, data is read from the second storage page, and, according to a second preset jump value, it jumps to a fourth storage page to verify the level state of the fourth storage page; wherein the fourth storage address of the fourth storage page is: the sum of the second storage address and the second preset jump value.

[0017] According to a second aspect of the present invention, there is provided a non-volatile memory read processing device, the device comprising:

[0018] A verification module, used to verify the level state of the first storage page when performing a read process on the non-volatile memory;

[0019] The first parallel module is used to read data from the first storage page when the level state of the first storage page is a low level, and jump to the second storage page according to a first preset jump value to verify the level state of the second storage page; wherein the second storage address of the second storage page is: the sum of the first storage address of the first storage page and the first preset jump value; the first preset jump value is a natural number.

[0020] Optionally, also include:

[0021] The first receiving module is used to receive a first jump instruction; wherein the first jump instruction includes: the first preset jump value.

[0022] A second parallel module is used to read data from the second storage page when the level state of the second storage page is a low level, and jump to the third storage page according to the first preset jump value to verify the level state of the third storage page; wherein the third storage address of the third storage page is: the sum of the second storage address and the first preset jump value.

[0023] The second receiving module is used to receive a second jump instruction; wherein the second jump instruction includes: the second preset jump value; the second preset jump value is a natural number.

[0024] A third parallel module is used to read data from the second storage page when the level state of the second storage page is a low level, and jump to the fourth storage page according to a second preset jump value to verify the level state of the fourth storage page; wherein the fourth storage address of the fourth storage page is: the sum of the second storage address and the second preset jump value.

[0025] In an embodiment of the present invention, when performing a read process on the non-volatile memory, the level state of the first storage page is first verified; when the level state of the first storage page is a low level, the parallel execution stage is entered, specifically, data is read from the first storage page, and, according to the first preset jump value, jumps to the second storage page to verify the level state of the second storage page; wherein the second storage address of the second storage page is: the sum of the first storage address of the first storage page and the first preset jump value. In an embodiment of the present invention, because the first preset jump value can be any natural number, the read processing method of the embodiment of the present invention can flexibly adapt to different reading methods. For example, if the user only writes data to the page with an even address, the first preset jump value can be set to 2, and the jump is only performed in the page with an even address, so it will not cause invalid verification, and can effectively improve the efficiency of the read process.

[0026] The above description is only an overview of the technical solution of the present invention. In order to more clearly understand the technical means of the present invention, it can be implemented according to the contents of the specification. In order to make the above and other purposes, features and advantages of the present invention more obvious and easy to understand, the specific implementation methods of the present invention are listed below. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Various other advantages and benefits will become apparent to those of ordinary skill in the art by reading the detailed description of the preferred embodiments below. The accompanying drawings are only for the purpose of illustrating the preferred embodiments and are not to be considered as limiting the present invention. Moreover, the same reference symbols are used throughout the accompanying drawings to represent the same components. In the accompanying drawings:

[0028] Figure 1 It is a non-volatile memory read processing schematic diagram of the prior art;

[0029] Figure 2 is a flow chart of a non-volatile memory read processing method provided by an embodiment of the present invention;

[0030] Figure 3 It is a schematic diagram of a non-volatile memory read process provided by an embodiment of the present invention;

[0031] Figure 4 The invention is a block diagram of a non-volatile memory read processing device provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0032] In order to make the above-mentioned purposes, features and advantages of the present invention more obvious and easy to understand, the present invention is further described in detail below in conjunction with the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention, are only part of the embodiments of the present invention, not all of the embodiments, and are not used to limit the present invention.

[0033] Embodiment 1

[0034] Reference Figure 2 , shows a flow chart of a non-volatile memory read processing method. The method may specifically include:

[0035] Step 101: When performing a read process on the nonvolatile memory, verify the level state of the first storage page.

[0036] In the embodiment of the present invention, when a read process is performed on a non-volatile memory, a first storage page may be determined according to an address of a storage page in a received read instruction to implement the read process on the first storage page.

[0037] In a specific application, the read process of the first storage page usually includes two stages. The first stage verifies the level state of the first storage page. After determining that the first storage page is in a low level state, the second stage is entered. The second stage is the stage of reading data from the first storage page.

[0038] Step 102: When the level state of the first storage page is a low level, data is read from the first storage page, and, according to a first preset jump value, the data is jumped to the second storage page to verify the level state of the second storage page; wherein the second storage address of the second storage page is: the sum of the first storage address of the first storage page and the first preset jump value; the first preset jump value is a natural number.

[0039] In an embodiment of the present invention, when the level state of the first storage page is at a low level, data is read from the first storage page to implement a read process of the first storage page; and in order to improve the reading efficiency of the non-volatile memory, while reading data from the first storage page, a jump to the second storage page is executed in parallel to verify the level state of the second storage page.

[0040] In a specific application, the first preset jump value may be set by a user according to an actual application scenario, and the embodiment of the present invention does not specifically limit the first preset jump value.

[0041] As a specific implementation of the embodiment of the present invention, when the first storage page is at a low level, data is read from the first storage page, and before jumping to the second storage page according to a first preset jump value to verify the level state of the second storage page, the method further includes:

[0042] A first jump instruction is received; wherein the first jump instruction includes: the first preset jump value.

[0043] In an embodiment of the present invention, a first jump instruction generated by a user operation can be received. For example, the user can modify the register parameters storing the first jump value and issue a first jump instruction, which includes a first preset jump value, so that when executed in parallel, it can jump to an adapted second storage page according to user needs.

[0044] As a specific implementation of the embodiment of the present invention, when the first storage page is at a low level, data is read from the first storage page, and after jumping to the second storage page according to a first preset jump value to verify the level state of the second storage page, the method further includes:

[0045] Sub-step A1 (not shown in the figure): when the level state of the second storage page is a low level, read data from the second storage page, and jump to the third storage page according to the first preset jump value to verify the level state of the third storage page; wherein the third storage address of the third storage page is: the sum of the second storage address and the first preset jump value.

[0046] In the embodiment of the present invention, the above-mentioned jump process is performed with the first preset jump value as an increment. Therefore, only one first preset jump value needs to be set to sequentially perform the above-mentioned verification and jump processes.

[0047] For example, refer to Figure 3 , shows the jump process when the first preset jump value is 2, taking the address of the first storage page as m as an example, Figure 3 As shown, after verifying that the level of the first storage page is at a low level, the process of reading data from the first storage page and jumping to the second storage page with an address of m+2 for level verification is executed in parallel. After verifying that the level of the second storage page is at a low level, the process of reading data from the second storage page and jumping to the third storage page with an address of m+4 for level verification is executed in parallel, and so on. Each jump is performed by simply adding 2 to the previous page address.

[0048] As another specific implementation of the embodiment of the present invention, when the first storage page is at a low level, data is read from the first storage page, and after jumping to the second storage page according to a first preset jump value to verify the level state of the second storage page, the method further includes:

[0049] Sub-step B1 (not shown in the figure): receiving a second jump instruction; wherein the second jump instruction includes: the second preset jump value; the second preset jump value is a natural number.

[0050] Sub-step B2 (not shown in the figure): when the level state of the second storage page is a low level, read data from the second storage page, and jump to the fourth storage page according to the second preset jump value to verify the level state of the fourth storage page; wherein the fourth storage address of the fourth storage page is: the sum of the second storage address and the second preset jump value.

[0051] In the embodiment of the present invention, the technical solution composed of sub-step B1 and sub-step B2 may be two solutions in parallel with sub-step A1.

[0052] Through sub-step B1 and sub-step B2, it is possible to modify the jump value corresponding to each jump, so that the storage page spanned by each jump is flexible, thereby more accurately reducing invalid jumps and improving the efficiency of read processing.

[0053] For example, taking the address of the first storage page as m, the first preset jump value as 2, and the second preset jump value as 3, taking the address of the first storage page as m as an example, after verifying that the level of the first storage page is a low level, the process of reading data from the first storage page and jumping to the second storage page with an address of m+2 for level verification is executed in parallel, after verifying that the level of the second storage page is a low level, the process of reading data from the second storage page and jumping to the fourth storage page with an address of m+5 for level verification is executed in parallel, and so on. The value of each jump may not be fixed.

[0054] In summary, in the embodiment of the present invention, when performing a read process on the non-volatile memory, the level state of the first storage page is first verified; when the level state of the first storage page is a low level, the parallel execution stage is entered, specifically, data is read from the first storage page, and, according to the first preset jump value, jumps to the second storage page to verify the level state of the second storage page; wherein the second storage address of the second storage page is: the sum of the first storage address of the first storage page and the first preset jump value. In the embodiment of the present invention, because the first preset jump value can be any natural number, the read processing method of the embodiment of the present invention can flexibly adapt to different reading methods. For example, if the user only writes data to the page with an even address, the first preset jump value can be set to 2, and the jump is only performed in the page with an even address, so it will not cause invalid verification, and can effectively improve the efficiency of the read process.

[0055] Embodiment 2

[0056] Reference Figure 4 , shows a block diagram of a non-volatile memory read processing device, which may specifically include:

[0057] A verification module 310, configured to verify a level state of a first storage page when a read process is performed on the non-volatile memory;

[0058] The first parallel module 320 is used to read data from the first storage page when the level state of the first storage page is a low level, and jump to the second storage page according to a first preset jump value to verify the level state of the second storage page; wherein the second storage address of the second storage page is: the sum of the first storage address of the first storage page and the first preset jump value; the first preset jump value is a natural number.

[0059] Optionally, also include:

[0060] The first receiving module is used to receive a first jump instruction; wherein the first jump instruction includes: the first preset jump value.

[0061] A second parallel module is used to read data from the second storage page when the level state of the second storage page is a low level, and jump to the third storage page according to the first preset jump value to verify the level state of the third storage page; wherein the third storage address of the third storage page is: the sum of the second storage address and the first preset jump value.

[0062] The second receiving module is used to receive a second jump instruction; wherein the second jump instruction includes: the second preset jump value; the second preset jump value is a natural number.

[0063] A third parallel module is used to read data from the second storage page when the level state of the second storage page is a low level, and jump to the fourth storage page according to a second preset jump value to verify the level state of the fourth storage page; wherein the fourth storage address of the fourth storage page is: the sum of the second storage address and the second preset jump value.

[0064] In summary, in the embodiment of the present invention, when performing a read process on the non-volatile memory, the level state of the first storage page is first verified; when the level state of the first storage page is a low level, the parallel execution stage is entered, specifically, data is read from the first storage page, and, according to the first preset jump value, jumps to the second storage page to verify the level state of the second storage page; wherein the second storage address of the second storage page is: the sum of the first storage address of the first storage page and the first preset jump value. In the embodiment of the present invention, because the first preset jump value can be any natural number, the read processing method of the embodiment of the present invention can flexibly adapt to different reading methods. For example, if the user only writes data to the page with an even address, the first preset jump value can be set to 2, and the jump is only performed in the page with an even address, so it will not cause invalid verification, and can effectively improve the efficiency of the read process.

[0065] As for the device embodiment, since it is basically similar to the method embodiment, the description is relatively simple, and the relevant parts can be referred to the partial description of the method embodiment.

[0066] The various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other.

[0067] It will be appreciated by those skilled in the art that the embodiments of the present invention may be provided as methods, devices, or computer program products. Therefore, the embodiments of the present invention may take the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware. Moreover, the embodiments of the present invention may take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program codes.

[0068] In a typical configuration, the computer device includes one or more processors (CPU), input / output interfaces, network interfaces and memory. Memory may include non-permanent memory in computer-readable media, random access memory (RAM) and / or non-volatile memory in the form of read-only memory (ROM) or flash RAM. Memory is an example of a computer-readable medium. Computer-readable media include permanent and non-permanent, removable and non-removable media that can be implemented by any method or technology to store information. Information can be computer-readable instructions, data structures, modules of programs or other data. Examples of computer storage media include, but are not limited to, phase change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically processable programmable read-only memory (EEPROM), flash memory or other memory technology, read-only compact disk read-only memory (CD-ROM), digital versatile disk (DVD) or other optical storage, magnetic cassettes, magnetic tape magnetic disk storage or other magnetic storage devices or any other non-transmission media that can be used to store information that can be accessed by a computing device. According to the definition in this article, computer-readable media does not include non-transitory media such as modulated data signals and carrier waves.

[0069] The embodiments of the present invention are described with reference to the flowcharts and / or block diagrams of the methods, terminal devices (systems), and computer program products according to the embodiments of the present invention. It should be understood that each process and / or block in the flowchart and / or block diagram, as well as the combination of the processes and / or blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable non-volatile memory read processing terminal device to generate a machine, so that the instructions executed by the processor of the computer or other programmable non-volatile memory read processing terminal device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0070] These computer program instructions may also be stored in a computer readable memory capable of directing a computer or other programmable non-volatile memory read processing terminal device to operate in a specific manner, so that the instructions stored in the computer readable memory produce a manufactured product including an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.

[0071] These computer program instructions can also be loaded into a computer or other programmable non-volatile memory reading processing terminal device, so that a series of operation steps are executed on the computer or other programmable terminal device to produce a computer-implemented process, so that the instructions executed on the computer or other programmable terminal device provide for implementing the process. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.

[0072] Although the preferred embodiments of the present invention have been described, those skilled in the art may make additional changes and modifications to these embodiments once they have learned the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of the embodiments of the present invention.

[0073] Finally, it should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or terminal device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or terminal device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the existence of other identical elements in the process, method, article or terminal device including the elements.

[0074] The above is a detailed introduction to a non-volatile memory read processing method and a non-volatile memory read processing device provided by the present invention. Specific examples are used in this article to illustrate the principle and implementation mode of the present invention. The description of the above embodiments is only used to help understand the method of the present invention and its core idea. At the same time, for those skilled in the art, according to the idea of ​​the present invention, there will be changes in the specific implementation mode and application scope. In summary, the content of this specification should not be understood as limiting the present invention.

Claims

1. A non-volatile memory read processing method, characterized in that: The method comprises: In the case of performing a read process on the nonvolatile memory, verifying a level state of the first storage page; When the level state of the first storage page is at a low level, data is read from the first storage page, and the data is jumped to the second storage page according to a first preset jump value to verify the level state of the second storage page; wherein the second storage address of the second storage page is: the sum of the first storage address of the first storage page and the first preset jump value; the first preset jump value is a natural number; The step of reading data from the first storage page and jumping to the second storage page according to a first preset jump value to verify the level state of the second storage page includes: While reading data from the first storage page, a jump to the second storage page according to a first preset jump value is performed in parallel to verify the level state of the second storage page.

2. The method according to claim 1, characterized in that Before reading data from the first storage page when the first storage page is at a low level and jumping to the second storage page according to a first preset jump value to verify the level state of the second storage page, the method further includes: A first jump instruction is received; wherein the first jump instruction includes: the first preset jump value.

3. The method according to claim 2, characterized in that After reading data from the first storage page when the first storage page is at a low level and jumping to the second storage page according to a first preset jump value to verify the level state of the second storage page, the method further includes: When the level state of the second storage page is at a low level, data is read from the second storage page, and, according to a first preset jump value, it jumps to a third storage page to verify the level state of the third storage page; wherein the third storage address of the third storage page is: the sum of the second storage address and the first preset jump value.

4. The method according to claim 2, characterized in that: After reading data from the first storage page when the first storage page is at a low level and jumping to the second storage page according to a first preset jump value to verify the level state of the second storage page, the method further includes: Receive a second jump instruction; wherein the second jump instruction includes: the second preset jump value; the second preset jump value is a natural number.

5. The method according to claim 4, characterized in that After receiving the second jump instruction, the method further includes: When the level state of the second storage page is at a low level, data is read from the second storage page, and, according to a second preset jump value, it jumps to a fourth storage page to verify the level state of the fourth storage page; wherein the fourth storage address of the fourth storage page is: the sum of the second storage address and the second preset jump value.

6. A non-volatile memory read processing device, characterized in that: The device comprises: A verification module, used to verify the level state of the first storage page when performing a read process on the non-volatile memory; A first parallel module is used to read data from the first storage page when the level state of the first storage page is a low level, and jump to the second storage page according to a first preset jump value to verify the level state of the second storage page; wherein the second storage address of the second storage page is: the sum of the first storage address of the first storage page and the first preset jump value; the first preset jump value is a natural number; The step of reading data from the first storage page and jumping to the second storage page according to a first preset jump value to verify the level state of the second storage page includes: While reading data from the first storage page, a jump to the second storage page according to a first preset jump value is performed in parallel to verify the level state of the second storage page.

7. The device according to claim 6, characterized in that Also includes: The first receiving module is used to receive a first jump instruction; wherein the first jump instruction includes: the first preset jump value.

8. The device according to claim 7, characterized in that Also includes: A second parallel module is used to read data from the second storage page when the level state of the second storage page is a low level, and jump to the third storage page according to the first preset jump value to verify the level state of the third storage page; wherein the third storage address of the third storage page is: the sum of the second storage address and the first preset jump value.

9. The device according to claim 7, characterized in that Also includes: The second receiving module is used to receive a second jump instruction; wherein the second jump instruction includes: a second preset jump value; the second preset jump value is a natural number.

10. The device according to claim 9, characterized in that Also includes: A third parallel module is used to read data from the second storage page when the level state of the second storage page is a low level, and jump to the fourth storage page according to a second preset jump value to verify the level state of the fourth storage page; wherein the fourth storage address of the fourth storage page is: the sum of the second storage address and the second preset jump value.

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