Method for processing a substrate assembly and wafer composite structure

Abstract

Method for processing a substrate assembly and wafer composite structure. A method for processing a substrate assembly having a semiconductor device layer is provided. The method may include the steps of: disposing an auxiliary carrier at the substrate assembly such that a connection surface of the auxiliary carrier and a first surface of the substrate assembly are directly adjacent to each other at least in some positions; fixedly attaching the auxiliary carrier to the substrate assembly by melting a carrier portion of the auxiliary carrier and a substrate portion of the substrate assembly directly adjacent to the carrier portion of the auxiliary carrier such that the auxiliary carrier and the substrate assembly are locally fused only in a fused portion of the auxiliary carrier and the substrate assembly; and processing the semiconductor device layer of the substrate assembly with the auxiliary carrier fixedly attached to the substrate assembly; wherein the fused portion covers at most 20% of the first surface of the substrate assembly.

Description

Technical Field

[0001] The present disclosure generally relates to the processing of semiconductor substrate assemblies and to wafer composite structures. Background Art

[0002] Thin semiconductor substrate assemblies including thin semiconductor wafers may be mechanically fragile due to their low thickness. Thus, there may be a risk of damage and even breakage of the substrate assembly during processing. The damage can be prevented or at least reduced by using a mechanically stable support carrier system. However, currently available support carrier systems generally do not simultaneously take into account applying high temperature processes to the substrate assembly and nondestructively removing the support carrier system after processing. Summary of the Invention

[0003] Some embodiments relate to a method for processing a substrate assembly having a semiconductor device layer. The method may include the steps of: disposing an auxiliary carrier at the substrate assembly such that a connection surface of the auxiliary carrier and a first surface of the substrate assembly are directly adjacent to each other at least in some positions. The method may further include the steps of: fixedly attaching the auxiliary carrier to the substrate assembly by melting a carrier portion of the auxiliary carrier and a substrate portion of the substrate assembly directly adjacent to the carrier portion of the auxiliary carrier such that the auxiliary carrier and the substrate assembly are locally fused only in a fused portion of the auxiliary carrier and the substrate assembly. In another process step, the semiconductor device layer of the substrate assembly may be processed, wherein the auxiliary carrier is fixedly attached to the substrate assembly during processing. The fused portion may cover at most 20% of the first surface of the substrate assembly.

[0004] Additional embodiments relate to a wafer composite structure including an auxiliary carrier having a connection surface and a substrate assembly having a semiconductor device layer and a first surface. The auxiliary carrier and the substrate assembly may be locally fused only in a fused portion of the auxiliary carrier and the substrate assembly. The fused portion may cover at most 20% of the first surface of the substrate assembly.

[0005] Those skilled in the art will recognize additional features and advantages upon reading the following detailed description and viewing the drawings. Brief Description of the Drawings

[0006] The elements of the drawings are not necessarily to scale relative to each other. The same reference numerals represent corresponding like parts. The features of the various illustrated examples may be combined unless they are mutually exclusive. The examples are depicted in the drawings and detailed in the following description.

[0007] Figures 1A to 1E Exemplary embodiments of a method for processing a substrate assembly and a wafer composite structure are shown.

[0008] Figures 2A to 2D Exemplary embodiments of a method for processing a substrate assembly and a wafer composite structure are shown, in which different types of auxiliary carriers are shown.

[0009] Figures 3A to 3D Exemplary embodiments of a method for processing a substrate assembly and a wafer composite structure are shown, in which an auxiliary carrier is detached from the substrate assembly.

[0010] Figure 4 、 5A And FIGS. 5A and 5B show exemplary embodiments of a method for processing a substrate assembly and a wafer composite structure. DETAILED DESCRIPTION

[0011] In the following, a method for processing a substrate assembly is provided. The substrate assembly may include a semiconductor device layer, and optionally may include other layers and / or components (such as but not limited to: contact structures, metallization structures, passivation structures, insulating layers, support structures). The substrate assembly may mainly extend in a lateral direction; the diameter of the substrate assembly along at least one lateral direction may correspond to at least 95% and at most 110% of the production standard of a semiconductor wafer (for example, 4 inches (100 mm), 6 inches (150 mm), 8 inches (200 mm), 12 inches (300 mm) or the like). Along the lateral direction (i.e., in a top view onto the substrate assembly from the vertical direction), the substrate assembly may have an oval (e.g., circular) or polygonal (e.g., hexagonal or rectangular or even quadratic) shape. Perpendicular to the lateral direction, in the vertical direction, the substrate assembly may have a thickness that is small compared to the diameter (e.g., at most 1% or at most 0.5% of the diameter). For example, the thickness of the substrate assembly may be at most 1 mm (or at most 700 μm or at most 500 μm). The first and second surfaces of the substrate assembly may extend substantially (i.e., except for e.g. surface roughness and / or minor thickness variations along the substrate assembly) in the lateral direction.

[0012] The semiconductor device layer can be or can include at least a portion of a semiconductor wafer and / or at least one epitaxial semiconductor layer. The epitaxial semiconductor layer can be epitaxially grown on the semiconductor wafer and / or on or above a support structure of a substrate assembly. Unless otherwise explicitly stated, the method is not limited to any specific semiconductor material or combination of materials for the semiconductor device layer. Possible semiconductor materials for the semiconductor device layer include, but are not limited to: Si, GaN, InGaN, SiC, Ga2O3, GaAs, C, InP, MoS, graphene. In addition to at least one semiconductor material, the semiconductor device layer can include additional materials (e.g., polycrystalline portions and / or metal portions) and / or constituents (e.g., doping atoms and / or impurities introduced by fabrication).

[0013] The semiconductor device layer can at least include a functional layer of at least one semiconductor device (e.g., at least one semiconductor device structure). In principle, any semiconductor device that is typically processed at the wafer level can be considered. Unless otherwise explicitly stated, the method is not limited to any specific semiconductor device. Exemplary semiconductor devices include, but are not limited to: semiconductor switching devices (e.g., IGFETs such as MOSFETs, JFETs, FINFETs; thyristors; diodes and / or IGBTs), optoelectronic semiconductor devices (e.g., LEDs; photodiodes; photovoltaic cells and / or laser diodes), microelectromechanical or micro-optical electromechanical device systems (MEMS or MOEMS respectively; e.g., sensors, mirror arrays and / or optical arrays). Typically, the semiconductor device is a switching semiconductor device. The semiconductor device layer can be pre-treated. By way of example only, due to the pre-treatment, the semiconductor device layer can include at least one of the following: doped regions, trenches, isolation regions, structured regions, buried regions, voids / cavities. The first surface can correspond to the surface of the semiconductor device layer (e.g., the so-called front-side surface or back-side surface), particularly corresponding to the surface of the semiconductor device structure included in the semiconductor device layer. The pre-treated substrate assembly can result in a final first surface, which may not require further processing steps to be applied to the first surface.

[0014] An auxiliary carrier can be provided. The auxiliary carrier can be formed as a whole (i.e., can be composed of a single piece) or can include multiple parts. In either case, the auxiliary carrier can include an opening or can have no opening. In the case of multiple parts, at least some of the parts can be connected to each other. In some examples, the diameter of the auxiliary carrier can be at least 80% and / or at most 120% (or at least 90% and at most 110%) of the diameter of the substrate assembly. The outer circumference of the auxiliary carrier can have the same shape as the substrate assembly (e.g., if the substrate assembly is elliptical or polygonal, the outer circumference of the auxiliary carrier can also be elliptical or polygonal, respectively). The thickness of the auxiliary carrier can be at least 50 μm (e.g., at least 150 μm) and / or at most 1.5 mm (e.g., at most 1.2 mm). The auxiliary carrier can include at least one of the following materials or can be composed of one of the following materials: amorphous glass, crystalline glassy materials (e.g., fused silica). For example, the material of the auxiliary carrier can be selected such that the coefficient of thermal expansion (CTE) of the auxiliary carrier approximates the CTE of the substrate assembly (e.g., within the tolerance of the CTE of the substrate assembly). Herein and hereinafter, the CTE of a component (e.g., an auxiliary carrier or a substrate assembly or a stress-inducing layer) generally refers to the average CTE of the component averaged over the entire component (especially in the case of a composition of several materials). Additionally or alternatively, the material of the auxiliary carrier can be selected such that: (i) the auxiliary carrier can be stable at high temperatures, i.e., the auxiliary carrier can withstand temperatures higher than 350 °C (or higher than 400 °C, or higher than 450 °C, or even higher than 500 °C) and lower than 700 °C (or lower than 650 °C or lower than 600 °C), and / or (ii) the surface portion of the auxiliary can be easily melted, especially in the case of a laser beam. of the substrate assembly).

[0015] In at least one example, the method can include disposing the auxiliary carrier at the substrate assembly such that the connection surface of the auxiliary carrier and the first surface of the substrate assembly are directly adjacent to each other at least at some locations. For example, the first surface and the connection surface can be directly adjacent to each other at least in the connection region of the first surface and the connection surface.

[0016] The method may further include fixedly attaching an auxiliary carrier to the substrate assembly. Throughout this application, if a first component (e.g., the auxiliary carrier) is "fixedly attached" to a second component (e.g., the substrate assembly), the first and second components are firmly connected such that both components can be lifted together by lifting only one of the two components. The auxiliary carrier can be fixedly attached to the substrate assembly by melting the carrier portion of the auxiliary carrier and the substrate portion of the substrate assembly that is directly adjacent (e.g., in the connection region) to the carrier portion of the auxiliary carrier. The melting can be performed such that the auxiliary carrier and the substrate assembly (specifically, the carrier portion and the substrate portion) are locally fused only in the fused portion of the auxiliary carrier and the substrate assembly. In particular, at the first surface, the fused portion can be laterally separated from the other by at least one unfused portion, at which the auxiliary carrier and the substrate assembly are not fused.

[0017] In the fused portion, the auxiliary carrier (i.e., the material of the auxiliary carrier) and the substrate assembly (i.e., the material of the substrate assembly) are fused. That is, the carrier portion of the auxiliary carrier and the substrate portion of the substrate assembly can merge in the fused portion, and the materials of the two components can mesh and / or interlock. For example, at least part of the carrier portion can penetrate the substrate assembly and can be surrounded by the substrate portion. The fused portion can provide the only means for fixedly attaching the auxiliary carrier to the substrate assembly. Generally, only the substrate portion and the carrier portion to be fused are melted. Alternatively, other substrate portions and other carrier portions can be melted, but no fused portion is formed (e.g., due to insufficient heating). However, generally, most of the material of the substrate assembly at or near the first surface is not melted.

[0018] The first surface and the connection surface may have no fused zone outside the fused portion. The fused portion can cover at most 20% (or at most 15% or at most 10%, or even at most 5%) of the first surface of the substrate assembly. That is, at least 80% (or at least 85% or at least 90%) of the first surface of the substrate assembly can have no fused portion. Generally, at least 0.5% (or at least 2% or at least 5%) of the first surface is covered by the fused portion. Additionally or alternatively, at most 50% (or at most 30% or even at most 20%) and / or at least 2% (or at least 10% or at least 15%) of the connection surface of the solid portion (i.e., the non-opening including the portion of the auxiliary carrier) of the auxiliary carrier can be covered by the fused portion. The fused portions can be evenly distributed along the connection surface (e.g., adjacent fused portions can differ by at most )

[0019] Allowing the fusion part to cover only a small part of the first surface, considering fixedly attaching the auxiliary carrier to the substrate assembly by melting a part of the auxiliary carrier and a part of the substrate assembly, while still being able to release the connection between the auxiliary carrier and the substrate assembly. The size of the individual fusion parts and the geometric distribution of the fusion parts along the first surface and / or along the connection surface can be appropriately selected so as to generally reduce the size of the fusion parts (in particular, reduce the size of the coverage of the first surface by the fusion parts) and still allow for sufficient mechanical stability. This allows for fixedly attaching a high-temperature stable auxiliary carrier to the substrate assembly via a high-temperature stable connection and removing the auxiliary carrier at a subsequent process step without damaging or destroying the semiconductor device layer of the substrate assembly.

[0020] According to some examples, the method may include processing the semiconductor device layer of the substrate assembly while the auxiliary carrier is fixedly attached to the substrate assembly. During processing, the auxiliary carrier may mechanically stabilize the substrate assembly and / or may protect the substrate assembly from mechanical damage during processing.

[0021] According to some examples, the method further includes the step of detaching the auxiliary carrier from the substrate assembly. Thus, the auxiliary carrier can be a reversible carrier that is detached from the substrate assembly after processing. For example, the auxiliary carrier can be detached from the substrate assembly by remelting the fusion parts of the auxiliary carrier and the substrate assembly such that the fusion parts are released. During remelting, additional forces (e.g., a lifting force and / or a gravitational force) can be applied to the auxiliary carrier and / or the substrate assembly such that the auxiliary carrier and the substrate assembly experience traction.

[0022] According to at least one example, detaching an auxiliary carrier from a substrate assembly can include changing the temperature of the auxiliary carrier from a first carrier temperature to a second carrier temperature while changing the temperature of the substrate assembly from a first substrate temperature to a second substrate temperature. The first carrier (substrate) temperature can be less than or greater than the second carrier (substrate) temperature. Generally, the first carrier (substrate) temperature is greater than the second carrier (substrate) temperature. The second substrate temperature can be different from the second carrier temperature (e.g., if the second carrier temperature is lower than the first carrier temperature, the second substrate temperature can be higher than the second carrier temperature). In other words: the substrate assembly and the auxiliary carrier are subjected to a temperature change that is different for the substrate assembly and the auxiliary carrier. The first substrate temperature and the first carrier temperature can be approximately equal (e.g., the initial temperature at which the auxiliary carrier and the substrate assembly are in thermal equilibrium). The change in temperature (i.e., from the first substrate temperature to the second substrate temperature and from the first auxiliary temperature to the second auxiliary temperature) can be performed such that the materials of the substrate assembly and the auxiliary carrier can be selected such that the auxiliary carrier and the substrate assembly experience different thermal expansions during the temperature change. Due to the difference in thermal expansion, stress may be generated at the fusion portion between the auxiliary carrier and the substrate assembly, and this stress may cause mechanical stress in at least some of the fusion portions. The induced stress may cause rupture of the fusion portion and thus damage to the fusion portion. This will ultimately result in the disruption of the connection between the auxiliary carrier and the substrate assembly. Generally, the difference in the temperature change of the auxiliary carrier and the substrate assembly is selected such that the potential difference in thermal expansion due to the CTE mismatch between the auxiliary carrier and the substrate assembly is enhanced. For example, both the auxiliary carrier and the substrate assembly can initially be at a first temperature, such as at ambient temperature. Then, the auxiliary carrier or the substrate assembly can be treated with cooling means such that only the temperature of the auxiliary carrier or the substrate assembly is changed (e.g., cooled) to a second temperature (i.e., the second carrier temperature or the second substrate temperature, respectively). Generally, the auxiliary carrier is treated with cooling means to avoid damage to the semiconductor device layer. The heat conduction between the auxiliary carrier and the substrate assembly can respectively cause a slight temperature change again (i.e., the "non-cooled component" is cooled to the second substrate temperature or the second carrier temperature, respectively). For example, cooling means (e.g., liquid nitrogen) can be applied (e.g., in direct contact with the following surface, such as spraying and / or pouring onto the following surface) to the second surface of the substrate assembly facing away from the auxiliary carrier or the rear surface of the auxiliary carrier facing away from the substrate assembly).

[0023] In additional or alternative examples, detaching the auxiliary carrier from the substrate assembly can include attaching (e.g., fixedly and / or removably attaching) a stress-inducing layer to the auxiliary carrier and / or the substrate assembly at a first temperature. In some examples, the stress-inducing layer can cover at least 80% (or at least 90% or at least 95%) of the rear surface of the auxiliary carrier opposite the connection surface and / or the second surface of the substrate assembly opposite the first surface. The stress-inducing layer can include a polymer (e.g., including PDMS), and optionally an adhesion layer for attaching the stress-inducing layer to the auxiliary carrier and / or the substrate assembly. The material of the stress-inducing layer can be selected such that the CTE of the stress-inducing layer is different from the CTEs of the auxiliary carrier and the substrate assembly. After attaching the stress-inducing layer to the substrate assembly, when the stress-inducing layer is attached to the auxiliary carrier or to the substrate assembly, at least the stress-inducing layer can be cooled to a second temperature below the first temperature. The second temperature and the difference in CTEs (CTE difference) between the stress-inducing layer and the CTEs of the auxiliary carrier and the substrate assembly can be selected such that mechanical stress is induced in at least some of the fusion portions. In particular, during cooling, due to the CTE difference between the stress-inducing layer and the auxiliary carrier or the stress-inducing layer and the substrate assembly, mechanical stress may be induced in at least some (usually most or all) of the fusion portions. The induced stress may cause rupture of the fusion portions and thus damage to the fusion portions. Since the fusion portions are typically small compared to the entire lateral extent of the stress-inducing layer on the auxiliary carrier or on the substrate assembly, the stress induced in the fusion portions may be relatively large, thus focusing the rupture in the fusion portions. Outside the fusion portions, relatively small stress may be induced. This will ultimately result in the destruction of the connection between the auxiliary carrier and the substrate assembly. After cooling and an optional reheating step, the auxiliary carrier can be removed from the substrate assembly. For example, the first temperature and / or the second temperature can be ambient temperature, and bringing the stress-inducing layer "to" or "cooling it to" the first or second temperature can correspond to placing the stress-inducing layer (and the components attached thereto) in the ambient temperature. In the case where the stress-inducing layer includes a polymer, the first temperature can be above the glass transition temperature of the polymer, and the second temperature can be above or even below the glass transition temperature of the polymer by up to 40 °C.

[0024] In yet another additional or alternative example, the semiconductor device layer of the substrate assembly may include a plurality of semiconductor device structures and a plurality of separation regions (sometimes also referred to as "kerf regions" or "dicing regions"), wherein adjacent semiconductor device structures are laterally separated from each other by at least one of the separation regions. The separation regions may be connected to each other or at least some or even all of the separation regions may be separated from each other. The fusion portion may be located only above the separation region in the vertical direction. That is, the fusion portion may not be located in a region above the semiconductor device structure. For example, in the vertical direction, the fusion portion and the separation region overlap and / or the fusion portion may be completely covered by the separation region. The width of the separation region may be greater than the diameter of the fusion portion. The method further includes separating the semiconductor device structures and detaching the auxiliary carrier from the substrate assembly in a combined step. This can be achieved by cutting vertically through the separation region and through the corresponding fusion portion above the separation region. During the cutting, the fusion portion may be damaged or even destroyed, thus resulting in the release of the connection between the (remaining) auxiliary carrier and the substrate assembly. In particular, singulated semiconductor device structures may result from the cutting process without any part of the auxiliary carrier.

[0025] According to some examples, the substrate assembly includes a mechanically weak structure. In the vertical direction, the fusion portion and the mechanically weak structure overlap. The fusion portion may be located only above the mechanically weak structure in the vertical direction. For example, in the vertical direction, the fusion portion may be completely covered by the mechanically weak structure. Detaching the auxiliary carrier may include selectively removing the mechanically weak structure from the substrate assembly (e.g., using etching). The mechanically weak structure may include semiconductor material (e.g., the semiconductor material of the semiconductor device layer) and cavities (e.g., holes, voids, holes, and / or bubbles), which are at least partially surrounded by the semiconductor material and may be filled with a gas (e.g., air) and / or a fluid, both at or below atmospheric pressure. For example, at least 10% (or at least 20% or at least 30% or even at least 50%) of the volume of the mechanically weak structure may consist of cavities, while the remaining portion of the mechanically weak structure may be from the semiconductor material. The mechanically weak structure may be a continuous layer or may include several separate parts. For example, the mechanically weak structure may only be present in the region above the fusion portion.

[0026] In some examples, the method may include attaching (e.g., fixedly attaching) a temporary carrier to a second surface of the substrate assembly before detaching the auxiliary carrier from the substrate assembly. The second surface of the substrate assembly may be opposite to the first surface of the substrate assembly and may face away from the auxiliary carrier. The temporary carrier may be mechanically flexible (e.g., may be a foil or a tape) or may include a mechanically flexible carrier part (e.g., may include a foil or a tape). Additionally or alternatively, the temporary carrier may include a dicing frame used during cutting the semiconductor device layer into, for example, individual semiconductor device structures. The temporary carrier may provide mechanical stability to the substrate assembly and further processing steps after detaching the auxiliary carrier. After the further processing steps, the temporary carrier may be removed, in particular without damaging the substrate assembly. Attaching the temporary carrier to the second surface may include, for example, adhering and / or bonding the temporary carrier to the second surface.

[0027] According to some examples, the fusion part may be laterally separated from another part at the first surface by at least one unfused part where the auxiliary carrier and the substrate assembly are not fused. For example, at least a part of the auxiliary carrier and the substrate assembly may be directly adjacent to each other at the unfused part and / or at least a part of the auxiliary carrier and the substrate assembly may be separated at the unfused part (e.g., by additional components and / or by ambient gas). The unfused part may partially or even completely surround the fusion part. The auxiliary carrier may at least partially (e.g., completely) cover the substrate assembly at the unfused part. At the unfused part, the semiconductor device structures of the semiconductor device layer may be located. For example, the semiconductor device structures of the semiconductor device layer may be free of the fusion part.

[0028] In some examples, the auxiliary carrier includes at least one opening. The auxiliary carrier may be fixedly attached to the substrate assembly such that, in a vertical direction, the at least one opening and the at least one unfused part at least partially overlap. That is, directly after attaching the auxiliary carrier to the substrate assembly, the unfused part may be accessible (e.g., freely accessible) through the opening of the auxiliary carrier.

[0029] It may be possible that the auxiliary carrier includes an annular part and at least one opening (e.g., exactly one opening), where the annular part surrounds the at least one opening. The annular part may only cover the outer circumference of the substrate assembly. The fusion part may be located only in the area of the annular part. For example, the auxiliary carrier may be annular in shape, where the solid part of the auxiliary carrier surrounds (e.g., completely surrounds) the opening. In this context, "annular in shape" means that the connecting surface is a continuous surface, rather than simply a connection. However, the term "annular in shape" does not limit the shape of the substrate assembly and / or the auxiliary carrier to a circular shape (e.g., elliptical or even circular), but a polygonal ring is also possible.

[0030] In at least some examples, the auxiliary carrier includes a plurality of bridges of a grid and a plurality of openings surrounded by the plurality of bridges. That is, the auxiliary carrier can be in the shape of a grid, and the solid portions of the auxiliary carrier build up the riches of the grid surrounding the openings. The fusion portion can be located only in the region of the bridges of the grid. In particular, the fusion portion can be located only at the intersection regions where two bridges cross. In some examples, the openings of the grid can be located above the semiconductor device structures of the semiconductor device layer, while the bridges of the grid can be located above the separation regions between the semiconductor device structures.

[0031] According to some examples, the method includes applying a filler material such that the filler material at least partially covers at least one unfused portion and / or such that the filler material fills at least part of the openings in the auxiliary carrier. The filler material is typically applied after the auxiliary carrier is fixedly attached to the substrate assembly. For example, the filler material is applied in the openings of the auxiliary carrier. The filler material can, for example, cover the semiconductor device structures of the semiconductor device layer of the substrate assembly. The filler material can be a non-sticking material, which can fill the openings or holes or gaps between the auxiliary carrier and the substrate assembly. Typically, the filler material does not have mechanical stabilizing properties. For example, the filler material can be or can include foam. It can also be possible that the filler material includes or is a fluid (such as water) and / or a gas, in particular a high-pressure gas (i.e., having a pressure higher than the ambient pressure).

[0032] According to at least some examples, the auxiliary carrier mechanically stabilizes and / or mechanically protects the substrate assembly during processing of the substrate assembly. Throughout this specification, if a first component "mechanically stabilizes" a second component, this can mean that the second component is mechanically strengthened by the first component such that the composite of the first and second components can be mechanically processed (e.g., with tweezers) during processing. Further, if a first component "mechanically protects" a second current component, this can mean that the first component reduces or even prevents mechanical damage (e.g., cracking) in the second component during processing.

[0033] In some examples, after the auxiliary carrier is fixedly attached to the substrate assembly, the method may further include fixedly attaching a support cover to the auxiliary carrier at the rear surface of the auxiliary carrier, the rear surface being opposite to the connection surface of the auxiliary carrier. The support cover may include, for example, amorphous glass and / or crystalline glassy materials. Fixedly attaching the support cover to the auxiliary carrier may include at least one of the following: (i) disposing the support cover at the auxiliary carrier such that the front surface of the support cover directly abuts the rear surface of the auxiliary carrier at least in some positions, and then, melting a part of the auxiliary carrier and a part of the support cover such that the auxiliary carrier and the support cover are locally fused in additional fused portions; (ii) welding the support cover to the auxiliary carrier (e.g., using glass welding of a glass eutectic system). In some examples, the auxiliary carrier includes at least one opening, and the support cover overlaps and / or covers (e.g., completely covers) at least one opening of the auxiliary carrier at least in some positions.

[0034] According to some examples, melting and / or, if applicable (i.e., for those examples where remelting occurs), remelting the carrier portion and the substrate portion includes welding and / or laser welding (e.g., laser micro-welding). Additionally or alternatively, melting and / or if applicable remelting the carrier portion and the support cover may include welding and / or laser welding. Laser welding may include irradiating the substrate portion and the carrier portion to be melted or remelted with a laser beam. The laser beam may be focused on the area where melting or remelting should occur. This can allow for melting only a small portion of the auxiliary carrier and the substrate assembly.

[0035] The beam width (e.g., FWHM) of the laser beam at the region where melting or remelting should occur (e.g., at the substrate portion and / or carrier portion) can be at most 1 mm (or at most 100 μm or at most 50 μm or even at most 10 μm). For example, the peak wavelength of the laser beam can be at least 400 nm and at least 1400 nm, such as at least 800 nm and / or at most 1200 nm or at least 350 nm and at most 700 nm. For example, the laser beam can be emitted as pulses having a pulse length of less than 1 μs (or less than 100 ns). Generally, the pulse length is less than 10 ns (or less than 1 ns, or less than 100 ps, or less than 50 ps, less than 20 ps, or less than 10 ps). The pulse length can even be below 1 ps, i.e., in the femtosecond regime. The pulse energy and / or repetition rate of the laser beam can be appropriately selected according to the pulse length. For example, for a pulse length below 1 ps, the pulse energy can be at least 0.1 μJ / pulse. The repetition rate can be in the kHz regime or even in the MHz regime. However, in other examples, the laser beam can be continuous wave (CW) or quasi - continuous wave, e.g., having a pulse length higher than 1 μs or higher than 10 μs. In some examples, the laser can be a fiber laser.

[0036] In some examples, the melted portion of the substrate includes an absorption layer. The absorption layer may have a higher absorption coefficient than the semiconductor material of the semiconductor device layer, particularly at the wavelength of the laser beam used for laser welding (e.g., at wavelengths of at least 400 nm and at most 1400 nm). For example, the absorption layer may be deposited on top of the semiconductor device layer. Additionally or alternatively, the absorption layer may be part of the semiconductor device layer, but the material of the semiconductor device layer may be changed in the region of the absorption layer (e.g., via implantation, chemical deposition, and / or etching). The absorption layer may only be present in the outer region of the substrate assembly. For example, the geometry of at least a portion of the absorption layer may correspond to the geometry of the support structure. In some examples, the support structure may be in an annular shape or a grid shape. In this case, at least a portion of the absorption layer may also be in an annular shape or a grid shape, respectively. It may be possible for the absorption layer to only be present in the region where the auxiliary carrier covers the substrate assembly. The absorption layer may be particularly useful in the case of a transparent semiconductor device layer (i.e., transparent at the wavelength of the laser beam used for laser welding). Hereinafter, if a component has an absorption coefficient of at most 50% for light of a specific wavelength (for non-transparent: at least 70% or at least 80% or at least 90%), then the component is "transparent" ("non-transparent") to the light of the specific wavelength. In some examples, the absorption layer may include at least one of the following: (i) a metal (e.g., a silicide); (ii) an amorphous material (e.g., amorphous silicon); (iii) the semiconductor material of the substrate assembly with implanted ions; (iv) silicon (e.g., polycrystalline silicon). For example, for (i), a metallization layer (e.g., including silicides such as NiAlSi, NiSi) may be formed on top of the semiconductor device layer, where a portion of the metallization layer may form the contact metallization of the semiconductor device structure of the semiconductor device layer and the fusion portion may include additional portions of the metallization.

[0037] The auxiliary carrier can be fixedly attached to the first surface of the substrate assembly, and it can be possible that when the auxiliary carrier is fixedly attached to the substrate assembly, at least the second surface of the substrate assembly opposite to the first surface is processed. In addition, it can be possible to process a part of the first surface of the substrate assembly accessible through the opening in the auxiliary carrier. In some examples, processing the substrate assembly includes at least one of the following: (i) grinding the substrate assembly, for example, at the second surface; (ii) etching the substrate assembly, for example, at the second surface; (iii) applying a processing mask over the second surface, for example, via a lithography method; (iv) cleaving and / or cutting the substrate assembly (i.e., separately dividing and / or cutting off a first part of the substrate assembly from the rest of the substrate assembly such that only a second part of the substrate assembly remains fixedly attached to the auxiliary carrier); (v) thermally annealing the layers and / or parts of the substrate assembly, for example, at the second surface (e.g., by using laser thermal annealing); (vi) ion implantation, particularly through the second surface; (vi) depositing a layer (e.g., a metallization layer) over the second surface; (vi) electrically testing the semiconductor device structure of the semiconductor device layer of the substrate assembly. At least some of the processes mentioned may require a temperature higher than 350 °C, particularly at the auxiliary carrier. Thus, fixedly attaching the high-temperature-stable auxiliary carrier to the substrate assembly and protecting the substrate assembly during processing allow for processing the substrate assembly at the second surface or the first surface through the opening in the auxiliary carrier.

[0038] In some examples, the material of the auxiliary carrier can be modified by at least one of the following: (i) a laser beam or (ii) etching. Generally, the modification is performed before the auxiliary carrier is fixedly attached to the substrate assembly. For example, a laser beam for melting and, if applicable, remelting or a different laser beam can be used for the modification. The modification can include damaging and / or removing at least part of the material of the auxiliary carrier. For example, the material of the auxiliary carrier can be removed by isotropic etching (e.g., wet chemical etching) and / or by anisotropic etching. Anisotropic etching can be achieved by, for example, changing the material properties within a part of the auxiliary carrier with a laser beam in order to change the etching rate within the changed part and subsequently etching (e.g., wet chemical etching) the auxiliary carrier (so-called laser-induced deep etching, LIDE).

[0039] In additional or alternative examples, the material of the support cap can be modified, where, mutatis mutandis, the foregoing steps for modifying the auxiliary carrier are applied to the support cap.

[0040] Some examples of the methods described herein can be part of a method for manufacturing a semiconductor device. The semiconductor device can include at least a portion of a semiconductor device layer and / or at least one semiconductor device structure of the semiconductor device layer. Thus, the end result of the method can be a semiconductor device. Before and / or after performing an example of the methods described herein, further processing steps can be performed to obtain a semiconductor device.

[0041] According to some examples, processing a substrate assembly includes subjecting the substrate assembly with an auxiliary carrier fixedly attached thereto to a temperature higher than 350 °C, typically higher than 400 °C or even higher than 500 °C. That is, the auxiliary carrier is thermally stable at high temperatures.

[0042] Furthermore, a wafer composite structure is provided. The wafer composite structure can be manufactured using at least some of the method steps described above and / or below. The wafer composite structure can be an intermediate product of an example of the methods described herein. That is, all features described with respect to an example of the method can also be disclosed for the wafer composite structure, and vice versa. The wafer composite structure can include an auxiliary carrier having a bonding surface and a substrate assembly having a semiconductor device layer and a first surface. The auxiliary carrier and the substrate assembly are locally bonded only in the fused portion of the auxiliary carrier and the substrate assembly. The fused portion can cover at most 20% (or at most 15% or at most 10%, or even at most 5%) of the first surface of the substrate assembly.

[0043] Reference Figures 1A to 1E to the cross-sectional view of

[0044] In Figure 1A a substrate assembly 10 and an auxiliary carrier 20 are provided, and the auxiliary carrier 20 is arranged at the substrate assembly such that at least a portion of the first surface 10a of the substrate assembly 10 and at least a portion of the bonding surface 20a of the auxiliary carrier 20 are directly adjacent to each other. The second surface 10b of the substrate assembly 10 faces away from the auxiliary carrier 20 and is opposite to the first surface 10a. The back surface 20b of the auxiliary carrier 20 faces away from the substrate assembly 10 and is opposite to the bonding surface 20a. In the vertical direction z, the substrate assembly 10 has a thickness 10t of the substrate assembly 10, and the auxiliary carrier has a thickness 20t of the auxiliary carrier 20. By way of example only, Figures 1A to 1E the auxiliary carrier 20 in

[0045] In Figure 1BIn [description], the auxiliary carrier 20 is fixedly attached to the substrate assembly 10. This is accomplished by melting 51 the carrier portion 201 of the auxiliary carrier 20 and the substrate portion 101 of the substrate assembly 10. The carrier portion 201 and the substrate portion 101 may directly abut the first surface 10a and the connection surface 20a, respectively. The carrier portion 201 and the substrate portion 101 may directly abut each other. Melting 51 may be performed such that the auxiliary carrier 20 and the substrate assembly 10 are locally fused only in the fused portion 30 of the auxiliary carrier 20 and the substrate assembly 10 (see Figure 1C ). In particular, at least a portion of the carrier portion 201 and at least a portion of the substrate portion 101 that directly abut each other and have been melted may be fused to a corresponding one in the fused portion 30. Melting 51 may be performed by the auxiliary carrier 20 or by the substrate assembly 10 or even by both. In a typical embodiment, melting 51 includes irradiating the auxiliary carrier 20 or the substrate assembly 10 with laser radiation.

[0046] In Figure 1C the auxiliary carrier 20 and the substrate assembly 10 are connected via the fused portion 30, thus forming a wafer composite structure 102. As Figure 1CAs indicated by the intermediate shading of the fusion part 30, the material of the auxiliary carrier 20 and the material of the substrate assembly 10 are merged within the fusion part 30. The fusion part 30 can be separated by the unfused part 31, where the substrate assembly 10 and the auxiliary carrier 20 are not melted. Each fusion part 30 can have a diameter 30d along either of the lateral directions x, y. The diameter 30d along the lateral directions x, y can be the maximum lateral extension of the fusion part 30 along the lateral directions x, y. The diameters 30d of different fusion parts 30 can be different. Additionally or alternatively, each fusion part 30 can have an asymmetric shape such that the diameter 30d along the first lateral direction x can be different from the diameter 30d along the second lateral direction y. In either case, the diameter 30d of the fusion part is typically small compared to the diameter 10d of the substrate assembly 10 (e.g., at most 5%). Typically, the fusion part 30 covers at most 20% or even at most 10% of the first surface 10a of the substrate assembly 10. Generally, most of the fusion parts 30 (i.e., more than 50% of the fusion parts 30) or each fusion part 30 can have a diameter 30d along at least one of the lateral directions x, y or along all of the lateral directions x, y of at least 3 μm (e.g., at least 5 μm) and / or at most 20 μm (e.g., at most 15 μm). For at least most of the fusion parts 30 or all of the fusion parts 30, the height 30h of the fusion part 30 (i.e., the diameter of the fusion part 30 along the vertical direction z) can be, for example, at least 0.5 μm (e.g., at least 1 μm or at least 2 μm) and / or at most 10 μm (e.g., at most 6 μm or at most 4 μm). The fusion parts 30 can be symmetrically distributed between the substrate assembly 10 and the auxiliary carrier 20 (i.e., the height within the substrate assembly 10 can be approximately equal to the height within the auxiliary carrier 20). Alternatively, for example, if the material of either the auxiliary carrier 20 or the substrate assembly 10 is more easily melted compared to the material of the other of the auxiliary carrier 20 and the substrate assembly 10, a larger portion of at least most of the fusion parts 30 can be located within one of the auxiliary carrier 20 and the substrate assembly 10.

[0047] As Figure 1C indicated by the arrow in, the method can include processing 52 the substrate assembly 10, particularly the semiconductor device layer of the substrate assembly 10. Depending on whether the second surface 10b is the front - side surface or the back - side surface of the semiconductor device structure of the semiconductor device layer of the substrate assembly 10, the processing 52 can include front - side processing or back - side processing, respectively. In a subsequent process step, the auxiliary carrier 20 can be removed from the substrate assembly 10.

[0048] Figure 1D and 1EAn exemplary embodiment of the wafer composite structure 102 is shown. In both embodiments, the wafer composite structure 102 includes a substrate assembly 10 having a semiconductor device layer 14, and the semiconductor device layer 14 includes a semiconductor device structure 11. By way of example only, the substrate assembly 10 includes only the semiconductor device layer 14. However, in other examples, the substrate assembly 10 may include additional layers, additional elements, and / or additional components. Figure 1D and 1E The exemplary embodiment shown in Figure 1D differs in that, in Figure 1E , the semiconductor device structure 11 is located near the second surface 10b, while in Figure 1D , the semiconductor device structure 11 is located near the first surface 10a. That is to say, in the exemplary embodiment shown in Figure 1E , the second surface 10b corresponds to the front-side surface of the semiconductor device layer 14, while in the exemplary embodiment shown in Figure 1D , the first surface 10a corresponds to the front-side surface of the semiconductor device layer 14. Therefore, when the auxiliary carrier 20 is attached to the substrate assembly 10, front-side processing may be possible in the exemplary embodiment shown in Figure 1E , and back-side processing may be available for the exemplary embodiment shown in

[0049] onto the rear surface 20B of the auxiliary carrier 20 Figure 2A and 2B The top views of Figure 2C and 2D and the cross-sectional views of Figure 2A and 2B show exemplary embodiments of the wafer composite structure 102 obtained from exemplary embodiments of the methods described herein. In the top views of

[0050] Figures 2A to 2D , all relevant components are shown, even if they may not be visible to the observer due to non-transparent components.The wafer composite structures 102 of the exemplary embodiments shown have in common that each wafer composite structure includes an auxiliary carrier 20 and a substrate assembly 10 having a semiconductor device structure 11. The auxiliary carrier 20 is fixedly attached to the substrate assembly 10 via a fusion part 30. By way of example only, the substrate assembly 10 is shown as having a circular shape. However, the substrate assembly 10 may also have a polygonal shape or an oval shape. In addition, the substrate assembly 10 may include a so-called wafer flat or wafer notch (not shown in the figure) at the edge of the substrate assembly 10. The auxiliary carrier 20 includes a solid part 22 and at least one opening 21 (e.g., a hole) surrounded by the solid part 22. The opening 21 may extend through the entire solid part 22 of the auxiliary carrier 20. However, those skilled in the art will understand that several aspects of the method are independent of the shape of the auxiliary carrier 20 and / or the shape of the substrate assembly 10.

[0051] In Figure 2A and 2C the exemplary embodiments shown, the auxiliary carrier 20 has a grid-like shape, wherein the solid part 22 of the auxiliary carrier 20 contains the bridges of the grid. In Figure 2B and 2D the exemplary embodiments shown, the auxiliary carrier 20 has an annular shape, wherein the solid part 22 (also referred to as the annular part) of the auxiliary carrier 20 contains the ring. In either case, the fusion part 30 may be present only at the solid part 22 of the auxiliary carrier 20. Generally, the fusion part 30 may be distributed uniformly and / or homogeneously along the auxiliary carrier 20.

[0052] In the case of the grid-like ( Figure 2A and 2C ), the fusion part 30 may be located at the bridges of the grid surrounding the opening 20 of the grid. In some embodiments (indicated by the circles with solid lines and patterned fill in Figure 2A ), the fusion part 30 may be located at the corners where two bridges intersect (e.g., only at the corners), at only some of the solid parts 22 and / or corners as shown in, for example, Figure 2A and Figure 2C or at all corners (not shown in the figure).

[0053] In additional or alternative embodiments (in Figure 2AIn the case (indicated by unfilled dashed circles) where the fusion part 30 can be located at the bridge between the corners. In some examples, for each semiconductor device structure 11, at least one fusion part 30 can be located between the semiconductor device structure 11 and each of its nearest neighbor semiconductor device structures 11. In this case, multiple fusion parts 30 can surround each semiconductor device structure 11, where each of the nearest neighbor semiconductor device structures 11 of the semiconductor device structure 11 can be uniquely assigned to at least one of the fusion parts 30. Separating the auxiliary carrier 20 from the substrate assembly 10 can include cutting through the fusion part 30 and the auxiliary carrier 20. In the case of a grid-like auxiliary carrier 20, the cutting is typically performed through and along the bridge. To protect the semiconductor device structures of the semiconductor device layer 14 from uncontrolled separation, the fusion parts 30 can be distributed such that along each cutting line, at least one fusion part 30 is present between two semiconductor device structures 11 that will be separated by cutting along the cutting line.

[0054] In the case of an annular shape ( Figure 2B and 2D ), the fusion part 30 can be located only at the outer ring. As Figure 2B indicated, but generally also valid, the fusion part 30 can have different shapes and / or sizes, depending on the shapes and / or sizes of the carrier part and the substrate part that have been melted. However, typically, the fusion part 30 has an oval shape.

[0055] Regardless of the shape of the auxiliary carrier 20, the auxiliary carrier 20 can have a diameter smaller than that of the substrate assembly 10 along the transverse directions x, y ( Figure 2A and 2B shown in the exemplary) or a diameter larger than that of the substrate assembly 10 along the transverse directions x, y (e.g., Figure 2D ) or the same diameter as the substrate assembly 10 along the transverse directions x, y (e.g., Figure 2C ). In the case where the auxiliary carrier 20 has a diameter larger than that of the substrate assembly 10 along the transverse directions x, y, the auxiliary carrier 20 can protect the edges of the substrate assembly 10.

[0056] As Figure 2C and 2D shown in the exemplary embodiments, the openings 21 between the solid parts 22 of the auxiliary carrier 20 can be filled with a filling material 40 (e.g., foam). The outer surface 40b of the filling material 40 can terminate flush with the rear surface 20b of the auxiliary carrier 20. In other embodiments, the filling material 40 can have an extension along the vertical direction z smaller than that of the auxiliary carrier 20. The filling material 40 can cover the unfused part 31 of the substrate assembly 10, especially the semiconductor device structure 30.

[0057] Reference Figures 3A to 3D is a cross-sectional view that explains in detail a method for detaching the auxiliary carrier 20 from the substrate assembly 10. In the exemplary embodiment shown in Figure 3A , the fusion portion 30 is remelted 51'. Generally, only the fusion portion 30 is remelted 51'. By remelting 51' the fusion portion 30, the fusion portion 30 can be softened and / or released. Removing 54 the auxiliary carrier 20 and the substrate assembly 10 when the fusion portion 30 is remelted and / or before the remelted fusion portion solidifies results in detaching the auxiliary carrier 20 from the substrate assembly 10 ( Figure 3A right hand side).

[0058] In Figure 3B the exemplary embodiment shown, the substrate assembly 10 includes a mechanically weak structure 15 (e.g., a porous region), where the fusion portion 30 only covers the mechanically weak structure 15. Detaching the auxiliary carrier 20 from the substrate assembly 10 can include, for example, removing the mechanically weak structure 15 via etching. This may result in holes 15' in the substrate assembly 10 in the region where the mechanically weak structure 15 is present. The fusion portion 30 remains connected to the auxiliary carrier 20 and can be removed from the substrate assembly 10 together with the auxiliary carrier 20 (shown on the Figure 3B right hand side). Opposed to the embodiment shown in Figure 3B , the mechanically weak structure 15 can also be included in the auxiliary carrier 20. In this case, after removal of the mechanically weak structure 15, the auxiliary carrier 20 will include holes 15', and after detaching the auxiliary carrier 20, the fusion portion 30 will be connected to the substrate assembly 10.

[0059] In Figure 3C the exemplary embodiment shown, the substrate assembly 10 includes semiconductor device structures 11 separated by a separation region 12 (e.g., a so-called KERF region). The fusion portion 30 is only present in the region directly below the separation region 12. The auxiliary carrier 20 can also only be present in the region directly below the separation region 12 ( Figure 3C left hand side, for example in the case of a grid-shaped auxiliary carrier 20 having a bridge 22 only located below the separation region 12), or can also be covered by the semiconductor device structures 11 ( Figure 3D right hand side). In either case, cutting 55 through the separation region 12 in the vertical direction z using a cutting tool results in destroying the fusion portion 30 and thus the connection between the auxiliary carrier 20 and the substrate assembly 10. Additionally, the individual semiconductor device structures 11 are separated from each other via the cutting process 55.

[0060] In Figure 3DIn the exemplary embodiment shown, a stress-inducing layer 60 (e.g., a polymer layer) is attached to the rear surface 20b of the auxiliary carrier 20. It may be possible that the stress-inducing layer 60 is attached to the auxiliary carrier 20 before or after the auxiliary carrier 20 is fixedly attached to the substrate assembly 10. In the latter case, the stress-inducing layer 60 may be attached to the auxiliary carrier 20 before or after processing the substrate assembly 10. For example, the stress-inducing layer 60 may be attached to the rear surface 20b via an adhesion layer ( Figure 3D not shown). Even in the Figure 3D exemplary embodiment where the stress-inducing layer 60 is attached to the auxiliary carrier 20, it may be possible for the stress-inducing layer to be attached to the substrate assembly 10. It may even be possible that the respective stress-inducing layer 60 is attached to both the auxiliary carrier 20 and the substrate assembly 10. In either case, the following processing steps may be used to remove the auxiliary carrier 20 from the substrate assembly 10.

[0061] The wafer composite structure 102 including the auxiliary carrier 20 and the substrate assembly 10 and / or the stress-inducing layer 60 may be cooled. Due to the CTE mismatch between the stress-inducing layer 60 and the wafer composite structure 102, the expansion or contraction of the stress-inducing layer 60 during cooling is different from the expansion or contraction of the wafer composite structure 102 during cooling. This results in a difference in thermal expansion and thus stress 62 within the stress-inducing layer 60, and the stress 62 is transferred to the wafer composite structure 102. The stress may be released by the formation of fractures 61 within the fusion portion 30. Along these fractures, the fusion portion may be destroyed, thus resulting in the release of the connection between the auxiliary carrier 20 and the substrate assembly 10. Thereafter, the stress-inducing layer 60 may be removed from the auxiliary carrier 20. However, it may also be possible that the stress-inducing layer 60 remains at the auxiliary carrier 20 for use in combination with another substrate assembly 10 or for disposal.

[0062] Reference Figure 4 to the cross-sectional view explains in detail the methods and exemplary embodiments of the wafer composite structure 102 described herein. To melt the substrate portion of the substrate assembly 10 and the carrier portion of the auxiliary carrier 20 to produce the wafer composite structure 102, a laser beam (e.g., for laser welding and / or for laser micro-welding) may be used. Figure 4Shows an exemplary cross-section along the propagation direction of the beam width (e.g., FWHM) of the laser beam 56 for laser (micro) welding. By way of example only, a Gaussian beam having a focus at the fusion part 30 is assumed, i.e., in the region where melting and / or if applicable remelting occurs. In the focus, the beam width can have a minimum beam width 56d. The diameter 30d of the fusion part 30 can be smaller than the minimum beam width 56d. This may be due to the fact that the power of the laser beam at the outside of the beam may not be high enough to allow for melting and / or if applicable remelting. The radiation of the laser beam can be absorbed at the carrier part and the substrate part, thus causing melting and / or if applicable remelting of the materials of the carrier part and the substrate part (e.g., via heat treatment or via cold ablation). If the material of the semiconductor device layer 14 is non-transparent to the used laser beam 56 (i.e., absorbs a high enough part of the laser beam 56 to allow for melting / remelting), the material of the semiconductor device layer 14 can be directly fused (or not fused) with the material of the auxiliary carrier 20. However, the material of the semiconductor device layer 14 can be transparent to the used laser beam (i.e., may not absorb a high enough part of the laser beam to allow for melting). In this case, the substrate assembly 11 can include an absorption layer 13. The absorption layer 13 can be in direct contact with the first surface 10a of the substrate assembly 10. The absorption layer 13 can be a continuous layer, as Figure 4 shown, or can be structured. For example, the absorption layer 13 can be part of the metallization structure of the semiconductor device layer 14 having the semiconductor device structure 11. The laser beam 56 can be at least partially absorbed in the absorption layer 13, and parts of the absorption layer 13 can be melted, thus causing a fusion part 30 between the carrier part of the auxiliary carrier 20 and a part of the absorption layer 13 that is the substrate part of the substrate assembly 10.

[0063] Combined Figure 5A and 5B The cross-sectional views of explain in detail additional exemplary embodiments of the methods and wafer composite structures described herein. By way of example only, the second surface 10b of the substrate assembly 10 is shown as the rear surface (and thus the first surface 10a is the front surface). However, with the necessary changes, the method can also be applied in the case where the second surface 10b is the front surface. Before the auxiliary carrier 20 is fixedly attached to the substrate assembly 10, the first surface 10a can be fully processed.

[0064] The auxiliary carrier 20 includes an opening 21. The opening 21 can be aligned with the semiconductor device structure 11 of the substrate assembly 10. By way of example only, at least a portion of the semiconductor device structure 11 projects at least partially from the remainder of the substrate assembly 10. After the auxiliary carrier 20 is fixedly attached to the substrate assembly 10, the opening 21 in the auxiliary carrier 20 can be filled with an optional filling material 40. The filling material 40 can stabilize the protruding portion of the semiconductor device structure 11 and / or can protect the semiconductor device structure 11. The semiconductor device structure 11 can be embedded in the filling material 40. The support cover 70 can be fixedly attached to the second surface 10b of the auxiliary carrier 20, for example via an additional fusion portion 71, which may be caused by locally melting a portion of the auxiliary carrier 20 and a portion of the support cover 70. The additional fusion portion 71 can have properties similar to those of the fusion portion 30, except that different materials can be fused in the additional fusion portion 71 compared to the fusion portion 30. However, in some embodiments, the support cover 70 can also be dispensed with.

[0065] The second surface 10b can be processed with the auxiliary carrier 20 fixedly attached to the substrate assembly 10. For example, the processing can include at least one of the following: grinding; etching; cleaving (e.g., using a laser-assisted splitting method and / or an ion-implantation-assisted splitting method); cutting (e.g., using electrical discharge machining EDM and / or electrochemical discharge machining ECDM); thermal annealing at a temperature above 350 °C and below 600 °C; a lithography step; ion implantation; layer deposition. Additionally, the first surface 10a can be processed at least partially through at least one opening 21 in the auxiliary carrier 20, in particular using at least one of the process steps mentioned. In the case of processing the first surface 10a through the opening 21, the filling material 40 can be dispensed with or removed before processing the first surface 10a.

[0066] In an optional subsequent step, the optional support cap 70 and / or the optional filling material 40 can be removed. In some examples, removing the support cap 70 can include remelting additional fusion portions 71. Removing the filling material 40 can include, for example, at least one of the following: dissolving the filling material 40, etching (e.g., wet etching) the filling material 40, plasma treating the filling material 40, mechanically removing the filling material 40. Portions of the additional fusion portions 71 can remain at the auxiliary carrier 20. The wafer composite structure 102 including the processed substrate assembly 10 and the auxiliary carrier 20 (and optionally the support cap and / or the filling material 40) can be cleaned (e.g., via water rinsing) and dried. Then, further processing steps (e.g., thermal annealing and / or deposition of a metallization layer, optionally by using electrochemical deposition) can be applied to the substrate assembly 10, particularly to the second surface 10b of the substrate assembly 10. Then the entire wafer composite structure 102 can be arranged on a dicing frame, and the semiconductor device layer 14 of the substrate assembly 10 can be diced or the auxiliary carrier 20 can be disassembled before dicing the semiconductor device layer 14 of the substrate assembly 10. Alternatively, a temporary carrier 72 (e.g., a carrier foil) can be attached to the second surface 10b, as Figure 5B shown. The temporary carrier 72 can be attached to the second surface 10b before or after removing the support cap 70. The auxiliary carrier 20 can be disassembled from the substrate assembly 10 while the temporary carrier 72 is attached to the second surface 10b ( Figure 5B not shown). The substrate assembly 10 can be arranged on a dicing frame, where the temporary carrier is attached to the substrate assembly 10, and the temporary carrier 72 can be removed, typically before dicing (not shown in the figures). In some embodiments, the temporary carrier 72 can be part of the dicing frame or can include the dicing frame. Before and / or after disassembling the auxiliary carrier 20 from the substrate assembly 10, an electrical test of the semiconductor device structure 11 of the semiconductor device layer 14 can be performed.

[0067] Terms such as "first", "second", and the like are used to describe various elements, regions, parts, etc., and are not intended to be restrictive either. Throughout the specification, the same terms refer to the same elements.

[0068] Directional terms such as "above", "over", "on", "under", "below", etc. only define the orientation of two components relative to each other and should not be construed as defining an absolute orientation relative to the external environment (e.g., the earth's gravitational field). For example, a first component "above" or "on" a second component is equivalent to the first component being "under" or "below" the second component after rotating approximately 180°.

[0069] Moreover, if the first component is "covered" by the second component, this does not mean that the first and second components are directly adjacent to each other. Instead, additional components may be located between the first and second components.

[0070] As used herein, the terms "having", "containing", "including", "comprising" and the like are open-ended terms that indicate the presence of the recited element or feature, but do not preclude additional elements or features. The articles "a", "an" and "the" are intended to include the plural as well as the singular, unless the context clearly dictates otherwise.

[0071] Although specific examples have been illustrated and described herein, those of ordinary skill in the art will understand that various alternative and / or equivalent implementations may be substituted for the specific examples shown and described without departing from the scope of the present invention. In particular, it should be understood that, unless otherwise specifically noted, the features of the various examples described herein may be combined with each other. Accordingly, the present invention is intended to be limited only by the claims and their equivalents.

Claims

1. A method for processing a substrate assembly (10) having a semiconductor device layer (14), comprising the steps of: Arranging an auxiliary carrier (20) at the substrate assembly (10) such that a connection surface (20a) of the auxiliary carrier (20) and a first surface (10a) of the substrate assembly (10) are directly adjacent to each other; Fixingly attaching the auxiliary carrier (20) to the substrate assembly (10) by melting a carrier portion of the auxiliary carrier (20) and a substrate portion (101) of the substrate assembly (10) that is directly adjacent to the carrier portion (201) of the auxiliary carrier (20) such that the auxiliary carrier (20) and the substrate assembly (10) are locally fused only in a fused portion (30) of the auxiliary carrier (20) and the substrate assembly (10), wherein the fused portions (30) are laterally separated from each other by at least one unfused portion; and Processing the semiconductor device layer (14) of the substrate assembly (10) with the auxiliary carrier (20) fixingly attached to the substrate assembly (10).

2. The method according to the preceding claim, Among them, The method further comprises the step of detaching the auxiliary carrier (20) from the substrate assembly (10) by remelting the fused portion (30) of the auxiliary carrier (20) and the substrate assembly (10) such that the fused portion (30) is released.

3. The method according to any one of the preceding claims, Among them, The method further comprises the step of detaching the auxiliary carrier (20) from the substrate assembly (10) by changing the temperature of the auxiliary carrier (20) from a first carrier temperature to a second carrier temperature and thereby changing the temperature of the substrate assembly (10) from a first substrate temperature to a second substrate temperature, wherein the second substrate temperature is different from the second carrier temperature, and wherein the change in temperature is performed such that the materials of the substrate assembly and the auxiliary carrier are selected such that the auxiliary carrier (20) and the substrate assembly (10) undergo different thermal expansions during the temperature change.

4. The method according to any one of claims 1 and 2, Among them, The method further comprises the step of detaching the auxiliary carrier (20) from the substrate assembly (10) by: (i) attaching a stress-inducing layer to the auxiliary carrier (20) and / or to the substrate assembly (10) at a first temperature; (ii) cooling the stress-inducing layer (60) to a second temperature that is at least lower than the first temperature when the stress-inducing layer (60) is attached to the auxiliary carrier (20) or to the substrate assembly (10); and (iii) removing the auxiliary carrier (20) from the substrate assembly (10); wherein the coefficient of thermal expansion of the stress-inducing layer (60) is different from the coefficients of thermal expansion of the auxiliary carrier (20) and the substrate assembly (10), and wherein the second temperature and the difference between the coefficient of thermal expansion of the stress-inducing layer (60) and the coefficients of thermal expansion of the auxiliary carrier (20) and the substrate assembly (10) are selected such that a crack (61) is induced in at least some of the fused portions (30).

5. The method according to any one of claims 1 and 2, Among them, The semiconductor device layer (14) of the substrate assembly (10) includes a plurality of semiconductor device structures (11) and a plurality of separation regions (12), wherein adjacent semiconductor device structures (11) are laterally separated from each other by at least one of the separation regions (12); wherein the fusion part (30) is only located above the separation region (12) in the vertical direction (z); wherein the method further includes separating the semiconductor device structures (11) and detaching the auxiliary carrier (20) from the substrate assembly (10) by cutting through the separation region (12) and through the corresponding fusion part (30) above the separation region (12) along the vertical direction (z).

6. The method according to any one of claims 1 and 2, Among them, The substrate assembly (10) includes a mechanically weak structure, wherein, in the vertical direction, the fusion part (30) and the mechanically weak structure overlap, and wherein detaching the auxiliary carrier (20) includes selectively removing the mechanically weak structure from the substrate assembly (10).

7. The method according to claim 3, further comprising: After attaching the auxiliary carrier (20) to the substrate assembly (10) and before detaching the auxiliary carrier (20) from the substrate assembly (10), attaching a temporary carrier to the second surface (10b) of the substrate assembly (10) opposite to the first surface (10a).

8. The method according to any one of claims 1 and 2, Among them, At the first surface (10a), the fusion part (30) is laterally separated from the other by at least one unfused part (31) where the auxiliary carrier (20) and the substrate assembly (10) are not fused, and wherein the auxiliary carrier (20) includes at least one opening (21), wherein the auxiliary carrier (20) is fixedly attached to the substrate assembly (10) such that at least one opening (21) and at least one unfused part (31) at least partially overlap in the vertical direction.

9. The method according to any one of claims 1 and 2, Among them, The auxiliary carrier (20) includes an annular part and at least one opening (21), wherein the annular part surrounds the at least one opening (21), wherein the annular part only covers the outer circumference of the substrate assembly (10), and wherein the fusion part (30) is only located in the region of the annular part.

10. The method according to any one of claims 1 and 2, Among them, The auxiliary carrier (20) includes a plurality of bridges of a grid and a plurality of openings (21), wherein the bridges surround the plurality of openings (21), and wherein the fusion part (30) is only located in the region of the bridges of the grid.

11. The method according to any one of claims 1 and 2, Among them, At the first surface (10a), the fusion part (30) is laterally separated from the other by at least one unfused part (31) where the auxiliary carrier (20) and the substrate assembly (10) are not fused, and wherein the method further includes applying a filling material (40) such that the filling material (40) at least partially covers the at least one unfused part (31).

12. The method according to any one of claims 1 and 2, Among them, The auxiliary carrier (20) mechanically stabilizes and / or protects the substrate assembly (10) during processing of the substrate assembly (10).

13. The method according to any one of claims 1 and 2, Among them, after the auxiliary carrier (20) is fixedly attached to the substrate assembly (10), the method includes fixedly attaching a support cover (70) to the auxiliary carrier (20) at the rear surface (20b) of the auxiliary carrier (20), wherein the rear surface (20b) is opposite to the connection surface (20a).

14. The method according to claim 13, Among them, the auxiliary carrier (20) includes at least one opening (21), wherein the support cover (70) overlaps at least one opening (21) of the auxiliary carrier (20) at least in some positions.

15. The method according to any one of claims 1 and 2, Among them, Melting and / or remelting the carrier portion (201) and the substrate portion (101) includes welding.

16. The method according to claim 15, wherein, The welding is laser welding.

17. The method according to claim 15, Among them, the melted substrate portion (101) includes an absorption layer (13), and wherein the absorption layer (13) has an absorption coefficient higher than that of the semiconductor material of the semiconductor device layer (14).

18. The method according to any one of claims 1 and 2, Among them, processing the substrate assembly (10) includes at least one of the following: grinding the substrate assembly (10); etching the substrate assembly (10); applying a processing mask; cleaving and / or cutting the substrate assembly (10); thermally annealing the layers and / or portions of the substrate assembly (10); ion implantation; depositing a metallization layer; electrically testing the semiconductor device structure (11) of the substrate assembly (10).

19. The method according to any one of claims 1 and 2, further includes before the auxiliary carrier (20) is fixedly attached to the substrate assembly (10), modifying the material of the auxiliary carrier (20) by a laser beam (56) and / or etching.

20. The method according to any one of claims 1 and 2, Among them, the method is part of a method for manufacturing a semiconductor device.

21. The method according to any one of claims 1 and 2, Among them, processing the substrate assembly (10) includes subjecting the substrate assembly (10) with the fixedly attached auxiliary carrier (20) to a temperature higher than 350 °C.

22. The method according to any one of claims 1 and 2, Among them, the fusion portion (30) covers at most 20% of the first surface (10a) of the substrate assembly (10).

23. A wafer composite structure, including an auxiliary carrier (20) having a connection surface (20a), and a substrate assembly (10) having a semiconductor device layer (14) and a first surface (10a), Among them, the auxiliary carrier (20) and the substrate assembly (10) are locally fused only in the fusion portion (30) of the auxiliary carrier (20) and the substrate assembly (10), wherein the fusion portions (30) are laterally separated from each other by at least one unfused portion.

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