Filter and filter manufacturing method

Abstract

The present invention discloses a filter and a method for preparing the filter. The filter includes a wafer and an embedded inductor; a capacitor is provided on the wafer, and the capacitor and the embedded inductor are connected via a connecting portion. By providing the capacitor on the wafer, not only can the capacitor be guaranteed to have a high quality factor, but also a capacitor with a relatively large capacitance value can be generated in a relatively small occupied space, thereby reducing the occupied space of the capacitor. In addition, an embedded inductor is formed in the substrate, which can ensure the high quality factor of the inductor. When the capacitor on the wafer is connected to the embedded inductor, the capacitor and inductor with a high quality factor can form a filter with good performance, meet the performance requirements of the filter in different applications, and improve the applicability of the filter. Moreover, the capacitor element and the inductor element are formed separately, which can better control the yield of each element, thereby improving the yield of the filter formed after the capacitor element and the inductor element are connected, thereby helping to reduce the cost of the filter.

Description

Technical Field

[0001] The embodiments of the present invention relate to the field of filtering technology, and in particular to a filter and a method for preparing the filter. Background Art

[0002] RF filters are a crucial component of modern wireless communication front-ends. They select the frequency band for a given communication standard and suppress interference and noise in the environment. High-performance RF filters help improve the transceiver's signal-to-noise ratio and reduce unintended electromagnetic radiation to the surrounding environment.

[0003] Radio frequency filters may include acoustic devices, and may also include capacitors and inductors. Filters based on capacitors and inductors (LC filters) can provide sufficiently excellent broadband performance. Typically, LC filters can use low-temperature cofired ceramics (LTCC) technology or semiconductor wafer-level processes compatible with thick metal processes to form capacitors and inductors with high quality factors in the same process system. The LTCC process can integrate multiple metal layers with multiple layers of low-loss ceramics to form a multi-coil inductor with a high quality factor. However, the LTCC process is difficult to form integrated high-dielectric films, so it is difficult to form capacitors with relatively large capacitance values ​​in the LTCC process. Semiconductor wafer-level processes can achieve compact capacitors with high quality factors, but lack sufficiently thick metal to achieve inductors with high quality factors. Summary of the Invention

[0004] The present invention provides a filter and a method for preparing the filter, so as to improve the performance of the filter.

[0005] In a first aspect, an embodiment of the present invention provides a filter, comprising a wafer and an embedded inductor; a capacitor is provided on the wafer, and the capacitor and the embedded inductor are connected via a connecting portion.

[0006] Optionally, a plurality of capacitors are provided on the wafer; there are a plurality of connecting parts; and the two plates of each capacitor are respectively connected to the embedded inductor through a connecting part.

[0007] Optionally, a passivation layer is further provided on the wafer, and the passivation layer covers the capacitor and exposes the area where the connecting portion is connected to the wafer.

[0008] Optionally, the embedded inductor includes multiple metal layers; the multiple metal layers form at least one inductor; the first end of the inductor is connected to one end of the capacitor through the connecting part, and the second end of the inductor is connected to the other end of the capacitor or to the ground through the connecting part.

[0009] Optionally, each of the inductors is formed by one metal layer or multiple metal layers.

[0010] Optionally, the embedded inductor includes a plurality of the inductors, at least two of the inductors are electrically connected, and common ends of at least two of the inductors share the same connecting portion.

[0011] Optionally, the multiple layers of metal layers include a top metal layer and an intra-chip metal layer, the first end of the inductor is arranged on the intra-chip metal layer, and the first end of the inductor is connected to the top metal layer through a via; wherein, the top metal layer is the first metal layer on the side of the embedded inductor adjacent to the wafer, and the intra-chip metal layer is other metal layers in the multiple layers of metal layers other than the top metal layer.

[0012] Optionally, the embedded inductor further includes an insulating layer, and the insulating layer is arranged between adjacent metal layers.

[0013] Optionally, the connecting portion includes a solder ball and a solder pad; the solder ball is arranged on the wafer and contacts the capacitor; the solder pad is arranged on the embedded inductor and contacts the inductor.

[0014] In a second aspect, an embodiment of the present invention further provides a method for preparing a filter, comprising:

[0015] Capacitors are formed on wafers using semiconductor processes;

[0016] forming an embedded inductor on a substrate;

[0017] The capacitor on the wafer is connected to the embedded inductor through a flip-chip method.

[0018] The technical solution of the embodiment of the present invention, by arranging capacitors on the wafer, can not only ensure that the capacitors on the wafer have a high quality factor, but also can produce capacitors with relatively large capacitance values ​​with a relatively small occupied space, thereby reducing the occupied space of the capacitors on the basis of ensuring the quality factor of the capacitors. And an embedded inductor is formed in the substrate to ensure the high quality factor of the inductor. When the capacitors on the wafer are connected to the embedded inductor, the capacitors and inductors with high quality factors can form a filter with good performance, meet the performance requirements of the filter in different applications, and improve the applicability of the filter. In addition, the capacitors on the wafer are compact capacitors, which can produce capacitors with relatively large capacitance values ​​with a relatively small occupied space, thereby reducing the occupied space of the capacitors on the basis of ensuring the quality factor of the capacitors, which is conducive to reducing the occupied space of the filter. Moreover, the capacitor element and the inductor element are formed separately, which can better control the yield rate of each element, thereby improving the yield rate of the filter formed after the capacitor element and the inductor element are connected, thereby helping to reduce the cost of the filter. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 A schematic structural diagram of a filter provided by an embodiment of the present invention;

[0020] Figure 2 A performance diagram of a filter provided by an embodiment of the present invention;

[0021] Figure 3 A circuit diagram of a filter provided by an embodiment of the present invention;

[0022] Figure 4 for Figure 3 A schematic diagram of the structure of a capacitor wafer corresponding to the circuit schematic diagram of the provided filter;

[0023] Figure 5 for Figure 3 A schematic cross-sectional structure diagram of an embedded inductor corresponding to the circuit schematic diagram of the provided filter;

[0024] Figure 6 A schematic cross-sectional view of an embedded inductor provided by an embodiment of the present invention;

[0025] Figure 7 A schematic cross-sectional view of another embedded inductor provided by an embodiment of the present invention;

[0026] Figure 8 A schematic flow chart of a method for preparing a filter provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0027] The present invention will be further described in detail below with reference to the accompanying drawings and examples. It will be understood that the specific embodiments described herein are intended only to illustrate the present invention and are not intended to limit the present invention. It should also be noted that, for ease of description, the accompanying drawings only illustrate portions relevant to the present invention, not all structures.

[0028] Figure 1 Schematic diagram of the structure of a filter provided by an embodiment of the present invention. Figure 1 As shown, the filter includes a wafer 110 and an embedded inductor 120 ; a capacitor is provided on the wafer 110 , and the capacitor and the embedded inductor 120 are connected via a connecting portion 130 .

[0029] Specifically, the wafer 110 can be a complete wafer or a cut wafer. When a capacitor is provided on the wafer 110, the wafer 110 can be referred to as a capacitor wafer or a capacitor chip. The material of the wafer 110 can be one of high-resistance silicon, glass, quartz and sapphire. When a capacitor is provided on the wafer 110, a micro-capacitor can be formed on the wafer by a semiconductor micromachining process, which not only ensures that the capacitor on the wafer 110 has a high quality factor, but also can produce a capacitor with a relatively large capacitance value in a relatively small occupied space, thereby reducing the occupied space of the capacitor while ensuring the quality factor of the capacitor. When the capacitor and the embedded inductor 120 form a filter, the occupied space of the filter is also relatively small, which is conducive to the application of the filter in scenarios where the size requirements of the filter are relatively small. For example, the filter can be applied to scenarios such as mobile phone wireless front-ends, small / micro battery base stations, wifi routers, data cards, POS machines, wearable electronic products and other industrial Internet of Things systems.

[0030] Embedded inductor 120 includes a substrate 121. By providing a relatively thick metal layer on substrate 121, an inductor with a high quality factor can be formed on substrate 121, thereby enabling the filter to have an inductor with a high quality factor. For example, the thickness of the metal layer on embedded inductor 120 can range from 5 μm to 80 μm, ensuring that the quality factor of embedded inductor 120 meets the filter's requirements.

[0031] It should be noted that Figure 1 Schematically, substrate 121 includes a single metal layer. In other embodiments, multiple metal layers may be provided within substrate 121, with adjacent metal layers electrically isolated by insulating layers. Multiple metal layers may form an inductor by spanning.

[0032] After forming the capacitor and the embedded inductor 120, according to the circuit schematic diagram of the filter, the capacitor on the wafer 110 and the embedded inductor 120 are electrically connected through the connecting portion 130 to form a filter. Since the capacitor on the wafer 110 and the embedded inductor 120 both have a high quality factor, the filter can have good performance, meet the performance requirements of the filter in different applications, and improve the applicability of the filter. In addition, the capacitor on the wafer 110 is a compact capacitor, which can produce a capacitor with a relatively large capacitance value in a relatively small occupied space, thereby reducing the occupied space of the capacitor while ensuring the quality factor of the capacitor, which is conducive to reducing the occupied space of the filter. Figure 2 The performance diagram of a filter provided by an embodiment of the present invention is shown in FIG. The horizontal axis is the normalized frequency, the vertical axis is the insertion loss and return loss, Curve 1 is the insertion loss curve of a filter provided by an embodiment of the present invention, and Curve 2 is the return loss curve of a filter provided by an embodiment of the present invention. Figure 2As shown, the filter has a relatively low insertion loss of 1.2dB at the center frequency, and the return loss is also relatively low, which ensures a good passband at the center frequency. At the same time, the out-of-band suppression is greater than 30dB, indicating that the filter has good out-of-band suppression. This shows that when the capacitors and embedded inductors 120 provided on wafer 110 form a filter, the high quality factor of the capacitors and inductors results in better filter performance.

[0033] In addition, the capacitor and inductor components are formed separately, which can better control the yield of each component, thereby improving the yield of the filter formed after the capacitor and inductor components are connected, thereby helping to reduce the cost of the filter.

[0034] It should be noted that, according to the circuit schematic diagram of the filter, the capacitors and embedded inductors 120 on the wafer 110 may be connected in series and / or in parallel to form different types of filters.

[0035] Based on the above technical solution, the connecting part includes a solder ball and a solder pad; the solder ball is arranged on the wafer and contacts the capacitor; the solder pad is arranged on the embedded inductor and contacts the inductor.

[0036] Specifically, when the capacitor on the wafer is connected to the embedded inductor through a connecting portion, the capacitor wafer can be connected to the embedded inductor through a flip-chip method. When the capacitor wafer is connected to the embedded inductor through a flip-chip method, the connecting portion may include a solder ball and a solder pad. The solder ball may be a tin ball, an indium ball or a copper pillar, and the solder ball is deposited on the plate of the capacitor on the wafer, so that the solder ball and the capacitor can be electrically connected. The solder pad is provided on the embedded inductor to achieve electrical connection between the solder pad and the embedded inductor. When the capacitor on the wafer is connected to the embedded inductor, the capacitor wafer can be flipped so that the side with the solder ball deposited is facing downward, and then the solder ball is heated to melt the solder ball and the solder pad, thereby achieving low-ohmic loss electrical connection between the capacitor and the embedded inductor.

[0037] In addition, when forming the pads on the embedded inductor, by setting the position of the pads, during flip-chip connection, the solder balls and the pads are aligned one by one in the direction from the capacitor wafer to the embedded inductor, thereby achieving electrical connection between the solder balls and the pads during melting.

[0038] It should be noted that the solder ball can also have other shapes, such as a cylindrical shape, which is only an example and not a limitation. Similarly, the shape of the solder pad can be a concave column or a convex column, which is not limited here either.

[0039] On the basis of the above technical solutions, a plurality of capacitors are provided on the wafer; there are a plurality of connecting parts; and the two plates of each capacitor are respectively connected to the embedded inductor through a connecting part.

[0040] Specifically, the capacitor may specifically include a first electrode, a dielectric insulating layer, and a second electrode stacked in sequence, and the first electrode and the second electrode are at least partially opposite. The thickness range of the first electrode and the second electrode may be 100nm to 10μm, and the material may be a metal, for example, at least one of AlCu, Cu, Au, and Pt. The thickness range of the dielectric insulating layer may be 30nm to 1μm, and the material may be SiNx, SiOx, TaON, TiO2, or Al2O3. The capacitance value of the capacitor can be adjusted by the size of the overlapping area between the first electrode and the second electrode, and the capacitance value of the capacitor in this case ranges from 0.01pf to 10pf. On this basis, different numbers of capacitors and the capacitance value of each capacitor can be set on the wafer according to the capacitance value required by the filter. For example, depending on the number of capacitors on the wafer, the single-side length range of the wafer can be 200μm to 2mm. In addition, when forming the capacitor on the wafer, the thickness range of the capacitor wafer can be 200μm to 800μm. After forming the capacitors on the wafer, the wafer can be thinned so that the thickness of the capacitor wafer ranges from 50μm to 300μm, which is conducive to the integration of the capacitor wafer into a flip chip.

[0041] When a wafer includes multiple capacitors, multiple connecting portions are correspondingly provided, so that the two plates of each capacitor are connected to the embedded inductor via a connecting portion, respectively. This allows each capacitor to be independently connected to the embedded inductor, which facilitates the flexible design of the filter's passband frequency. In addition, in other embodiments, when a connection relationship exists between two capacitors, the common ends of the two capacitors can share a connecting portion, which not only satisfies the connection relationship of the capacitors, but also reduces the number of connecting portions, which helps to simplify the filter manufacturing process.

[0042] It should be noted that the number of capacitors on the wafer and the connection relationship with the connection part can be set according to the circuit schematic diagram of the filter. Figure 3 The circuit diagram of a filter provided by an embodiment of the present invention is shown in FIG. Figure 3 As shown, the filter includes four capacitors C, and the four capacitors C are connected in series in pairs, so a common terminal A is formed between the four capacitors C, and the common terminals A can share a connection portion. Figure 4 for Figure 3 The circuit diagram of the filter provided corresponds to a structural diagram of a capacitor wafer. Figure 4 As shown, four connecting portions 130 are provided on the capacitor wafer, each connecting portion 130 is connected to Figure 3 The common terminals A of the four capacitors are connected in pairs.

[0043] in addition, Figure 3The capacitance values ​​of the four capacitors C in can be equal or different, and can be designed according to the passband frequency of the filter.

[0044] On the basis of the above technical solutions, a passivation layer is further provided on the wafer, which covers the capacitor and exposes the area where the connecting portion is connected to the wafer.

[0045] Specifically, the passivation layer can cover the capacitor, isolating the capacitor from corrosion by external air, reducing the risk of short circuits between capacitors. At the same time, it can buffer the impact of external forces on the capacitor, effectively protecting the capacitor and extending the life of the capacitor wafer. In addition, connecting parts such as solder balls can also be set on the capacitor wafer. In this case, the passivation layer exposes the area where the connecting part is set, ensuring electrical connection between the connecting part and the capacitor. Exemplarily, the material of the passivation layer can be SiNx and SiO2.

[0046] Based on the above technical solutions, the embedded inductor includes multiple metal layers; the multiple metal layers form at least one inductor; the first end of the inductor is connected to one end of the capacitor through the connecting part, and the second end of the inductor is connected to the other end of the capacitor or to the ground through the connecting part.

[0047] Specifically, the material of the metal layer can be copper, and the metal layer can form an inductor by forming a metal winding. The two ends of the metal winding can be the two ends of the inductor respectively. The micro width range of the metal winding can be 10 μm to 150 μm. One end of the inductor is connected to one end of the capacitor through a connecting portion, and the second end of the inductor is connected to the other end of the capacitor or to the ground through a connecting portion, thereby forming a filter. A ground pad can be provided on the side of the embedded inductor away from the wafer as the ground terminal, and the second end of the inductor can be connected to the ground pad to achieve connection with the ground terminal. Moreover, the number of embedded inductors and the connection relationship can be set according to the circuit schematic diagram of the filter. For example, refer to Figure 3 ,exist Figure 3 In the embodiment, the filter includes four inductors L, and both ends of each inductor L are connected to a connecting portion respectively, so that each inductor can be independently connected to a capacitor on the wafer, which is conducive to the flexible design of the bandpass frequency of the filter.

[0048] Furthermore, the number of metal layers in the embedded inductor is not limited and can be set based on the inductance required by the filter's circuit schematic. For example, the embedded inductor can have 2-10 metal layers. The thickness of each metal layer can be equal or different. The thickness of each metal layer can range from 5 μm to 80 μm.

[0049] It should be noted that the second ends of some inductors are connected to the ground, so the second ends of these inductors may share one or more connection parts.

[0050] Figure 5 for Figure 3The circuit diagram of the filter provided corresponds to a cross-sectional structural diagram of an embedded inductor. Figure 5 As shown, each inductor is formed by one metal layer or multiple metal layers.

[0051] Specifically, when the inductor is formed by multiple metal layers, the inductor can be formed by crossing the multiple metal layers. When crossing the multiple metal layers, adjacent metal layers can be connected by vias. For example, Figure 5 As shown, the embedded inductor includes four metal layers, wherein one inductor L is formed by two metal layers, and the two metal layers are connected by a via D. When the inductor is formed by one metal layer, it is formed by one metal layer in the stacked multiple metal layers in a winding form.

[0052] Continue to refer Figure 5 The embedded inductor further includes an insulating layer 122 , which is disposed between adjacent metal layers.

[0053] Specifically, the insulating layer 122 can be an organic insulating layer, for example, a ceramic material (for example, a resin). The insulating layer 122 between adjacent metal layers can be formed by embedding the metal layer in a substrate on which the insulating layers are stacked. By providing the insulating layer 122, short circuits between adjacent metal layers can be avoided. When multiple metal layers form an inductor by spanning, the adjacent metal layers are connected by punching holes in the insulating layer 122 and filling them with a conductive medium. The thickness of the insulating layer 122 can be set according to the inductance requirements of the filter. Exemplarily, the thickness of each insulating layer 122 can range from 5 μm to 80 μm.

[0054] It should be noted that, continue to refer to Figure 5 On the side of the embedded inductor away from the wafer, the filter input terminal 123, output terminal 124 and ground pins are also provided ( Figure 5 The filter is formed by a plurality of layers of ...

[0055] On the basis of the above technical solutions, the embedded inductor includes a plurality of inductors, at least two of which are electrically connected, and common ends of the at least two inductors share the same connecting portion.

[0056] Specifically, when the embedded inductor includes multiple inductors and there is a connection relationship between two inductors, the common end B of the two inductors can share a connection part, which can not only meet the connection relationship of the inductors, but also reduce the setting of the connection part, which is conducive to simplifying the preparation process of the filter. Figure 3In the figure, four inductors L are connected in series in pairs, and both ends of the series connection are connected to the ground terminal, so a common terminal B is formed between the four inductors L, and the common terminal B can share a connection part. Figure 3 Each inductor L is connected in parallel with a capacitor C, forming four sub-filters. That is, the two ends of each inductor L are connected to the two ends of a capacitor C, respectively. The common end A of the four capacitors C is then connected to the four common ends B of the four inductors L via connectors. The four sub-filters form a π-type filter. The two sub-filters connected in series provide the transmission zeros of the filter response, while the two parallel sub-filters on either side of the π-type provide the transmission poles of the filter response.

[0057] Continue to refer Figure 5 The multi-layer metal layer includes a top metal layer 125 and an intra-chip metal layer 126. The first end of the inductor is set on the intra-chip metal layer 126, and the first end of the inductor is connected to the top metal layer 125 through a via E; wherein, the top metal layer 125 is the first metal layer on the side of the embedded inductor adjacent to the wafer, and the intra-chip metal layer 126 is the other metal layer in the multi-layer metal layer except the top metal layer.

[0058] Specifically, Figure 5 The embedded inductor is shown as comprising four metal layers. These four metal layers are the top metal layer 125, the first intra-chip metal layer 126A, the second intra-chip metal layer 126B, and the third intra-chip metal layer 126C. When the first end of the inductor L is in the first intra-chip metal layer 126A, it is connected to the top metal layer 125 through a via E, and then to the connection portion through the top metal layer 125, thus connecting the inductor L to the connection portion.

[0059] It should be noted that when the first end of the inductor L is connected to the top metal layer 125 through the via E, the portion of the top metal layer 125 connected to the first end of the inductor L is insulated from the other portions of the top metal layer 125 to prevent incorrect connection caused by a short circuit between the inductor L and other inductors or capacitors. In this case, the portion of the top metal layer 125 connected to the first end of the inductor L is considered as part of the inductor L. In addition, Figure 5 The inductor L shown in the figure is merely an example of a first end disposed on the first intra-chip metal layer 126A. In other embodiments, the first ends of other inductors may also be disposed on the top metal layer 125, in which case the top metal layer 125 may be directly connected to the connection portion. The first ends of other inductors may also be disposed on other intra-chip metal layers, in which case the first ends of the inductors are similarly connected to the top metal layer 125 through vias, and then to the connection portion through the top metal layer 125.

[0060] In addition, Figure 5In the embodiment, the top metal layer 125 is disposed on the insulating layer 122. When the metal layer is embedded in the insulating layer 122, the top metal layer 125 can be disposed in the insulating layer 122. For example, Figure 6 Schematic diagram of the cross-sectional structure of an embedded inductor provided by an embodiment of the present invention. Figure 6 As shown, the top metal layer 125 is embedded in the insulating layer 122 , and the surface of the top metal layer 125 away from the intra-chip metal layer 126 is flush with the surface of the insulating layer 122 close to the top metal layer 125 .

[0061] In other embodiments, the surface of the top metal layer 125 away from the intra-chip metal layer 126 may be lower than the surface of the insulating layer 122 close to the top metal layer 125 . Figure 7 FIG2 is a schematic cross-sectional view of another embedded inductor provided by an embodiment of the present invention. Figure 7 As shown, the surface of the top metal layer 125 away from the intra-chip metal layer 126 is lower than the surface of the insulating layer 122 close to the top metal layer 125, so that the top metal layer 125 is completely embedded in the insulating layer 122. The top metal layer 125 is exposed at the location of the connection portion 130, so that the top metal layer 125 can be connected to the capacitor through the connection portion 130.

[0062] An embodiment of the present invention also provides a method for preparing a filter. Figure 8 The flowchart of the method for preparing a filter provided by the embodiment of the present invention is as follows. Figure 8 As shown, the method includes:

[0063] S10, forming a capacitor on the wafer using a semiconductor process;

[0064] S20, forming an embedded inductor on the substrate;

[0065] Specifically, the substrate may be formed by stacking an insulating layer and a metal layer. For example, the insulating layer of the substrate may be made of resin or ceramic. By arranging multiple metal layers on the substrate, at least one inductor is formed.

[0066] S30, the capacitor on the wafer is connected to the embedded inductor through a flip-chip method.

[0067] The technical solution of this embodiment, by forming a capacitor using a semiconductor process on a wafer, can not only ensure that the capacitor on the wafer has a high quality factor, but also can produce a capacitor with a relatively large capacitance value with a relatively small occupied space, so that the occupied space of the capacitor can be reduced on the basis of ensuring the quality factor of the capacitor. And forming an embedded inductor on the substrate can ensure the high quality factor of the inductor. When the capacitor on the wafer is connected to the embedded inductor by a flip-chip method, the capacitor and inductor with a high quality factor can form a filter with good performance, meet the performance requirements of the filter in different applications, and improve the applicability of the filter. In addition, the capacitor on the wafer is a compact capacitor, which can produce a capacitor with a relatively large capacitance value with a relatively small occupied space, so that the occupied space of the capacitor can be reduced on the basis of ensuring the quality factor of the capacitor, which is conducive to reducing the occupied space of the filter. Moreover, the capacitor element and the inductor element are formed separately, which can better control the yield rate of each element, thereby improving the yield rate of the filter formed after the capacitor element and the inductor element are connected, which is conducive to reducing the cost of the filter.

[0068] Note that the above are only preferred embodiments of the present invention and the technical principles employed. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein, and that various obvious changes, readjustments, and substitutions can be made by those skilled in the art without departing from the scope of protection of the present invention. Therefore, although the present invention has been described in detail through the above embodiments, the present invention is not limited to the above embodiments and may include many other equivalent embodiments without departing from the concept of the present invention. The scope of the present invention is determined by the scope of the appended claims.

Claims

1. A filter, characterized in that: The device comprises a wafer and an embedded inductor; the wafer is provided with a capacitor, and the capacitor and the embedded inductor are connected via a connecting portion; The embedded inductor includes multiple metal layers; the multiple metal layers form at least one inductor; a first end of the inductor is connected to one end of the capacitor through the connecting portion, and a second end of the inductor is connected to the other end of the capacitor or to the ground through the connecting portion; The embedded inductor further includes an insulating layer, which is arranged between adjacent metal layers; The two adjacent metal layers are connected through vias.

2. The filter according to claim 1, wherein A plurality of capacitors are provided on the wafer; there are a plurality of connecting parts; and the two plates of each capacitor are connected to the embedded inductor via a connecting part respectively.

3. The filter according to claim 1, wherein A passivation layer is further provided on the wafer, and the passivation layer covers the capacitor and exposes the area where the connecting portion is connected to the wafer.

4. The filter according to claim 1, wherein Each of the inductors is formed by one metal layer or multiple metal layers.

5. The filter according to claim 1 or 4, characterized in that The embedded inductor includes a plurality of inductors, at least two of which are electrically connected, and common ends of at least two of the inductors share the same connecting portion.

6. The filter according to claim 1, wherein The multi-layer metal layer includes a top metal layer and an intra-chip metal layer. The first end of the inductor is arranged on the intra-chip metal layer, and the first end of the inductor is connected to the top metal layer through a via. The top metal layer is the first metal layer on the side of the embedded inductor adjacent to the wafer, and the intra-chip metal layer is the other metal layer in the multi-layer metal layer other than the top metal layer.

7. The filter according to claim 1, wherein The connecting portion includes a solder ball and a solder pad; the solder ball is arranged on the wafer and contacts the capacitor; the solder pad is arranged on the embedded inductor and contacts the inductor.

8. A method for preparing a filter, characterized in that: include: Capacitors are formed on wafers using semiconductor processes; forming an embedded inductor on a substrate; The capacitor on the wafer is connected to the embedded inductor through a flip-chip method; The embedded inductor includes multiple metal layers; the multiple metal layers form at least one inductor; a first end of the inductor is connected to one end of the capacitor through the connecting portion, and a second end of the inductor is connected to the other end of the capacitor or to the ground through the connecting portion; The embedded inductor further includes an insulating layer, which is arranged between adjacent metal layers; The two adjacent metal layers are connected through vias.

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