Fingerprint recognition module and manufacturing method thereof, and electronic device

Abstract

A fingerprint recognition module and a manufacturing method thereof, and an electronic device, the manufacturing method comprising: providing a substrate, in which a signal processing circuit is formed; forming a first oxide layer on the substrate; providing a carrier substrate; forming a piezoelectric transducer on the carrier substrate, the piezoelectric transducer comprising a first electrode, a piezoelectric layer located on the first electrode, and a second electrode located on the piezoelectric layer; forming a second oxide layer having a cavity on the piezoelectric transducer, the cavity at least exposing the second electrode; bonding the carrier substrate and the substrate by a melt bonding process through the second oxide layer and the first oxide layer; removing the carrier substrate. The method does not require the formation of a sacrificial layer for occupying the cavity position, and accordingly does not require the operation of releasing the sacrificial layer, so as to avoid the problem of forming sacrificial layer residues in the cavity, and the carrier substrate and the substrate are bonded by a melt bonding process, thereby improving the bonding reliability; in summary, the fingerprint recognition performance of the fingerprint recognition module is improved.

Description

Technical Field

[0001] The embodiments of the present invention relate to the field of semiconductor manufacturing, and in particular to a fingerprint recognition module and a manufacturing method thereof, and an electronic device. Background Art

[0002] Fingerprint recognition technology collects human fingerprint images through fingerprint imaging modules, and then compares them with existing fingerprint imaging information in the fingerprint recognition system to achieve identity recognition. Due to its convenience and the uniqueness of human fingerprints, fingerprint recognition technology has been widely used in various fields, such as: public security bureaus, customs and other security inspection fields, building access control systems, and consumer products such as personal computers and mobile phones, etc.

[0003] At present, ultrasonic fingerprint recognition technology has become one of the main fingerprint recognition technologies because of its advantages such as oil-proof and waterproof, strong penetration, stronger environmental adaptability, and can be used in more complex environments. The recognition unit used in ultrasonic fingerprint recognition technology is a piezoelectric transducer. The piezoelectric transducer is mainly composed of a bottom electrode, a top electrode, and a piezoelectric layer located between the bottom electrode and the top electrode. By using the inverse piezoelectric effect of the piezoelectric layer, as long as a fixed frequency voltage is applied to the bottom electrode and the top electrode on the upper and lower surfaces of the piezoelectric layer, the piezoelectric layer will vibrate, thereby generating ultrasonic waves. Since ultrasonic waves are absorbed, penetrated, and reflected to different degrees when they reach the surfaces of different materials, the difference in acoustic impedance between skin and air or different skin layers can be used to identify the location of the ridges and valleys of the fingerprint. Summary of the invention

[0004] The problem solved by the embodiments of the present invention is to provide a fingerprint recognition module and a manufacturing method thereof, and an electronic device, so as to improve the fingerprint recognition performance of the fingerprint recognition module.

[0005] To solve the above problems, an embodiment of the present invention provides a method for manufacturing a fingerprint recognition module, comprising: providing a substrate, in which a signal processing circuit is formed; forming a first oxide layer on the substrate; providing a carrying base; forming a piezoelectric transducer on the carrying base, the piezoelectric transducer comprising a first electrode, a piezoelectric layer located on the first electrode, and a second electrode located on the piezoelectric layer; forming a second oxide layer having a cavity on the piezoelectric transducer, the cavity at least exposing the second electrode; bonding the carrying base and the substrate by a melt bonding process through the second oxide layer and the first oxide layer; and removing the carrying base.

[0006] Correspondingly, an embodiment of the present invention also provides a fingerprint recognition module, comprising: a substrate, a signal processing circuit is formed in the substrate, and a first oxide layer is formed on the substrate; a piezoelectric transducer bonded to the substrate, the piezoelectric transducer comprising a first electrode, a piezoelectric layer located on the first electrode, and a second electrode located on the piezoelectric layer, a second oxide layer having a cavity is formed on the piezoelectric transducer, the cavity at least exposes the second electrode, and the second oxide layer is connected to the first oxide layer by a melt bonding process.

[0007] Correspondingly, an embodiment of the present invention further provides an electronic device, comprising the aforementioned fingerprint recognition module.

[0008] Compared with the prior art, the technical solution of the embodiment of the present invention has the following advantages:

[0009] In the manufacturing method of the fingerprint recognition module provided by the embodiment of the present invention, a first oxide layer is formed on the substrate, and a second oxide layer having a cavity is formed on the piezoelectric transducer, wherein the cavity at least exposes the second electrode, and a fusion bonding process is adopted through the second oxide layer and the first oxide layer to realize the bonding between the supporting substrate and the substrate; the first oxide layer and the second oxide layer are combined by bonding, so during the manufacturing process, there is no need to form a sacrificial layer for occupying the position of the cavity, and accordingly, there is no need to perform an operation of releasing the sacrificial layer, so as to avoid the problem of sacrificial layer residues being formed in the cavity due to unclean removal of the sacrificial layer, and the supporting substrate and the substrate are bonded by a fusion bonding process, and during the fusion bonding process, the contact surfaces of the first oxide layer and the second oxide layer are bonded by covalent bonding, and the first silicon oxide layer and the second silicon oxide layer have a high bonding strength, which correspondingly improves the bonding reliability between the supporting substrate and the substrate; in summary, the fingerprint recognition performance of the fingerprint recognition module is improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] Figures 1 to 3 It is a schematic diagram of the structure corresponding to each step in the method for manufacturing a fingerprint recognition module;

[0011] Figures 4 to 12 It is a schematic structural diagram corresponding to each step in an embodiment of a method for manufacturing a fingerprint recognition module of the present invention;

[0012] Figures 13 to 20 It is a schematic structural diagram corresponding to each step in another embodiment of the method for manufacturing a fingerprint recognition module of the present invention;

[0013] Fig.21 It is a structural schematic diagram of an embodiment of a fingerprint recognition module of the present invention. DETAILED DESCRIPTION

[0014] At present, the fingerprint recognition performance of the fingerprint recognition module needs to be improved. Now, combined with a manufacturing method of a fingerprint recognition module, the reason why its fingerprint recognition performance needs to be improved is analyzed.

[0015] Figures 1 to 3 The present invention is a structural schematic diagram corresponding to each step in a fingerprint recognition module manufacturing method.

[0016] refer to Figure 1 , a substrate 10 is provided, an insulating layer 20 is formed on the substrate 10 , and a cavity 25 is formed in the insulating layer 20 .

[0017] refer to Figure 2 , filling cavity 25 (such as Figure 1 As shown), a sacrificial layer 21 is formed; a deposition process and a patterning process are sequentially used to form a bottom electrode layer 30 on the sacrificial layer 21, and the bottom electrode layer 30 exposes a portion of the sacrificial layer 21; a piezoelectric layer 40 covering the insulating layer 20, the sacrificial layer 21 and the bottom electrode layer 30 is formed; a deposition process and a patterning process are sequentially used to form a top electrode layer 50 on the piezoelectric layer 40, and the top electrode layer 50, the piezoelectric layer 40 and the bottom electrode layer 30 constitute a piezoelectric transducer.

[0018] refer to Figure 3 A release hole 45 is opened in the piezoelectric layer 40. The release hole 45 is located at the periphery of the bottom electrode layer 30, and the release hole 45 exposes the sacrificial layer 21 (such as Figure 3 The sacrificial layer 21 in the cavity 25 is removed through the release hole 45.

[0019] The insulating layer 20 and the bottom electrode layer 30 are both formed on the substrate 10 by deposition, and the sacrificial layer 21 is used to fill the cavity 25, thereby providing a process platform for the formation of the bottom electrode layer 30, so as to facilitate the normal progress of the semiconductor process. However, when removing the sacrificial layer 21 in the cavity 25, it is difficult to ensure that the sacrificial layer 21 can be completely removed. In particular, with the development of miniaturization of fingerprint recognition modules, the diameter of the release hole 45 is getting smaller and smaller, which correspondingly increases the difficulty of removing the sacrificial layer 21, so that sacrificial layer residues are easily formed in the cavity 25. On the one hand, due to the need to perform the steps of forming the sacrificial layer 21 and removing the sacrificial layer 21, the process steps are complicated; on the other hand, when sacrificial layer residues are formed in the cavity 25, it is easy to cause the acoustic performance of the cavity 25 to deviate from the design value and fluctuate, thereby reducing the accuracy of fingerprint recognition.

[0020] In order to solve the technical problem, an embodiment of the present invention forms a first oxide layer on a substrate, and forms a second oxide layer having a cavity on a piezoelectric transducer, wherein the cavity exposes at least a second electrode, and a melt bonding process is used to realize bonding between the supporting substrate and the substrate through the second oxide layer and the first oxide layer; the first oxide layer and the second oxide layer are combined by bonding, and during the manufacturing process of the fingerprint recognition module, there is no need to form a sacrificial layer for occupying the cavity position, and there is no need to subsequently release the sacrificial layer to avoid the problem of sacrificial layer residues being formed in the cavity due to unclean removal of the sacrificial layer, and through the melt bonding process, the bonding strength between the first silicon oxide layer and the second silicon oxide layer is relatively high, which improves the bonding reliability between the supporting substrate and the substrate; in summary, the fingerprint recognition performance of the fingerprint recognition module is improved.

[0021] In order to make the above-mentioned purposes, features and advantages of the embodiments of the present invention more obvious and understandable, specific embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0022] Figures 4 to 12 It is a schematic structural diagram corresponding to each step in an embodiment of a method for manufacturing a fingerprint recognition module of the present invention.

[0023] refer to Figure 4 , providing a substrate 160, in which a signal processing circuit is formed.

[0024] The substrate 160 is used to bond with the piezoelectric transducer to form a fingerprint recognition module. A signal processing circuit is formed in the substrate 160, and the substrate 160 is used to drive the piezoelectric transducer and process the detection signal generated by the piezoelectric transducer during the use of the fingerprint recognition module. In this embodiment, the substrate 160 is formed based on the CMOS process, specifically a wafer-level substrate, so that the substrate 160 and the piezoelectric transducer can be integrated in a wafer-level manner to improve manufacturing efficiency. In other embodiments, the substrate can also be a chip-level substrate.

[0025] In this embodiment, the signal processing circuit in the substrate 160 has a connection terminal 165, and the connection terminal 165 is used to realize the electrical connection between the substrate 160 and other devices or piezoelectric transducers. The substrate 160 is a wafer-level substrate, and the number of the connection terminals 165 is correspondingly multiple. Specifically, the substrate 160 exposes the connection terminal 165, and the connection terminal 165 is a pad.

[0026] Continue to refer Figure 4 , a first oxide layer 170 is formed on the substrate 160 .

[0027] The first oxide layer 170 serves as a bonding layer in a subsequent melt bonding process, and is used to achieve a physical connection between the substrate 160 and the piezoelectric transducer, and can improve the bonding strength.

[0028] In this embodiment, the material of the first oxide layer 170 is silicon oxide, so that in the melt bonding process, the contact surface of the substrate 160 and the piezoelectric transducer is bonded by a covalent bond of Si-O-Si. The bond energy of the silicon-oxygen bond is large, thereby improving the bonding strength and bonding accuracy; moreover, the silicon oxide material has high process compatibility and low cost, which is conducive to reducing process complexity and process cost, and is conducive to reducing the performance impact of the fingerprint recognition module. In other embodiments, the material can also be hafnium oxide, aluminum oxide or lanthanum oxide.

[0029] In this embodiment, the first oxide layer 170 is formed by a deposition process, and the deposition process is an atomic layer deposition (ALD) process. The first oxide layer 170 is formed on the substrate 160 in the form of an atomic layer, which is beneficial to improve the thickness uniformity of the first oxide layer 170 and the structural uniformity in the first oxide layer 170, and the first oxide layer 170 has good coverage ability; in addition, the process temperature of the atomic layer deposition process is usually low, which is also beneficial to reduce the probability of wafer deformation (Wafer Distortion) and device performance deviation. In other embodiments, according to the material of the first oxide layer, the deposition process can also be a low pressure chemical vapor deposition (LPCVD) process, a metal organic chemical vapor deposition (MOCVD) process, a physical vapor deposition (PVD) process or a laser pulse deposition (PLD) process. The first oxide layer 170 is formed by a semiconductor process, so that the formation process of the first oxide layer 170 is integrated into the manufacturing process of the fingerprint recognition module, and the process compatibility is high.

[0030] Among them, after the first oxide layer 170 is formed, the first oxide layer 170 is not patterned, and the first oxide layer 170 fully covers the substrate 160, thereby simplifying the process steps. In this embodiment, after the first oxide layer 170 is formed, it also includes: flattening the first oxide layer 170. By flattening the first oxide layer 170, the surface flatness of the first oxide layer 170 is improved, thereby improving the bonding strength of subsequent melt bonding. Specifically, a chemical mechanical polishing process is used for flattening.

[0031] refer to Figure 5 , providing a carrier substrate 100 , forming a piezoelectric transducer 200 on the carrier substrate 100 , the piezoelectric transducer 200 including a first electrode 120 , a piezoelectric layer 130 located on the first electrode 120 , and a second electrode 140 located on the piezoelectric layer 130 .

[0032] The carrier substrate 100 is used to provide a process platform for the formation of the piezoelectric transducer 200. In the present embodiment, the carrier substrate 100 is a semiconductor wafer. By selecting a semiconductor wafer, the piezoelectric transducer 200 can be formed by a semiconductor process (for example, a deposition process and a patterning process), so that the adhesion between the film layers in the piezoelectric transducer 200 is high, which is beneficial to improving the reliability of the piezoelectric transducer 200. Moreover, the piezoelectric transducer 200 is formed by a mature semiconductor process, and the process of forming the piezoelectric transducer 200 is simple and has high process compatibility. Specifically, the carrier substrate 100 is a silicon substrate. The silicon substrate is a commonly used substrate type in the semiconductor field, has high process compatibility, and is easy to remove later.

[0033] The piezoelectric transducer 200 is a recognition unit in the fingerprint recognition module. In this embodiment, the piezoelectric transducer 200 is independently prepared on the carrier substrate 100, which is conducive to improving the process flexibility of forming the piezoelectric transducer 200 and avoiding the process of forming the piezoelectric transducer 200 on the substrate 160 (such as Figure 4 As shown), the quality of the substrate 160 is guaranteed and the scrap rate of the substrate 160 is reduced.

[0034] In this embodiment, the substrate 160 is a wafer-level substrate, and the number of the piezoelectric transducers 200 is correspondingly multiple. Specifically, the steps of forming the piezoelectric transducer 200 include: forming a plurality of first electrodes 120 on the carrier substrate 100; forming a piezoelectric layer 130 covering the carrier substrate 100 and the first electrodes 120; forming a plurality of second electrodes 140 on the piezoelectric layer 130, and the second electrodes 140 correspond to the first electrodes 120 one by one and are arranged opposite to each other.

[0035] There are multiple first electrodes 120 and second electrodes 140. After the piezoelectric transducer 200 and the substrate 160 are bonded, there is no need to perform patterning on the first electrode 120 or the second electrode 140, which is conducive to simplifying the complexity of subsequent processes. In this embodiment, after the piezoelectric transducer 200 is formed, the first electrode 120 and the second electrode 140 are staggered, that is, any end of the second electrode 140 is located on one side of the first electrode 120, so that a second conductive plug electrically connected to the second electrode 140 can be formed in the piezoelectric layer 130 on one side of the first electrode 120, and when the second conductive plug is formed, there is no need to etch the first electrode 120, thereby reducing the process difficulty of forming the second conductive plug.

[0036] In other embodiments, when the substrate is a chip-level substrate, the number of the piezoelectric transducer is correspondingly one.

[0037] The first electrode 120 is used as the top electrode in the piezoelectric transducer, that is, the first electrode 120 is further away from the substrate 160 (eg, Figure 6 The material of the first electrode 120 may be a conductive material such as metal, metal silicide, metal nitride, metal oxide or conductive carbon. For example, the material of the first electrode 120 may be Mo, Al, Cu, Ag, Au, Ni, Co, TiAl, TiN or TaN. In this embodiment, the material of the first electrode 120 is Mo.

[0038] Specifically, the step of forming the first electrode 120 includes: forming a first conductive layer (not shown) covering the carrier substrate 100 by a deposition process; and patterning the first conductive layer by a dry etching process to form the first electrode 120. The deposition process may be an ion sputtering process.

[0039] During the use of the fingerprint recognition module, the inverse piezoelectric effect of the piezoelectric layer 130 is used to generate ultrasonic waves, thereby realizing ultrasonic fingerprint recognition. The material of the piezoelectric layer 130 can be piezoelectric crystals, piezoelectric ceramics or piezoelectric polymers, etc. Among them, the piezoelectric crystal can be aluminum nitride, lead zirconate titanate, quartz crystal, lithium gallate, lithium germanate, titanium germanate, lithium niobate or lithium tantalate, etc., and the piezoelectric polymer can be polyvinylidene fluoride, vinylidene fluoride-trifluoroethylene copolymer, nylon-11 or vinyl dicyanide-vinyl acetate alternating copolymer, etc. In this embodiment, the material of the piezoelectric layer 130 is aluminum nitride, and the piezoelectric layer 130 is formed by a deposition process, such as a reactive sputtering deposition process.

[0040] The second electrode 140 is used as a bottom electrode in the piezoelectric transducer 200, that is, the second electrode 140 is closer to the substrate 160 (eg, Figure 6 Specifically, the step of forming the second electrode 140 includes: forming a second conductive layer (not shown) covering the piezoelectric layer 130; and patterning the second conductive layer to form the second electrode 140. For the specific description of the second electrode 140, reference may be made to the corresponding description of the formation of the first electrode 120, which will not be repeated here.

[0041] Continue to refer Figure 5 It should be noted that, before forming the piezoelectric transducer 200 on the carrier substrate 100 , the process further includes: forming an isolation layer 110 on the carrier substrate 100 .

[0042] The subsequent step also includes removing the carrier substrate 100. When removing the carrier substrate 100, the surface of the isolation layer 110 facing the carrier substrate 100 is used to define the stop position of the removal process, thereby ensuring the integrity of the piezoelectric transducer 200 and reducing the impact on the bonding strength between the piezoelectric transducer 200 and the substrate 160.

[0043] The carrier substrate 100 is a semiconductor wafer, and the carrier substrate 100 is subsequently removed by thinning treatment, and in the thinning treatment step, the isolation layer 110 is used as a stop layer. In addition, when a first conductive plug electrically connected to the first electrode 120 is subsequently formed, the isolation layer 110 is also used to provide a process platform for the formation of the first conductive plug. In this embodiment, the material of the isolation layer 110 is silicon oxide, which is a commonly used dielectric material in the semiconductor field, easy to form and pattern, and has low process cost. In the process of thinning the carrier substrate 100, the silicon oxide layer can also play a good stopping role. In this embodiment, the isolation layer 110 is formed by a deposition process, such as a chemical vapor deposition process.

[0044] refer to Figure 6 , forming a piezoelectric transducer 200 (such as Figure 5 As shown), the method further includes: forming a third conductive hole 131 in the piezoelectric layer 130.

[0045] After the piezoelectric transducer 200 is subsequently bonded to the substrate 160 , the third conductive via 131 is adapted to correspond to the connection terminal 165 , thereby providing a process basis for forming a third conductive plug electrically connected to the connection terminal 165 .

[0046] In this embodiment, the piezoelectric layer 130 on one side of the first electrode 120 and the second electrode 140 is etched to form the third conductive hole 131, so as to avoid etching the first electrode 120 or the second electrode 140, thereby reducing the process difficulty of forming the third conductive hole 131. Specifically, the piezoelectric layer 130 is etched by a dry etching process. In other embodiments, after the piezoelectric transducer is formed, the piezoelectric layer may not be etched, and the third conductive hole may be formed in a subsequent process.

[0047] Combined with reference Figures 7 and 8 , in the piezoelectric transducer 200 (such as Figure 5 As shown) is formed with a cavity 151 (as shown Figure 8 The second oxide layer 150 is formed in the cavity 151 and at least the second electrode 140 is exposed.

[0048] The second oxide layer 150 also serves as a bonding layer for the subsequent melt bonding process to bond the substrate 160 (eg Figure 4The piezoelectric transducer 200 can be permanently bonded to the piezoelectric transducer 200, and the bonding strength can be improved, thereby improving the reliability of the fingerprint recognition module, for example: improving the fingerprint recognition performance of the fingerprint recognition module. Moreover, after the second oxide layer 150 having the cavity 151 is formed on the piezoelectric transducer 200, the piezoelectric transducer 200 plays a role in covering the cavity 151. Therefore, after the piezoelectric transducer 200 and the substrate 160 are subsequently bonded, the piezoelectric transducer 200 and the substrate 160 can seal the cavity 151. In addition, the process of forming the second oxide layer 150 is completed on the carrier substrate 100, thereby avoiding the process of forming the second oxide layer 150 from affecting the substrate 160, which is beneficial to improving the reliability of the fingerprint recognition module and reducing the scrap rate of the substrate 160. Again, the design parameters of the piezoelectric transducer 200 determine the formation and size of the cavity 151. By controlling the thickness of the second oxide layer 150, the longitudinal dimension of the cavity 151 can be precisely controlled, and the space of the cavity 151 can be fully utilized. While ensuring that the longitudinal dimension of the cavity 151 can meet the performance requirements of the piezoelectric transducer 200, it is beneficial to meet the thinning requirements of the fingerprint recognition module.

[0049] The material of the second oxide layer 150 is different from that of the first oxide layer 170 (eg Figure 4 In this embodiment, the material of the second oxide layer 150 is silicon oxide. In other embodiments, the second oxide layer may also be hafnium oxide, aluminum oxide or lanthanum oxide. Specifically, the steps of forming the second oxide layer 150 include: Figure 7 As shown, an oxide material layer 155 covering the piezoelectric transducer 200 is formed; Figure 8 As shown, the oxide material layer 155 is patterned, a cavity 151 exposing the second electrode 140 is formed in the oxide material layer 155 , and the remaining oxide material layer 155 serves as the second oxide layer 150 .

[0050] In this embodiment, the oxide material layer 155 is formed by a deposition process, such as an atomic layer deposition process. In other embodiments, the deposition process may also be a chemical vapor deposition process, a metal organic chemical vapor deposition process, a physical vapor deposition process, or a laser pulse deposition process. Figure 6 As shown), the second oxide layer 150 is also filled in the third conductive hole 131

[0051] Specifically, a photolithography process including coating photoresist, exposure and development is adopted to form a photoresist mask (not shown), and the oxide material layer 155 is etched through the photoresist mask. In this embodiment, a dry etching process is adopted to etch the oxide material layer 155. The dry etching process has the characteristics of anisotropic etching, which is beneficial to improve the opening size accuracy and sidewall morphology quality of the cavity 151 to ensure the acoustic performance of the piezoelectric transducer 200. The second oxide layer 150 is formed by a semiconductor process, so that the formation process of the second oxide layer 150 is integrated into the manufacturing process of the fingerprint recognition module, and the process compatibility is high. For the specific description of the second oxide layer 150, reference can be made to the aforementioned description of the first oxide layer 170, which will not be repeated here.

[0052] The shape and size of the cavity 151 are determined according to the design parameters of the piezoelectric transducer 200. In this embodiment, the bottom of the cavity 151 exposes a portion of the surface of the second electrode 140. In other embodiments, the sidewalls of the cavity are flush with the sidewalls of the second electrode. In other embodiments, along the direction parallel to the surface of the supporting substrate, the opening size of the cavity can also be larger than the size of the second electrode, and accordingly, the cavity not only exposes the second electrode, but also exposes a portion of the piezoelectric layer.

[0053] In this embodiment, the substrate 160 is a wafer-level substrate, and the number of cavities 151 is correspondingly multiple, and corresponds one-to-one with the piezoelectric transducers 200. In other embodiments, when the substrate is a chip-level substrate, the number of cavities is correspondingly one.

[0054] It should be noted that before patterning the oxide material layer 155, the process further includes: performing a planarization process on the oxide material layer 155. The planarization process improves the surface planarity of the oxide material layer 155, which is not only conducive to improving the accuracy of the photolithography process used when patterning the oxide material layer 155, thereby improving the opening size accuracy of the cavity 151, but also conducive to improving the surface planarity of the second oxide layer 150, thereby improving the bonding strength of the melt bonding. Specifically, the planarization process is performed by a chemical mechanical polishing process.

[0055] refer to Fig. 9 The carrier substrate 100 and the substrate 160 are bonded together by a fusion bonding process through the second oxide layer 150 and the first oxide layer 170 .

[0056] Specifically, the second oxide layer 150 and the first oxide layer 170 are arranged relative to each other and attached to each other, thereby achieving fusion bonding, and the bonding strength between the second oxide layer 150 and the first oxide layer 170 is high. In this embodiment, the piezoelectric transducer 200 covers the cavity 151. After the bonding is completed, the piezoelectric transducer 200 and the substrate 160 seal the cavity 151, so that the cavity 151 is closed. The cavity 151 is used to improve the acoustic performance. The piezoelectric transducer 200 and the substrate 160 seal the cavity 151, so that the cavity 151 is isolated from the external environment to maintain the stability of the acoustic performance of the cavity 151, thereby improving the fingerprint recognition performance of the fingerprint recognition module.

[0057] The second oxide layer 150 and the first oxide layer 170 are combined by bonding. Therefore, the manufacturing method does not need to form a sacrificial layer for occupying the cavity, and there is no need to release the sacrificial layer later, so as to avoid the problem of sacrificial layer residues being formed in the cavity 151 due to unclean removal of the sacrificial layer, thereby improving the acoustic performance improvement effect of the cavity 151; and the bonding strength of the fusion bonding process is relatively high, which improves the bonding reliability of the carrier base 100 and the substrate 160; in summary, the fingerprint recognition performance of the fingerprint recognition module is improved. Accordingly, since there is no need to perform the steps of forming the sacrificial layer and releasing the sacrificial layer, the problem of scrapping the substrate 160 due to the sacrificial layer process is avoided, which is conducive to reducing the scrap rate of the substrate 160.

[0058] It should be noted that the first oxide layer 170 fully covers the substrate 160. Compared with the solution of forming an opening corresponding to the cavity 151 in the first oxide layer, during the bonding process of the carrier substrate 100 and the substrate 160, it is not necessary to align the cavity 151 with the opening, thereby reducing the process difficulty of the bonding process, which is correspondingly conducive to improving the bonding reliability of the carrier substrate 100 and the substrate 160. In this embodiment, during the bonding step, the third conductive hole 131 (such as Figure 6 As shown) and corresponds to the corresponding connection terminal 165 of the signal processing circuit.

[0059] In this embodiment, the substrate 160 is a wafer-level substrate, and the number of the piezoelectric transducers 200 and the number of the cavities 151 are both multiple, so the piezoelectric transducers 200 and the cavities 151 correspond one-to-one, that is, the second electrodes 140 and the cavities 151 correspond one-to-one.

[0060] In this embodiment, the materials of the first oxide layer 170 and the second oxide layer 150 are both silicon oxide, so the supporting base 100 and the substrate 160 are bonded by silicon oxide-silicon oxide melt bonding. Specifically, the steps of the melt bonding process include: performing plasma activation treatment on the surfaces of the first oxide layer 170 and the second oxide layer 150. Through the plasma activation treatment, the pollutants and impurities on the surfaces of the first oxide layer 170 and the second oxide layer 150 are turned into gaseous state and discharged through the vacuum pump of the plasma system, thereby removing the pollutants and impurities; moreover, the plasma impacts the surfaces of the first oxide layer 170 and the second oxide layer 150, energizes the unstable non-bridging oxygen atoms, and causes the oxygen atoms to leave the originally bonded atoms, thereby providing a good foundation for the subsequent formation of covalent bonds. The reaction gases used in the plasma activation treatment may include Ar, N 2 , O 2 and SF 6 In this embodiment, the reaction gas is O 2 .

[0061] In this embodiment, the steps of the fusion bonding process further include: after the plasma activation treatment, the surfaces of the first oxide layer 170 and the second oxide layer 150 are cleaned with deionized water; after the deionized water pre-cleaning treatment, N 2 The first oxide layer 170 and the second oxide layer 150 are blown dry, and the surfaces of the first oxide layer 170 and the second oxide layer 150 are dried. The surface quality of the first oxide layer 170 and the second oxide layer 150 is improved by the deionized water cleaning and drying process, thereby improving the bonding strength.

[0062] In this embodiment, the steps of the melt bonding process further include: after the drying process, the second oxide layer 150 and the first oxide layer 170 are arranged relative to each other and attached, and bonding pressure is applied to the carrier base 100 and the substrate 160 to perform a pre-bonding process. After the plasma activation process, unsaturated bonded Si atoms are formed on the surfaces of the first oxide layer 170 and the second oxide layer 150, and the pre-bonding process is used to achieve chemical bonding of the contact surfaces of the first oxide layer 170 and the second oxide layer 150.

[0063] In this embodiment, the steps of the melt bonding process include: performing an annealing process after the pre-bonding process. The annealing process is used to cause a dehydration condensation reaction to occur at the contact surface of the first oxide layer 170 and the second oxide layer 150, so that the first oxide layer 170 and the second oxide layer 150 are covalently bonded by Si-O-Si.

[0064] It should be noted that the piezoelectric transducer 200 is formed on the carrier substrate 100 , and the carrier substrate 100 can provide a process platform for the melt bonding process to facilitate the melt bonding process.

[0065] refer to Fig.10 After bonding is completed, the carrier substrate 100 (eg Fig. 9 shown).

[0066] The carrier substrate 100 is removed to provide a process basis for the subsequent electrical connection process.

[0067] In this embodiment, the carrier substrate 100 is a semiconductor wafer, and therefore, the carrier substrate 100 is removed by a thinning process, and the thinning process may include but is not limited to a chemical mechanical polishing process. Specifically, the isolation layer 110 serves as a stop layer for the thinning process, and therefore, after the carrier substrate 100 is removed, the isolation layer 110 is formed on the surface of the first electrode 120 and the piezoelectric layer 130.

[0068] refer to Fig.11 , remove the carrier substrate 100 (eg Fig. 9 As shown), the method further includes: forming a plurality of first conductive holes 111 in the isolation layer 110 to expose the first electrode 120.

[0069] The first conductive via 111 is used to provide a space for forming a first conductive plug electrically connected to the first electrode 120. In this embodiment, the isolation layer 110 is etched by a dry etching process to form the first conductive via 111.

[0070] Continue to refer Fig.11 , remove the carrier substrate 100 (eg Fig. 9 As shown), the method further includes: forming a plurality of second conductive holes 132 exposing the second electrode 140 in the isolation layer 110 and the piezoelectric layer 130 on one side of the first electrode 120.

[0071] The second conductive via 132 is used to provide a space for forming a second conductive plug electrically connected to the second electrode 140. In this embodiment, the isolation layer 110 and the piezoelectric layer 130 are sequentially etched by a dry etching process to form the second conductive via 132.

[0072] Continue to refer Fig.11 , remove the carrier substrate 100 (eg Fig. 9 As shown), the method further includes: forming a fourth conductive hole 152 which is connected to the third conductive hole 131 in the second oxide layer 150 and the first oxide layer 170.

[0073] The fourth conductive hole 152 is connected with the third conductive hole 131, and the third conductive hole 131 corresponds to the connection end 165. Therefore, the fourth conductive hole 152 exposes the connection end 165. The fourth conductive hole 152 and the third conductive hole 131 are used to provide a spatial position for the subsequent formation of a third conductive plug electrically connected to the connection end 165.

[0074] It should be noted that after removing the carrier substrate 100 , the isolation layer 110 is exposed. Therefore, before forming the fourth conductive hole 152 , the method further includes: forming a fifth conductive hole 112 in the isolation layer 110 , wherein the fifth conductive hole 112 exposes the second oxide layer 150 filled in the third conductive hole 131 .

[0075] In this embodiment, the isolation layer 110 , the second oxide layer 150 and the first oxide layer 170 are etched in sequence by a dry etching process to form a fifth conductive hole 112 in the isolation layer 110 and a fourth conductive hole 152 in the second oxide layer 150 and the first oxide layer 170 .

[0076] In this embodiment, the fifth conductive hole 112 and the fourth conductive hole 152 are formed respectively by etching the isolation layer 110, the second oxide layer 150 and the first oxide layer 170 in sequence, which reduces the requirements for the alignment accuracy of the photolithography process, thereby improving the position accuracy and size accuracy of the fifth conductive hole 112 and the fourth conductive hole 152. In this embodiment, the formation order of the first conductive hole 111, the second conductive hole 132, the fifth conductive hole 112 and the fourth conductive hole 152 is not limited. As an example, after the first conductive hole 111 is formed, the second conductive hole 132 is formed; after the second conductive hole 132 is formed, the fifth conductive hole 112 and the fourth conductive hole 152 are formed in sequence.

[0077] refer to Fig.12 , forming an interconnection structure (not shown) for electrically connecting the first electrode 120, the second electrode 140 or the corresponding connection terminal 165 of the signal processing circuit.

[0078] The interconnect structure is used to connect the substrate 160 and the piezoelectric transducer 200 (such as Figure 5 The piezoelectric transducer 200 and the substrate 160 are electrically connected to each other to realize the fingerprint recognition function of the fingerprint recognition module, and facilitate the subsequent packaging process. Moreover, this embodiment integrates the integration process of the piezoelectric transducer 200 and the substrate 160, as well as the electrical connection process of the two into the same process flow, which is conducive to improving the stability of the manufacturing process of the fingerprint recognition module, thereby improving the performance and performance uniformity of the fingerprint recognition module, and is conducive to reducing the manufacturing cost.

[0079] Specifically, the method for forming the interconnect structure includes: forming a first conductive plug 172, wherein the bottom of the first conductive plug 172 exposes the edge of the first electrode 120; forming a second conductive plug 171, wherein the bottom of the second conductive plug 171 exposes the edge of the second electrode 140; and forming a third conductive plug 173, wherein the bottom of the third conductive plug 173 exposes the connection end 165. The first electrode 120 and the second electrode 140 are arranged alternately, and when forming the second conductive plug 171, it is not necessary to etch the first electrode 120, which reduces the process difficulty of forming the second conductive plug 171. Therefore, the bottom of the first conductive plug 172 exposes the edge of the first electrode 120, and the bottom of the second conductive plug 171 exposes the edge of the second electrode 140.

[0080] In this embodiment, Fig.11 As shown, a first conductive plug 172 electrically connected to the first electrode 120 is formed in the first conductive hole 111, a second conductive plug 171 electrically connected to the second electrode 140 is formed in the second conductive hole 132, and a third conductive plug 173 electrically connected to the connection end 165 is formed in the fifth conductive hole 112, the third conductive hole 131 and the fourth conductive hole 152. Specifically, a conductive material (not shown) is filled in the first conductive hole 111, the second conductive hole 132, the fifth conductive hole 112, the third conductive hole 131 and the fourth conductive hole 152 by a deposition process, and the conductive material 175 also covers the isolation layer 110; the conductive material located on the isolation layer 110 is patterned to form the first conductive plug 172, the second conductive plug 171 and the third conductive plug 173 respectively. Accordingly, the first conductive plug 172, the second conductive plug 171 and the third conductive plug 173 are all protruding from the isolation layer 110. In this embodiment, the conductive material includes one or more of Cu, Au, Ag and Al, and the deposition process may be an electroplating process.

[0081] In this embodiment, a photolithography process including coating photoresist, exposure and development is used to form a photoresist mask, and the conductive material is etched through the photoresist mask to pattern the conductive material into the first conductive plug 172, the second conductive plug 171 and the third conductive plug 173. After etching the conductive material, the photoresist mask is removed by wet stripping or ashing. In this embodiment, the interconnection structure is formed by the process of conductive plug (contact, CT), which reduces the process complexity of the electrical connection process and facilitates the subsequent packaging process.

[0082] Figures 13 to 20 It is a structural schematic diagram corresponding to each step in another embodiment of the method for manufacturing a fingerprint recognition module of the present invention.

[0083] The similarities between this embodiment and the first embodiment are not repeated here. The difference between this embodiment and the above embodiment is that: Fig.14 As shown, the step of forming the piezoelectric transducer 400 on the carrier substrate 300 includes: forming a conductive layer 325 covering the entire carrier substrate 300, and a portion of the conductive layer 325 is used as the first electrode 320; accordingly, as shown in Fig.18 As shown, the carrier substrate 300 (as shown in FIG. Fig.15 As shown), it also includes: patterning the conductive layer 325 to form a plurality of first electrodes 320.

[0084] refer to Fig.13 , providing a substrate 360 ​​, and forming a first oxide layer 370 on the substrate 360 ​​.

[0085] A signal processing circuit is formed in the substrate 360, and the signal processing circuit has a connection terminal 365, and the substrate 360 ​​exposes the connection terminal 365. For the specific description of the substrate 360 ​​and the first oxide layer 370, reference can be made to the corresponding description of the substrate 160 and the first oxide layer 170 in the above embodiment, which will not be repeated here.

[0086] refer to Fig.14 , provide a carrying substrate 300, form a whole conductive layer 325 covering the carrying substrate 300, and the conductive layer 325 in a partial area is used as a first electrode 320; form a piezoelectric layer 330 covering the first electrode 320; form a plurality of second electrodes 340 on the piezoelectric layer 330, and the second electrode 340, the piezoelectric layer 330 and the first electrode 320 are used to constitute a piezoelectric transducer 400.

[0087] The carrier substrate 300 is a semiconductor wafer. Specifically, the carrier substrate 300 is a silicon substrate.

[0088] After the piezoelectric transducer 400 is formed, the supporting substrate 300 is covered with a whole conductive layer 325, and only the number of the second electrodes 340 is multiple, which makes it easy to achieve alignment and improve alignment accuracy in subsequent bonding and photolithography processes, which is beneficial to improving the performance of the fingerprint recognition module.

[0089] In this embodiment, the conductive layer 325 is formed by a deposition process, which may be an ion sputtering process, and a portion of the conductive layer 325 is used as the first electrode 320. The specific description of the first electrode 320 can be combined with the corresponding description in the above embodiment, and will not be repeated here.

[0090] In this embodiment, the piezoelectric layer 330 is formed by a deposition process, and the second electrode 340 is formed by a deposition process and a patterning process performed in sequence. The specific description of the piezoelectric layer 330, the second electrode 340 and the steps for forming the same can be combined with the corresponding description in the above embodiments, and will not be repeated here.

[0091] It should be noted that before forming the piezoelectric transducer 400 on the carrier substrate 300, the process further includes: forming an isolation layer 310 on the carrier substrate 300. In this embodiment, the isolation layer 310 is made of silicon oxide.

[0092] refer to Fig.15 , in the piezoelectric transducer 400 (such as Fig.14 A second oxide layer 350 having a cavity 351 is formed on the surface of the substrate 310 , wherein the cavity 351 at least exposes the second electrode 340 .

[0093] The step of forming the second oxide layer 350 includes: forming an oxide material layer (not shown) covering the piezoelectric layer 330 and the second electrode 340; patterning the oxide material layer, forming a cavity 351 in the oxide material layer to expose the second electrode 340, and the remaining oxide material layer serves as the second oxide layer 350. For the description of the second oxide layer 350, the cavity 351 and the method for forming the same, reference may be made to the corresponding description in the aforementioned embodiment, which will not be repeated here.

[0094] The conductive layer 325 fully covers the substrate 300, the piezoelectric layer 330 fully covers the conductive layer 325, and only the second electrode 340 is multiple, that is, there is only a step between the second electrode 340 and the piezoelectric layer 330, which is conducive to improving the surface flatness of the second oxide layer 350, thereby improving the flatness of the bonding surface of the subsequent bonding process. It should also be noted that in order to further improve the surface flatness of the second oxide layer 350, before patterning the oxide material layer, it also includes: flattening the surface of the oxide material layer.

[0095] refer to Fig.16 , a fusion bonding process is used to realize the carrier substrate 300 (such as Fig.15 After the bonding is completed, the carrier substrate 300 is removed; after the carrier substrate 300 is removed, a plurality of exposed first electrodes 320 (as shown in FIG. Fig.14 The first conductive hole 311 is shown.

[0096] For the specific description of the bonding step, reference may be made to the corresponding description in the aforementioned embodiment, which will not be repeated here.

[0097] In this embodiment, the isolation layer 310 is used as a stop layer to perform a thinning process on the carrier substrate 300 .

[0098] The conductive layer 325 in a partial area is used as the first electrode 320. The subsequent steps further include patterning the conductive layer 325, retaining the first electrode 320, and exposing the first electrode 320 through the first conductive hole 311. The first conductive hole 311 is used to provide a spatial position for the subsequent formation of a first conductive plug electrically connected to the first electrode 320. In this embodiment, the isolation layer 310 is etched by a dry etching process to form the first conductive hole 311.

[0099] refer to Fig.17 , the patterned conductive layer 325 (eg Fig.16 As shown), a plurality of first electrodes 320 are formed, and the plurality of first conductive holes 311 correspond to the first electrodes 320.

[0100] Specifically, there are a plurality of first electrodes 320, and they are respectively arranged opposite to the second electrodes 340. After the conductive layer 325 is patterned, the first electrode 320 exposes part of the piezoelectric layer 330, thereby preparing for the subsequent etching of the piezoelectric layer 330. It should be noted that an isolation layer 310 is formed on the surface of the conductive layer 325. Therefore, the step of patterning the conductive layer 325 also includes patterning the isolation layer 310 so that the first conductive holes 311 correspond to the first electrodes 320 one by one; accordingly, after the conductive layer 325 is patterned, only the isolation layer 310 on the surface of the first electrode 320 is retained. In this embodiment, a dry etching process is used to sequentially etch the isolation layer 310 and the conductive layer 325 until the piezoelectric layer 330 is exposed to form the first electrode 320.

[0101] refer to Fig.18 , the patterned conductive layer 325 (eg Fig.16 As shown), the method further includes: forming a second conductive hole 331 and a third conductive hole 332 in the piezoelectric layer 330, wherein the second conductive hole 331 exposes the second electrode 340, and the third conductive hole 332 corresponds to the connection end 365.

[0102] The second conductive hole 331 is used to provide a spatial position for the subsequent formation of a second conductive plug electrically connected to the second electrode 340, and the third conductive hole 332 is used to provide a spatial position for the subsequent formation of a third conductive plug electrically connected to the connection terminal 365. The second conductive hole 331 and the third conductive hole 332 are formed in the same step, which is conducive to reducing the photomask, thereby saving manufacturing costs. In this embodiment, the piezoelectric layer 330 is etched by a dry etching process to form the second conductive hole 331 and the third conductive hole 332. Among them, after etching the conductive layer 325, the first electrode 320 exposes the piezoelectric layer 330. Therefore, when forming the second conductive hole 331 and the third conductive hole 332, only the piezoelectric layer 330 needs to be etched, and the etching process is simple.

[0103] refer to Fig.19 After the second conductive hole 331 and the third conductive hole 332 are formed, a fourth conductive hole 352 that is connected to the third conductive hole 332 is formed in the second oxide layer 350 and the first oxide layer 370 .

[0104] The fourth conductive via 352 exposes the connection end 365, thereby providing a space for subsequently forming a third conductive plug electrically connected to the connection end 365. In this embodiment, the second oxide layer 350 and the first oxide layer 370 are sequentially etched by dry etching process, thereby forming the fourth conductive via 352.

[0105] refer to Fig. 20 , in the first conductive hole 311 (such as Fig.19 3) forms a first conductive plug 372 electrically connected to the first electrode 320, and a second conductive hole 331 (as shown in FIG. Fig.19 ) to form a second conductive plug 371 electrically connected to the second electrode 340, and in the third conductive hole 332 (as shown Fig.19 ) and the fourth conductive hole 352 (as shown Fig.19 As shown in FIG. 1 , a third conductive plug 373 electrically connected to the connection terminal 365 is formed.

[0106] Specifically, the first conductive hole 311, the second conductive hole 331, the third conductive hole 332 and the fourth conductive hole 352 are filled with conductive material by a deposition process, and the conductive material also covers the isolation layer 310; the conductive material on the isolation layer 310 is patterned to form a first conductive plug 372 protruding from the isolation layer 310, a second conductive plug 371 protruding from the piezoelectric layer 330, and a third conductive plug 373 protruding from the piezoelectric layer 330. For the specific description of the first conductive plug 372, the second conductive plug 371, the third conductive plug 373 and the formation method thereof, reference can be made to the corresponding description in the aforementioned embodiment, which will not be repeated here.

[0107] The specific description of the manufacturing method described in this embodiment can be combined with reference to the corresponding description of the previous embodiment.

[0108] Correspondingly, an embodiment of the present invention also provides a fingerprint recognition module. Fig.21 It is a structural schematic diagram of an embodiment of a fingerprint recognition module of the present invention.

[0109] The fingerprint recognition module includes: a substrate 760, a signal processing circuit is formed in the substrate 760, and a first oxide layer 770 is formed on the substrate 760; a piezoelectric transducer 800 bonded to the substrate 760, the piezoelectric transducer 800 includes a first electrode 720, a piezoelectric layer 730 located on the first electrode 720, and a second electrode 740 located on the piezoelectric layer 730, a second oxide layer 750 having a cavity 751 is formed on the piezoelectric transducer 800, the cavity 750 at least exposes the second electrode 740, and the second oxide layer 750 is connected to the first oxide layer 770 by a melt bonding process.

[0110] The second oxide layer 750 and the first oxide layer 770 are bonded by melt bonding. On the one hand, in the manufacturing method of the fingerprint recognition module, there is no need to form a sacrificial layer for occupying the cavity, and accordingly, there is no need to release the sacrificial layer, which simplifies the process steps and avoids the problem of residues formed in the cavity due to unclean removal of the sacrificial layer. On the other hand, the melt bonding process has a high bonding strength, which improves the bonding reliability of the piezoelectric transducer 800 and the substrate 760; moreover, the piezoelectric transducer 800 covers the cavity 751, making the cavity 751 closed, which is beneficial to improve the improvement effect of the cavity 751 on the acoustic performance. In summary, the fingerprint recognition performance of the fingerprint recognition module of this embodiment is relatively high.

[0111] The piezoelectric transducer 800 and the substrate 760 are bonded by the second oxide layer 750 and the first oxide layer 770. During the manufacturing process, the piezoelectric transducer 800 can be prepared independently, which improves the process flexibility of forming the piezoelectric transducer 800 and avoids the process of forming the piezoelectric transducer 800 affecting the substrate 760. In addition, there is no need to perform the steps of forming the sacrificial layer and releasing the sacrificial layer, which avoids the problem of scrapping the substrate 760 due to the sacrificial layer process. The above two aspects are conducive to reducing the scrap rate of the substrate 760.

[0112] A signal processing circuit is formed in the substrate 760, and the substrate 760 is used to drive the piezoelectric transducer and process the detection signal generated by the piezoelectric transducer during the use of the fingerprint recognition module. In this embodiment, the substrate 760 is formed based on the CMOS process, and the substrate 760 is a wafer-level substrate. In other embodiments, the substrate may also be a chip-level substrate. The signal processing circuit in the substrate 760 has a connection terminal 765. In this embodiment, the substrate 760 exposes the connection terminal 765, and the connection terminal 765 is a pad.

[0113] The first oxide layer 770 and the second oxide layer 750 are both used as bonding layers for the melt bonding process, and the contact surfaces of the first oxide layer 770 and the second oxide layer 750 are connected by covalent bonds, so the first oxide layer 770 and the second oxide layer 750 have a high bonding strength, thereby improving the bonding reliability. In this embodiment, the materials of the first oxide layer 770 and the second oxide layer 750 are both silicon oxide. Silicon oxide material has high process compatibility, which is beneficial to reducing the performance impact on the fingerprint recognition module; and the contact surface of the first oxide layer 770 and the second oxide layer 750 is combined by a covalent bond of Si-O-Si, and the bond energy of the silicon-oxygen bond is large, so the bonding strength can be effectively improved. In other embodiments, the first oxide layer can also be hafnium oxide, aluminum oxide or lanthanum oxide, and the second oxide layer can also be hafnium oxide, aluminum oxide or lanthanum oxide.

[0114] A cavity 751 is formed in the second oxide layer 750, and the cavity 751 is used to improve the acoustic performance of the piezoelectric transducer 800. Among them, the first oxide layer 770 fully covers the substrate 760, and there is no opening corresponding to the cavity 751 in the first oxide layer. Therefore, during the bonding process, there is no need to align the cavity 751 with the opening, thereby reducing the process difficulty of the bonding process, which is correspondingly conducive to improving the bonding reliability of the piezoelectric transducer 800 and the substrate 760. In this embodiment, the substrate 760 is a wafer-level substrate, and the cavity 751 is correspondingly multiple. Among them, the shape and size of the cavity 751 are determined according to the design parameters of the piezoelectric transducer 800.

[0115] The piezoelectric transducer 800 serves as an identification unit in the fingerprint identification module. The piezoelectric transducer 800 includes a first electrode 720, a piezoelectric layer 730 located on the first electrode 720, and a second electrode 740 located on the piezoelectric layer 730. In this embodiment, the number of piezoelectric transducers 800 and cavities 751 are both multiple, the number of first electrodes 720 and second electrodes 740 are correspondingly multiple, the second electrode 740 is arranged opposite to the first electrode 720, and the second electrode 740 and the cavity 751 correspond one to one. In other embodiments, when the substrate is a chip-level substrate, the number of piezoelectric transducers is correspondingly one.

[0116] The first electrode 720 and the second electrode 740 are arranged in an interlaced manner so as to form an interconnection structure electrically connected to the second electrode 740 in the piezoelectric layer 730 on one side of the first electrode 720, and when forming the interconnection structure electrically connected to the second electrode 740, there is no need to etch the first electrode 720, thereby reducing the process difficulty of the electrical connection process. The first electrode 720 is used as the top electrode in the piezoelectric transducer 800, and the second electrode 740 is used as the bottom electrode in the piezoelectric transducer 800. The materials of the first electrode 720 and the second electrode 740 can be conductive materials such as metal, metal silicide, metal nitride, metal oxide or conductive carbon. In this embodiment, the materials of the first electrode 720 and the second electrode 740 are both Mo.

[0117] During the use of the fingerprint recognition module, ultrasonic waves are generated by utilizing the inverse piezoelectric effect of the piezoelectric layer 730, thereby realizing ultrasonic fingerprint recognition. In this embodiment, the material of the piezoelectric layer 730 is aluminum nitride.

[0118] In this embodiment, the fingerprint recognition module further includes: an isolation layer 710, which is located on the surface of the first electrode 720. In the manufacturing process of the fingerprint recognition module, the piezoelectric transducer 800 is formed on the carrier substrate, and the carrier substrate is removed by a thinning process, and the isolation layer 710 serves as a stop layer for the thinning process. In this embodiment, the isolation layer 710 is also located on the surface of the piezoelectric layer 730. In other embodiments, the isolation layer may also be located only on the surface of the first electrode. In this embodiment, the material of the isolation layer 710 is silicon oxide.

[0119] In this embodiment, the fingerprint recognition module also includes: an interconnection structure (not marked), which electrically connects the first electrode 720, the second electrode 740 or the corresponding connection end 765 of the signal processing circuit, so that the substrate 760 and the piezoelectric transducer 800 are electrically connected, thereby realizing the fingerprint recognition function of the fingerprint recognition module.

[0120] Specifically, the interconnection structure includes: a first conductive plug 782 electrically connected to the first electrode 720, a second conductive plug 781 electrically connected to the second electrode 740, and a third conductive plug 783 electrically connected to the connection end 765. The first conductive plug 782, the second conductive plug 781 and the third conductive plug 783 facilitate electrical connection between the substrate 760 and the first electrode 720 and the second electrode 740. In this embodiment, the first conductive plug 782 is located in the isolation layer 710; the second conductive plug 781 is located in the piezoelectric layer 730; and the third conductive plug 783 penetrates the piezoelectric layer 730, the second oxide layer 750 and the first oxide layer 770.

[0121] In this embodiment, the isolation layer 710 is also located on the surface of the piezoelectric layer 730 exposed by the interconnection structure, so the second conductive plug 781 penetrates the isolation layer 710 and the piezoelectric layer 730, and the third conductive plug 783 penetrates the isolation layer 710, the piezoelectric layer 730, the second oxide layer 750 and the first oxide layer 770. Accordingly, the isolation layer 710 is also used to provide a process platform for the formation of the interconnection structure and realize the electrical isolation of the interconnection structure.

[0122] In this embodiment, the material of the first conductive plug 782, the second conductive plug 781 and the third conductive plug 783 is a conductive material, and the conductive material includes one or more of Cu, Au, Ag and Al. In this embodiment, the type of the interconnection structure is a conductive plug, which reduces the complexity of the process of forming the interconnection structure and facilitates the subsequent packaging process. In other embodiments, the type of the interconnection structure may also include other types of structures, such as: a rewiring (RDL) structure.

[0123] The fingerprint recognition module of this embodiment is manufactured by the manufacturing method described in the above embodiment, and can also be manufactured by other manufacturing methods. For the specific description of the fingerprint recognition module of this embodiment, reference can be made to the corresponding description in the above embodiment, and this embodiment will not be repeated here.

[0124] Accordingly, an embodiment of the present invention further provides an electronic device, the electronic device comprising the aforementioned fingerprint recognition module. Fingerprint recognition is achieved by configuring the fingerprint recognition module described in this embodiment in the electronic device. The electronic device may also be a personal computer, a smart phone, a personal digital assistant (PDA), a media player, a navigation device, a game console, a tablet computer, a wearable device, an anti-access electronic system, a car keyless entry electronic system or a car keyless start electronic system, etc.

[0125] From the above analysis, it can be seen that in the manufacturing process of the fingerprint recognition module, no sacrificial layer will remain in the cavity of the piezoelectric transducer, the acoustic performance of the piezoelectric transducer is improved, and the quality of the substrate is also guaranteed. Therefore, the fingerprint recognition performance of the fingerprint recognition module (for example: the fingerprint recognition accuracy of the fingerprint recognition module) is high, thereby improving the user's experience. For the specific description of the fingerprint recognition module in the electronic device described in this embodiment, reference can be made to the corresponding description in the above embodiment, and this embodiment will not be repeated here.

[0126] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the scope defined by the claims.

Claims

1. A method for manufacturing a fingerprint recognition module, characterized in that: include: providing a substrate having a signal processing circuit formed therein; forming a first oxide layer on the substrate; providing a carrier substrate; forming a piezoelectric transducer on the carrier substrate, the piezoelectric transducer comprising a first electrode, a piezoelectric layer located on the first electrode, and a second electrode located on the piezoelectric layer; forming a second oxide layer having a cavity on the piezoelectric transducer, wherein the cavity at least exposes the second electrode; Bonding the carrier substrate to the substrate by using the second oxide layer and the first oxide layer through a melt bonding process; removing the carrier substrate; In the step of forming the piezoelectric transducer, the piezoelectric layer also covers the side wall of the first electrode; before forming the second oxide layer, it also includes: forming a third conductive hole in the piezoelectric layer; in the step of bonding, making the third conductive hole correspond to the corresponding connection end of the signal processing circuit; or, In the step of forming the piezoelectric transducer, a whole conductive layer is formed covering the supporting substrate, and the conductive layer in a partial area serves as a first electrode; after removing the supporting substrate, it also includes: patterning the conductive layer to obtain the first electrode, and the first electrode exposes part of the piezoelectric layer.

2. The manufacturing method according to claim 1, characterized in that The step of forming a second oxide layer having a cavity on the piezoelectric transducer comprises: forming an oxide material layer covering the piezoelectric transducer; The oxide material layer is patterned by a dry etching process to form the cavity in the oxide material layer, and the remaining oxide material layer serves as the second oxide layer.

3. The manufacturing method according to claim 1, characterized in that: After forming the first oxide layer on the substrate and before bonding, the method further includes: performing a planarization process on the first oxide layer.

4. The manufacturing method according to claim 2, characterized in that: After forming the oxide material layer covering the piezoelectric transducer and before patterning the oxide material layer, the method further includes: performing a planarization process on the oxide material layer.

5. The manufacturing method according to claim 1, characterized in that: The step of forming a piezoelectric transducer on the carrier substrate includes: forming a plurality of first electrodes on the carrier substrate; forming a piezoelectric layer covering the carrier substrate and the first electrode; A plurality of second electrodes are formed on the piezoelectric layer, and the second electrodes are arranged opposite to the first electrodes.

6. The manufacturing method according to claim 1, characterized in that: The step of forming a piezoelectric transducer on the carrier substrate includes: forming an entire conductive layer covering the carrier substrate; forming a piezoelectric layer covering the conductive layer; forming a plurality of second electrodes on the piezoelectric layer; After removing the carrier substrate, the method further includes: patterning the conductive layer to form a plurality of first electrodes, which are respectively arranged opposite to the second electrodes.

7. The manufacturing method according to claim 1, characterized in that: Before forming the piezoelectric transducer on the carrier substrate, the method further includes: forming an isolation layer on the carrier substrate; The carrier substrate is removed by a thinning process, and the isolation layer serves as a stop layer for the thinning process.

8. The manufacturing method according to claim 5, characterized in that: Before forming the piezoelectric transducer on the carrier substrate, the method further includes: forming an isolation layer on the carrier substrate; After removing the carrier substrate, the method further comprises: forming a plurality of first conductive holes in the isolation layer exposing the first electrode; forming a plurality of second conductive holes in the isolation layer and the piezoelectric layer to expose the second electrode; A conductive material is filled in the first conductive via and the second conductive via to form a first conductive plug electrically connected to the first electrode and a second conductive plug electrically connected to the second electrode.

9. The manufacturing method according to claim 6, characterized in that: Before forming the piezoelectric transducer on the carrier substrate, the method further includes: forming an isolation layer on the carrier substrate; After removing the carrier substrate and before patterning the conductive layer, the method further includes: forming a plurality of first conductive holes in the isolation layer to expose the first electrode; The step of patterning the conductive layer further includes patterning the isolation layer so that the plurality of first conductive holes correspond to the first electrodes; After patterning the conductive layer, the method further includes: forming a second conductive hole in the piezoelectric layer to expose the second electrode; filling the first conductive hole and the second conductive hole with conductive material to form a first conductive plug electrically connected to the first electrode and a second conductive plug electrically connected to the second electrode.

10. The manufacturing method according to claim 1, characterized in that: After removing the carrier substrate, the method further includes: forming a fourth conductive hole in the second oxide layer and the first oxide layer and intersecting the third conductive hole; and forming a third conductive plug in the third conductive hole and the fourth conductive hole and electrically connecting the corresponding connection ends of the signal processing circuit.

11. The manufacturing method according to claim 1, characterized in that: After the conductive layer is patterned, the method further comprises: forming a third conductive hole in the piezoelectric layer, wherein the third conductive hole corresponds to a corresponding connection end of the signal processing circuit; forming a fourth conductive hole in the second oxide layer and the first oxide layer, the fourth conductive hole being intersected with the third conductive hole; A third conductive plug electrically connected to the corresponding connection terminal of the signal processing circuit is formed in the third conductive via and the fourth conductive via.

12. The manufacturing method according to claim 1, characterized in that: The process of forming the first oxide layer includes a deposition process, and the process of forming the second oxide layer includes a deposition process, wherein the deposition process is an atomic layer deposition process, a low pressure chemical vapor deposition process, a metal organic chemical vapor deposition process, a physical vapor deposition process or a laser pulse deposition process.

13. The manufacturing method according to claim 1, characterized in that: The material of the first oxide layer is silicon oxide, hafnium oxide, aluminum oxide or lanthanum oxide, the material of the second oxide layer is silicon oxide, hafnium oxide, aluminum oxide or lanthanum oxide, and the material of the first oxide layer and the second oxide layer is the same.

14. The manufacturing method according to claim 1, characterized in that: The substrate is a wafer-level substrate, and the number of the piezoelectric transducer and the number of the cavity are both multiple; Alternatively, the substrate is a chip-level substrate.

15. A fingerprint recognition module formed by the manufacturing method according to any one of claims 1 to 14, characterized in that: include: A substrate, wherein a signal processing circuit is formed in the substrate, and a first oxide layer is formed on the substrate; A piezoelectric transducer bonded to the substrate, the piezoelectric transducer comprising a first electrode, a piezoelectric layer located on the first electrode, and a second electrode located on the piezoelectric layer, a second oxide layer having a cavity is formed on the piezoelectric transducer, the cavity at least exposes the second electrode, and the second oxide layer is connected to the first oxide layer by a melt bonding process.

16. The fingerprint recognition module according to claim 15, characterized in that: The fingerprint recognition module further includes: a first conductive plug electrically connected to the first electrode, a second conductive plug electrically connected to the second electrode, and a third conductive plug electrically connected to a corresponding connection end of the signal processing circuit.

17. The fingerprint recognition module according to claim 15, characterized in that: The fingerprint recognition module further includes: an isolation layer located on the surface of the first electrode.

18. The fingerprint recognition module according to claim 17, characterized in that: The material of the isolation layer is silicon oxide.

19. The fingerprint recognition module according to claim 15, characterized in that: The material of the first oxide layer is silicon oxide, hafnium oxide, aluminum oxide or lanthanum oxide, the material of the second oxide layer is silicon oxide, hafnium oxide, aluminum oxide or lanthanum oxide, and the material of the first oxide layer and the second oxide layer is the same.

20. An electronic device, characterized in that: It comprises a fingerprint recognition module as described in any one of claims 15 to 19.

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