A Current Mode Controlled Boost Converter

Through the current mode controlled BOOST converter, using ramp compensation and op amp design, the problems of large output ripple, narrow input range and subharmonic oscillation are solved, and stable output voltage control and wide input voltage range are achieved.

CN112117899BActive Publication Date: 2025-08-15SUZHOU KAIWEITE SEMICON
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Patent Information

Application Number
CN202010839051.9
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2020-08-19
Publication Date
2025-08-15
Estimated Expiration
2040-08-19

AI Technical Summary

Technical Problem

The existing BOOST boost circuit has the problems of large output ripple, narrow input range, and easy subharmonic oscillation and difficulty in loop control under large duty cycles.

Method used

The BOOST converter that adopts current mode control, including the control IC and peripheral circuit, superimposes the ramp voltage on the CS pin through the ramp compensation module, and combines the design of the op amp and comparator to achieve a wide input voltage range and stable output voltage control to avoid subharmonic oscillation.

Benefits of technology

The stable output voltage control over a wide input voltage range is realized, which reduces the output ripple, and the loop stability is easy to adjust and avoids subharmonic oscillation.

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Abstract

The present invention relates to a current-mode controlled boost converter, comprising a control IC and peripheral circuitry. The IC peripheral circuitry includes: VIN, the system input voltage; VOUT, the system output voltage; L1, an inductor; D1, a freewheeling diode; C0, an output filter capacitor; N1, a power switch; C1, an external capacitor connected to the IC's VCC pin; R1, a resistor connected to the IC's RT pin for controlling the system's operating frequency; R2, C2, and C3, a compensation network between the IC's FB and COMP pins, which plays a decisive role in system stability; R3, a current sampling resistor; and R4 and R5, which form an output voltage sampling network whose ratio determines the output voltage. The proposed current-mode boost converter has a wide input voltage range, easily reduces output ripple, eliminates subharmonic oscillations, and facilitates loop stability adjustment.
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Description

Technical Field

[0001] The present invention relates to a converter, in particular to a current-mode controlled BOOST converter, and belongs to the technical field of power management. Background Art

[0002] A boost circuit is a switching DC step-up circuit that increases the output voltage relative to the input voltage. It is widely used in DC motor drives, single-phase power factor correction (PFC) circuits, and other AC / DC power supplies. However, boost systems often suffer from design issues such as large output ripple, a narrow input range, subharmonic oscillations that can occur with high duty cycles, and difficulty in loop control. Therefore, a new solution is urgently needed to address these technical issues. Summary of the Invention

[0003] The present invention addresses the problems existing in the prior art and provides a current-mode controlled BOOST converter. This technical solution, a current-mode controlled BOOST converter, effectively addresses or improves the deficiencies existing in the prior art. To achieve the above objectives, the present invention provides the following technical solution: a current-mode controlled BOOST converter comprising a control IC and peripheral circuits.

[0004] As an improvement of the present invention, the peripheral circuit includes: VIN is the input voltage of the system; VOUT is the output voltage of the system; L1 is an inductor; D1 is a freewheeling diode; C0 is an output filter capacitor; N1 is a power switch tube; C1 is an external capacitor of the VCC pin of the IC; R1 is a resistor connected to the RT pin of the IC, used to control the operating frequency of the system; R2, C2, and C3 are the compensation network of the FB pin and COMP pin of the IC, which plays a decisive role in the stability of the system; R3 is a current sampling resistor; R4 and R5 constitute the sampling network of the output voltage, and its ratio determines the level of the output voltage. The R4 and R5 network directly samples the output voltage, and the sampling is accurate. The sampled signal FB is sent to the negative input terminal of the operational amplifier. The operational amplifier is in the entire control loop, and the voltages of the two input terminals are equal, that is, V FB =1.25V, so the voltage ratio of R4 and R5 determines the output voltage VOUT.

[0005] As an improvement of the present invention, the IC circuit includes: a Regulator module, an oscillator module (OSC), a slope compensation module (Slope), a maximum duty cycle module (MaxDuty), an op amp (AMP), comparators (CMP1, CMP2), and a logic module. The VIN pin generates a VCC voltage through the Regulator; VCC generates various reference voltages through the Reference module; the input terminal of the OSC is RT, and the output terminal is divided into two paths, one output to the S terminal of the RS trigger, and the other output is sent to Slope and MaxDuty respectively. The positive input terminal of the AMP is a 1.25V reference, the negative input terminal is the FB pin, and the output terminal is the COMP pin. COMP is connected to a 5V internal power supply through a resistor R6. After the COMP terminal is stepped down by 1.25V, it is connected to resistor R7. The other end of resistor R7 is connected to resistor R8 and the negative input of comparator CMP1. The other end of resistor R8 is grounded. The positive input of comparator CMP1 is connected to the output of Slope. Comparator CMP1 outputs to the Logic module. The positive input of comparator CMP2 is a 0.5V reference voltage. The negative input of CMP2 is connected to the output of Slope. At the same time, the output of Slope is connected to resistor R9. The other end of resistor R9 is connected to the CS pin. Comparator CMP2 outputs to the Logic module. MaxDuty is output to the Logic module. The output of Logic is sent to the R end of the RS trigger. The output of the RS trigger is sent to the Driver module. The output of the Driver is the OUT pin.

[0006] The Regulator is a power supply module that generates a medium-voltage power supply VCC inside the IC through the high-voltage power supply VIN. The medium-voltage power supply VCC is mainly used to generate a 5V voltage power supply inside the IC and provide power for the driver module. The Reference module generates an internal low-voltage 5V power supply and 1.25V and 0.5V reference voltages. The OSC is an oscillator module. The external resistor on the RT pin facilitates the adjustment of the oscillator frequency. The oscillator module generates a clock signal and a sawtooth wave signal. The clock signal is sent to the RS trigger to control the conduction of each cycle. The sawtooth wave signal is sent to the slope compensation module Slope and the maximum duty cycle module MaxDuty respectively. Slope is a slope compensation module that converts the sawtooth wave voltage signal into a sawtooth wave current. The sawtooth wave current flows through the resistor R9 to generate a slope voltage and is superimposed on the CS pin. MaxDuty is the maximum duty cycle module. Since the slope compensation function is integrated in the IC, the maximum duty cycle can usually be set to above 80%. If neither CMP1 nor CMP2 flips, the MaxDuty module controls the forced shutdown of the switching cycle. AMP is an op amp with a positive input connected to a 1.25V reference voltage, a negative input connected to the FB pin, and an output connected to the COMP pin. This op amp, in conjunction with the external compensation network C2, R2, and C3, detects the output voltage and adjusts system stability. The op amp's output is stepped down to 1.25V, then divided by R7 and R8 before being fed to the negative input of comparator CMP1. The positive input of comparator CMP1 is connected to the CS pin with the slope-compensated voltage superimposed on it. Comparator CMP2 functions as an overcurrent protection module. When the CS pin detects excessive current and the slope-compensated voltage exceeds 0.5V, CMP2 flips and shuts down the output. The Logic module processes three signals, from MaxDuty, CMP1, and CMP2, to determine which signal controls the output shutdown. The RS flip-flop logically controls whether the output is on or off. Driver is the driver module. By using these cleverly designed modules and combining them in a clever way, current mode control of the BOOST converter can be achieved and subharmonic oscillation can be avoided.

[0007] As an improvement of the present invention, the regulator is a power supply module that can reach a wide input voltage range. VIN and VCC are two pins of the IC. R1 is a current limiting resistor with a typical value of more than 1M. D1 is a clamping diode. N1 is a high-voltage enhancement type NMOS. C1 is a VCC external capacitor. The medium voltage power supply VCC can be expressed as: VCC = V D1 -V GS If VCC needs to be increased, the clamping diode of D1 can be added in series. This structure is more flexible, VCC will not be affected by the VIN voltage, and VIN can be connected to a wider voltage range, but it must be ensured that the N1 device in the process can withstand the voltage.

[0008] As an improvement of the present invention, a slope compensation function is specially designed to superimpose a slope voltage on the CS pin. As the conduction time increases, the superimposed voltage will also increase. The input signal of the slope compensation module (Slope) is a sawtooth wave signal generated by the oscillator OSC, and the output signal is the slope current Islope. P3, P4 and N1, N2 force the symmetry of the two paths, so the Vgs of N1 and N2 are equal. Since N1 and N2 share a common Gate, all the Source voltages of N1 and N2 are equal. For P1 and P2, due to the symmetry, Vsg are equal. The Source voltages of P1 and P2 are equal, so the Gate voltages of P1 and P2 are equal. Since the Gate voltage of P2 is equal to the voltage of resistor R1, the Gate voltage of P1 is equal to the voltage of resistor R1; therefore, the currents of the two branches of the current mirror are equal. The output current of P5 can be designed based on the current mirror ratio, generating a current Islope proportional to Vslope. This module generates a ramp voltage Islope*R9, which is superimposed on the CS pin. In current-mode control, subharmonic oscillation is more likely to occur when the duty cycle exceeds 50%, and the higher the duty cycle, the greater the likelihood of subharmonic oscillation. Therefore, a longer on-time is desirable for greater compensation, making a ramp approach the most effective. There are two common slope compensation methods: one adds a certain amount of compensation to the comparator's positive input (CS), and the other reduces a certain amount of compensation at the comparator's negative input (indirectly reflected by COMP). This article adopts the first method.

[0009] Compared to existing technologies, the present invention offers the following advantages: the proposed current-mode BOOST converter boasts a wide input voltage range, easily reduces output ripple, and facilitates loop stability adjustment. By utilizing these cleverly designed modules and combining them, current-mode control of the BOOST converter can be achieved while avoiding subharmonic oscillations. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] Figure 1 Schematic diagram of a current-mode controlled BOOST converter;

[0011] Figure 2 This is a schematic diagram of the structure of the Regulator module;

[0012] Figure 3 It is a structural diagram of the OSC module;

[0013] Figure 4 It is a structural diagram of the slope compensation module (Slope). DETAILED DESCRIPTION

[0014] In order to deepen the understanding of the present invention, this embodiment is described in detail below with reference to the accompanying drawings.

[0015] Example 1: See Figure 1 The present invention provides a current mode controlled BOOST converter, such as Figure 1As shown in the figure, the entire system consists of a control IC and peripheral circuits. The IC peripheral components include: VIN is the system input voltage; VOUT is the system output voltage; L1 is an inductor; D1 is a freewheeling diode; C0 is an output filter capacitor; N1 is a power switch; C1 is an external capacitor connected to the IC's VCC pin; R1 is a resistor connected to the IC's RT pin to control the system's operating frequency; R2, C2, and C3 form the compensation network between the IC's FB and COMP pins, which plays a decisive role in system stability; R3 is a current sampling resistor; and R4 and R5 form the output voltage sampling network, whose ratio determines the output voltage. The IC's internal structure mainly shows several core modules: Regulator module, OSC is the oscillator module, Slope is the slope compensation module, MaxDuty is the maximum duty cycle module, AMP is an op amp, comparators CMP1, CMP2 and Logic module. The VIN pin generates the VCC voltage through the Regulator; VCC generates various reference voltages through the Reference module; the input of OSC is RT, and the output is divided into two paths, one output to the S terminal of the RS trigger, and the other output is sent to Slope and MaxDuty respectively. The positive input of AMP is the 1.25V reference, the negative input is the FB pin, and the output is the COMP pin. COMP is connected to the 5V internal power supply through resistor R6. After the MP end is stepped down by 1.25V, it is connected to resistor R7. The other end of resistor R7 is connected to resistor R8 and the negative input of comparator CMP1. The other end of resistor R8 is grounded. The positive input of comparator CMP1 is connected to the output of Slope. Comparator CMP1 outputs to the Logic module. The positive input of comparator CMP2 is a 0.5V reference voltage. The negative input of CMP2 is connected to the output of Slope. At the same time, the output of Slope is connected to resistor R9. The other end of resistor R9 is connected to the CS pin. Comparator CMP2 outputs to the Logic module. MaxDuty is output to the Logic module. The output of Logic is sent to the R end of the RS trigger. The output of the RS trigger is sent to the Driver module. The output of the Driver is the OUT pin.The Regulator is a power supply module that generates a medium-voltage power supply VCC inside the IC through the high-voltage power supply VIN. The medium-voltage power supply VCC is mainly used to generate a 5V voltage power supply inside the IC and provide power for the driver module. The Reference module generates an internal low-voltage 5V power supply and 1.25V and 0.5V reference voltages. The OSC is an oscillator module. The external resistor on the RT pin facilitates the adjustment of the oscillator frequency. The oscillator module generates a clock signal and a sawtooth wave signal. The clock signal is sent to the RS trigger to control the conduction of each cycle. The sawtooth wave signal is sent to the slope compensation module Slope and the maximum duty cycle module MaxDuty respectively. Slope is a slope compensation module that converts the sawtooth wave voltage signal into a sawtooth wave current. The sawtooth wave current flows through the resistor R9 to generate a slope voltage and is superimposed on the CS pin. MaxDuty is the maximum duty cycle module. Since the slope compensation function is integrated in the IC, the maximum duty cycle can usually be set to above 80%. If neither CMP1 nor CMP2 flips, the MaxDuty module controls the forced shutdown of the switching cycle. AMP is an op amp with a positive input connected to a 1.25V reference voltage, a negative input connected to the FB pin, and an output connected to the COMP pin. This op amp, in conjunction with the external compensation network C2, R2, and C3, detects the output voltage and adjusts system stability. The op amp's output is stepped down to 1.25V, then divided by R7 and R8 before being fed to the negative input of comparator CMP1. The positive input of comparator CMP1 is connected to the CS pin with the slope-compensated voltage superimposed on it. Comparator CMP2 functions as an overcurrent protection module. When the CS pin detects excessive current and the slope-compensated voltage exceeds 0.5V, CMP2 flips and shuts down the output. The Logic module processes three signals, from MaxDuty, CMP1, and CMP2, to determine which signal controls the output shutdown. The RS flip-flop logically controls whether the output is on or off. Driver is the driver module.

[0016] Working process: refer to Figure 1 — Figure 4 When the system is first started, the VIN input pin supplies power to VCC through the regulator, and the IC begins operating, generating a 5V low-voltage power supply and other biases. The internal low-voltage power supply 5V charges the external capacitor C2 on the COMP pin through resistor R6, causing the COMP voltage to rise. At some point, when the COMP voltage exceeds 1.25V, a voltage begins to develop across resistor R8. It should be noted that when the COMP voltage is below 1.25V, the voltage across R8 is 0V, and the CMP1 output remains high. At this point, the output is always off. Even though a signal controls the IC to turn on during each oscillator cycle, the on-time is zero, meaning the output is always off. When voltage appears across R8, the oscillator OSC controls the IC to turn on, causing the CS voltage to rise. After adding slope compensation, the voltage exceeds the voltage across R8, shutting down the output.

[0017] After the system stabilizes, when power switch N1 turns on, the oscillator OSC generates a clock to control the turn-on. The inductor input signal VIN charges inductor L1. Because N1 is on, the voltage on the right side of the inductor approaches 0V. For freewheeling diode D1, the voltage on the right side is high, while the voltage on the left side is low. D1 is blocked, and the current in inductor L1 equals the current in current sampling resistor R3. Therefore, the CS voltage gradually increases. At some point, the CS voltage, after adding the slope compensation, exceeds the voltage at the negative input terminal of CMP1. CMP1 flips, and the control IC shuts down, turning off N1. After N1 turns off, the polarity of inductor L1 reverses, and discharge begins to the output through D1 until the next oscillator cycle, when power switch N1 turns on again.

[0018] Based on the above analysis, the on-time of N1 is directly controlled by the voltage across R8. A higher R8 voltage results in a longer on-time, a higher duty cycle, and more energy transferred to the output. For this system, if the output voltage VOUT decreases, the FB voltage decreases, causing the op amp AMP to increase the COMP voltage, thereby increasing the voltage across R8 and the duty cycle, which in turn increases the output voltage VOUT. Similarly, if the output voltage VOUT increases, the FB voltage increases, causing the op amp AMP to decrease the COMP voltage, lowering the R8 voltage and reducing the duty cycle, which in turn decreases the output voltage VOUT. Therefore, this system effectively achieves constant output voltage control with ease. The target output voltage can be set by adjusting the ratio of R4 and R5.

[0019] The system is specially designed for the IC's high-voltage power supply module (Regulator), which can achieve a wide input voltage range. The structure of the Regulator module is shown as follows: Figure 2 , VIN and VCC are the two pins of IC, R1 is the current limiting resistor, the typical value is more than 1M, D1 is the clamping diode, N1 is the high voltage enhancement NMOS, C1 is the VCC external capacitor. The medium voltage power supply VCC can be expressed as: VCC = V D1 -V GS If VCC needs to be increased, the clamping diode of D1 can be added in series. This structure is more flexible, VCC will not be affected by the VIN voltage, and VIN can be connected to a wider voltage range, but it must be ensured that the N1 device in the process can withstand the voltage.

[0020] The OSC module determines the operating frequency of the system and can be easily adjusted by simply changing the resistance of the external resistor R1 on the RT pin. The structure of the OSC module is shown in the figure below. Figure 3A simple negative feedback structure keeps the RT pin voltage fixed at 1.25V. Therefore, the external resistor on the RT pin determines the current in the current mirror. The upper PMOS current ratio is 1:1:1, and the lower NMOS current mirror ratio is 1:N. This results in a 1:N ratio for the charge and discharge currents of the capacitor. The resulting ramp on the capacitor rises slowly and falls quickly, and this ramp is fed to the subsequent Slope module. The latter half of the diagram shows the typical structure of an oscillator circuit, which controls the switching devices that charge and discharge the capacitor. The OSC frequency is easily adjustable. With well-tuned loop compensation, the system operating frequency can be set higher, reducing output ripple and improving conversion efficiency.

[0021] The present invention aims to solve the problem of subharmonic oscillation in current mode systems under high duty cycle conditions. It specifically designs a slope compensation function, which superimposes a slope voltage on the CS pin. As the on-time increases, the superimposed voltage will also increase. The structure of the slope compensation module (Slope) is shown in the figure below. Figure 4 , the module's input signal is a sawtooth wave signal generated by the oscillator OSC, and the output signal is the ramp current Islope. P3, P4 and N1, N2 force the symmetry of the two paths, so the Vgs of N1 and N2 are equal. Since N1 and N2 share the same Gate, all the Source voltages of N1 and N2 are equal. For P1 and P2, also due to symmetry, Vsg are equal, the Source voltages of P1 and P2 are equal, then the Gate voltages of P1 and P2 are equal. Since the Gate voltage of P2 is equal to the voltage of resistor R1, the Gate voltage of P1 is equal to the voltage of resistor R1. Therefore, the currents of the two branches of the current mirror are equal to The output current of P5 can be designed according to the current mirror ratio to generate a current Islope proportional to Vslope. Figure 1 The module generates a slope voltage Islope*R9, which is superimposed on the CS pin.

[0022] The current mode BOOST converter proposed in the present invention has a wide input voltage, is easy to reduce output ripple, eliminates subharmonic oscillation, and is easy to adjust loop stability.

[0023] It should be noted that the above embodiments are not intended to limit the scope of protection of the present invention, and equivalent changes or substitutions made on the basis of the above technical solutions fall within the scope of protection of the claims of the present invention.

Claims

1. A current-mode controlled BOOST converter, characterized in that: The converter includes a control IC and peripheral circuits; The peripheral circuit includes: VIN is the input voltage of the system; VOUT is the output voltage of the system; L1 is an inductor; D1 is a freewheeling diode; C0 is an output filter capacitor; N1 is a power switch tube; C1 is an external capacitor for the VCC pin of the IC; R1 is a resistor connected to the RT pin of the IC to control the operating frequency of the system; R2, C2, and C3 are the compensation network of the FB pin and COMP pin of the IC, which plays a decisive role in the stability of the system; R3 is a current sampling resistor; R4 and R5 form an output voltage sampling network, and their ratio determines the level of the output voltage; The control IC includes: Regulator module, OSC is an oscillator module, Reference module, Slope is a slope compensation module, MaxDuty is a maximum duty cycle module, AMP is an op amp, comparator CMP1, comparator CMP2 and Logic module. The VIN pin generates VCC voltage through the Regulator; VCC generates various reference voltages through the Reference module; the input of OSC is RT, and the output is divided into two paths, one output to the S terminal of the RS trigger, and the other output is sent to Slope and MaxDuty respectively. The positive input of AMP is 1.25V reference, the negative input is FB pin, and the output is COMP pin. COMP is connected to the 5V internal power supply through resistor R6. After the COMP terminal is stepped down by 1.25V, it is connected to resistor R7. The other end of resistor R7 is connected to resistor R8 and the negative input of comparator CMP1. The other end of resistor R8 is grounded. The positive input of comparator CMP1 is connected to the output of Slope. The output of comparator CMP1 is sent to the Logic module. The positive input of comparator CMP2 is a 0.5V reference voltage. The negative input of CMP2 is connected to the output of Slope. At the same time, the output of Slope is connected to resistor R9. The other end of resistor R9 is connected to the CS pin. The output of comparator CMP2 is sent to the Logic module. MaxDuty is output to the Logic module. The output of Logic is sent to the R end of the RS flip-flop. The output of the RS flip-flop is sent to the Driver module. The output of Driver is the OUT pin. The Regulator is a power supply module that generates a medium-voltage power supply VCC inside the IC through a high-voltage power supply VIN. The medium-voltage power supply VCC is used to generate a 5V voltage power supply inside the IC and provide power for the driver module. The Reference module generates an internal low-voltage 5V power supply and reference voltages of 1.25V and 0.5V. The OSC is an oscillator module. The oscillator frequency is conveniently adjusted by an external resistor on the RT pin. The oscillator module generates a clock signal and a sawtooth wave signal. The clock signal is sent to the RS trigger to control the conduction of each cycle. The sawtooth wave signal is sent to the slope compensation module Slope and the maximum duty cycle module MaxDuty respectively. Slope is a slope compensation module that converts the sawtooth wave voltage signal into a sawtooth wave current. The sawtooth wave current flows through the resistor R9 to generate a slope voltage and is superimposed on the CS pin. MaxDuty is a maximum duty cycle module. Since the slope compensation function is integrated in the IC, the maximum duty cycle is set to above 80%. When neither CMP1 nor CMP2 flips, the MaxDuty module controls the forced shutdown of the switching cycle. AMP is an op amp with a positive input connected to a 1.25V reference voltage, a negative input connected to the FB pin, and an output connected to the COMP pin. This op amp, in conjunction with the external compensation network C2, R2, and C3, detects the output voltage and adjusts system stability. The op amp's output is stepped down to 1.25V, then divided by R7 and R8 before being fed to the negative input of comparator CMP1. The positive input of comparator CMP1 is connected to the CS pin, with the slope-compensated voltage superimposed. Comparator CMP2 functions as an overcurrent protection module. When the CS pin detects excessive current and the slope-compensated voltage exceeds 0.5V, CMP2 flips and shuts down the output. The Logic module processes three signals, one from MaxDuty, CMP1, and CMP2, to determine which signal controls the output shutdown. The RS flip-flop logically controls whether the output is on or off. Driver is the driver module.

2. The current-mode controlled BOOST converter according to claim 1, wherein: The regulator is a power supply module, including VIN and VCC, which are two pins of the IC. R1 is a current limiting resistor, D1 is a clamping diode, N1 is a high-voltage enhanced NMOS, and C1 is a VCC external capacitor. The medium voltage power supply VCC is expressed as: VCC=V D1 -V GS , when VCC needs to be increased, the clamping diode of D1 is added in series.

3. The current-mode controlled BOOST converter according to claim 2, wherein: The input signal of the slope compensation module (Slope) is a sawtooth wave signal generated by the oscillator OSC, and the output signal is the slope current Islope. P3, P4 and N1, N2 force the symmetry of the two paths, so the Vgs of N1 and N2 are equal. Since N1 and N2 share the same Gate, all the Source voltages of N1 and N2 are equal. For P1 and P2, also due to symmetry, Vsg are equal. The Source voltages of P1 and P2 are equal, then the Gate voltages of P1 and P2 are equal. Since the Gate voltage of P2 is equal to the voltage of resistor R1, the Gate voltage of P1 is equal to the voltage of resistor R1; therefore, the currents of the two branches of the current mirror are equal The output current of P5 is designed according to the current mirror ratio to generate a current Islope proportional to Vslope. The slope voltage Islope*R9 generated by this module is superimposed on the CS pin.

Citation Information

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