Adapter power stacking feature for multi-port systems

Abstract

Embodiments of the present disclosure relate to an adapter power stacking feature of a multi-port system. One or more embodiments relate to a multi-port power delivery architecture that reduces cost and maximizes power utilization. According to some aspects, the adapter power stacking feature of embodiments can combine the power of two or more adapters. The total power can be used to support CPU Turbo events and fast charging functionality. In one aspect, one charger operates as a voltage source or a current source, and the other one or more chargers operate as one or more current sources. When system demand is high enough that all chargers can operate as current sources, the battery can supply the rest of the system demand. Implementations of the proposed adapter power stacking feature can enable a simple control scheme. A user can set a BGATE control priority to determine which charger handles the BGATE control.

Description

[0001] Cross Reference to Related Applications

[0002] This application claims priority to U.S. Provisional Patent Application No. 62 / 865,824, filed June 24, 2019, entitled “Implementation of Adapter Power Stacking Functionality for Multi-Port Systems,” which is incorporated by reference in its entirety for all purposes. TECHNICAL FIELD

[0003] The present embodiments relate generally to user computing devices, industrial computing devices, and handheld computing devices, and more specifically to power delivery architectures for such devices having multi-port systems. BACKGROUND

[0004] The proliferation of portable electronic devices increases the demand for batteries. In one example, portable electronic devices such as handheld devices, smartphones, and tablet computers include a battery that can be charged using power from a power source and that can provide power for operation after being disconnected from the power source. To reduce charging time, multiple electronic devices can share power. However, configuring multiple electronic devices for power sharing can involve a complex process. SUMMARY

[0005] One or more embodiments relate to a multi-port power delivery architecture that reduces cost and maximizes power utilization. According to some aspects, the adapter power stacking functionality or feature of embodiments can be utilized to combine power from two or more adapters. The combined total power can be used to support certain load requirements (such as CPU Turbo events) and certain battery charging applications (such as fast charging functionality). In one aspect, one charger coupled to an adapter or port operates as a voltage source or a current source, and the other charger or chargers operate as one or more current sources. When system demand is high enough to cause two or more chargers to operate as current sources, the battery can supply the remaining system demand. One or more embodiments of the adapter power stacking feature can enable a simple control scheme. BRIEF DESCRIPTION OF DRAWINGS

[0006] These and other aspects and features of the embodiments will become apparent to those ordinarily skilled in the art upon review of the following description of specific embodiments in conjunction with the accompanying drawings. In the drawings:

[0007] Figure 1 is a block diagram illustrating various aspects of a system in which embodiments can be implemented.

[0008] Figure 2 is a table illustrating operating conditions of adapters connected to adapter ports according to some embodiments.

[0009] Figure 3 is a block diagram illustrating one solution for dual USB-Type-C port applications.

[0010] Figure 4 is a block diagram of a system performing power stacking features according to some embodiments.

[0011] Figure 5 is a table illustrating how to determine BGATE control priority according to some embodiments.

[0012] Figure 6 is a block diagram illustrating one implementation of a charger according to some embodiments.

[0013] Figure 7 is a flowchart illustrating a process of performing adapter power stacking features according to some embodiments.

[0014] Figure 8 is a graph illustrating power utilization according to some embodiments.

[0015] Figure 9 is a flowchart illustrating a process of performing adapter power stacking features according to some embodiments.

[0016] Figure 10 is a graph illustrating power utilization according to some embodiments.

[0017] Figure 11 is a graph illustrating power utilization according to some embodiments.

[0018] Figure 12 is a table showing example operating conditions of a system according to some embodiments. Figure 4

[0019] Figure 13 is a block diagram of a system including adapter power stacking features according to some embodiments. DETAILED DESCRIPTION

[0020] ​The present embodiments will now be described in detail with reference to the attached drawings, which are provided as illustrative examples so as to enable those skilled in the art to practice the embodiments and alternatives. Notably, the attached drawings and examples are not meant to limit the scope of the present embodiments to a single embodiment, as other embodiments can be apparent to those skilled in the art from the description and examples provided. Furthermore, where certain elements of the present embodiments can be implemented in part using known components, only those portions of the known components that are necessary for an understanding of the present embodiments will be described, and detailed descriptions of other portions of the known components will be omitted so as not to obscure the description of the present embodiments. As will be apparent to those skilled in the art, embodiments described as implemented in software should not be limited thereto, but can include embodiments implemented in hardware, or combinations thereof, and vice versa, unless otherwise indicated herein. In this description, embodiments showing a single component should not be taken as limiting; rather, other embodiments encompass multiple identical components, and vice versa, unless otherwise explicitly stated. Furthermore, Applicant does not intend to be limited to any particular terminology in this specification, except to the extent necessary to enable the patentable subject matter. Moreover, the present embodiments encompass known equivalents of the components referred to herein by way of illustration.

[0021] One or more embodiments relate to a multi-port power delivery system that reduces cost and maximizes power utilization. According to some aspects, the adapter power stacking feature disclosed herein can combine power from two or more adapters. The combined total power can be used to support CPU Turbo events in the connected system, as well as fast charging functionality for one or more batteries in the system.

[0022] In some embodiments, a system includes a controller, a first charger, a second charger, and a battery connected to a system output port. In one configuration, the first charger is connected between a first adapter port and the system output port, and the second charger is connected between a second adapter port and the system output port. Each charger can be a DC-DC power converter. In one configuration, the battery, a sense resistor, and a battery control transistor are connected in series to the system output port. In one configuration, the controller is coupled to the first charger and the second charger. In one aspect, the controller can select or configure the first charger or the second charger to control the battery control transistor. The selected charger can sense a voltage at the system output port or a current through the sense resistor in order to provide power to the system output port according to the sensed voltage or current. The power at the system output port can be provided to the battery, to a device (e.g., a processor) connected to the system output port, or to a combination thereof. Thus, two or more adapters connected to the adapter ports can provide power to the battery and / or a device connected to the system output port with a simple architecture.

[0023] In one aspect, configuring two or more chargers of a system to perform an adapter power stacking function can be challenging. In particular, multiple current paths are connected to a system output port at which a single sense resistor is implemented in order to sense a current through a battery. However, it can be difficult to simultaneously control two or more chargers to provide power to the system output port by sensing the current through the single sense resistor. Moreover, power demands from a device (e.g., a processor) connected to the system output port can be unknown or can frequently change, adding complexity to configuring or controlling the chargers. Still further, faster charging of one or more batteries in a system is often desired compared to charging with power from only one adapter connected to the system.

[0024] In one aspect, one charger of the embodiments operates as a voltage source or a current source, while the other charger or chargers operate as current source(s). If the system demand is high enough for all chargers to operate as current sources, the battery can supply the rest of the system demand. Thus, the adapter power stacking feature or function of the embodiments can enable a simple control scheme.

[0025] Figure 1is a block diagram illustrating various aspects of an example system 100 including the present embodiments. The system 100 can be a computing device, such as a notebook computer (e.g., MacBook, Ultrabook, etc.), laptop, tablet or tablet computer (iPad, Surface, etc.), etc., a mobile power source, a USB-C interface platform, or any system that uses a battery and is capable of receiving power from an adapter. In these and other embodiments, the system 100 includes a load 116, such as a CPU running a conventional operating system such as Windows or Apple OS, and the system 100 can be an x86 processor from Intel, AMD, or other manufacturer, as well as other processors manufactured by Freescale, Qualcomm, DSPs, GPUs, etc. Obviously, the system 100 can include many other components not shown, such as solid state and other disk drives, memory, peripherals, displays, user interface components, etc. According to certain aspects, the system 100 to which the present embodiments can find particularly beneficial application has operating power requirements that can exceed the power limits of technologies such as USB-A, for example, in excess of 60 watts. However, the present embodiments are not limited to application in such systems.

[0026] As further shown, the example system 100 to which the present embodiments can find beneficial application includes two or more ports 108-1 through 108-N. The ports 108 can be Universal Serial Bus (USB) ports, such as USB Type C (USB-C) ports or USB Power Delivery (USB PD) ports in the USB Type C examples shown in Figure 1

[0027] ​As shown, the system 100 includes a battery charger 102-1 to 102-N for each port 108. In embodiments, the charger 102 can include one or more buck-boost narrow output voltage DC (NVDC) chargers. According to certain general aspects, during operation of the system 100, when a power adapter is plugged into any of the ports 108, the associated battery charger 102 is configured to charge the battery 104. In embodiments of notebook computers (e.g., Ultrabooks) and the system 100, the battery 104 can be a rechargeable 1S / 2S / 3S / 4S (i.e., 1 -core, 2-core, 3-core, or 4-core battery pack) lithium-ion (Li-ion) battery. In some embodiments, the system 100 receives power from one or more adapters connected to respective ports 108, the battery 104, or any combination thereof. In one example, the system 100 receives power from one or more adapters according to an attachment detection protocol (ADP). In some embodiments, the system 100 provides power from one or more adapters connected to respective ports 108, the battery 104, a device connected to the load 116 (e.g., a processor or an external device), or any combination thereof. In one example, the system 100 provides power to one or more ports 108 according to an on-the-go (OTG) protocol. Further details of the configuration and operation of the system 100 are provided below.

[0028] Figure 2is a table 200 illustrating operational instances of a dual port system according to embodiments. In instance 1, no adapters are connected to ports 108-1, 108-2. In instance 2, an adapter connected to first port 108-1 operates according to ADP to provide power to system output port SYSOUT. In instance 3, an adapter connected to second port 108-2 operates according to ADP to provide power to system output port SYSOUT. In instance 4, a first adapter connected to first port 108-1 and a second adapter connected to second port 108-2 operate according to ADP to provide power to system output port SYSOUT. In instance 5, an adapter connected to first port 108-1 operates according to ADP to provide power to system output port SYSOUT, and an OTG device connected to second port 108-2 operates according to OTG to receive power from system output port SYSOUT. In instance 6, an adapter connected to second port 108-2 operates according to ADP to provide power to system output port SYSOUT, and an OTG device connected to first port 108-1 operates according to OTG to receive power from system output port SYSOUT. In instance 7, an OTG device connected to first port 108-1 operates according to OTG to receive power from system output port SYSOUT. In instance 8, an OTG device connected to second port 108-2 operates according to OTG to receive power from system output port SYSOUT. In instance 9, a first OTG device connected to first port 108-1 and a second OTG device connected to second port 108-2 operate according to OTG to receive power from system output port SYSOUT.

[0029] Figure 3is a block diagram illustrating issues in one example system 300 for dual USB-Type-C port applications. In this example, a single buck-boost (BB) charger 302 supports system power and charges a battery 304. On-The-Go (OTG) power for devices connected to ports 308-1 and 308-2 can be provided by a single buck converter 306 and can be limited to 5V. Each port 308 can be coupled to a PD-IC 310 that controls two pairs of transistors 312 and 314. When no adapter is connected but a power consuming device is connected, the PD-IC 310 controls the transistors 314 so as to couple the OTG voltage (from the battery 304 via the buck converter 306) to the adapter port 308. When an adapter is connected to a port, then the PD-IC 310 controls the transistors 312 so as to couple the adapter voltage to the BB charger 302 for providing power at the system output port SYSOUT and / or charging the battery 304. An embedded controller (EC, not shown) can communicate with the PD-ICs 310-1 and 310-2 so as to ensure that when adapters are simultaneously inserted into both of the adapter ports 308-1 and 308-2, one adapter is coupled to the BB 302 for providing power. This approach can employ complex logic circuits, thus increasing implementation costs. Moreover, for multiple adapters connected to the ports 308, this approach can not support power stacking functionality. The present applicant recognizes that such power stacking functionality can enable fast charging functionality of the battery 304 and / or can support CPU turbo events for devices (e.g., processors) coupled to the system output port SYSOUT. Such functionality can be based on and / or leverage the capabilities of the example methods described in U.S. Patent Publication No. 2017 / 0279284, U.S. Patent Application No. 16 / 725,145 filed December 23, 2019, and / or U.S. Patent Application No. 16 / 846,152 filed April 10, 2020, all of which are incorporated by reference in their entireties.

[0030] Figure 4is a block diagram of a system 400 including adapter power stacking features or functionality according to some embodiments. The system 400 can be implemented as the system 100. In some embodiments, the system 400 includes chargers 102-1, 102-2, a battery 104, a battery control transistor 416, a sense resistor 418, and an EC 440. These components can operate together to store and exchange power among multiple devices. For example, two adapters connected to the adapter ports 108-1, 108-2 provide power through the chargers 102-1, 102-2 through paths 452, 454 to a device (e.g., a processor) connected to the system output port SYSOUT. Additionally or alternatively, two adapters connected to the adapter ports 108-1, 108-2 provide power through the chargers 102-1, 102-2 to charge the battery 104 through paths 456, 458. In some cases, the battery 104 provides additional power to the device (e.g., a processor) connected to the system output port SYSOUT. In some embodiments, the system 400 includes more, fewer, or different components than the components shown in the system 100. Figure 4 The system 400 includes more, fewer, or different components than the components shown in the system 100.

[0031] In one configuration, the charger 102-1 is coupled between the adapter port 108-1 and the system output port SYSOUT, and the charger 102-2 is coupled between the adapter port 108-2 and the system output port SYSOUT. The chargers 102-1, 102-2 can be or can include DC-DC power converters capable of operating in a buck, boost, or buck-boost mode. In one configuration, the sense resistor 418, the battery control transistor 416, and the battery 104 are coupled in series to the system output port SYSOUT. The battery control transistor 416 can be any transistor (e.g., a MOSFET). In one configuration, the EC 440 is coupled to the chargers 102-1, 102-2. Similar to the EC 140 of Figure 1 The EC 440 can be implemented as a digital logic circuit or microcontroller with corresponding software and firmware, similar to the EC 140. However, the EC 440 can further configure or cause the chargers 102-1, 102-2 to provide power to the system output port SYSOUT and / or the battery 104 with power stacking control functionality, as will become more apparent from the previous example description. Thus, two or more adapters connected to the adapter ports 108-1, 108-2 can provide combined power to the battery and / or a device connected to the system output port SYSOUT with a simple architecture.

[0032] In one aspect, it can be challenging to configure two or more chargers 102 of system 400 to implement an adapter power stacking feature. In particular, multiple current paths are connected to system output port SYSOUT at which a single sense resistor 418 is implemented in order to sense current through battery 104. However, it can be difficult to control two or more chargers 102 to provide power to the system output by sensing current through the single sense resistor 418. Also, power requirements from devices (e.g., processors) connected to system output port SYSOUT can be unknown or can frequently change, adding complexity to configuring or controlling chargers 102.

[0033] In one aspect, EC 440 can configure or cause chargers 102-1, 102-2 to provide power to system output port SYSOUT according to voltage at system output port SYSOUT, current through sense resistor 418, or both. In one example, EC 440 determines or sets parameters such as a threshold or target value for voltage at system output port SYSOUT, current through sense resistor 418, current through input adapter port, or a combination thereof. Depending on the parameters set by EC 440, chargers 102-1, 102-2 can operate as voltage sources, current sources, or a combination thereof. Chargers 102-1, 102-2 can automatically or autonomously change operating modes, e.g., by a predetermined sequence, in order to meet power requirements at system output port SYSOUT. Battery 104 can also discharge power in order to provide power to system output port SYSOUT. In one approach, EC 440 enables one charger 102-1 to generate signal BGATE1 to control battery control transistor 416 and disables the other charger 102-2 from controlling battery control transistor 416. Chargers 102-1, 102-2 can set or change operating modes depending on which charger has BGATE control. Thus, system 400 can perform a power stacking feature or function without receiving any information indicating power requirements from devices (e.g., processors) connected to system output port SYSOUT. Reference is made to Figures 5 to 13 A detailed description of example operations for system 400 is provided.

[0034] Figure 5is a table 500 illustrating BGATE control priority of the system 400 according to an embodiment. In one aspect, the EC 440 determines a charger 102 from the plurality of chargers 102-1, 102-2 to control the battery control transistor 416. The EC 440 can receive information indicating available power of adapters connected to the adapter ports 108-1, 108-2. The determined charger 102 can generate a control signal BGATE and provide the control signal BGATE to the gate electrode of the battery control transistor 416. In one example, in response to available power of a first adapter connected to the adapter port 108-1 being greater than available power of a second adapter connected to the adapter port 108-2, the EC 440 can determine the charger 102-1 to control the battery control transistor 416. In one example, in response to available power of the second adapter connected to the adapter port 108-2 being greater than available power of the first adapter connected to the adapter port 108-1, the EC 440 can determine the charger 102-2 to control the battery control transistor 416. In one example, if available power of the first adapter connected to the adapter port 108-1 is equal to available power of the second adapter connected to the adapter port 108-2, in response to the first adapter being connected to the adapter port 108-1 before the second adapter is connected to the adapter port 108-2, the EC 440 can determine the charger 102-1 to control the battery control transistor 416. By determining the BGATE control priority for controlling the battery control transistor 416, a single charger 102 can control the battery control transistor 416 for managing battery power.

[0035] Figure 6 is a block diagram illustrating one implementation of a charger 102 according to some embodiments. In some embodiments, the charger 102 includes a transistor Ql, a transistor Q2, a transistor Q3, a transistor Q4, an inductor LI, a resistor RSI, and a converter drive circuit 640. The transistor Ql, the transistor Q2, the transistor Q3, the transistor Q4 can be implemented as any transistor (e.g., MOSFETs). The converter drive circuit 640 can be implemented as a logic circuit. These components can operate together to perform DC-DC power conversion. In other embodiments, the charger 102 includes more, fewer, or different components than those shown in FIG. 6. Figure 6 In some embodiments, the charger 102 includes more, fewer, or different components than those shown in FIG. 6.

[0036] In one configuration, resistor RSI is coupled between adapter port 108 and the drain electrode of transistor Ql. In one configuration, the source electrode of transistor Ql is coupled to the drain electrode of transistor Q2, and the source electrode of transistor Q2 is coupled to a ground voltage rail that supplies a ground voltage. In one configuration, the drain electrode of transistor Q4 is coupled to system output port SYSOUT, the source electrode of transistor Q4 is coupled to the drain electrode of transistor Q3, and the source electrode of transistor Q3 is coupled to the ground voltage rail. In one configuration, inductor LI is coupled between the source electrode of transistor Ql and the source electrode of transistor Q4. In one configuration, converter drive circuit 640 is coupled to the two electrodes of resistor RSI, the two electrodes of sense resistor 618, system output port SYSOUT, and the gate electrodes of transistors Ql, Q2, Q3, Q4. In this configuration, converter drive circuit 640 can configure transistors Ql, Q2, Q3, Q4 in a buck mode, a boost mode, or a buck-boost mode to convert DC power from an adapter connected to port 108 to DC power at system output port SYSOUT.

[0037] In one aspect, charger 102 includes a plurality of selectable feedback loops: system voltage loop 602, charge current loop 604, and adapter current loop 606. Charger 102 can receive signals or instructions from EC 440 indicating voltage or current thresholds and BGATE priority controls, and automatically select one of system voltage loop 602, charge current loop 604, and adapter current loop 606, e.g., through a predetermined sequence, according to the received signals or instructions.

[0038] In one aspect, system voltage loop 602 is used to sense and regulate the voltage at system output port SYSOUT. System voltage loop 602 is formed by comparator 676 comparing the voltage at system output port SYSOUT to threshold voltage VSYS TH. According to the comparison of comparator 676, modulator 612 can adjust the pulse width of a pulse to drive transistors Ql, Q2, Q3, Q4. According to the adjusted pulse width, PWM driver 614 can generate and provide the pulse to transistors Ql, Q2, Q3, Q4 to regulate the voltage at system output port SYSOUT. Charger 102 operating according to system voltage loop 602 can operate as a voltage source to power system output port SYSOUT.

[0039] In one example, the charging current loop 604 is used to sense and regulate the current through the battery 104. The charging current loop 604 is formed through the amplifier 672 and the comparator 674. The amplifier 672 can determine, sense, or amplify the voltage across the sense resistor 618 corresponding to the current through the battery 104, and the comparator 674 can compare the determined voltage from the amplifier 672 to a voltage corresponding to the threshold current IBAT TH. Depending on the comparison by the comparator 674, the modulator 612 can adjust the pulse width of the pulses to drive the transistors Ql, Q2, Q3, Q4. Depending on the adjusted pulse width, the PWM driver 614 can generate and provide pulses to the transistors Ql, Q2, Q3, Q4 to regulate the current through the battery 104. The charger 102 operating according to the charging current loop 604 can operate as a current source to power the system output port SYSOUT.

[0040] In one example, the adapter current loop 606 is used to sense and regulate the current through the adapter port 108. The adapter current loop 606 is formed through the amplifier 624 and the comparator 626. The amplifier 624 can determine, sense, or amplify the voltage across the resistor RSI corresponding to the current through the adapter port 108, and the comparator 626 can compare the voltage determined by the amplifier 624 to a voltage corresponding to the threshold current IAC TH. Depending on the comparison by the comparator 626, the modulator 612 can adjust the pulse width of the pulses to drive the transistors Ql, Q2, Q3, Q4. Depending on the adjusted pulse width, the PWM driver 614 can generate and provide pulses to the transistors Ql, Q2, Q3, Q4 to regulate the current through the battery 104. The charger 102 operating according to the adapter current loop 606 can operate as a current source to power the system output port SYSOUT.

[0041] In one aspect, the loop selector 620 selects feedback loops in a predetermined sequence to support a fast charging feature for charging a battery 104 and / or a CPU turbo feature of a device (e.g., a processor) coupled to the system output port SYSOUT. The loop selectors 620 of different chargers can communicate with each other, directly or through the EC 440, to select an operating mode or feedback loop. In one aspect, the loop selector 620 selects the system voltage loop 602 to regulate the voltage at the system output port SYSOUT. In response to determining that the voltage at the system output port SYSOUT falls below a threshold voltage VSYS TH, the loop selector 620 can select the charging current loop 604 to regulate the current through the battery 104, despite the system voltage loop 602 regulating the voltage at the system output port SYSOUT. While the charging current loop 604 regulates the current through the battery 104, the additional charger 102 can provide power to the system output port SYSOUT, the battery 104, or both. In response to determining that the current through the battery 104 falls below a threshold current IBAT TH, the loop selector 620 can select the adapter current loop 606 to regulate the current through the adapter port 108, despite the charging current loop 604 regulating the current through the battery 104. While the adapter current loop 606 regulates the current through the adapter port 108, the additional charger 102 can provide power to the system output port SYSOUT. Thus, the adapter power stacking feature can be performed without specific information about the power needs from a device (e.g., a processor) coupled to the system output port SYSOUT. In some embodiments, the EC 440 can select the loop or operating mode of one or more chargers 102. In some embodiments, the EC 440 performs one or more functionalities of the loop selector 620 or the converter drive circuit 640 described herein.

[0042] Figure 7 FIG. 7 is a flow diagram illustrating a process 700 to perform an adapter power stacking feature, according to some embodiments. In some embodiments, the process 700 is performed by the system 400. In some embodiments, the process 700 is performed by other entities. In some embodiments, the process 700 includes more, fewer, or different steps than those shown in Figure 7

[0043] ​In one approach, the system 400 determines 710 the first charger 102-1 to control the battery control transistor 416. The system 400 (e.g., EC 440) can receive information indicating available power from adapters connected to the adapter ports 108-1, 108-2 and determine the first charger 102-1 to control the battery control transistor 416 according to the available power from the adapters. The determined charger 102-1 can generate and provide a BGATE control signal to the gate electrode of the battery control transistor 416. The BGATE control of the charger 102-2 can be configured to be tri-stated and the charger 102-2 can not control the battery control transistor 416. In one example, the system 400 (e.g., EC 440) can determine the charger 102-1 to control the battery control transistor 416 in response to the available power of a first adapter connected to the adapter port 108-1 being greater than the available power of a second adapter connected to the adapter port 108-2. In one example, the system 400 (e.g., EC 440) can determine the charger 102-2 to control the battery control transistor 416 in response to the available power of the second adapter connected to the adapter port 108-2 being greater than the available power of the first adapter connected to the adapter port 108-1. In one example, if the available power of the first adapter connected to the adapter port 108-1 is equal to the available power of the second adapter connected to the adapter port 108-2, the system 400 (e.g., EC 440) can determine the charger 102-1 to control the battery control transistor 416 in response to the first adapter being connected to the adapter port 108-1 before the second adapter is connected to the adapter port 108-2. By determining the BGATE control priority for controlling the battery control transistor 416, a single charger 102 can control the battery control transistor 416 to provide power to the system output port SYSOUT.

[0044] In one approach, responsive to determining to control the battery control transistor 416 with the first charger 102-1, the system 400 sets 715 the first charger 102-1 and the second charger 102-2 in the system voltage loop 602. For example, the loop selector 620 of the first charger 102-1 selects the system voltage loop 602-1 of the first charger 102-1, and the loop selector 620 of the second charger 102-2 selects the system voltage loop 602 of the second charger 102-2. The EC 440 can set or configure the first charger 102-1 to have a higher threshold voltage Vsys th than the second charger 102-2. The first charger 102-1 operating from the system voltage loop 602 with the higher first threshold voltage Vsys th can operate as a voltage source. The first charger 102-1 can disable the battery control transistor 416 and regulate the voltage at the system output port SYSOUT to the first threshold voltage Vsys th of the first charger 102-1. The system 400 can set the second threshold voltage Vsys th of the second charger 102-2 to be higher than the minimum battery voltage but less than the first threshold voltage Vsys th of the first charger 102-1 so that the second charger 102-2 can standby to regulate the voltage at the system output port SYSOUT to the second threshold voltage Vsys th of the second charger 102-2. The first charger 102-1 can determine 720 whether battery charging is enabled. If there is no request from the EC 440 or an external computing device to enable battery charging, then the system 400 can keep 715 the first charger 102-1 and the second charger 102-2 operating in the system voltage loop 602.

[0045] In one approach, if there is a request to enable battery charging, the system 400 can set 725 the first charger 102-1 in the charging current loop 604 and the second charger 102-2 in the adapter current loop 606. For example, the loop selector 620 of the first charger 102-1 selects the charger current loop 604 of the first charger 102-1 and the loop selector 620 of the second charger 102-2 selects the adapter current loop 606 of the second charger 102-2. The voltage at the system output port SYSOUT can decrease to the voltage of the battery 104 because the battery control transistor 416 is on when the first charger 102-1 operates in the charging current loop 604. The first charger 102-1 operating according to the charging current loop 604 can operate as a current supplier. The first charger 102-1 operating according to the charging current loop 604 can enable the battery control transistor 416 and regulate the current through the battery 104 to the first threshold current IBAT TH of the first charger 102-1. The second charger 102-2 operating according to the adapter current loop 606 can operate as a current supplier. The second charger 102-2 operating according to the adapter current loop 606 can regulate the current through the adapter port 108-2 to the threshold current IAC TH of the second charger 102-2. The first charger 102-1 operating according to the charging current loop 604 can monitor the current through the adapter port 108-1 and determine 730 whether the current through the adapter port 108-1 is within a predetermined range from the first threshold current IAC TH of the first charger 102-1. If the current through the adapter port 108-1 is not within the predetermined range (e.g., ±5%) from the first threshold current IAC TH, the system 400 can maintain 725 the first charger 102-1 to operate in the charging current loop 604.

[0046] In one approach, if the current through the adapter port 108-1 is within a predetermined range (e.g., ±5%) from the first threshold current IAC TH, the system 400 can set 735 the first charger 102-1 in the adapter current loop 606 while the second charger 102-2 remains in the adapter current loop 606. For example, the loop selector 620 of the first charger 102-1 selects the adapter current loop 606 of the first charger 102-1 and the loop selector 620 of the second charger 102-2 selects the adapter current loop 606 of the second charger 102-2. In one aspect, when the total power supplied by the first charger 102-1 and the second charger 102-2 operating in the adapter current loop 606 is insufficient to support charging the battery 104 in the fast charge mode, insufficient to support the power demand of a device (e.g., a processor) connected to the system output port SYSOUT (e.g., in a CPU turbo event), or both, the current through the battery 104 can be reduced.

[0047] In one approach, if the power demand at the system output port SYSOUT is greater than the total adapter power supplied by the first charger 102-1 and the second charger 102-2, the battery 104 can discharge to power the system output port SYSOUT to meet the demand while the system 400 keeps the first charger 102-1 and the second charger 102-2 operating in the adapter current loop 606. In one aspect, the battery control transistor 416 can be turned on when the first charger 102-1 and the second charger 102-2 are operating in the adapter current loop 606. Thus, when a device connected to the system output port SYSOUT draws more current than supplied by the first charger 102-1 and the second charger 102-2, the battery 104 can discharge through the system output port SYSOUT to provide current or power to the device.

[0048] Figure 8 Graphs 810, 820, 830, 840 illustrating power utilization of the system 400 operation according to the process 700 are shown. In one example, the graph 810 corresponds to the power discharged by the battery 104 to the system output port SYSOUT; the graph 820 corresponds to the power provided from the adapter to the battery 104 to charge; the graph 830 corresponds to the power provided by the first charger 102-1 to the system output port SYSOUT, the battery 104, or both; and the graph 840 corresponds to the power provided by the second charger 102-2 to the system output port SYSOUT, the battery 104, or both. In one aspect, the graphs 810, 820, 830, 840 are plotted over time. Figure 8In the example shown in FIG. 1, the first charger 102-1 has available power of 30W and the second charger 102-2 has available power of 20W, such that both the first charger 102-1 and the second charger 102-2 can provide power to the system output port SYSOUT and support the fast charge feature of the battery 104 drawing 35W from the system output port SYSOUT. When the power demand from a device (e.g., a processor) connected to the system output port SYSOUT is 0W and the battery 104 is charging at 35W for fast charging, the charger 102-1 can provide 15W and the charger 102-2 can provide 20W to charge the battery 104 at 35W. As the power demand from the device (e.g., a processor) connected to the system output port SYSOUT increases, the first charger 102-1 can increase the power provided to the system output port SYSOUT to provide power to the device connected to the system output port SYSOUT. After the power output by the first charger 102-1 reaches its available output power (or 30W), the power provided to charge the battery 104 can decrease as the power demand further increases. After the power provided to charge the battery 104 reaches 0W, the battery 104 can discharge power to the system output port SYSOUT, for example, to support the CPU turbo feature of the device (e.g., a processor) connected to the system output port SYSOUT.

[0049] Figure 9 FIG. 9 is a flow diagram illustrating a process 900 to perform an adapter power stacking feature, in accordance with some embodiments. In some embodiments, the process 900 is performed by the system 400. In some embodiments, the process 900 is performed by other entities. In some embodiments, the process 900 includes more, fewer, or different steps than those shown in FIG. 9. Figure 9

[0050] ​In one approach, the system 400 determines 910 the first charger 102-1 to control the battery control transistor 416. The system 400 (e.g., the EC 440) can receive information indicating available power from adapters connected to the adapter ports 108-1, 108-2 and determine the first charger 102-1 to control the battery control transistor 416 according to the available power from the adapters. The determined charger 102-1 can generate and provide a BGATE control signal to the gate electrode of the battery control transistor 416. The BGATE control of the charger 102-2 can be configured to be tri-stated and the charger 102-2 can not control the battery control transistor 416. In one example, the system 400 can determine the charger 102-1 to control the battery control transistor 416 in response to the available power of a first adapter connected to the adapter port 108-1 being greater than the available power of a second adapter connected to the adapter port 108-2. In one example, the system 400 can determine the charger 102-2 to control the battery control transistor 416 in response to the available power of the second adapter connected to the adapter port 108-2 being greater than the available power of the first adapter connected to the adapter port 108-1. In one example, if the available power of the first adapter connected to the adapter port 108-1 is equal to the available power of the second adapter connected to the adapter port 108-2, the system 400 can determine the charger 102-1 to control the battery control transistor 416 in response to the first adapter connected to the adapter port 108-1 before the second adapter connected to the adapter port 108-2. By determining the BGATE control priority for controlling the battery control transistor 416, a single charger 102 can control the battery control transistor 416 for managing battery power.

[0051] In one approach, in response to determining to control the battery control transistor 416 with the first charger 102-1, the system 400 sets 915 the first charger 102-1 in the system voltage loop 602 and the second charger 102-2 in the charge current loop 604. For example, the loop selector 620 of the first charger 102-1 selects the system voltage loop 602 and the loop selector 620 of the second charger 102-2 selects the charge current loop 604. The first charger 102-1 operating according to the system voltage loop 602 can operate as a voltage source. The first charger 102-1 can disable the battery control transistor 416 and regulate the voltage at the system output port SYSOUT to the first threshold voltage VSYS TH of the first charger 102-1. The EC 440 can set the second threshold current IBAT TH of the second charger 102-2 to be less than the desired charger current target that can be later set to the first threshold current IBAT TH of the first charger 102-1, such that the second charger 102-2 can be in a standby state to regulate the charge current to the second threshold current IBAT TH of the second charger 102-2. The first charger 102-1 can determine 920 whether to enable battery charging. If there is no request, for example from the EC 440 or an external computing device, to enable battery charging, the system 400 can maintain 915 the first charger 102-1 to operate in the system voltage loop 602 and the second charger 102-2 to operate in the charge current loop 604.

[0052] In one approach, if there is a request to enable battery charging, the system 400 can set 925 the first charger 102-1 in the charging current loop 604. For example, the loop selector 620 of the first charger 102-1 selects the charging current loop 604, and the loop selector of the second charger 102-2 selects the charging current loop 604. Since the battery control transistor 416 is on when the first charger 102-1 operates in the charging current loop 604, the voltage at the system output port SYSOUT can be reduced to the battery voltage. The first charger 102-1 operating in the charging current loop 604 can operate as a current supplier. The first charger 102-1 can enable the battery control transistor 416 and adjust the current through the battery 104 to the first threshold current of the first charger 102-1, IBAT TH. The first charger 102-1 can monitor the current through the adapter port 108-1 and determine 930 whether the current through the adapter port 108-1 is within a predetermined range (e.g., ±5%) from the first threshold current IAC TH. If the current through the adapter port 108-1 is not within the predetermined range (e.g., ±5%) from the first threshold current IAC TH, the system 400 can keep 925 the first charger 102-1 to operate in the charging current loop 604. The second charger 102-2 operating in the charging current loop 604 can be in a standby state to adjust the charging current to the second threshold current of the second charger 102-2, IBAT TH.

[0053] In one approach, if the current through the adapter port 108-1 is within a predetermined range (e.g., ±5%) from the first threshold current IAC TH, the system 400 can set 935 the first charger 102-1 in the adapter current loop 606 while the second charger 102-2 remains in the charging current loop 604. For example, the loop selector 620 of the first charger 102-1 selects the adapter current loop 606, and the loop selector of the second charger 102-2 selects the charging current loop 604. The current through the battery 104 can decrease when the second charger 102-2 adjusts the charging current to the second threshold current of the second charger 102-2, IBAT TH. The system 400 can monitor the current through the battery 104 and determine whether the current through 940 the adapter port 108-2 is within a predetermined range (e.g., ±5%) from the second threshold current IAC TH of the second charger 102-2. If the current through the adapter port 108-2 is not within the predetermined range (e.g., ±5%) from the second threshold current IAC TH, the system 400 can keep 935 the first charger 102-1 to operate in the adapter current loop 606 while the second charger 102-2 operates in the charging current loop 604.

[0054] In one approach, if the current through the adapter port 108-2 is within a predetermined range (e.g., ±5%) of the second threshold current IAC TH, the system 400 can set 945 the second charger 102-2 in the adapter current loop 606 while the first charger 102-1 is operating in the adapter current loop 606. For example, the loop selector 620 of the first charger 102-1 selects the adapter current loop 606 and the loop selector of the second charger 102-2 selects the adapter current loop 606. When the total power supplied by the first charger 102-1 and the second charger 102-2 operating in the adapter current loop 606 is insufficient to support charging the battery 104 in the fast charge mode and the power demand of a device (e.g., a processor) connected to the system output port SYSOUT (e.g., in a CPU turbo event, or both), the current through the battery 104 can decrease. The second charger 102-2 operating in the adapter current loop 606 can operate as a current supplier. The second charger 102-2 can regulate the current through the adapter port 108-2 to the threshold current IAC TH of the second charger 102-2.

[0055] In one approach, if the power demand at the system output port SYSOUT is greater than the total adapter power supplied by the first charger 102-1 and the second charger 102-2, the battery 104 can discharge to power the system output port SYSOUT to meet the demand while the system 400 keeps the first charger 102-1 and the second charger 102-2 operating in the adapter current loop 606. In one aspect, the battery control transistor 416 can be turned on when the first charger 102-1 and the second charger 102-2 are operating in the adapter current loop 606. Thus, when a device connected to the system output port SYSOUT draws more current than supplied by the first charger 102-1 and the second charger 102-2, the battery 104 can discharge through the system output port SYSOUT to provide current to the device to supplement.

[0056] Figure 10Graphs 1010, 1020, 1030, 1040 show power utilization of system 400 according to operation of process 900. In one example, graph 1010 corresponds to power discharged by battery 104 to system output port SYSOUT; graph 1020 corresponds to power provided from an adapter to battery 104 to charge; graph 1030 corresponds to power provided by first charger 102-1 to system output port SYSOUT, battery 104, or both; and graph 1040 corresponds to power provided by second charger 102-2 to system output port SYSOUT, battery 104, or both. In Figure 10 In the example shown in FIG. 10, first charger 102-1 has available power of 30W and second charger 102-2 has available power of 20W. When the power demand from a device (e.g., a processor) connected to system output port SYSOUT is 0W and battery 104 is charging at 20W for normal charging, charger 102-1 can provide 20W and charger 102-2 can provide 0W to charge battery 104 at 20W (e.g., normal charging). As the power demand from a device (e.g., a processor) connected to system output port SYSOUT increases, first charger 102-1 can increase the power provided to system output port SYSOUT to provide power to the device connected to system output port SYSOUT. After the power output by first charger 102-1 reaches its available output power (or 30W), as the power demand further increases, second charger 102-2 can increase the power provided to system output port SYSOUT and battery 104. After the power output by second charger 102-2 reaches its available output power (or 20W), the power provided to charge battery 104 can decrease as the power demand further increases. After the power provided to charge battery 104 reaches 0W, battery 104 can discharge power to system output port SYSOUT, for example, to support a CPU turbo feature of a device (e.g., a processor) connected to system output port SYSOUT.

[0057] Figure 11Graphs 1110, 1120, 1130, 1140 show power utilization of system 400 operating according to process 700. In one example, graph 1110 corresponds to power discharged by battery 104 to system output port SYSOUT; graph 1120 corresponds to power provided from an adapter to battery 104 to charge; graph 1130 corresponds to power provided by first charger 102-1 to system output port SYSOUT, battery 104, or both; and graph 1140 corresponds to power provided by second charger 102-2 to system output port SYSOUT, battery 104, or both. In Figure 11 In the example shown in FIG. 11, first charger 102-1 has available power of 30W and second charger 102-2 has available power of 20W. When the power demand from a device (e.g., a processor) connected to system output port SYSOUT is 0W and battery 104 is being charged at 35W for fast charging, first charger 102-1 can provide 30W and second charger 102-2 can provide 5W to charge battery 104 at 35W (e.g., fast charging). As the power demand from a device (e.g., a processor) connected to system output port SYSOUT increases, second charger 102-2 can increase the power provided to system output port SYSOUT to provide power to the device connected to system output port SYSOUT. After the power output by second charger 102-2 reaches its available output power (or 20W), the power provided to charge battery 104 can decrease as the power demand further increases. After the power provided to charge battery 104 reaches 0W, battery 104 can discharge power to system output port SYSOUT, for example, to support CPU turbo features of a device (e.g., a processor) connected to system output port SYSOUT.

[0058] Figure 12 is shown to illustrate a system 400 according to some embodiments Figure 4Table 1200 of example operating conditions for system 400. In one example, implementation example 1 corresponds to system 400 operating according to process 700 for charging battery 104 in normal charging mode. In one example, implementation example 1 corresponds to system 400 operating according to process 700 for charging battery 104 in fast charging mode. In one example, implementation example 2 corresponds to system 400 operating according to process 900 for charging battery 104 in either normal charging mode or fast charging mode. In implementation example 1 for normal charging, to support a CPU turbo event, charger 102-1, battery 104, and charger 102-2 with BGATE priority can provide power in that sequence. In implementation example 1 for fast charging, to support a CPU turbo event, charger 102-1 and charger 102-2 can provide power to system output port SYSOUT. If charger 102-1 and charger 102-2 are insufficient to meet the power demand, battery 104 can discharge power and provide power to system output SYSOUT. In implementation example 2, to support a CPU turbo event through charger 102-1, charger 102-1, charger 102-2, and battery 104 with BGATE priority can provide power in that sequence.

[0059] Figure 13 is a block diagram of a system 1300 including an adapter power stacking feature according to some embodiments. System 1300 can be implemented as system 100. In one aspect, system 1300 is similar to system 400 except that system 1300 includes four chargers. The principles disclosed with respect to system 400 for various power stacking features can apply to system 1300 with four or any number of chargers.

[0060] While the present embodiments have been particularly described with reference to the preferences, it will be understood by those skilled in the art that various changes in form and details can be made therein without departing from the spirit and scope of the disclosure. The following claims are intended to cover such changes and modifications which are within the spirit and scope of the disclosure.

Claims

1. An electronic system comprising: a first charger coupled between a first adapter port and a system output port, the first charger comprising two or more feedback loops; a second charger coupled between a second adapter port and the system output port, the second charger comprising two or more feedback loops; a battery control transistor and a battery coupled in series to the system output port; and a controller coupled to the first charger and the second charger, the controller configured to select the first charger from among the first charger and the second charger to control the battery control transistor; wherein in accordance with the selection of the first charger to control the battery control transistor, a first feedback loop from among the two or more feedback loops of the first charger is selected, and a second feedback loop from among the two or more feedback loops of the second charger is selected.

2. The electronic system of claim 1, wherein the first charger is configured to select the first feedback loop of the first charger, and the second charger is configured to select the second feedback loop of the second charger, without information from a device coupled to the system output port regarding power demand.

3. The electronic system of claim 1, wherein the first charger is configured to select the first feedback loop from among the two or more feedback loops of the first charger in response to the selection of the first charger to control the battery control transistor; and wherein the second charger is configured to select the second feedback loop from among the two or more feedback loops of the second charger in response to the selection of the first charger to control the battery control transistor.

4. The electronic system of claim 1, wherein the controller is configured to: set a maximum voltage to be controlled by the second charger to be less than a maximum voltage to be controlled by the first charger in response to determining the first charger to control the battery control transistor.

5. The electronic system of claim 1, wherein the controller is configured to determine the first charger from among the first charger and the second charger to control the battery control transistor in response to a first available power of the first charger being greater than a second available power of the second charger.

6. The electronic system of claim 1, wherein the controller is configured to determine the first charger from among the first charger and the second charger to control the battery control transistor in response to a first device being connected to the first adapter port before a second device is connected to the second adapter port.

7. The electronic system of claim 1, wherein the first charger is configured to select a first system voltage loop of the first charger that regulates a voltage at the system output port in response to determining the first charger to control the battery control transistor. ​ 8. The electronic system of claim 7, wherein the second charger is configured to select a second system voltage loop of the second charger that regulates the voltage at the system output port in response to determining that the first charger is controlling the battery control transistor.

9. The electronic system of claim 8, wherein the first charger is configured to select a charging current loop of the first charger that regulates current through the battery control transistor in response to determining that charging of the battery is enabled; and the second charger is configured to select a first adapter current loop of the second charger that regulates input current through the second adapter port in response to determining that charging of the battery is enabled.

10. The electronic system of claim 9, wherein the first charger is configured to select a second adapter current loop of the first charger in response to input current through the first adapter port being within a predetermined range from a predetermined threshold.

11. The electronic system of claim 7, wherein the second charger is configured to select a first charging current loop of the second charger that regulates current through the battery control transistor in response to determining that the first charger is controlling the battery control transistor.

12. The electronic system of claim 11, wherein the first charger is configured to select a second charging current loop of the first charger that regulates current through the battery control transistor in response to determining that charging of the battery is enabled.

13. The electronic system of claim 12, wherein the first charger is configured to select an adapter current loop of the first charger that regulates input current through the first adapter port in response to input current through the first adapter port being within a predetermined range from a predetermined threshold.

14. The electronic system of claim 1, further comprising: a sense resistor coupled in series with the battery control transistor and the battery to a system output port; wherein the first charger is configured to determine current through the battery control transistor from a voltage difference across the sense resistor.

15. A method for an electronic system, comprising: detecting, by a first charger, voltage at a system output port or current through a battery control transistor, the first charger coupled between a first adapter port and the system output port, the battery control transistor coupled in series with a battery to the system output port, a second charger coupled between a second adapter port and the system output port, the first charger comprising two or more feedback loops, the second charger comprising two or more feedback loops; selecting, by a controller, the first charger from the first charger and the second charger to control the battery control transistor, the controller coupled to the first charger and the second charger; selecting, by the first charger, a first feedback loop from two or more feedback loops of the first charger in response to selecting the first charger to control the battery control transistor; selecting, by the second charger, a second feedback loop from two or more feedback loops of the second charger in response to selecting the first charger to control the battery control transistor; and configuring, by the controller, the first charger and the second charger to provide power to the system output port in accordance with the first feedback loop and the second feedback loop.

16. The method of claim 15, wherein the first feedback loop of the first charger and the second feedback loop of the second charger are selected to provide power to a device coupled to the system output port without information from the device regarding power requirements.

17. The method of claim 15, further comprising: determining, by the controller, the first charger to control the battery control transistor from the first charger and the second charger in response to a first available power of the first charger being greater than a second available power of the second charger.

18. The method of claim 15, further comprising: determining, by the controller, the first charger to control the battery control transistor from the first charger and the second charger in response to a first device being connected to the first adapter port prior to a second device being connected to the second adapter port.

19. The method of claim 15, wherein selecting, by the first charger, the first feedback loop comprises: selecting, by the first charger, a first system voltage loop of the first charger that regulates the voltage at the system output port in response to determining the first charger to control the battery control transistor.

20. The method of claim 19, wherein selecting, by the first charger, the first feedback loop comprises: selecting, by the first charger, a first charge current loop of the first charger that regulates the current through the battery control transistor in response to determining that charging of the battery is enabled.

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