Oscillating device, oscillator and electronic device

Abstract

The present disclosure relates to an oscillation device, an oscillator and an electronic device, the device comprising: an oscillation unit, for generating a first voltage signal and a second voltage signal, the first voltage signal and the second voltage signal having the same waveform and opposite phase; a comparison unit, electrically connected to the oscillation unit, for comparing the first voltage signal and the second voltage signal and outputting a comparison signal; a shaping unit, electrically connected to the comparison unit, for shaping the comparison signal to obtain an oscillation signal. The oscillation device of the embodiment of the present disclosure compares the first voltage signal and the second voltage signal generated by the oscillation unit through the comparison unit, and obtains an oscillation signal after the comparison result is shaped, without providing an additional reference voltage, effectively simplifying the circuit structure of the RC oscillator. Compared with the traditional RC oscillator, the output signal of the oscillation device of the embodiment of the present disclosure can achieve a duty cycle of 50%, without the need for additional control of the charge and discharge current.

Description

Technical Field

[0001] The present disclosure relates to the technical field of integrated circuits, and in particular to an oscillator device, an oscillator and an electronic device. Background Art

[0002] On-chip RC oscillators generally generate low-frequency clock signals for digital logic circuits within the chip. Figure 1 As shown in the figure, the traditional RC oscillator includes two comparators. The input voltage of the two comparators is the same, which is the voltage on the upper plate of the capacitor. The comparators compare the input voltage with their own threshold voltage. By controlling the threshold voltage of the two comparators, the two comparators are flipped in a certain order, thereby controlling the charging or discharging of the capacitor, generating an oscillation signal of a certain period, and finally shaping it through the RS trigger and outputting a square wave signal.

[0003] The traditional RC oscillator structure requires two high-performance comparator circuits and two stable reference voltages as the threshold voltage of the comparator. The peripheral supporting circuits required by the oscillator are relatively complex. At the same time, if the output signal is to achieve a 50% duty cycle, the charging current and the discharging current must be strictly controlled to ensure that the charging and discharging time of the capacitor are consistent. This increases the difficulty of circuit design and is not easy to achieve. Summary of the invention

[0004] In view of this, the present disclosure proposes an oscillation device, the device comprising:

[0005] An oscillating unit, used for generating a first voltage signal and a second voltage signal, wherein the first voltage signal and the second voltage signal have the same waveform and opposite phases;

[0006] a comparison unit, electrically connected to the oscillation unit, for comparing the first voltage signal and the second voltage signal and outputting a comparison signal;

[0007] The shaping unit is electrically connected to the comparison unit and is used for shaping the comparison signal to obtain an oscillation signal.

[0008] In a possible implementation, the oscillation unit includes a first resistor, a second resistor, a third resistor, a fourth resistor, a first transistor, a second transistor, a third transistor, a fourth transistor and a first capacitor, wherein:

[0009] The first end of the first resistor is electrically connected to the first end of the second resistor for receiving a power supply voltage.

[0010] The second end of the first resistor is electrically connected to the source of the first transistor, and the second end of the second resistor is electrically connected to the source of the second transistor.

[0011] The gate of the first transistor is electrically connected to the drain of the third transistor, the first end of the third resistor, the first input end of the comparison unit and the gate of the fourth transistor, and the drain of the first transistor is electrically connected to the source of the third transistor and the first end of the first capacitor.

[0012] The gate of the third transistor is electrically connected to the second input terminal of the comparison unit, the drain of the fourth transistor, the gate of the second transistor and the first terminal of the fourth resistor.

[0013] The drain of the second transistor is electrically connected to the second end of the first capacitor and the source of the fourth transistor.

[0014] The second end of the third resistor is electrically connected to the second end of the fourth resistor.

[0015] The gate of the third transistor is used to output the first voltage signal.

[0016] The gate of the fourth transistor is used to output the second voltage signal.

[0017] In a possible implementation manner, the third resistor and the fourth resistor are adjustable resistors, wherein:

[0018] The device further includes a control unit electrically connected to control ends of the third resistor and the fourth resistor, and configured to adjust the resistance values ​​of the third resistor and the fourth resistor to adjust the oscillation period of the oscillation signal.

[0019] In a possible implementation manner, adjusting the resistance values ​​of the third resistor and the fourth resistor to adjust the oscillation period of the oscillation signal includes:

[0020] Increasing the resistance values ​​of the third resistor and the fourth resistor to increase the oscillation period of the oscillation signal; or

[0021] The resistance values ​​of the third resistor and the fourth resistor are reduced to reduce the oscillation period of the oscillation signal.

[0022] In a possible implementation, the comparison unit includes a comparator, a first input terminal of the comparator is used to receive the first voltage signal, a second input terminal of the comparator is used to receive the second voltage signal, and an output terminal of the comparator is electrically connected to the shaping unit for outputting the comparison signal.

[0023] In a possible implementation manner, the shaping unit includes one or more inverters.

[0024] In a possible implementation, the device further includes:

[0025] The bias current generating module is electrically connected to the oscillation unit, and is used to generate a bias current with a zero temperature coefficient and output it to the oscillation unit, wherein the bias current serves as a tail current of the oscillation unit.

[0026] In a possible implementation, the bias current generating module includes a bandgap reference source, an error amplifier, a seventh transistor, an eighth transistor, a fifth resistor, and a sixth resistor, wherein:

[0027] The output end of the bandgap reference source is electrically connected to the negative input end of the error amplifier for outputting a reference voltage.

[0028] The positive input terminal of the error amplifier is electrically connected to the first end of the fifth resistor and the drain of the seventh transistor, the second end of the fifth resistor is electrically connected to the first end of the sixth resistor, the second end of the sixth resistor is grounded, the fifth resistor is a positive temperature coefficient resistor, and the sixth resistor is a negative temperature coefficient resistor.

[0029] The output terminal of the error amplifier is electrically connected to the gate of the seventh transistor and the gate of the eighth transistor.

[0030] The source of the seventh transistor is electrically connected to the source of the eighth transistor and is used to receive a power supply voltage.

[0031] The drain of the eighth transistor is used to output a first bias current.

[0032] In a possible implementation, the bias current generating module further includes a current mirror unit, and the current mirror unit is configured to input the first bias current and output the bias current.

[0033] In a possible implementation, the current mirror unit includes a fifth transistor and a sixth transistor.

[0034] The drain of the fifth transistor is electrically connected to the drain of the eighth transistor, the gate of the fifth transistor and the gate of the sixth transistor, and is used to input the first bias current.

[0035] The source of the fifth transistor is electrically connected to the source of the sixth transistor and is grounded.

[0036] The drain of the sixth transistor is electrically connected to the oscillation unit for outputting the bias current.

[0037] In a possible implementation manner, the duty cycle of the oscillation signal is 50%.

[0038] According to another aspect of the present disclosure, an oscillator is provided, wherein the oscillator comprises the oscillation device.

[0039] According to another aspect of the present disclosure, an electronic device is provided, comprising the oscillator.

[0040] The oscillation device of the embodiment of the present disclosure compares the first voltage signal and the second voltage signal generated by the oscillation unit through a comparison unit, and obtains an oscillation signal after the comparison result is shaped. There is no need to provide an additional reference voltage, which effectively simplifies the circuit structure of the RC oscillator. Compared with the traditional RC oscillator, the output signal of the oscillation device of the embodiment of the present disclosure can achieve a 50% duty cycle without the need for additional control of the charging and discharging current.

[0041] Further features and aspects of the present disclosure will become apparent from the following detailed description of exemplary embodiments with reference to the attached drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] The accompanying drawings, which are incorporated in and constitute a part of the specification, illustrate exemplary embodiments, features, and aspects of the disclosure and, together with the description, serve to explain the principles of the disclosure.

[0043] Figure 1 A schematic diagram of the structure of an RC oscillator in the related art is shown.

[0044] Figure 2 A block diagram of an oscillating device according to an embodiment of the present disclosure is shown.

[0045] Figure 3 A schematic diagram of an oscillating device according to an embodiment of the present disclosure is shown.

[0046] Figure 4 A schematic diagram of a bias current generating module according to an embodiment of the present disclosure is shown.

[0047] Figure 5 A simulation schematic diagram of an oscillation device according to an embodiment of the present disclosure is shown. DETAILED DESCRIPTION

[0048] Various exemplary embodiments, features and aspects of the present disclosure will be described in detail below with reference to the accompanying drawings. The same reference numerals in the accompanying drawings represent elements with the same or similar functions. Although various aspects of the embodiments are shown in the accompanying drawings, the drawings are not necessarily drawn to scale unless otherwise specified.

[0049] The word “exemplary” is used exclusively herein to mean “serving as an example, example, or illustration.” Any embodiment described herein as “exemplary” is not necessarily to be construed as preferred or advantageous over other embodiments.

[0050] In addition, in order to better illustrate the present disclosure, numerous specific details are given in the following specific embodiments. It should be understood by those skilled in the art that the present disclosure can also be implemented without certain specific details. In some examples, methods, means, components and circuits well known to those skilled in the art are not described in detail in order to highlight the main purpose of the present disclosure.

[0051] See also Figure 2 , Figure 2 A block diagram of an oscillating device according to an embodiment of the present disclosure is shown.

[0052] like Figure 2 As shown, the device comprises:

[0053] The oscillation unit 10 is used to generate a first voltage signal and a second voltage signal, wherein the first voltage signal and the second voltage signal have the same waveform and opposite phases;

[0054] A comparison unit 20, electrically connected to the oscillation unit 10, for comparing the first voltage signal and the second voltage signal and outputting a comparison signal;

[0055] The shaping unit 30 is electrically connected to the comparison unit, and is used for shaping the comparison signal to obtain an oscillation signal.

[0056] The oscillation device of the embodiment of the present disclosure compares the first voltage signal and the second voltage signal generated by the oscillation unit through a comparison unit, and obtains an oscillation signal after the comparison result is shaped. There is no need to provide an additional reference voltage, which effectively simplifies the circuit structure of the RC oscillator. Compared with the traditional RC oscillator, the output signal of the oscillation device of the embodiment of the present disclosure can achieve a 50% duty cycle without the need for additional control of the charging and discharging current.

[0057] According to the oscillating device of the embodiment of the present disclosure, an oscillator can be implemented and applied in electronic devices, and the electronic devices may include user equipment (UE), mobile station (MS), mobile terminal (MT), etc., which is a device that provides voice and / or data connectivity to users, for example, a handheld device with wireless connection function, a vehicle-mounted device, etc. At present, some examples of terminals are: mobile phones, tablet computers, laptops, PDAs, mobile Internet devices (MID), wearable devices, virtual reality (VR) devices, augmented reality (AR) devices, wireless terminals in industrial control, wireless terminals in self-driving, wireless terminals in remote medical surgery, wireless terminals in smart grids, wireless terminals in transportation safety, wireless terminals in smart cities, wireless terminals in smart homes, wireless terminals in Internet of Vehicles, etc.

[0058] See also Figure 3 , Figure 3 A schematic diagram of an oscillating device according to an embodiment of the present disclosure is shown.

[0059] In a possible implementation, Figure 3 As shown, the oscillation unit 10 may include a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a first transistor M1, a second transistor M2, a third transistor M3, a fourth transistor M4 and a first capacitor C1, wherein:

[0060] The first end of the first resistor R1 is electrically connected to the first end of the second resistor R2 for receiving a power supply voltage VDD.

[0061] The second end of the first resistor R1 is electrically connected to the source of the first transistor M1, and the second end of the second resistor R2 is electrically connected to the source of the second transistor M2.

[0062] The gate of the first transistor M1 is electrically connected to the drain of the third transistor M3, the first end of the third resistor R3, the first input end of the comparison unit 20 and the gate of the fourth transistor M4. The drain of the first transistor M1 is electrically connected to the source of the third transistor M3 and the first end (point C) of the first capacitor C1.

[0063] The gate of the third transistor M3 is electrically connected to the second input terminal of the comparison unit 20, the drain of the fourth transistor M4, the gate of the second transistor M2 and the first terminal of the fourth resistor R4.

[0064] The drain of the second transistor M2 is electrically connected to the second end of the first capacitor C0 (point D) and the source of the fourth transistor M4.

[0065] The second end of the third resistor R3 is electrically connected to the second end of the fourth resistor R4.

[0066] The gate of the third transistor M3 is used to output the first voltage signal.

[0067] The gate of the fourth transistor is used to output the second voltage signal.

[0068] In an example, the first transistor M1 , the second transistor M2 , the third transistor M3 , and the fourth transistor M4 may all be metal field effect transistors MOSFETs.

[0069] In the embodiment of the present disclosure, an oscillation unit can be realized by connecting the gates of the first transistor M1, the second transistor M2, the third transistor M3, and the fourth transistor M4 in pairs, wherein the gate terminals of the first transistor M1 and the second transistor M4 serve as the output OUT1 of the oscillation unit to output the second voltage signal, and the gate terminals of the second transistor M2 and the third transistor M3 serve as the output OUT0 of the oscillation unit to output the first voltage signal.

[0070] In a possible implementation, the third resistor R3 and the fourth resistor R4 may be adjustable resistors.

[0071] In one example, if Figure 4 As shown, an adjustable resistor can be realized by using multiple resistors and multiple switches. For example, for the third resistor R3, multiple resistors can be connected in parallel, and switches (such as S0, S1, etc.) can be set in each parallel path, and the resistance of the parallel resistors (that is, the size of the third resistor) can be adjusted by controlling the conduction state of each switch.

[0072] Of course, the above description is exemplary, and a plurality of resistors may be connected in series, and a switch may be connected in parallel to each resistor, and the resistance of the series resistors may be adjusted by controlling the conduction state of the switch.

[0073] In an example, the third resistor R3 and the fourth resistor R4 may also be configured as sliding resistors or other resistors whose resistance values ​​can be adjusted as needed.

[0074] In a possible implementation, Figure 3 As shown, the device may further include a control unit 50, which is electrically connected to the control ends of the third resistor and the fourth resistor, and is used to adjust the resistance values ​​of the third resistor and the fourth resistor to adjust the oscillation period of the oscillation signal.

[0075] In one example, when the third resistor and the fourth resistor are implemented by multiple resistors and multiple switches, the control ends of the third resistor and the fourth resistor can be the control ends of each switch. The control unit 50 can determine the number of switches that need to be turned on according to the target resistance values ​​of the third resistor and the fourth resistor, and control the conduction of the switches of the number of switches to achieve the purpose of adjusting the resistance values ​​of the third resistor and the fourth resistor.

[0076] In one example, when the third resistor and the fourth resistor are implemented by adjustable resistors, the control unit can determine an adjustment instruction according to the target resistance values ​​of the third resistor and the fourth resistor, and control the resistance of the adjustable resistor to reach the target resistance value according to the adjustment instruction.

[0077] In a possible implementation manner, adjusting the resistance values ​​of the third resistor and the fourth resistor to adjust the oscillation period of the oscillation signal may include:

[0078] The resistance values ​​of the third resistor and the fourth resistor are increased to increase the oscillation period of the oscillation signal.

[0079] In one example, the embodiment of the present disclosure can reduce the discharge current of the third transistor and the fourth transistor by increasing the size of the third resistor and the fourth resistor. In this case, the voltage flip time of the first voltage signal and the second voltage signal is increased, the oscillation period of the oscillation signal can be increased, and the frequency of the oscillation signal can be reduced.

[0080] In a possible implementation manner, adjusting the resistance values ​​of the third resistor and the fourth resistor to adjust the oscillation period of the oscillation signal may include:

[0081] The resistance values ​​of the third resistor and the fourth resistor are reduced to reduce the oscillation period of the oscillation signal.

[0082] In one example, the embodiment of the present disclosure can increase the discharge current of the third transistor and the fourth transistor by reducing the size of the third resistor and the fourth resistor. In this case, the voltage flip time of the first voltage signal and the second voltage signal is reduced, the oscillation period of the oscillation signal can be reduced, and the frequency of the oscillation signal can be increased.

[0083] The embodiment of the present disclosure can adjust the discharge current of the third transistor M3 and the fourth transistor M4 by adjusting the resistance of the third resistor and the fourth resistor, thereby adjusting the oscillation period and frequency of the oscillation signal to improve the flexibility and environmental adaptability of the oscillation device.

[0084] In a possible implementation, Figure 3 As shown, the comparison unit 20 may include a comparator COMP, a first input terminal (e.g., a negative input terminal) of the comparator COMP is used to receive the first voltage signal, a second input terminal (e.g., a positive input terminal) of the comparator COMP is used to receive the second voltage signal, and an output terminal of the comparator COMP is electrically connected to the shaping unit 30 for outputting the comparison signal.

[0085] The embodiment of the present disclosure can output the oscillation signal through a single comparator. Compared with the dual comparator implementation method of the related art, the oscillator structure can be simplified and the cost can be saved.

[0086] In a possible implementation, the shaping unit 30 may include one or more inverters.

[0087] In one example, if Figure 3 As shown, the shaping unit 30 may include an inverter INV1 and an inverter INV2, wherein the input end of the inverter INV1 is electrically connected to the output end of the comparator COMP. The output end of the inverter INV1 is connected to the input end of the inverter INV2, and the output end of the inverter INV2 serves as the final output end of the RC oscillator to output the generated periodic oscillation signal, such as a square wave signal.

[0088] In the present disclosure, the comparison signal can be shaped by the shaping unit.

[0089] In a possible implementation, the tail current of the oscillation unit may be generated by a bias current with a zero temperature coefficient, which is exemplarily described below.

[0090] In a possible implementation, Figure 3 As shown, the device may also include:

[0091] The bias current generating module 40 is electrically connected to the oscillation unit 10 , and is used to generate a bias current with a zero temperature coefficient and output it to the oscillation unit 10 , wherein the bias current serves as a tail current of the oscillation unit.

[0092] See also Figure 4 , Figure 4 A schematic diagram of a bias current generating module according to an embodiment of the present disclosure is shown.

[0093] In a possible implementation, Figure 4 As shown, the bias current generating module 40 may include a bandgap reference source Bp, an error amplifier OP, a seventh transistor M7, an eighth transistor M8, a fifth resistor R5, and a sixth resistor R6 to form a zero temperature coefficient current source, wherein:

[0094] The output end of the bandgap reference source Bp is electrically connected to the negative input end of the error amplifier OP, and is used to output a reference voltage VREF.

[0095] The positive input terminal of the error amplifier OP is electrically connected to the first terminal of the fifth resistor R5 and the drain of the seventh transistor M7. The second terminal of the fifth resistor R5 is electrically connected to the first terminal of the sixth resistor R6. The second terminal of the sixth resistor R6 is grounded. The fifth resistor R5 is a positive temperature coefficient resistor (Temperature Coefficient, TC>0), and the sixth resistor R6 is a negative temperature coefficient resistor (Temperature Coefficient, TC<0).

[0096] The output terminal of the error amplifier OP is electrically connected to the gate of the seventh transistor M7 and the gate of the eighth transistor M8.

[0097] The source of the seventh transistor M7 is electrically connected to the source of the eighth transistor M8 and is used to receive the power supply voltage VDD.

[0098] The drain of the eighth transistor M8 is used to output a first bias current Ibias.

[0099] In an example, the seventh transistor M7 and the eighth transistor M8 may be MOSFETs (eg, PMOS field effect transistors).

[0100] The embodiments of the present disclosure do not limit the implementation method of the bandgap reference, and those skilled in the art can implement it using relevant technologies.

[0101] In one example, the bandgap reference source can generate a stable reference voltage VREF, which is controlled by the error amplifier OP to generate a first bias current Ibias with a zero temperature coefficient in the path of the fifth resistor R5 and the sixth resistor R6:

[0102] Here, R5 represents the resistance of the fifth resistor, and R6 represents the resistance of the sixth resistor.

[0103] Among them, the reference voltage VREF is little affected by temperature and has an approximate zero temperature coefficient. The temperature coefficient of the first bias current Ibias mainly depends on the fifth resistor R5 and the sixth resistor R6. By superimposing two positive and negative temperature coefficient resistors, an approximate zero temperature coefficient is achieved, and then a zero temperature coefficient current is obtained. The temperature coefficient of Ibias is shown in the following formula:

[0104]

[0105] in, Achieve zero temperature coefficient of Ibias.

[0106] In a possible implementation, Figure 3 As shown, the bias current generating module may further include a current mirror unit, and the current mirror unit is used to input the first bias current Ibias and output the bias current Ib.

[0107] In a possible implementation, Figure 3 As shown, the current mirror unit may include a fifth transistor M5 and a sixth transistor M6.

[0108] The drain of the fifth transistor M5 is electrically connected to the drain of the eighth transistor M8, the gate of the fifth transistor M5 and the gate of the sixth transistor M6, and is used to input the first bias current.

[0109] The source of the fifth transistor M5 is electrically connected to the source of the sixth transistor M6 and is grounded.

[0110] The drain of the sixth transistor M6 is electrically connected to the oscillation unit 10 for outputting the bias current Ib.

[0111] In the embodiment of the present disclosure, the first bias current is processed by a current mirror unit to obtain a bias current, which can improve the stability of the bias current.

[0112] The working principle of the oscillation device is introduced below.

[0113] During the operation of the oscillator, the third transistor M3 and the fourth transistor M4 form a closed voltage positive feedback loop. The slight noise on the output end OUT0 or the output end OUT1 of the oscillator unit is amplified by the third transistor M3 and the fourth transistor M4, and then superimposed on the output end OUT0 or the output end OUT1 with an opposite phase, and the oscillator starts to oscillate. The output end OUT0 and the output end OUT1 control the second transistor M2, the third transistor M3 and the first transistor M1, the fourth transistor M4, two sets of field effect transistors, to alternately charge and discharge the first capacitor C0.

[0114] Please also read Figure 5 , Figure 5 A simulation schematic diagram of an oscillation device according to an embodiment of the present disclosure is shown.

[0115] like Figure 5 As shown, when the oscillator is powered on, the oscillator starts to oscillate, and the difference between the output terminal OUT0 and the output terminal OUT1 is amplified by the closed voltage positive feedback loop formed by the third transistor M3 and the fourth transistor M4, and then gradually increases.

[0116] As the second voltage signal outputted by the output terminal OUT1 decreases, the gate-source voltage of the first transistor M1 and the fourth transistor M4 increases, and the driving ability is enhanced; as the first voltage signal outputted by the output terminal OUT0 increases, the gate-source voltage of the second transistor M2 and the third transistor M3 decreases, and the driving ability is weakened, so the left end C point of the capacitor C0 is charged, the gate-source voltage of the third transistor M3 increases, the right end D point is discharged, and the gate-source voltage of the fourth transistor M4 is reduced. This process continues until the driving ability of the third transistor M3 is stronger than the first transistor M1, and the C point begins to discharge through the third transistor M3. At the same time, as the discharge current of the third transistor M3 increases, the second voltage signal outputted by the output terminal OUT1 is pulled up, and then amplified by the positive feedback of the third transistor M3 and the fourth transistor M4, the output signal (first voltage signal) of the output terminal OUT0 is pulled down, so far, the output signals of the output terminal OUT0 and the output terminal OUT1 are flipped, and a periodic oscillation signal is generated. The oscillation device of the disclosed embodiment is completely symmetrical on the left and right, and the waveform shapes of the output terminal OUT0 and the output terminal OUT1 signals are completely consistent, and the phase difference is approximately 180 degrees. When the rising and falling delays of the comparator are the same, a 50% duty cycle of the output signal is guaranteed without strictly controlling the charging and discharging current of the capacitor.

[0117] The embodiments of the present disclosure have been described above, and the above description is exemplary, not exhaustive, and is not limited to the disclosed embodiments. Many modifications and changes will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the described embodiments. The selection of terms used herein is intended to best explain the principles of the embodiments, practical applications, or improvements to the technology in the market, or to enable other persons of ordinary skill in the art to understand the embodiments disclosed herein.

Claims

1. An oscillating device, characterized in that: The device comprises: An oscillating unit, used for generating a first voltage signal and a second voltage signal, wherein the first voltage signal and the second voltage signal have the same waveform and opposite phases; a comparison unit, electrically connected to the oscillation unit, for comparing the first voltage signal and the second voltage signal and outputting a comparison signal; a shaping unit, electrically connected to the comparison unit, for shaping the comparison signal to obtain an oscillation signal, The oscillation unit includes a first resistor, a second resistor, a third resistor, a fourth resistor, a first transistor, a second transistor, a third transistor, a fourth transistor and a first capacitor, wherein: The first end of the first resistor is electrically connected to the first end of the second resistor for receiving a power supply voltage. The second end of the first resistor is electrically connected to the source of the first transistor, and the second end of the second resistor is electrically connected to the source of the second transistor. The gate of the first transistor is electrically connected to the drain of the third transistor, the first end of the third resistor, the first input end of the comparison unit and the gate of the fourth transistor, and the drain of the first transistor is electrically connected to the source of the third transistor and the first end of the first capacitor. The gate of the third transistor is electrically connected to the second input terminal of the comparison unit, the drain of the fourth transistor, the gate of the second transistor and the first terminal of the fourth resistor. The drain of the second transistor is electrically connected to the second end of the first capacitor and the source of the fourth transistor. The second end of the third resistor is electrically connected to the second end of the fourth resistor. The gate of the third transistor is used to output the first voltage signal. The gate of the fourth transistor is used to output the second voltage signal, The third resistor and the fourth resistor are adjustable resistors, wherein the device also includes a control unit, electrically connected to the control ends of the third resistor and the fourth resistor, for adjusting the resistance values ​​of the third resistor and the fourth resistor to adjust the oscillation period of the oscillation signal, including: increasing the resistance values ​​of the third resistor and the fourth resistor to increase the oscillation period of the oscillation signal; or reducing the resistance values ​​of the third resistor and the fourth resistor to reduce the oscillation period of the oscillation signal.

2. The device according to claim 1, characterized in that The comparison unit includes a comparator, a first input end of the comparator is used to receive the first voltage signal, a second input end of the comparator is used to receive the second voltage signal, and an output end of the comparator is electrically connected to the shaping unit for outputting the comparison signal.

3. The device according to claim 1, characterized in that The shaping unit includes one or more inverters.

4. The device according to claim 1, characterized in that The device also includes: The bias current generating module is electrically connected to the oscillation unit, and is used to generate a bias current with a zero temperature coefficient and output it to the oscillation unit, wherein the bias current serves as a tail current of the oscillation unit.

5. The device according to claim 4, characterized in that The bias current generating module includes a bandgap reference source, an error amplifier, a seventh transistor, an eighth transistor, a fifth resistor, and a sixth resistor, wherein: The output end of the bandgap reference source is electrically connected to the negative input end of the error amplifier for outputting a reference voltage. The positive input terminal of the error amplifier is electrically connected to the first end of the fifth resistor and the drain of the seventh transistor, the second end of the fifth resistor is electrically connected to the first end of the sixth resistor, the second end of the sixth resistor is grounded, the fifth resistor is a positive temperature coefficient resistor, and the sixth resistor is a negative temperature coefficient resistor. The output terminal of the error amplifier is electrically connected to the gate of the seventh transistor and the gate of the eighth transistor. The source of the seventh transistor is electrically connected to the source of the eighth transistor and is used to receive a power supply voltage. The drain of the eighth transistor is used to output a first bias current.

6. The device according to claim 5, characterized in that The bias current generating module further includes a current mirror unit, and the current mirror unit is used for inputting the first bias current and outputting the bias current.

7. The device according to claim 6, characterized in that The current mirror unit includes a fifth transistor and a sixth transistor. The drain of the fifth transistor is electrically connected to the drain of the eighth transistor, the gate of the fifth transistor and the gate of the sixth transistor, and is used to input the first bias current. The source of the fifth transistor is electrically connected to the source of the sixth transistor and is grounded. The drain of the sixth transistor is electrically connected to the oscillation unit, and is used to output the bias current.

8. The device according to claim 1, characterized in that The duty cycle of the oscillation signal is 50%.

9. An oscillator, characterized in that: The oscillator comprises an oscillating device as claimed in any one of claims 1-8.

10. An electronic device, characterized in that: The electronic device comprises the oscillator according to claim 9.

Images