A single-phase inverter with split symmetrical decoupling on the AC side

Abstract

The present invention relates to an AC side split symmetrical decoupling single-phase inverter. The AC side split symmetrical decoupling single-phase inverter comprises an H-bridge inverter, wherein the upper half-bridge structure comprises an upper half-bridge first unit and an upper half-bridge second unit connected in parallel, wherein the upper half-bridge first unit comprises an insulated gate bipolar transistor G1, a diode D1 and a capacitor C3 connected in parallel, and the upper half-bridge second unit comprises an insulated gate bipolar transistor G3, a diode D3 and a capacitor C4 connected in parallel; and the lower half-bridge structure comprises a lower half-bridge first unit and a lower half-bridge second unit connected in parallel, wherein the lower half-bridge first unit comprises an insulated gate bipolar transistor G2, a diode D2 and a capacitor C1 connected in parallel, and the lower half-bridge second unit comprises an insulated gate bipolar transistor G4, a diode D4 and a capacitor C2 connected in parallel, and an inductor L1 is provided between the upper half-bridge first unit and the lower half-bridge first unit, and an inductor L2 is provided between the upper half-bridge second unit and the lower half-bridge second unit. The present invention can reduce costs and increase losses, and achieve a complete decoupling effect.

Description

Technical Field

[0001] The invention relates to the field of single-phase inverter structure design, in particular to an AC side split symmetrical decoupling single-phase inverter. Background Art

[0002] Single-phase inverters are widely used in residential and industrial power supplies. However, the process of power conversion between the DC side and the AC side will introduce double frequency pulsation on the DC side, affecting the efficiency of the DC side power supply. In this regard, many power decoupling technologies have been proposed. A simple method to buffer the double frequency power is to connect a large electrolytic capacitor in parallel on the DC side. However, the life of the large electrolytic capacitor is short, which will affect the service life of the single-phase inverter. In order to buffer the double frequency power in the system, many scholars have proposed active decoupling methods. It is proposed to connect a power decoupling circuit in parallel on the DC side. The concept of virtual capacitor is proposed in the document "An Active Low-Frequency Ripple Control Method Based on the Virtual Capacitor Concept for BIPV Systems". The current integral is introduced in the control strategy instead of unit feedback to quickly compensate for the secondary ripple in the system. It is also proposed to decouple on the AC side. In the document "A New Micro-Inverter Power Decoupling Circuit Based on Buck / Boost Circuit", a parallel power decoupling circuit on the AC side is proposed, and the operating state of the four modes of the decoupling topology is constructed to compensate for the double frequency power. There are also solutions that use algorithms and intermediate bus capacitors to decouple the DC link of the two-stage inverter.

[0003] The above solutions can achieve the effect of suppressing secondary ripples, but require additional switching devices to construct a power decoupling circuit, which increases the cost and loss of the entire system and fails to achieve a complete decoupling effect. Summary of the invention

[0004] The object of the present invention is to provide an AC side split symmetrical decoupling single-phase inverter, which can reduce costs and increase losses and achieve a complete decoupling effect.

[0005] To achieve the above object, the present invention provides the following solutions:

[0006] A single-phase inverter with split symmetrical decoupling on the AC side comprises an H-bridge inverter, the H-bridge inverter comprises a symmetrical upper half-bridge structure and a lower half-bridge structure, the upper half-bridge structure comprises a first upper half-bridge unit and a second upper half-bridge unit connected in parallel, the first upper half-bridge unit comprises an insulated gate bipolar transistor G1, a diode D1 and a capacitor C3 connected in parallel, the second upper half-bridge unit comprises an insulated gate bipolar transistor G3, a diode D3 and a capacitor C4 connected in parallel; the lower half-bridge structure comprises a first lower half-bridge unit and a second lower half-bridge unit connected in parallel, the first lower half-bridge unit comprises an insulated gate bipolar transistor G2, a diode D2 and a capacitor C1 connected in parallel, the second lower half-bridge unit comprises an insulated gate bipolar transistor G4, a diode D4 and a capacitor C2 connected in parallel, an inductor L1 is arranged between the first upper half-bridge unit and the first lower half-bridge unit, and an inductor L2 is arranged between the second upper half-bridge unit and the second lower half-bridge unit.

[0007] Optionally, the diode D1 is connected in parallel between the collector and the emitter of the insulated gate bipolar transistor G1, the diode D2 is connected in parallel between the collector and the emitter of the insulated gate bipolar transistor G2, the diode D3 is connected in parallel between the collector and the emitter of the insulated gate bipolar transistor G3, and the diode D4 is connected in parallel between the collector and the emitter of the insulated gate bipolar transistor G4.

[0008] Optionally, the collector of the insulated gate bipolar transistor G1, the negative electrode of the diode D1 and the positive electrode of the capacitor C3 are connected to the positive terminal of the power supply, and the collector of the insulated gate bipolar transistor G3, the negative electrode of the diode D3 and the positive electrode of the capacitor C4 are connected to the positive terminal of the power supply; the emitter of the insulated gate bipolar transistor G2, the positive electrode of the diode D2 and the negative electrode of the capacitor C1 are connected to the negative terminal of the power supply, and the emitter of the insulated gate bipolar transistor G4, the positive electrode of the diode D4 and the negative electrode of the capacitor C2 are connected to the negative terminal of the power supply.

[0009] Optionally, the inductor L1 and the inductor L2 are AC side filter inductors.

[0010] Optionally, the capacitor C1, the capacitor C2, the capacitor C3 and the capacitor C4 are original symmetrical split filter capacitors on the AC side, and the capacitor C1, the capacitor C2, the capacitor C3 and the capacitor C4 are used to buffer the double frequency power of the system.

[0011] Optionally, a resistor is further included, and the resistor is located between the first unit of the upper half bridge, the second unit of the upper half bridge, the first unit of the lower half bridge, and the second unit of the lower half bridge.

[0012] According to the specific embodiments provided by the present invention, the present invention discloses the following technical effects:

[0013] The present invention only utilizes the original filter split capacitor on the AC side, without the need for additional switching devices, to achieve the effect of compensating the double frequency power, thereby achieving the purpose of eliminating electrolytic capacitors and achieving complete decoupling. The present invention can omit the original support capacitor on the DC side, and the decoupling process can be completed only on the AC side, shortening the double frequency power buffer loop, and the entire topology structure is simple and the algorithm control is simple. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0015] Figure 1 The schematic diagram of the AC side split symmetrical decoupling single-phase inverter circuit;

[0016] Figure 2 It is a schematic diagram of the control system of the AC side split symmetrical decoupling single-phase inverter;

[0017] Figure 3 This is a schematic diagram of the voltage waveforms of capacitors C1 and C2 before decoupling;

[0018] Figure 4 This is a schematic diagram of the voltage waveforms of capacitors C3 and C4 before decoupling;

[0019] Figure 5 This is a schematic diagram of the DC side current waveform before decoupling;

[0020] Figure 6 This is a schematic diagram of the voltage waveforms of capacitors C1 and C2 after decoupling;

[0021] Figure 7 This is a schematic diagram of the voltage waveforms of capacitors C3 and C4 after decoupling;

[0022] Figure 8 Schematic diagram of the DC side current waveform after decoupling. DETAILED DESCRIPTION

[0023] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0024] The object of the present invention is to provide an AC side split symmetrical decoupling single-phase inverter, which can reduce costs and increase losses and achieve a complete decoupling effect.

[0025] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, the present invention is further described in detail below with reference to the accompanying drawings and specific embodiments.

[0026] Figure 1 The schematic diagram of the AC side split symmetrical decoupling single-phase inverter circuit is shown in Figure 2. Figure 1 As shown, the AC side split symmetrical decoupling single-phase inverter includes an H-bridge inverter, which includes a symmetrical upper half-bridge structure and a lower half-bridge structure, wherein the upper half-bridge structure includes an upper half-bridge first unit and an upper half-bridge second unit connected in parallel, wherein the upper half-bridge first unit includes an insulated gate bipolar transistor G1, a diode D1 and a capacitor C3 connected in parallel, and the upper half-bridge second unit includes an insulated gate bipolar transistor G3, a diode D3 and a capacitor C4 connected in parallel; the lower half-bridge structure includes a lower half-bridge first unit and a lower half-bridge second unit connected in parallel, wherein the lower half-bridge first unit includes an insulated gate bipolar transistor G2, a diode D2 and a capacitor C1 connected in parallel, and the lower half-bridge second unit includes an insulated gate bipolar transistor G4, a diode D4 and a capacitor C2 connected in parallel, an inductor L1 is provided between the upper half-bridge first unit and the lower half-bridge first unit, and an inductor L2 is provided between the upper half-bridge second unit and the lower half-bridge second unit.

[0027] The diode D1 is connected in parallel between the collector and the emitter of the insulated gate bipolar transistor G1, the diode D2 is connected in parallel between the collector and the emitter of the insulated gate bipolar transistor G2, the diode D3 is connected in parallel between the collector and the emitter of the insulated gate bipolar transistor G3, and the diode D4 is connected in parallel between the collector and the emitter of the insulated gate bipolar transistor G4.

[0028] The collector of the insulated gate bipolar transistor G1, the negative electrode of the diode D1 and the positive electrode of the capacitor C3 are connected to the positive terminal of the power supply, and the collector of the insulated gate bipolar transistor G3, the negative electrode of the diode D3 and the positive electrode of the capacitor C4 are connected to the positive terminal of the power supply; the emitter of the insulated gate bipolar transistor G2, the positive electrode of the diode D2 and the negative electrode of the capacitor C1 are connected to the negative terminal of the power supply, and the emitter of the insulated gate bipolar transistor G4, the positive electrode of the diode D4 and the negative electrode of the capacitor C2 are connected to the negative terminal of the power supply.

[0029] The inductor L1 and the inductor L2 are AC side filter inductors. The capacitors C1, C2, C3 and C4 are the original symmetrical split filter capacitors on the AC side, and the capacitors C1, C2, C3 and C4 are used to buffer the system double frequency power. By controlling the baseband common mode component in the decoupling capacitor, the system double frequency power can be accurately compensated.

[0030] The AC side split symmetrical decoupling single-phase inverter further includes a resistor, which is located between the first unit of the upper half bridge, the second unit of the upper half bridge, the first unit of the lower half bridge, and the second unit of the lower half bridge.

[0031] like Figure 1 The main circuit shown is a single-phase H-bridge inverter. Assuming the output voltage and output current are: The output power on the AC side is:

[0032] v0=V0sinωt (1)

[0033] i0=I0sinωt (2)

[0034] The output power on the AC side is:

[0035]

[0036] From formula (3), it can be seen that there is double frequency power on the AC output side. If decoupling control is not performed, secondary ripple will appear on the DC side. Now, a common mode voltage is injected into the two sets of symmetrical split filter capacitors on the AC side to compensate for the double frequency power of the system, achieving the purpose of eliminating electrolytic capacitors while ensuring that the output voltage remains unchanged.

[0037] When no common-mode voltage is injected, the voltages of capacitors C1, C2, C3, and C4 are:

[0038]

[0039]

[0040]

[0041]

[0042] In formulas (4)-(7), V dc is the DC side input voltage.

[0043] When the common-mode voltage V con After that, the capacitor voltage is:

[0044]

[0045]

[0046]

[0047]

[0048] The common mode voltage in equations (8)-(11) is:

[0049] V con =Asin(ωt+β) (12)

[0050] According to equations (8)-(11), the sum of the reactive power on the two-component decoupling capacitors is:

[0051]

[0052] In formula (13), P c1 is the reactive power on capacitor C1, P c2 is the reactive power on capacitor C2, P c3 is the reactive power on capacitor C3, P c4 is the reactive power on capacitor C4.

[0053] Combined with the double frequency power on the AC output side, as shown in formula (3), in order to make the double frequency instantaneous power of the entire system 0, the reactive power on the decoupling capacitor is required to compensate for the reactive power output on the AC side. The satisfied relationship is as follows:

[0054]

[0055] Complete decoupling can be achieved by changing the initial phase and amplitude of the common-mode voltage, where:

[0056]

[0057]

[0058] Since the DC power supply side and the capacitor C1 voltage and the capacitor C3 voltage satisfy the KVL relationship, when the inductor voltage is ignored, the capacitor voltage and the DC input voltage satisfy the following relationship:

[0059] V dc =V c1 +V c3 =V c2 +V c4 (17)

[0060] Therefore, the capacitor group on the left only needs to control the voltage of the decoupling capacitor C1 or C3. Similarly, it only needs to control the voltage of the decoupling capacitor C2 or C4. Here, the voltages of capacitors C1 and C2 are selected as the control objects. The classic voltage-current dual-loop control is used. The outer loop is the decoupling capacitor voltage, and the inner loop is the decoupling inductor current. The entire control block diagram is as follows: Figure 2 Place.

[0061] Figure 2 Medium c1ref The voltage form can be obtained according to equations (8), (15)-(16), by subtracting the voltage of the sampling decoupling capacitor C1 from v c1ref The error signal is obtained by subtracting the inductor current reference value from the inductor current sampling value, and the duty cycle signal is obtained by passing the error signal through the current controller Gil. Figure 2 In d1 corresponds to Figure 1 The duty cycle signal of the switch tube G1, d2 corresponds to the duty cycle signal of G2.

[0062] Similarly, the duty cycle signals d3 and d4 generated in the lower part of the control block diagram correspond to Figure 1 G3 and G4 in v c2ref It can be obtained by equations (9), (15)-(16), by combining the voltage of sampling capacitor C2 with v c2ref The error signal is obtained by subtracting, and the reference value of the inductor L2 current is obtained through the voltage controller Gv2(S). The current value of the inductor L2 is then sampled and compared with i L2ref The error signal is obtained by making a difference, and the error signal is obtained by passing it through the current controller Gi2(S) Figure 1 The right bridge arm modulates the wave and compares it with the triangular carrier to obtain the duty cycle signal.

[0063] The simulation verification was carried out on the simulation software MATLAB. The DC side voltage input was 450V, the decoupling capacitor parameter was set to 60uf, the decoupling inductor was set to 1mH, the load was 200 ohms, and the rated power was 115W.

[0064] as follows Figure 3 and Figure 4 The capacitor voltage and output voltage waveform before decoupling are shown in Figure 1. The decoupling capacitor voltage has a 225V DC bias, the voltage ripple is 107.5V, the maximum capacitor voltage is 332.5V, and the minimum capacitor voltage is 117.5V, as shown in formulas (1)-(4). The phase difference between the decoupling capacitor voltages C1, C2, C3 and C4 is 180 degrees. The output voltage is a sine wave with an amplitude of 215V. Figure 5 This is the DC side current waveform before decoupling. It can be seen that the waveform frequency is 100Hz, the maximum DC side current is 1.16A, and the minimum is -0.55A.

[0065] Figure 6 and Figure 7 The capacitor voltage and output voltage waveforms after decoupling show that the output voltage is consistent before and after decoupling, and the decoupling process does not change the output voltage. Due to the injection of common-mode voltage, the amplitude of the decoupling capacitor voltage increases compared to before decoupling. At this time, the maximum voltage of the decoupling capacitor C1 is 388V, and the minimum is 61V. The maximum voltage of the decoupling capacitor C2 is 369V, and the minimum is 80V. The maximum voltage of the decoupling capacitor C3 is 388V, and the minimum is 62V. The maximum voltage of the decoupling capacitor C4 is 370V, and the minimum is 81V. After decoupling, the secondary ripple of the DC side current is completely decoupled, and only 0.35A of DC bias remains. Figure 8 Schematic diagram of the DC side current waveform after decoupling.

[0066] The various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other.

[0067] This article uses specific examples to illustrate the principles and implementation methods of the present invention. The above examples are only used to help understand the device and its core ideas of the present invention. At the same time, for those skilled in the art, according to the ideas of the present invention, there will be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as limiting the present invention.

Claims

1. An AC side split symmetrical decoupling single-phase inverter, characterized in that: The AC side split symmetrical decoupling single-phase inverter includes an H-bridge inverter, which includes a symmetrical upper half-bridge structure and a lower half-bridge structure. The upper half-bridge structure includes an upper half-bridge first unit and an upper half-bridge second unit connected in parallel. The upper half-bridge first unit includes an insulated gate bipolar transistor G1, a diode D1 and a capacitor C3 connected in parallel, and the upper half-bridge second unit includes an insulated gate bipolar transistor G3, a diode D3 and a capacitor C4 connected in parallel; the lower half-bridge structure includes a lower half-bridge first unit and a lower half-bridge second unit connected in parallel. The lower half-bridge first unit includes an insulated gate bipolar transistor G2, a diode D2 and a capacitor C1 connected in parallel, and the lower half-bridge second unit includes an insulated gate bipolar transistor G4, a diode D4 and a capacitor C2 connected in parallel. An inductor L1 is provided between the upper half-bridge first unit and the lower half-bridge first unit, and an inductor L2 is provided between the upper half-bridge second unit and the lower half-bridge second unit.

2. The AC side split symmetrical decoupling single-phase inverter according to claim 1, characterized in that: The diode D1 is connected in parallel between the collector and the emitter of the insulated gate bipolar transistor G1, the diode D2 is connected in parallel between the collector and the emitter of the insulated gate bipolar transistor G2, the diode D3 is connected in parallel between the collector and the emitter of the insulated gate bipolar transistor G3, and the diode D4 is connected in parallel between the collector and the emitter of the insulated gate bipolar transistor G4.

3. The AC side split symmetrical decoupling single-phase inverter according to claim 1, characterized in that: The collector of the insulated gate bipolar transistor G1, the negative electrode of the diode D1 and the positive electrode of the capacitor C3 are connected to the positive terminal of the power supply, and the collector of the insulated gate bipolar transistor G3, the negative electrode of the diode D3 and the positive electrode of the capacitor C4 are connected to the positive terminal of the power supply; the emitter of the insulated gate bipolar transistor G2, the positive electrode of the diode D2 and the negative electrode of the capacitor C1 are connected to the negative terminal of the power supply, and the emitter of the insulated gate bipolar transistor G4, the positive electrode of the diode D4 and the negative electrode of the capacitor C2 are connected to the negative terminal of the power supply.

4. The AC side split symmetrical decoupling single-phase inverter according to claim 1, characterized in that: The inductor L1 and the inductor L2 are AC side filter inductors.

5. The AC side split symmetrical decoupling single-phase inverter according to claim 1, characterized in that: The capacitor C1, the capacitor C2, the capacitor C3 and the capacitor C4 are original symmetrical split filter capacitors on the AC side, and the capacitor C1, the capacitor C2, the capacitor C3 and the capacitor C4 are used to buffer the double frequency power of the system.

6. The AC side split symmetrical decoupling single-phase inverter according to claim 1, characterized in that: A resistor is also included, and the resistor is located between the first unit of the upper half bridge, the second unit of the upper half bridge, the first unit of the lower half bridge, and the second unit of the lower half bridge.

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