Method, apparatus, device and computer-readable storage medium executed by a computing device

Abstract

According to an embodiment of the present disclosure, a method, apparatus, device and storage medium for configuring vector operations performed by a computing device are provided. The method includes obtaining information indicating at least one configurable vector operation parameter, the information of at least one configurable vector operation parameter indicating the type and value of the configurable vector operation parameter; and configuring multiple vector operation units based on the type and value of the configurable vector operation parameter, so that each of the multiple vector operation units can perform a target vector operation consisting of two or more basic vector operations defined according to the type and value of the configurable vector operation parameter. The method can enable the calculation to support complex vector operations while realizing the operation of multiple vector operation formats on a single hardware, thereby realizing the flexible design of vector operation formats.

Description

Technical Field

[0001] Embodiments of the present disclosure generally relate to the field of computers, and more particularly, to methods, apparatuses, devices, and computer-readable storage media for configuring vector operations performed by a computing device and vector operations performed by the computing device. Background Art

[0002] With the development of artificial intelligence (AI), deep learning has become a hot research topic. Deep learning utilizes a large number of vector operations. While some hardware specifically designed for deep learning has been developed, such as graphics processing units (GPUs) and application-specific integrated circuits (ASICs), these hardware supports vector operations. However, the performance and flexibility of these operations remain to be further improved. Therefore, improving the performance and flexibility of vector operations to meet the requirements of deep learning is a key issue that needs to be addressed. Summary of the Invention

[0003] According to an example embodiment of the present disclosure, a scheme for configuring a vector operation performed by a computing device and a scheme for performing a vector operation performed by the computing device are provided.

[0004] In a first aspect of the present disclosure, a method for configuring vector operations performed by a computing device is provided. The method includes: obtaining information indicating at least one configurable vector operation parameter, the information indicating the type and value of the configurable vector operation parameter; and configuring multiple vector operation units based on the type and value of the configurable vector operation parameter so that each of the multiple vector operation units can perform a target vector operation defined by the type and value of the configurable vector operation parameter and consisting of two or more basic vector operations.

[0005] In a second aspect of the present disclosure, a method for performing vector operations by a computing device is provided. The method includes: obtaining vector data to be operated on; and performing vector operations on the obtained vector data by multiple vector operation units of the computing device to output vector operation results, wherein the vector operations are configured according to the method of the first aspect of the present disclosure.

[0006] In a third aspect of the present disclosure, a computing device is provided. The computing device includes: a controller configured to obtain information indicating at least one configurable vector operation parameter, wherein the information indicating the at least one configurable vector operation parameter indicates a type and a value of the configurable vector operation parameter; and a computing unit configured to configure a plurality of vector operation units based on the type and the value of the configurable vector operation parameter, so that each of the plurality of vector operation units can perform a target vector operation defined by the type and the value of the configurable vector operation parameter and consisting of two or more basic vector operations.

[0007] In a fourth aspect of the present disclosure, a computing device is provided. The computing device includes a computing unit including a plurality of vector operation units. The computing unit is configured to: obtain vector data to be operated on; and operate the plurality of vector operation units to perform a vector operation on the obtained vector data to output a vector operation result, wherein the vector operation is configured according to the method of the first aspect of the present disclosure.

[0008] In a fifth aspect of the present disclosure, an electronic device is provided. The electronic device includes: one or more processors; and a storage device for storing one or more programs, which, when executed by the one or more processors, causes the one or more processors to implement the method according to the first aspect of the present disclosure.

[0009] In a sixth aspect of the present disclosure, a computing device readable storage medium is provided, on which a computing device program is stored, which implements the method according to the first aspect of the present disclosure when executed by a processor.

[0010] In a seventh aspect of the present disclosure, an electronic device is provided. The electronic device includes: one or more processors; and a storage device for storing one or more programs, which, when executed by the one or more processors, causes the one or more processors to implement the method according to the second aspect of the present disclosure.

[0011] In an eighth aspect of the present disclosure, a computing device readable storage medium is provided, wherein a computing device program is stored on the computing device readable storage medium, and when the program is executed by a processor, the method according to the second aspect of the present disclosure is implemented.

[0012] In a ninth aspect of the present disclosure, a computer program product is provided, comprising a computer program, which implements the method according to the first aspect of the present disclosure when executed by a processor.

[0013] In a tenth aspect of the present disclosure, a computer program product is provided, comprising a computer program, which implements the method according to the second aspect of the present disclosure when executed by a processor.

[0014] It should be understood that the contents described in the Summary of the Invention section are not intended to limit the key or important features of the embodiments of the present disclosure, nor are they intended to limit the scope of the present disclosure. Other features of the present disclosure will become readily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] The above and other features, advantages and aspects of the embodiments of the present disclosure will become more apparent with reference to the following detailed description in conjunction with the accompanying drawings. In the accompanying drawings, the same or similar reference numerals represent the same or similar elements, wherein:

[0016] Figure 1 A schematic diagram illustrating an example environment for performing schemes by a computing device according to various embodiments of the present disclosure;

[0017] Figure 2 A flowchart illustrating a method of configuring vector operations performed by a computing device according to some example embodiments of the present disclosure is shown;

[0018] Figure 3 A schematic block diagram of a computing device according to some example embodiments of the present disclosure is shown;

[0019] Figure 4 A flowchart illustrating a method of vector operations performed by a computing device according to some example embodiments of the present disclosure is provided;

[0020] Figure 5 A schematic block diagram illustrating an apparatus for executing a configuration vector operation scheme by a computing device according to an embodiment of the present disclosure is shown;

[0021] Figure 6 A schematic block diagram illustrating an apparatus for vector operations performed by a computing device according to an embodiment of the present disclosure; and

[0022] Figure 7 A block diagram is shown of a computing device capable of implementing various embodiments of the present disclosure. DETAILED DESCRIPTION

[0023] The following describes embodiments of the present disclosure in more detail with reference to the accompanying drawings. Although certain embodiments of the present disclosure are shown in the accompanying drawings, it should be understood that the present disclosure can be implemented in various forms and should not be construed as limited to the embodiments described herein. Rather, these embodiments are provided to provide a more thorough and complete understanding of the present disclosure. It should be understood that the drawings and embodiments of the present disclosure are for illustrative purposes only and are not intended to limit the scope of protection of the present disclosure.

[0024] In the description of the embodiments of the present disclosure, the term "including" and similar terms should be understood as open inclusion, that is, "including but not limited to." The term "based on" should be understood as "based at least in part on." The term "one embodiment" or "the embodiment" should be understood as "at least one embodiment." The terms "first," "second," etc. may refer to different or the same objects. Other explicit and implicit definitions may also be included below.

[0025] As used herein, the term "basic vector operations" refers to the basic units of vector operations, such as the four arithmetic operations between two vectors (i.e., addition, subtraction, multiplication, and division), and operations between a single vector and a scalar (e.g., multiplication between a scalar and a vector). For illustrative and non-limiting examples only, for two input vectors of length n, a = [a1, a2, a3, ..., an] and b = [b1, b2, b3, ..., bn], vector addition between a and b is defined as [a1+b1, a2+b2, a3+b3, ..., an+bn], vector subtraction between a and b is defined as: ab = [a1-b1, a2-b2, ..., an-bn], vector multiplication between a and b is defined as: [a1*b1, a2*b2, ..., an*bn], and vector division between a and b is defined as: [a1 / b1, a2 / b2, ..., an / bn]. For illustrative purposes only and not limiting, for two input vectors a = [a1, a2, a3, ..., an] of length n, the multiplication operation between a vector and a scalar parameter A is defined as [A*al, A*a2, ..., A*an]. Combinations of one or more basic vector operations can form compound vector operations. In this document, unless otherwise specified, the term "vector operation" means a "compound vector operation."

[0026] As used herein, the term "vector operation unit" refers to a computing unit in a computing device that implements vector operations. It can be implemented through hardware (e.g., multiple electrical components) or software. In some application scenarios, it can be integrated on a chip (e.g., a CPU, GPU, ASIC, etc.).

[0027] As discussed above, improving the performance and flexibility of vector operations is a key issue that currently needs to be addressed. A traditional approach to vector operations performed by computing devices is to implement them through a control processing unit (CPU). In this approach, because CPUs are typically designed to perform scalar calculations, vector operations need to be split into multiple scalar calculations, resulting in long input vector operation instructions. Furthermore, during the execution of vector operations, many control instructions such as branch jumps are required to control loop judgment, resulting in low overall execution performance of vector operations.

[0028] Another traditional approach to performing vector operations on computing devices is to use a GPU or a CPU with Single Instruction Multiple Data (SIMD) technology. This technology improves the performance of vector operations to a certain extent. However, the inventors note that this approach still has many drawbacks, including the following:

[0029] On-chip cache space is limited. During vector operations, data must be frequently transferred from off-chip memory. This is especially true for large-scale vector operations. The bandwidth of off-chip memory devices results in poor performance.

[0030] Only basic vector operations are supported. Complex vector operations that include multiple basic vector operations need to be further split into multiple basic vector operation instructions, making the vector operation instructions longer.

[0031] In addition, although ASICs targeting deep learning have emerged in recent years, they are still limited to supporting basic vector operations. For some slightly more complex vector operation formats, they still need to be split into multiple basic vector operations to implement. For example, for the vector operation format y = A*a+b, where a and b are input vector data, y is the vector result, and A is a scalar type parameter, the above format needs to be split into two basic vector operations, namely, vector and scalar multiplication and vector addition operations.

[0032] Therefore, traditional vector operation schemes performed by computing devices do not support complex vector operations, and the execution performance of vector operations is not high, which cannot meet the needs of deep learning in the field of artificial intelligence.

[0033] According to an embodiment of the present disclosure, a method for configuring vector operations performed by a computing device is proposed. The computing device can support a target vector operation consisting of two or more basic vector operations, and the parameters of the vector operation are configurable. Further, according to an embodiment of the present disclosure, a method for vector operations performed by a computing device is proposed. The computing device can read vector data and perform vector operations based on the vector operations configured by applying the vector operation configuration method of the present disclosure. In this way, while supporting complex vector operations, the flexibility of the vector operation format is also achieved.

[0034] Furthermore, to achieve more flexible configuration of vector operations, according to some example embodiments of the present disclosure, the type of configurable vector operation parameters can be a scalar type or a vector type. In addition, depending on the type of the configurable vector operation parameters, the configurable vector operation parameters are stored in different storage devices. For example, configurable vector operation parameters of scalar type can be stored in a scalar memory (such as a register), and configurable vector operation parameters of vector type can be stored in a vector memory (such as a storage unit). In this way, different types of configurable vector operation parameters are stored in different storage devices, making the maintenance and management of the configurable vector operation parameters more reasonable and efficient.

[0035] Furthermore, according to some example embodiments of the present disclosure, a scalar storage device and / or a vector storage device can be built into a computing device. For example, the scalar storage device and / or the vector storage device and the computing device can be integrated on a single chip. In this way, when configuring a vector operation unit and performing vector operations, the computing device does not need to read configuration parameters and / or vector data from outside the chip, thereby improving the execution performance of the computing device and avoiding performance bottlenecks caused by bandwidth between the computing device and external storage devices.

[0036] Figure 1A schematic diagram of an example environment 100 in which multiple embodiments of the present disclosure can be implemented is shown. In this example environment 100, a computing device 130 can obtain information 110-1, 110-2, to 110-I of configurable vector operation parameters. For ease of description, the information 110-1, 110-2, to 110-I of the multiple configurable vector operation parameters can be collectively referred to as information 110 of configurable vector operation parameters. In some example embodiments of the present disclosure, the information 110 of configurable vector operation parameters can indicate information of the configurable vector operation parameters. More specifically, the information 110 of configurable vector operation parameters can indicate the type and value of the configurable vector operation parameters. In some example embodiments of the present disclosure, the information 110 of configurable vector operation parameters can be transmitted to the computing device 130 via wired communication or wireless communication. In some example embodiments of the present disclosure, the computing device 130 can also receive the information 110 of configurable vector operation parameters input by a user via an input device coupled to the computing device 130 (including but not limited to, for example, a mouse, keyboard, touch pen, touch screen, etc.). In some other example embodiments of the present disclosure, the computing device 130 may also obtain the information 110 of configurable vector operation parameters by reading a script / configuration file / command file.

[0037] The computing device 130 may be any device with computing capabilities. In some example embodiments of the present disclosure, the computing device 130 may be a chip with computing capabilities, including but not limited to a CPU, a GPU, an ACIS, and the like.

[0038] The computing device 130 includes a plurality of vector operation units 150-1, 150-2 to 150-L. For the convenience of description, the plurality of vector operation units 150-1, 150-2 to 150-L may be collectively referred to as a vector operation unit 150. The vector operation unit 150 is designed to support compound vector operations. For example, in a vector operation on vector a and vector b, a compound vector operation y=A*a+B*b+C including configurable vector operation parameters may be defined, where A, B, and C are configurable vector operation parameters, and the types (which may be scalar types or vector types) and values ​​of the configurable vector operation parameters A, B, and C are configurable. In some example embodiments of the present disclosure, the compound vector operation includes two or more (more than three) basic vector operations, and the included basic vector operations may be combined in any form. It should be understood that the above-mentioned compound vector operation is merely an example. In some other embodiments, the compound vector operation may be defined in any required form. In some example embodiments of the present disclosure, the vector operation unit 150 may implement or configure complex vector operations with configurable vector operation parameters, for example, through integrated electrical elements (such as NAND gates, amplifiers, etc.).

[0039] The computing device 130 can configure the plurality of vector operation units 150 based on the received information 110 of the configurable vector operation parameters so that each of the plurality of vector operation units can perform a vector operation defined according to the type and value of the configurable vector operation parameters. For example, the configurable vector operation parameters A, B, and C can be configured as follows: A, scalar type, value 1; B, scalar type, value 2; C, vector type, value [0, ..., 0], wherein the dimension of the configurable vector operation parameter C is determined by the number of vector operation units 150 arranged inside the computing device 130, which will be determined in the case of the vector operation parameter C being configured. Figure 3 According to the above configuration, the composite vector operation y=A*a+B*b+C including configurable vector operation parameters supported by the vector operation unit 150 is determined to be a specific vector operation (herein, for the convenience of discussion, it is referred to as the "target vector operation"), namely y=a+2b.

[0040] The computing device 130 can perform target vector operations. Specifically, when a vector operation needs to be performed, the computing device 130 obtains vector data 120-1, 120-2 to 120-N to be operated. For the convenience of description, multiple vector data 120-1, 120-2 to 120-N can be collectively referred to as vector data 120. In some example embodiments of the present disclosure, the computing device 130 can obtain the vector data 120 from a database / memory for storing the vector data 120 located within the computing device 130 or a database / memory for storing the vector data 120 located outside the computing device 130. In some example embodiments of the present disclosure, the database / memory for storing the vector data 120 can be a dedicated vector storage device, such as an independent or integrated storage unit, etc.

[0041] Computing device 130 obtains information indicating at least one configurable vector operation parameter based on information 110 about configurable vector operation parameters to determine a target vector operation to be performed. After the target vector operation is determined, computing device 130 reads vector data 120 to perform the vector operation and outputs vector operation results 140-1, 140-2, through 140-M. For ease of description, multiple vector operation results 140-1, 140-2, through 140-M may be collectively referred to as vector operation results 140.

[0042] In some example embodiments of the present disclosure, the vector operation result may be stored by the computing device 130 in a database / memory for storing the vector operation result 140 located within the computing device 130 or in a database / memory for storing the vector operation result 140 located outside the computing device 130. In some example embodiments of the present disclosure, the vector operation result 140 may be stored in the same storage device as the vector data 120.

[0043] It should be understood that the number of configurable vector operation parameters, vector data, vector operation units, and vector operation results shown here are provided as examples only. Depending on actual conditions, the number of configurable vector operation parameters, vector data, vector operation units, and vector operation results may vary. The scope of the present disclosure is not limited in this respect. In addition, the forms of the composite vector operation and target vector operation shown here, as well as the values ​​and types of the configurable vector operation parameters, are provided as examples only. Depending on actual conditions, the forms of the composite vector operation and target vector operation, as well as the values ​​and types of the configurable vector operation parameters may vary. The scope of the present disclosure is not limited in this respect.

[0044] The following will refer to Figures 2 to 3 The process of configuring vector operations performed by computing device 130 will be described in more detail. Figure 2 A flow chart illustrating a process 200 of configuring vector operations performed by the computing device 130 according to some example embodiments of the present disclosure is shown. Figure 3 FIG2 shows a schematic block diagram of the structure of the computing device 130 according to some example embodiments of the present disclosure. Figure 1 For the convenience of discussion, the following will be combined with the computing device 130. Figure 1 and Figure 3 2. Process 200 will be described.

[0045] To more clearly discuss the process 200, first refer to Figure 3 The internal structure of the computing device 130 of some example embodiments of the present disclosure is briefly introduced. Figure 3In the embodiment, the computing device 130 includes a controller 360, a scalar storage device 350, a vector storage device 340, and a computing unit 370. As the core control module, the controller 360 can interact with the user as the interface of the computing device 130, obtain information 110 of configurable vector operation parameters and other user commands. The controller 360 is connected to the scalar storage device 350, the vector storage device 340, and the computing unit 370 at the same time and controls the scalar storage device 350, the vector storage device 340, and the computing unit 370. The scalar storage device 350 is used to store configurable vector operation parameters of the scalar type. In addition, the scalar storage device 350 can also store other control parameters during the vector operation process, such as the vector length, the address of the input and output vectors in the storage unit, etc. In some example embodiments of the present disclosure, the scalar storage device 350 can be a register. The vector storage device 340 is used to store configurable vector operation parameters of the vector type and vector data 120. The computing unit 370 includes two parallel vector operation units 150-1 and 150-2 (collectively referred to as vector operation units 150), selectors 310-1 and 310-2 (collectively referred to as selectors 310) corresponding to the vector operation units 150-1 and 50-1, respectively, and scalar / vector parameter configuration modules 320-1 and 320-2 (collectively referred to as scalar / vector parameter configuration modules 320). The selectors 310 and the scalar / vector parameter configuration modules 320 obtain the values ​​of the configurable vector operation parameters according to the types of the configurable vector operation parameters to configure the vector operation units 150.

[0046] It should be understood by those skilled in the art that Figure 3 The computing device 130 shown in the figure is for illustration only and is not intended to be limiting. The components in the figure may be increased or decreased according to actual needs, the components may be arbitrarily combined, and the number of each component may be increased or decreased as needed. The scope of the present disclosure is not limited in this respect.

[0047] Now refer to Figure 2 , the process 200 of configuring vector operations performed by the computing device 130 of the present disclosure is discussed in detail.

[0048] In box 210, the computing device 130 obtains information 110 indicating at least one configurable vector operation parameter, wherein the information 110 of at least one configurable vector operation parameter is associated with a composite vector operation supported by the vector operation unit 150. Still taking the example of the vector operation unit 150 supporting the composite vector operation y=A*a+B*b+C, the information 110 of at least one configurable vector operation parameter can indicate the configurable vector operation parameters A, B, and C. It should be understood that, depending on the composite vector operation supported by the vector calculation unit 150, the information 110 of the configurable vector operation parameter can be one or more. In addition, the information 110 of the configurable vector operation parameter can be obtained in any manner, including but not limited to user input or reading a script / configuration file / command file. In addition, the operation of obtaining the information 110 of the configurable vector operation parameter can be completed through one or more steps.

[0049] In some example embodiments of the present disclosure, the controller 360 (e.g., Figure 3 The operation of obtaining information 110 indicating at least one configurable vector operation parameter is performed, for example, the controller 360 receives a user instruction or reads a script / configuration file / command, and obtains the information 110 of the configurable vector operation parameter through a parsing operation.

[0050] In this way, computing device 130 can support complex vector operations. Furthermore, because vector operation unit 150 of computing device 130 supports at least one configurable vector operation parameter, multiple target vector operations can be implemented on a single physical entity, increasing the versatility of computing device 130. Furthermore, this approach allows users to implement complex vector operations with only simple operations, without having to write complex vector operation instructions, thus reducing the complexity of vector operations.

[0051] In some example embodiments of the present disclosure, the type of a configurable vector operation parameter can be a scalar type or a vector type. For example, the configurable vector operation parameters A and B described above can be configured as scalar types, and the configurable vector operation parameter C can be configured as a vector type. The following discusses the acquisition of scalar and vector type parameters, respectively.

[0052] Scalar types

[0053] In some example embodiments of the present disclosure, for scalar-type configurable vector operation parameters, the information 110 indicating at least one configurable vector operation parameter includes a numerical value of the configurable vector operation parameter. For example, for configurable vector operation parameters A and B, the information 110 indicating the configurable vector operation parameter may indicate A=1, B=2.

[0054] Additionally or alternatively, in some example embodiments of the present disclosure, the information 110 indicating at least one configurable vector operation parameter may further include a first indication, which is used to indicate that the type of the configured vector operation parameter is a scalar type. In some example embodiments of the present disclosure, the first indication may be displayed, for example, through a 1-bit information indication, when the bit is "0", indicating that the type of the configurable vector operation parameter is a scalar type. In some other embodiments, the first indication may also be implicit, for example, the default type of the configurable vector operation parameter is a scalar type, or the type of the configurable vector operation parameter is obtained through the value range of the configurable vector operation parameter. It should be understood that the above examples are merely illustrative and non-limiting examples, and the implementation form of the first indication may not be limited to this, and the scope of the present disclosure is not limited in this respect.

[0055] In some example embodiments of the present disclosure, after obtaining information 110 indicating at least one configurable vector operation parameter, the obtained vector value of the configurable vector operation parameter is stored in a scalar storage device 350 (e.g., Figure 3 For example, in the illustrative example of the present disclosure, after acquiring information indicating that the configurable vector operation parameters A=1 and B=2, the controller 360 stores the values ​​“1” and “2” of the configurable vector operation parameters A and B in the scalar storage device 350 .

[0056] Vector Type

[0057] Before discussing how to obtain configurable vector operation parameters of vector type, we first briefly introduce the basic concept of vector type parameters. In vector operations in deep learning, adding bias is a frequently required operation. In this case, the computing device 130 needs to support multiple vector operation units 150 that execute in parallel. For example, Figure 1 The vector operation units 150-1, 150-2 to 150-L in Figure 3 1 and 150-2 in the vector operation unit 150-1 and 150-2. In some example embodiments of the present disclosure, the dimension of the vector type configurable vector operation parameter corresponds to (is equal to) the number of vector operation units 150. For example, when the computing device includes two vector operation units 150-1 and 150-1, the configurable vector operation parameter C can be [C1, C2], where C1 will be applied to the vector operation unit 150-1 and C2 will be applied to the vector operation unit 150-2. It should be understood that adding a bias is only an exemplary application scenario, and the applicable scenarios of the vector type configurable vector operation parameter are not limited thereto.

[0058] In some example embodiments of the present disclosure, configurable vector operation parameters of vector type may be pre-configured and stored in the vector storage device 340 (eg, Figure 3 As shown). In some example embodiments of the present disclosure, the computing device 130 obtains the vector value of the configurable vector operation parameter and stores it in the vector storage device 340, and then generates storage information associated with the vector value of the configurable vector operation parameter, such as a storage address. It should be understood that the computing device 130 can obtain the vector value of the configurable vector operation parameter in a variety of ways. For example, the vector storage device 340 reads the vector value of the configurable vector operation parameter from an external device through its own input and output interface, or the controller 360 receives user input instructions or reads a script / configuration file / command file to obtain the vector value of the configurable vector operation parameter, and the controller 360 stores the vector value in the vector storage device 340. The scope of the present disclosure is not limited in this respect.

[0059] In some example embodiments of the present disclosure, when the configurable vector operation parameter is of a vector type, the information 110 indicating at least one configurable vector operation parameter includes storage information. For example, for a configurable vector operation parameter C, the information 110 indicating the configurable vector operation parameter may indicate storage information of the configurable vector operation parameter C in the vector storage device 340, such as a storage address &C.

[0060] Additionally or alternatively, in some example embodiments of the present disclosure, the information 110 indicating at least one configurable vector operation parameter includes, in addition to storage information of the configurable vector operation parameter (e.g., &C), a second indication, where the second indication is used to indicate that the type of the configured vector operation parameter is a vector type.

[0061] In some example embodiments of the present disclosure, the second indication may be displayed, for example, through a 1-bit information indication, and when the bit is "1", it indicates that the type of the configurable vector operation parameter is a vector type. In some other embodiments, the second indication may also be implicit, for example, the default type of the configurable vector operation parameter is a vector type, or the type of the configurable vector operation parameter is obtained by taking a value of the configurable vector operation parameter (such as, determining that the value is an address type). It should be understood that the above examples are merely illustrative and non-limiting examples, and the implementation form of the second indication may not be limited thereto, and the scope of the present disclosure is not limited in this respect.

[0062] The computing device 130 can obtain the vector value based on the storage information of the configurable vector operation parameters in the information 110 including the configurable vector operation parameters, for example, the controller 360 reads the vector value (e.g., [C1, C2]) of the configurable vector operation parameters from the vector storage device 340 based on the storage information (e.g., &C) of the configurable vector operation parameters.

[0063] Continue to refer Figure 2At block 220, the computing device 130 configures the plurality of vector operation units 150 based on the types and values ​​of the configurable vector operation parameters obtained at block 210. In some example embodiments of the present disclosure, when configuring the vector operation units 150, the selector 310 (e.g. Figure 3 (described) obtains the configurable vector operation parameters from the scalar storage device 350 or the vector storage device 340 according to the type of the configurable vector operation parameters. Specifically, when the configurable vector operation parameters are of scalar type, the selector 310 obtains the numerical value of the configurable vector operation parameters from the scalar storage device 350, for example, reading A=1, B=2 from the scalar storage device 350; when the configurable vector operation parameters are of scalar type, the selector 310 obtains the vector value of the configurable vector operation parameters from the vector storage device 340, for example, reading C=[C1, C2] from the vector storage device 340. In some example embodiments of the present disclosure, the selectors 310-1 and 310-2 may respectively include multiple parameter selectors, and the number of parameter selectors corresponds to (is equal to) the number of configurable vector operation parameters of the complex vector operation supported by the vector operation unit 150. For example, for the compound vector operation y=A*a+B*b+C, selectors 310-1 and 310-2 can respectively have three parameter selectors, and the three parameter selectors correspond to the configurable vector operation parameters A, B and C respectively, so as to obtain the values ​​of the configurable vector operation parameters A, B and C.

[0064] In some example embodiments of the present disclosure, the obtained values ​​of the vector operation parameters A, B, and C may be applied to the vector operation unit by the scalar / vector parameter configuration module 320 .

[0065] In some example embodiments of the present disclosure, a configurable vector operation parameter of a scalar type is applied to each vector operation unit in the multiple vector operation units 150, and values ​​of different dimensions of the configurable vector operation parameter of a vector type are applied to each vector operation unit in the multiple vector operation units 150 respectively.

[0066] Still referring to the example embodiment of the composite vector operation y=A*a+B*b+C, when the configurable vector operation parameter A is a scalar type and has a value of "1", the configurable vector operation parameter B is a scalar type and has a value of "2", and the configurable vector operation parameter C is a vector type and has a value of "[C1, C2]", where C1 and C2 are vector constants, the target vector operation corresponding to vector operation unit 150-1 is y=a+2b+C1, and the target vector operation corresponding to vector operation unit 150-2 is y=a+2b+C2.

[0067] In the above manner, the computing device 130 can implement complex vector operations, and the user can flexibly implement multiple vector operation formats on a single hardware device through simple configuration.

[0068] The following will refer to Figure 4 The process of vector operations performed by the computing device 130 will be described in more detail. Figure 4 FIG. 4 is a flow chart illustrating a process 400 of vector operations performed by the computing device 130 according to some example embodiments of the present disclosure. The process 400 may be performed by Figure 1 For the convenience of discussion, the following will be combined with the computing device 130. Figure 1 and Figure 3 4. The process 400 is described below.

[0069] At block 410, the computing device 130 obtains the vector data 120 to be operated on. In some example embodiments, the vector data 120 to be operated on may be pre-cached in the vector storage device 340. This eliminates the need for the computing device 130 to interact with an external storage device when performing vector operations, thereby avoiding execution performance bottlenecks caused by bandwidth between the computing device 130 and the external device and improving the execution performance of vector operations.

[0070] In block 420, the computing device 130 performs a vector operation on the acquired vector data 120 to output a vector operation result 140. Figure 3 The vector operation unit 150 reads the vector data 120 from the vector storage device 340 and performs a vector operation. The vector operation performed by the vector operation unit 150 is configured according to any method of configuring a vector operation performed by a computing device in the present disclosure.

[0071] Those skilled in the art will appreciate that the operation of executing a vector operation and the operation of configuring a vector operation may be triggered separately or together. For example, in some example embodiments of the present disclosure, the operation of executing a vector operation and the operation of configuring a vector operation may be triggered based on different user instructions. In other embodiments, the operation of executing a vector operation and the user instruction of configuring a vector operation may be triggered by a single instruction, or the operation of configuring a vector operation may automatically trigger the execution of the vector operation, and the scope of the present disclosure is not limited in this respect.

[0072] Through the above method, the execution performance of vector operations can be improved while flexibly configuring vector operations. Figure 5 A schematic block diagram of an apparatus for configuring vector operations performed by a computing device according to an embodiment of the present disclosure is shown. The apparatus 500 may be included in Figure 1 In the computing device 130 or implemented as the computing device 130. Figure 5As shown, the device 500 includes a controller 360, which is configured to obtain information 110 indicating at least one configurable vector operation parameter, wherein the information 110 of at least one configurable vector operation parameter indicates the type and value of the configurable vector operation parameter; and a computing unit 370, including a plurality of vector operation units 150, which is configured to configure the plurality of vector operation units based on the type and value of the configurable vector operation parameter so that each of the plurality of vector operation units can perform a target vector operation defined by the type and value of the configurable vector operation parameter and consisting of two or more basic vector operations.

[0073] In some example embodiments of the present disclosure, the types of configurable vector operation parameters include: scalar type and vector type.

[0074] In some example embodiments of the present disclosure, the information 110 indicating at least one configurable vector operation parameter includes: an explicit or implicit first indication indicating that the type of the configured vector operation parameter is a scalar type, and a value of the configurable vector operation parameter.

[0075] In some example embodiments of the present disclosure, the apparatus 500 further includes a scalar storage device configured to store numerical values ​​of configurable vector operation parameters, wherein the controller is configured to: obtain the numerical values ​​of the configurable vector operation parameters; and store the obtained numerical values ​​of the configurable vector operation parameters to the scalar storage device 350.

[0076] In some example embodiments of the present disclosure, the computing unit 520 includes: a selector 310 configured to obtain a numerical value of a configurable vector operation parameter; and a scalar parameter configuration module 320 configured to apply the numerical value of the configurable vector operation parameter obtained by the selector 310 to each vector operation unit in a plurality of vector operation units.

[0077] In some example embodiments of the present disclosure, the apparatus 500 further includes: a vector storage device 340 configured to store vector values ​​of configurable vector operation parameters; and a vector parameter acquisition module configured to: acquire vector values ​​of configurable vector operation parameters; store the vector values ​​of the configurable vector operation parameters to the vector storage device 340; and generate storage information of the vector values ​​of the configurable vector operation parameters, wherein the information 110 indicating at least one configurable vector operation parameter includes the storage information.

[0078] In some example embodiments of the present disclosure, a dimension of the vector value of the configurable vector operation parameter corresponds to the number of the plurality of vector operation units.

[0079] In some example embodiments of the present disclosure, the information 110 indicating the configurable vector operation parameter further includes: an explicit or implicit second indication for indicating that the type of the configured vector operation parameter is a vector type.

[0080] In some example embodiments of the present disclosure, the controller is further configured to obtain storage information of the configuration vector operation parameters, wherein the operation unit includes: a selector 310, configured to obtain the vector value of the configurable vector operation parameter based on the storage information of the configuration vector operation parameter; and a vector parameter configuration module 320, configured to apply the values ​​of different dimensions of the vector value of the configurable vector operation parameter obtained by the selector 310 to each vector operation unit in the multiple vector operation units.

[0081] Figure 6 A schematic block diagram of an apparatus for performing vector operations by a computing device according to an embodiment of the present disclosure is shown. The apparatus 600 may be included in Figure 1 In the computing device 130 or implemented as the computing device 130. Figure 6 As shown, the device 600 includes a computing unit 370, which includes multiple vector operation units. The computing unit is configured to: obtain vector data to be operated; and operate multiple vector operation units to perform vector operations on the obtained vector data to output vector operation results, wherein the vector operations are configured according to the method according to any one of claims 1-9.

[0082] In some example embodiments of the present disclosure, the apparatus 600 further includes a vector storage device 340 configured to store vector data to be operated on; and a vector data acquisition module configured to cache the vector data in the vector storage device 340 .

[0083] Figure 7 FIG2 shows a schematic block diagram of an example device 700 that can be used to implement an embodiment of the present disclosure. The device 700 can be used to implement Figure 1 1. As shown in the figure, the device 700 includes a computing unit 701, which can perform various appropriate actions and processes according to computer program instructions stored in a read-only memory (ROM) 702 or loaded from a storage unit 708 into a random access memory (RAM) 703. Various programs and data required for the operation of the device 700 can also be stored in the RAM 703. The computing unit 701, ROM 702, and RAM 703 are connected to each other via a bus 704. An input / output (I / O) interface 705 is also connected to the bus 704.

[0084] Multiple components in device 700 are connected to I / O interface 704, including an input unit 706, such as a keyboard, mouse, etc.; an output unit 707, such as various types of displays, speakers, etc.; a storage unit 708, such as a magnetic disk, optical disk, etc.; and a communication unit 709, such as a network card, modem, wireless communication transceiver, etc. The communication unit 709 allows device 700 to exchange information / data with other devices via a computer network such as the Internet and / or various telecommunication networks.

[0085] The computing unit 701 may be a variety of general-purpose and / or specialized processing components with processing and computing capabilities. Some examples of the computing unit 701 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various dedicated artificial intelligence (AI) computing chips, various computing units that run machine learning model algorithms, a digital signal processor (DSP), and any appropriate processor, controller, microcontroller, etc. The computing unit 701 performs the various methods and processes described above, such as process 200. For example, in some example embodiments of the present disclosure, process 200 may be implemented as a computer software program that is tangibly contained in a machine-readable medium, such as a storage unit 708. In some example embodiments of the present disclosure, part or all of the computer program may be loaded and / or installed on the device 700 via the ROM 702 and / or the communication unit 709. When the computer program is loaded into the RAM 703 and executed by the computing unit 701, one or more steps of the process 200 described above may be performed. Alternatively, in other embodiments, the computing unit 701 may be configured to perform process 200 in any other appropriate manner (e.g., by means of firmware).

[0086] The functions described above herein may be performed, at least in part, by one or more hardware logic components. For example, and without limitation, exemplary types of hardware logic components that may be used include: field programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), application specific standard products (ASSPs), systems on chips (SOCs), load programmable logic devices (CPLDs), and the like.

[0087] The program code for implementing the method of the present disclosure can be written in any combination of one or more programming languages. These program codes can be provided to a processor or controller of a general-purpose computer, a special-purpose computer, or other programmable data processing device so that when the program code is executed by the processor or controller, the functions / operations specified in the flow chart and / or block diagram are implemented. The program code can be executed entirely on the machine, partially on the machine, as a stand-alone software package, partially on the machine and partially on a remote machine, or entirely on a remote machine or server.

[0088] In the context of the present disclosure, a machine-readable medium can be a tangible medium that can contain or store a program for use by or in conjunction with an instruction execution system, device or equipment. A machine-readable medium can be a machine-readable signal medium or a machine-readable storage medium. A machine-readable medium can include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, device or equipment, or any suitable combination of the foregoing. A more specific example of a machine-readable storage medium can include an electrical connection based on one or more lines, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

[0089] In addition, although adopting specific order to describe each operation, this should be understood as requiring such operation to be carried out in the specific order shown or in sequential order, or requiring that all illustrated operations should be carried out to obtain desired results. Under certain circumstances, multitasking and parallel processing may be advantageous. Similarly, although comprising some specific implementation details in the above discussion, these should not be interpreted as limiting the scope of the present disclosure. Some features described in the context of separate embodiment can also be implemented in a single implementation in combination. On the contrary, the various features described in the context of a single implementation also can be implemented in a plurality of implementations individually or in the mode of any suitable subcombination.

[0090] Although the subject matter has been described in language specific to structural features and / or methodological logical acts, it should be understood that the subject matter defined in the appended claims is not necessarily limited to the specific features or acts described above. Rather, the specific features and acts described above are merely example forms of implementing the claims.

Claims

1. A configuration vector operation method performed by a computing device, comprising: Acquire information indicating at least one configurable vector operation parameter, where the information indicating at least one configurable vector operation parameter indicates a type and a value of the configurable vector operation parameter; and Configuring a plurality of vector operation units based on the type and value of the configurable vector operation parameter so that each of the plurality of vector operation units can perform a target vector operation defined by the type and value of the configurable vector operation parameter and consisting of two or more basic vector operations; Among them, when the type of the configurable vector operation parameter is a scalar type, the scalar value of the configurable vector operation parameter is applied to each vector operation unit in the multiple vector operation units; when the type of the configurable vector operation parameter is a vector type, vector values ​​of different dimensions of the configurable vector operation parameter are applied to each vector operation unit in the multiple vector operation units.

2. The method of claim 1 , wherein the information indicating the at least one configurable vector operation parameter comprises: An explicit or implicit first indication indicating that the type of the configured vector operation parameter is a scalar type, and The value of the configurable vector operation parameter.

3. The method according to claim 2, wherein obtaining information indicating at least one configurable vector operation parameter comprises: Obtaining the value of the configurable vector operation parameter; as well as The obtained value of the configurable vector operation parameter is stored in a scalar storage device.

4. The method according to claim 2 or 3, wherein configuring a plurality of vector operation units based on the type and value of the configurable vector operation parameter comprises: The value of the configurable vector operation parameter is obtained through a selector, and the value of the configurable vector operation parameter is applied to each vector operation unit in the plurality of vector operation units.

5. The method according to claim 1, further comprising: Obtaining a vector value of the configurable vector operation parameter; Storing the vector value of the configurable vector operation parameter in a vector storage device; as well as Storage information of the vector value of the configurable vector operation parameter is generated, wherein the information indicative of the at least one configurable vector operation parameter comprises the storage information. The method according to claim 5 , wherein a dimension of the vector value of the configurable vector operation parameter corresponds to the number of the plurality of vector operation units.

7. The method according to claim 5, wherein the information indicating the configurable vector operation parameters further comprises: The explicit or implicit second indication is used to indicate that the type of the configured vector operation parameter is a vector type.

8. The method according to claim 5, wherein configuring a plurality of vector operation units based on the type and value of the configurable vector operation parameter comprises: Obtaining the stored information of the configuration vector operation parameters; as well as According to the storage information of the configured vector operation parameters, the vector value of the configurable vector operation parameter is obtained through a selector, and the values ​​of different dimensions of the vector value of the configurable vector operation parameter are applied to each vector operation unit in the multiple vector operation units respectively.

9. A method for vector operations performed by a computing device, comprising: Get the vector data to be calculated; as well as For the acquired vector data, a plurality of vector operation units of the computing device perform vector operations to output vector operation results, wherein the vector operations are configured according to the method according to any one of claims 1-8.

10. The method according to claim 9, further comprising: Cache vector data in vector storage devices.

11. A computing device comprising: a controller configured to obtain information indicating at least one configurable vector operation parameter, wherein the information indicating at least one configurable vector operation parameter indicates a type and a value of the configurable vector operation parameter; as well as a computing unit comprising a plurality of vector operation units, the computing unit being configured to configure the plurality of vector operation units based on a type and a value of the configurable vector operation parameter, so that each of the plurality of vector operation units can perform a target vector operation defined according to the type and the value of the configurable vector operation parameter and consisting of two or more basic vector operations; Among them, when the type of the configurable vector operation parameter is a scalar type, the scalar value of the configurable vector operation parameter is applied to each vector operation unit in the multiple vector operation units; when the type of the configurable vector operation parameter is a vector type, vector values ​​of different dimensions of the configurable vector operation parameter are applied to each vector operation unit in the multiple vector operation units.

12. The computing device of claim 11 , wherein the information indicative of the at least one configurable vector operation parameter comprises: An explicit or implicit first indication indicating that the type of the configured vector operation parameter is a scalar type, and The value of the configurable vector operation parameter.

13. The computing device of claim 12, further comprising: a scalar storage device configured to store the numerical value of the configurable vector operation parameter, wherein the controller is configured to: Obtaining the value of the configurable vector operation parameter; and The obtained value of the configurable vector operation parameter is stored in the scalar storage device.

14. The computing device according to claim 12 or 13, wherein the computing unit further comprises: A selector configured to obtain a value of the configurable vector operation parameter; as well as The scalar parameter configuration module is configured to apply the value of the configurable vector operation parameter obtained by the selector to each vector operation unit in the plurality of vector operation units.

15. The computing device of claim 11, further comprising: a vector storage device configured to store vector values ​​of the configurable vector operation parameters; as well as The vector parameter acquisition module is configured as follows: Obtaining the vector value of the configurable vector operation parameter; storing the vector value of the configurable vector operation parameter in the vector storage device; and Storage information of the vector value of the configurable vector operation parameter is generated, wherein the information indicative of the at least one configurable vector operation parameter comprises the storage information. 16 . The computing device according to claim 15 , wherein a dimension of the vector value of the configurable vector operation parameter corresponds to the number of the plurality of vector operation units.

17. The computing device of claim 15, wherein the information indicating the configurable vector operation parameters further comprises: The explicit or implicit second indication is used to indicate that the type of the configured vector operation parameter is a vector type.

18. The computing device according to claim 15, wherein the controller is further configured to obtain storage information of the configuration vector operation parameters, The computing unit comprises: A selector configured to obtain a vector value of the configurable vector operation parameter according to the storage information of the configuration vector operation parameter; as well as The vector parameter configuration module is configured to apply values ​​of different dimensions of the vector value of the configurable vector operation parameter obtained by the selector to each vector operation unit in the multiple vector operation units.

19. A computing device comprising: A computing unit, comprising a plurality of vector operation units, wherein the computing unit is configured to: Get the vector data to be calculated; as well as For the acquired vector data, the plurality of vector operation units are operated to perform vector operations to output vector operation results, wherein the vector operations are configured according to the method according to any one of claims 1-8.

20. The computing device of claim 19, further comprising: A vector storage device configured to store the vector data to be calculated; as well as The vector data acquisition module is configured to cache vector data in a vector storage device.

21. An electronic device comprising: one or more processors; as well as A storage device for storing one or more programs, wherein when the one or more programs are executed by the one or more processors, the one or more processors implement the method according to any one of claims 1 to 8.

22. A computer-readable storage medium having a computer program stored thereon, wherein when the program is executed by a processor, the method according to any one of claims 1 to 8 is implemented.

23. An electronic device comprising: one or more processors; as well as A storage device for storing one or more programs, wherein when the one or more programs are executed by the one or more processors, the one or more processors implement the method according to any one of claims 9 to 10.

24. A computer-readable storage medium having a computer program stored thereon, wherein when the program is executed by a processor, the method according to any one of claims 9 to 10 is implemented.

25. A computer program product comprising a computer program, which, when executed by a processor, implements the method according to any one of claims 1 to 8.

26. A computer program product comprising a computer program which, when executed by a processor, implements the method according to any one of claims 9 to 10.

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