Intelligent electronic switch

Abstract

Embodiments of the present disclosure relate to intelligent electronic switches. An integrated circuit is described herein. According to an exemplary embodiment, the integrated circuit includes a power transistor coupled between a power pin and an output pin; a current sensing circuit configured to sense a load current through the power transistor and provide a corresponding current sensing signal; a first configuration pin; a current output circuit configured to provide a diagnostic current at the current output pin; a diagnostic pin for receiving a diagnostic request signal; and a control circuit configured to: select a characteristic curve representing a current versus time characteristic based on an external circuit connected to the first configuration pin; generate a drive signal for the power transistor based on the selected characteristic curve and the current sensing signal; and control the current output circuit based on a pulse mode of the diagnostic request signal to set the value of the diagnostic current so that it represents one of the following: the load current and the selected characteristic curve.

Description

Technical Field

[0001] The present disclosure relates to the field of intelligent semiconductor switches. Background Art

[0002] Almost every electrical device (e.g., in a car, in a house, or in an electrical subsystem of a large device) includes one of several fuses to provide overcurrent protection. A standard fuse includes a wire that provides a low-ohmic current path when the current through the fuse is less than the nominal current. However, this wire is designed to heat up and melt or vaporize when the current through the fuse exceeds the nominal current for a certain period of time. Once triggered, the fuse must be replaced with a new one.

[0003] Fuses are increasingly being replaced by circuit breakers. A circuit breaker is an automatically operated electrical switch designed to protect a circuit from damage caused by overcurrent, overload or short circuit. A circuit breaker may include an electromechanical relay that triggers the relay to disconnect the protected circuit from the power supply when an overcurrent (i.e., a current exceeding the nominal current) is detected. In many applications (e.g., in an onboard power supply of a car), an electronic switch (e.g., MOS transistor, IGBT, etc.) may be used to implement a circuit breaker to disconnect the protected circuit from the power supply in the event of an overcurrent. Such an electronic circuit breaker may also be referred to as an electronic fuse (e-fuse or smart fuse). In addition to being used as a circuit breaker, an electronic fuse may also be used to periodically turn on and off a load. Typically, a so-called driver circuit is used, or simply a driver (a gate driver in the case of a MOS transistor) is used to control the switch state (on / off) of an electronic switch such as a MOS transistor.

[0004] However, at least in some electronic circuit breakers (electronic fuses or e-fuses), generic driver circuits may not be perfect with regard to fault tolerance and functional safety, which may be a problem especially in automotive applications where standards on functional safety (e.g., ISO26262) must be followed. In fact, electronic fuses need to be more than just replacements for classic fuses by electronic switches. The reliable implementation of electronic fuses poses various challenges. Further, the effective configuration of electronic fuses may be a problem. Summary of the invention

[0005] An integrated circuit is described herein. According to an exemplary embodiment, the integrated circuit includes a power transistor coupled between a power pin and an output pin; a current sensing circuit configured to sense a load current through the power transistor and provide a corresponding current sensing signal; a first configuration pin; a current output circuit configured to provide a diagnostic current at the current output pin; a diagnostic pin for receiving a diagnostic request signal; and a control circuit configured to: select a characteristic curve representing a current versus time characteristic according to an external circuit connected to the first configuration pin; generate a drive signal for the power transistor according to the selected characteristic curve and the current sensing signal; and control the current output circuit to set a value of the diagnostic current according to a pulse pattern of the diagnostic request signal so that the value represents one of the following items: the load current and the selected characteristic curve.

[0006] Further, a method is described herein, according to an exemplary embodiment, the method comprising: sensing a load current through a power transistor coupled between a power pin and an output pin of an integrated circuit and providing a corresponding current sensing signal; selecting a characteristic curve representing a current versus time characteristic based on an external circuit connected to a first configuration pin; generating a drive signal for the power transistor based on the selected characteristic curve and the current sensing signal; receiving a diagnostic request signal at a diagnostic pin of the integrated circuit; and providing a diagnostic current at a current output pin of the integrated short circuit. The diagnostic current is set based on a pulse pattern of the diagnostic request signal so that the diagnostic current represents one of the following: the load current and the selected characteristic curve. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] The present invention may be better understood with reference to the following drawings and description. The components in the drawings are not necessarily drawn to scale; instead, emphasis is placed on illustrating the principles of the present invention. Moreover, in the drawings, like reference numerals indicate corresponding parts. In the drawings:

[0008] Figure 1 An example of an electronic fuse circuit including an electronic switch and a control circuit configured to drive the electronic switch, and exemplary applications of the electronic fuse circuit are schematically illustrated.

[0009] Figure 2 A more detailed illustration Figure 1 An example of a control circuit.

[0010] Figure 3 The diagram shows Figure 2 An example of a logic circuit used in a control circuit.

[0011] Figure 4 Included in the diagram Figure 2 The functionality of the control circuit is shown in the timing diagram.

[0012] Figure 5 A is a diagram for 0.35mm 2 Cable and diagram of a family of characteristic curves (time versus current) for different maximum cable temperatures.

[0013] Figure 5 B is a graph illustrating a family of characteristic curves (time versus current) for a maximum cable temperature of 25 Kelvin above ambient temperature and for different cable cross sections.

[0014] Figure 6 The diagram shows Figure 2 An example of a monitoring circuit being used in the example.

[0015] Figure 7 A first example of an e-fuse ("smart fuse") circuit that allows selection of the conductor cross section and the maximum cable temperature is illustrated.

[0016] Figure 8 The diagram shows Figure 2 Another example of a monitoring circuit used in an embodiment of the present invention.

[0017] Fig. 9 The diagram shows that Figure 8 Another example of a current sensing circuit used in conjunction with a monitoring circuit.

[0018] Fig.10 An exemplary pin configuration of an integrated electronic fuse circuit having a dedicated input pin for receiving a diagnostic request signal and having one or more configuration pins is illustrated.

[0019] Fig.11 One example of the relationship between the resistance of a resistor connected to a configuration pin and the trip current for triggering an over-current shutdown is illustrated.

[0020] Fig.12 One exemplary implementation of a current output circuit included in an electronic fuse circuit and configured to provide a diagnostic current is illustrated.

[0021] Fig.13 Timing diagrams showing exemplary waveforms of diagnostic request signals and resulting diagnostic currents are included.

[0022] Fig.14 is a state diagram representing the functionality of a finite state machine that controls the output of a diagnostic current.

[0023] Fig.15 A timing diagram showing another example of waveforms of a diagnosis request signal and a generated diagnostic current is included.

[0024] Fig.16Picture shows Fig.12 Modifications / enhancements of the circuit. DETAILED DESCRIPTION

[0025] In the following detailed description, reference is made to the accompanying drawings. The accompanying drawings form part of the description and, for the purpose of illustration, show examples of how the invention may be used and implemented. It is to be understood that the features of the various embodiments described herein may be combined with each other unless otherwise specifically noted.

[0026] Figure 1 An example of an electronic circuit that can be used as an electronic fuse is illustrated. Therefore, the electronic circuit is also referred to as an electronic fuse circuit F. According to this example, the electronic fuse circuit includes an electronic switch 2 having a control node 21 and a load current path between a first load node 22 and a second load node 23. The electronic circuit also includes a control circuit 1, which is coupled to the control node 21 of the electronic switch 2, and the control circuit 1 is configured to drive the electronic switch 2. The electronic fuse circuit F having the electronic switch 2 and the control circuit 1 can be monolithically integrated in one semiconductor die (chip), or can be integrated in two semiconductor dies that are arranged in an integrated circuit package. The electronic fuse circuit F is configured to drive a load Z (the wires connecting the load are connected in Figure 1 The load Z may be connected in series with the load current path of the electronic switch 2 (shown in dashed lines in FIG. 1 ). Therefore, the series circuit of the load current path of the electronic switch 2 and the load Z may be connected between power supply nodes, where a positive power supply potential and a negative power supply potential or a ground potential GND (zero volt) may be provided. In the following, the voltage between the two power supply nodes is referred to as the power supply voltage V B The control circuit 1 can be controlled, for example, by a microcontroller 8 according to an input signal S IN To switch on and off the load current i through the load Z L However, depending on the application, the input signal S IN It can be generated by any other circuit instead of the microcontroller.

[0027] In an exemplary application, the electronic fuse circuit F can be used to drive a load Z in a car. In this case, the supply voltage V B The power source of is the car battery. In general, "to drive the load" may include: switching on or off the load current through the load by switching the electronic switch 2 on or off. The load may be any load used in a car. Examples of load Z include, among others, different types of lamps, different types of motors, relays, heating systems, etc. Figure 1In the example illustrated in FIG, the electronic switch 2 and the load Z are connected in a high-side configuration. That is, the load Z is connected between the electronic switch 2 and the ground node GND. However, this is only an example. The electronic switch 2 and the load Z can also be connected in a low-side configuration or in any other configuration. For example, in a low-side configuration, the electronic switch is connected between the load Z and the ground node GND.

[0028] according to Figure 1 In an exemplary embodiment, the load Z can be connected to the electronic switch 2 via a conductive wire (for example, which is included in a cable). Depending on the location of the electronic circuit and the corresponding load Z within the electrical installation of the car, the wire can have a considerable length, of several 10 cm or even longer (for example, up to 10 m). Existing cars include multiple electrical loads, so multiple wires are required to connect the individual loads to their corresponding electronic switches. In order to save costs and resources, it may be desirable to determine the size of the individual wires so that they withstand the nominal current of the connected loads for a long time. However, if the current rises above the rated current, the wire may be damaged or even destroyed due to overheating. Therefore, according to an exemplary embodiment, the control circuit 1 may have a current monitoring function to monitor the load current i through the electronic switch 2 (and the load Z). L The current monitoring allows the electronic switch 2 to be turned off when an overload scenario is detected in order to protect the conductor (and the load Z). An “overload scenario” is when the electronic switch 2 is not turned off (within a certain time) to disconnect the conductor (and the load Z) from the supply voltage V B If the power source (e.g., a car battery) is disconnected, a scenario in which the wire or load is damaged or destroyed may occur. The mechanism is explained in detail further below. Since the electronic fuse circuit F is configured to switch the load Z on and off, and the electronic fuse circuit F is configured to protect the wire, it is also referred to as a switch and protection circuit below.

[0029] according to Figure 1In the example of, the electronic switch 2 is schematically drawn as a circuit block including a switch. Hereinafter, the term "electronic switch" includes any type of electronic switch or electronic circuit having a control node 21 and a load current path between a first load node 22 and a second load node 23, and the "electronic switch" is configured to be turned on and off according to a drive signal received at the control node 21. "On" means that the electronic switch 2 operates in an on state, in which the electronic switch 2 can conduct current between the first load node 22 and the second load node 23. "Off" means that the electronic switch 2 operates in an off state, in which the electronic switch 2 can prevent current from flowing between the first load node 22 and the second load node 23. According to an example, the electronic switch 2 includes at least one transistor. The at least one transistor can be, for example, a MOSFET (metal oxide semiconductor field effect transistor), an IGBT (insulated gate bipolar transistor), a JFET (junction field effect transistor), a BJT (bipolar junction transistor), or a HEMT (high electron mobility transistor).

[0030] In the following, examples of the control circuit 1 and its functions are described with reference to the accompanying drawings. In particular, the functions of the control circuit 1 are described with reference to the functional blocks depicted in the accompanying drawings. It should be noted that these functional blocks represent the functions of the control circuit 1, rather than their specific implementation. These functional blocks can be dedicated circuit blocks configured to perform the corresponding functions described below. However, the functions of the individual functional blocks can also be performed by a programmable circuit (processor) that is configured to execute software / firmware stored in a memory.

[0031] Figure 2 FIG. 1 shows an exemplary implementation of the control circuit 1. In this example, the control circuit 1 includes a monitoring circuit 4, which is configured to monitor the load current i L The current-time characteristic of the load current i is used to generate the first protection signal OC. L The current time characteristic to generate the first protection signal OC" may include the monitoring circuit 4 processing the load current i L The monitoring circuit 4 estimates the load current i at a certain time period. L , in order to generate the first protection signal OC. In order to be able to estimate the load current i L The monitoring circuit 4 receives the current sensing signal CS, and the monitoring circuit 4 generates the first protection signal OC based on the current sensing signal CS. The current sensing signal CS represents the load current i L , and according to one example, the current sensing signal CS can be related to the load current i L Proportional. Figure 2 In the example of FIG. 1 , the current sense signal CS is available at the sense output 24 of the electronic switch 2. In this case, it is configured to measure the load current i L And the current measurement circuit that provides the current sensing signal CS may be integrated in the electronic switch 2. However, this is only an example. It is also possible to use a current measurement circuit that is separated from the electronic switch 2. Various current sensing circuits (e.g., shunt resistors, sense-FET circuits, etc.) are known and are therefore not explained in detail herein. Figure 8 A specific example of a current sensing circuit is included in FIG. 1 and is discussed further below.

[0032] exist Figure 2 The control circuit 1 shown in FIG. 1 is configured to control the protection signal OC based on the protection signal OC and the first input node (eg, input pin) P of the electronic fuse circuit F. IN The input signal S received at IN To drive the electronic switch 2. The protection signal OC and the input signal S IN is supplied to the logic circuit 3, which generates a signal based on the protection signal OC and the input signal S IN To generate the driving signal S ON . Drive signal S ON is directly or indirectly (eg, via the driver circuit 5) supplied to the control node 21 of the electronic switch 2 so as to switch the electronic switch 2 on or off. According to one example, the drive signal S ON The driver circuit 5 (or simply, the driver) is configured to drive the electronic switch 2 based on the drive signal S ON The corresponding signal level is used to drive the electronic switch 2. The electronic switch 2 includes, for example, a transistor, such as a MOSFET (as in Figure 2 MOSFET is a voltage-controlled semiconductor device that is turned on or off according to a driving voltage applied between a gate node and a source node. In this example, the driver 5 is configured to ON To generate the driving voltage (gate voltage V G ) to turn on or off the MOSFET according to the drive signal. When using MOSFET, the driver 5 is also called a gate driver.

[0033] Figure 3 The circuit diagram of FIG. 1 shows an exemplary implementation of (a portion of) the logic circuit 3. In this example, the logic circuit 3 includes an inverter 33, an SR latch 31 (flip-flop), and an AND gate 32. The first input of the AND gate 32 is configured to receive an input signal S IN, and the reset input R of the SR latch 31 is configured to receive the inverted input signal provided by the inverter 33. The set input S of the SR latch 31 is configured to receive the first protection signal OC. The inverted output Q' of the SR latch 31 is connected to the second input of the AND gate 32. The drive signal S ON is provided at the output of AND gate 32 .

[0034] pass Figure 4 The timing diagram also illustrates the function of the logic circuit 3. The input signal S IN The initial low level of causes the reset of SR latch 31, which produces a high level at the inverting output Q' of SR latch 31. Therefore, both inputs of AND gate 32 "see" a high level, and the output of AND gate 32 is therefore the drive signal S ON Provides a high level. When the input signal S IN When it becomes low level (it indicates that the electronic switch 2 is turned off, see Figure 4 , time t1 and t2), the AND gate 32 “sees” a low level at its first input, so the output of the AND gate 32 is the drive signal S ON In other words, assuming that the SR latch 31 is in its reset state, the input signal S is fed through the logic circuit 3 IN (ie, the driving signal S ON Equal to the input signal S IN Once the SR latch 31 is set by the first protection signal OC becoming a high level, the inverting output Q' of the SR latch 31 is set to a low level (see Figure 4 , time t3). Therefore, AND gate 32 sees a low level at its second input, and thus drives signal S ON is set to a low level. In other words, the input signal S IN The drive signal S ON Remains at a low level until the input signal S IN is set to a low level (which indicates the turn-off of the electronic switch 2 and the reset of the SR latch 31, see Figure 4 , time t4) and is set to a high level again (which indicates the turning on of the electronic switch 2, see Figure 4 , until time t5). It should be pointed out again that it can be implemented in various other ways Figure 3 Functions of exemplary implementations.

[0035] As mentioned above, the wires connecting the load Z and the electronic fuse circuit F may be designed to withstand the nominal current of the load Z. The life of the wires (or cables) depends on the wire temperature. Figure 5 A and Figure 5B is a diagram showing a family of characteristic curves, each of which is a function of the maximum temperature difference dT (the highest temperature above the ambient temperature) and the cable cross section (e.g. in mm). 2 Each characteristic curve represents the relationship between the current and the maximum permissible time period of the conductor, during which the conductor can carry the current without exceeding the maximum temperature difference. Figure 5 A includes various temperature differences dT and 0.35mm 2 The characteristic curve of a specific cross-sectional area, Figure 5 B includes characteristic curves for a specific temperature difference dT of 25K (Kelvin) and various cross-sectional areas. Figure 5 A and Figure 5 B shows that the cross-sectional area is 0.35mm 2 A wire can carry a current of about 9A (amperes) for an almost infinite time without exceeding a temperature difference dT of 25K above the ambient temperature. Figure 5 B shows that the cross-sectional area is 0.75mm 2 A wire of can carry a current of 10A (ampere) for about 100 seconds before exceeding a temperature difference dT of 25K above the ambient temperature. In general, the greater the current, the shorter the permissible time period for a given cross-sectional area and a given temperature difference. Figure 5 A and Figure 5 The characteristic curve shown in the diagram of B has a linearly decreasing branch represented in double logarithmic form.

[0036] from Figure 5 A and Figure 5 B It can be seen that the temperature difference dT x (e.g., temperature values ​​dT1, dT2, dT3, dT4, dT5, dT6) and a given current (see Figure 5 A, current i x ) with a given integration time t x (e.g., time t1, t2, t3, t4, t5, t6) and a specific cross-sectional area (e.g., at Figure 5 In the example of A, it is 0.35 mm 2 ). Therefore, the current i passing through the wire over time can be L =i x The temperature value dT of a specific conductor cross section (which represents a temperature higher than the ambient temperature) is determined by integration, and the first protection signal OC can indicate when the temperature value dT reaches a defined first reference temperature difference dT R When , the electronic switch 2 is turned off. The mentioned integration can be effectively realized by using a digital filter, which can be included in the monitoring circuit 4 (see Figure 2)middle. Figure 6 An exemplary implementation of a monitoring circuit is shown.

[0037] basically, Figure 6 The monitoring circuit is configured to determine the first protection signal OC based on the current sensing signal CS. As mentioned, the integration can be done in the digital filter 42 with an integration characteristic. According to the depicted example, the current sensing signal CS (which can be related to the load current i L The current sense signal CS is proportional to the current sense signal CS. The current sense signal CS is supplied to the input of a filter 45 which may be an (optional) analog low pass filter to remove transients having a relatively high frequency, etc., and / or to perform an anti-aliasing filter function. The output of the filter 45 may be connected to the input of an analog to digital converter (ADC) 41 which is configured to digitize the filtered current sense signal CS. The ADC 41 may have a logarithmic characteristic in order to take into account the Figure 5 A and Figure 5 B. Then, through the digital filter 42, the (eg, logarithmized) digital current sensing signal CS DIG The resulting temperature value dT (which represents the temperature difference above the ambient temperature) is then supplied to a digital comparator 43, which may be configured to generate a temperature signal when the temperature value dT provided at the output of the digital filter 42 exceeds a first reference temperature difference dT specified for a particular conductor cross section. R (for example, 25K), the first protection signal OC is set to a high level. It should be noted that if the ADC 41 does not have a logarithmic characteristic, the digital current sensing signal CS DIG should be squared before being supplied to the filter 42. In this regard, in reference to Figure 8 And in publication US20170294772A1, this concept of temperature calculation is described.

[0038] As mentioned, the digital filter 42 is configured to convert the digitized current sensing signal CS DIG Represents) load current i L and the associated integration time during which the current passes through the conductor. In this example, the filter characteristic 42 depends on parameters characterizing the conductor, such as the cross-sectional area of ​​the conductor, which carries the load current and can be represented by a family of characteristic curves, such as in Figure 5 A shown in the figure (0.35mm 2 In one specific example, the characteristic curve (or related curve) can be stored (i.e., by storing multiple sampling points of the characteristic curve in a memory) as a lookup table. The value between two sampling points can be determined using, for example, interpolation.

[0039] Conventional fuses are produced for a specific trigger current and have a specific trigger time (slow-blow fuse, medium-blow fuse, fast-blow fuse), where the trigger time corresponds to a reference temperature dT R and the specific combination of conductor cross-section A as described above (see Figure 5 A and Figure 5 B) However, it would be desirable to have a configurable fuse that can be used for various wire parameters such as, for example, wire cross section and reference temperature value dT R (maximum temperature above ambient temperature).

[0040] Figure 7 One example of an electronic fuse circuit, also referred to as a smart fuse circuit 10 , is illustrated. Figure 7 The circuit and Figure 2 The circuits of the same are basically the same and reference is made to the corresponding description. However, the logic circuit 3 is more Figure 2 The logic circuit 3 in the example of is more sophisticated, and the monitoring circuit 4 can be, for example, based on Figure 6 , where the analog low-pass filter 45 is omitted (the low-pass filter 45 is optional). Figure 6 Unlike the example in FIG. 1 , in this example, the monitoring circuit 4 can be configured such that its characteristics can be selected based on at least one conductor parameter, which allows, for example, selection of a reference temperature difference dT for a specific conductor cross section and / or a desired conductor cross section. R The characteristic curve (see Figure 5 ). In the examples described herein, at least one conductor parameter is or represents the cable cross-sectional area and / or the maximum temperature value above the ambient temperature, or represents both. Figure 5 As can be seen in the figure, these two wire parameters define a specific characteristic curve that represents the desired characteristics of the electronic fuse circuit for a specific wire / cable. It is to be understood that other parameters such as wire diameter or absolute temperature (e.g., in the case of measuring ambient temperature) can be used as wire parameters. In addition, the wire parameters do not have to be proportional to any physical quantity (such as cross-sectional area or temperature), but can simply be numerical parameters that allow the desired characteristic curve used by the monitoring circuit to be determined (e.g., selected) from a set of characteristic curves (see Figure 5 ). Figure 7As shown in FIG. 1 , the electronic fuse circuit can be an integrated circuit arranged in a chip package, wherein the electronic switch 2 and the remaining circuit components (driver 5, logic circuit 3 and monitoring circuit 4) can be integrated in the same semiconductor die, or integrated in two separate semiconductor dies arranged in the chip package. However, in other embodiments, the smart fuse circuit 10 can be distributed in two or more separate chip packages. Figure 7 In the example shown, all depicted circuit components are integrated into one semiconductor chip.

[0041] The load current path of the electronic switch 2 can be connected between the power pin SUP and the output pin OUT of the smart fuse circuit 10. In general, the logic circuit 3 can be configured to receive at least one wire parameter, which in this example includes information about the wire cross-sectional area A and the reference temperature difference dT from a microcontroller or other control circuit. R Information. Figure 6 As shown in FIG. 1 , the logic circuit 3 may be configured to receive a signal (input signal S ) from the controller via an input pin IN. IN , see also Figure 2 ), through the input pin SEL T and SEL C Receive a signal from the controller (select signal S S1 and S S2 Represents), and provides a driving signal S for the electronic switch 2 ON In this example, the signal S is selected S1 Indicates a specific curve in a specific set of curves, and therefore represents the wire parameters. The selection signal S S2 indicates a specific trip current representing the maximum current i for triggering an overcurrent shutdown (eg, implemented using comparator 6). TRIP (trip current). The driver 5 may be configured to convert the signal S as a binary logic signal ON Converted into a driving voltage V suitable for turning on and off the electronic switch 2 GS (gate-source voltage) or the corresponding drive current. Figure 2 Similarly, the monitoring circuit 4 receives the (analog) current sensing signal CS and generates a first protection signal OC (eg, as in Figure 3 It is noted that the term "pin" herein refers to any chip contact suitable for making electrical and mechanical contact between an integrated circuit and a carrier such as a printed circuit board.

[0042] Based on information included in at least one conductor parameter and received, for example, from a controller, the control logic 3 can configure the digital filter 42 and / or the comparator (CMP) 43 so that the characteristics of the monitoring circuit 4 correspond to the conductor cross-sectional area A and the reference temperature difference dT R In this example, the input pin SEL T The selection signal S received at S1 To configure the monitoring circuit 4. Therefore, the selection signal S S1 Can represent parameters indicating the desired conductor (cross section and temperature difference). Figure 4 The ground pin GND shown in is coupled to a reference potential, for example, a ground potential, and the ground pin GND is connected to the logic circuit 3 and other circuit components that require a reference potential to function properly. It is to be understood that in another embodiment, the (multiple) conductor parameters can also be encoded into a single (e.g., digital) selection signal, for example, received by a digital communication interface such as a serial peripheral interface (SPI). In addition, it is to be understood that the specific mechanism of how the relevant information is provided to the logic circuit is not relevant. Basically, the monitoring circuit 4 is configured to be suitable for a specific conductor.

[0043] The comparator 6 mentioned above can be used to implement an additional protection mechanism in response to detecting a current equal to or greater than the maximum current (i L ≥i TRIP ) of the load current i L , this mechanism initiates an immediate over-current shutdown based on the SEL input pin C The selection signal S received at S2 , the immediate overcurrent shutdown can be configured. Thus, in response to detecting i L ≥i TRIP By setting the second protection signal OC2 to an appropriate logic level (e.g., a high level), the comparator 6 signals the logic circuit 3 to trigger an immediate overcurrent shutdown. It should be noted that this additional protection mechanism is independent of the selected characteristic curve and is primarily intended to protect the electronic switch 2 itself rather than the load and the wire. In other embodiments, regarding this parameter (maximum current / trip current i TRIP ) can be provided to the logic circuit, for example, via a serial communication interface (such as the SPI mentioned above).

[0044] Figure 8 Another exemplary embodiment of the monitoring circuit 4 is illustrated in more detail. Figure 8An example of how current sensing can be implemented is also illustrated in more detail. For current measurement, a so-called sense-FET circuit is used. That is, the electronic switch actually comprises two MOSFET transistors 21 and 22; transistor 21 is the actual load transistor coupled between the power supply node (power supply pin SUP) and the output node (output pin OUT), and this transistor 21 carries the load current i L , and transistor 22 is configured to provide a sensing current i CS The sensing transistor, which senses the current i CS Indicates load current i L The gate electrodes of the load transistor 21 and the sense transistor 22 are connected and receive the same gate voltage V G Likewise, the drain electrodes of the load transistor 21 and the sense transistor 22 are connected and receive the same drain voltage (the power supply voltage V in the case of the high-side configuration). B ). The source current of the sensing transistor is called the sensing current i CS When the drain-source voltages of the two transistors 21 and 22 are equal, the source current is equal to the load current i L (the source current of the load transistor 21) is substantially proportional. In this case, the two transistors operate in the same operating point, and the ratio of the source current i L / i CS Equal to the ratio A of the active areas of transistors 21 and 22 21 / A 22 .

[0045] Figure 8 The monitoring circuit 4 receives the current sensing signal, which is the sensing signal i in this example. CS , and the monitoring circuit 4 generates a corresponding digital current sensing signal CS DIG . The analog-to-digital converter (ADC) 41 can be a counter-type ADC or a SAR (successive approximation register) type ADC. Thus, the ADC 41 includes a control circuit 411, a current output digital-to-analog converter (DAC) 412, and a comparator 413. The control circuit 411 is configured to modify the digital register CNT according to a given scheme, and the resulting analog current is drawn from the source terminal of the sensing transistor 22. That is, the output node of the current output DAC 412 is connected to the source electrode of the sensing transistor 22, and therefore, the source current of the sensing transistor is actually set by the DAC 412. The comparator 413 is configured to compare the source potentials of the load transistor 21 and the sensing transistor 22, and the comparator 413 indicates (by a change in the level of its output) when the source potentials are equal. As mentioned, in this case, the sensing current i CS With the load current i LThe value of register CNT represents the load current and is used as the digital current sensing signal CS. DIG In a simple implementation, the control circuit 411 may essentially comprise a counter that is periodically reset and incremented (thereby ramping up the DAC output current) until the comparator 413 indicates that the source potentials of the transistors 21, 22 are equal. As mentioned, more sophisticated schemes (such as SAR) may be used to modify the register CNT.

[0046] Depending on the implementation, the monitoring circuit 4 may include a decimator 44 (thus optional) to reduce the data rate of the digital data stream provided by the ADC 41, or to perform an averaging function. The monitoring circuit 4 may also include a square unit 45, which is configured to calculate the digital current sensing signal CS DIG The square unit 45 is optional and, as already mentioned above, can be omitted when the ADC 41 has a logarithmic characteristic. Figure 8 In the example depicted in FIG. 1 , the ADC 41 has a linear characteristic, and a digital filter 42 is used to filter the squared current sensing signal CS. DIG 2 Filtering is performed. The filter 42 may include an integral characteristic as discussed above, and the filter output signal represents the cable temperature and indicates the temperature difference dT of the cable above the ambient temperature. The digital comparator 43 is used to compare the temperature difference dT with a threshold value, and when the reference temperature difference dT is exceeded, the digital comparator 43 generates a signal. R When , an overcurrent is indicated (signal OC). It should be noted that the digital circuit included in the monitoring circuit 4 operates using the clock signal CLK and needs to be initialized to a specific initial state, which is usually accomplished by a reset signal RES.

[0047] Fig. 9 Another exemplary implementation of the current sensing function is shown in FIG. Fig. 9 The current sensing circuit shown in FIG. 1 is a circuit further discussed above. Figure 8 The current sensing circuit included in the Fig. 9 In the example of FIG. 1 , a sense-FET circuit is used, in which the electronic switch 2 includes three MOSFET transistors 21, 22 and 23. The transistor 21 is an actual load transistor coupled between the power supply node (power supply pin SUP) and the output node (output pin OUT), and the transistor 21 carries the load current i L (As with Figure 8 Both transistors 22 and 23 are configured as sensing transistors, which respectively provide sensing currents i indicating the load current. CS and i CS2The gate electrode of the load transistor 21 is connected to the gate electrodes of the sense transistors 22 and 23 and receives the same gate voltage V G Likewise, the drain of the load transistor 21 is connected to the drain electrodes of the sense transistors 22 and 23 and receives the same drain voltage (the power supply voltage V in the case of the high-side configuration). B ). The source current of the sensing transistor 22 is referred to as the sensing current i CS , and the source current of the sensing transistor 22 is called the sensing current i CS2 , when the drain-source voltages of transistors 21, 22, and 23 are equal, the sensing current i CS With the sensing current i CS2 Both are related to the load current i L (the source current of the load transistor 21).

[0048] Fig. 9 The components on the right side (current output DAC 412, control circuit 411 and comparator 413) are similar to those on the Figure 8 The control circuit 411 can be used as an analog-to-digital converter and generate a digital current sensing signal CS DIG , the digital current sensing signal CS DIG It is used, for example, to calculate the temperature difference dT in a monitoring circuit. Fig. 9 The components on the left (another transistor 232, resistor R CS and amplifier 231) are configured to perform redundant current measurement. In this example, transistor 232 is a p-channel MOS transistor whose source electrode is connected to the source electrode of sensing transistor 23, so that the source current i of sensing transistor 23 CS2 is also the source current of the other transistor 232. The first input and the second input of the amplifier 231 are connected to the source electrodes of the load transistor 21 and the sense transistor 23, and the output of the amplifier 231 is connected to the gate electrode of the transistor 232. The amplifier 232 can be implemented as an operational transconductance amplifier (OTA) that drives the transistor 232 so that the difference between the source potentials of the load transistor 21 and the sense transistor 23 is close to zero. As mentioned, in this case, when the two transistors 21, 23 are operated in the same operating point, the sense current i CS2 With the load current i L The sensing current i CS2 Through the resistor R CS , the resistor R CS is connected in series to the drain-source path of transistor 232. In the depicted example, resistor R CS is connected between the drain electrode of the transistor 232 and the ground potential.CS The voltage drop across the terminals is V CS (V CS =R CS ·i CS2 ) can be used as an analog current sensing signal and is supplied to the Figure 7 The comparator 6 shown in FIG. 1 can be configured to convert the analog current sensing signal V CS With reference voltage V REF =R CS ·i TRIP / k ILIS In this example, k ILIS is the load current i L With the sensing current i CS2 The proportional factor between CS2 =i L / k ILIS ).

[0049] It should be noted that the analog current sensing signal V CS can be supplied to the comparator 6 (see Figure 7 ), which monitors the load current so that when the load current exceeds a certain maximum value, an over-current shutdown is triggered, and the digital current sensing signal CS can be processed in the monitoring circuit 4 DIG , in order to initiate the switching off of the electronic switch according to a preselected characteristic curve for a specific conductor.

[0050] Fig.10 An exemplary embodiment of how an electronic fuse circuit 10 (smart fuse circuit) can be used to protect a load is illustrated. In particular, Fig.10 The circuit includes external connections to the electronic fuse circuit 10, which is integrated in a single chip in this example. The power supply pin SUP is connected to a power supply (eg, providing a power supply voltage V B The input signal S supplied to the input pin IN is IN is a logic signal whose logic level (high or low) indicates whether the electronic switch 2 is turned on or off. The load (represented by the impedance Z) is connected to the output pin OUT via a wire. The selection signal S mentioned above S1 and S S2 The resistor R T and R C Connect to the input pin SEL T and SEL C The electronic fuse circuit may include a current source which is connected to the input pin SEL T and SEL CThe input pin provides a constant current i T and i C These currents i T and i C Connect to the input pin SEL via T and SEL C The resistor R T and R C leakage, resulting in a corresponding voltage drop i T ·R T and i C ·R C These voltage drops are formed in Figure 7 The selection signal S mentioned in the example shown in FIG. S1 and S S2 , and represent the desired wire characteristics to be selected ( Figure 5 ) and the expected maximum current i to be used by the overcurrent shutdown function mentioned above TRIP .

[0051] Fig.11 The diagram shows the connection to the input pin SEL C The resistor R C The maximum current i generated by the overcurrent shutdown mechanism discussed above is used TRIP To set a specific maximum current i TRIP , the resistor R can be selected between, for example, 10 kilo-ohms and 100 kilo-ohms C In this example, when the resistance increases above 100 kΩ, the maximum current i TRIP no longer changes; when the resistance is between 10 kilo-ohms and 100 kilo-ohms, the current i TRIP is inversely proportional to the resistance; and in order to avoid C shorted to ground (which actually means that R C =0Ω) when the trip current is too large, the resistor R C When the resistance is less than 10 kilo-ohms, the trip current i TRIP is set to the minimum tripping current i TRIP,MIN It should be noted that in a particular embodiment, the minimum trip current i TRIP,MIN can depend on the selected characteristic curve (which is determined by the T The resistor R T Therefore, the resistor R T The resistance and the actual tripping current i TRIP The relationship between can depend on the selected characteristic curve (see Figure 5 ).

[0052] Reference again Fig.10 , the input pin DEN (diagnostic enable) and the current output pin IS are used to implement the diagnostic function, which is referred to below Fig.12 and Fig.13 Describe in more detail. Fig.12 Only the components of the electronic fuse circuit 10 that are required in the following discussion are illustrated. Fig.12 The omitted components can be replaced with Figure 7 The output pin IS is configured to output the current i S , the current i S can be connected via resistor R S Leakage output current i S To convert the current i S Convert to the corresponding voltage V S , the resistor R S is connected between the output pin IS and ground (or any other suitable constant potential). The electronic fuse circuit may include an analog multiplexer 7 which allows selective output of a current i indicative of the load current CS2 (For example, an analog current sense signal provided by a sense transistor, see, for example, Fig. 9 ), or selectively outputs an output current provided by a controllable current source Q, the output current of which can be set digitally by the logic circuit 3 (e.g., by a digital control signal ISOUT). The specific implementation is not relevant to further discussion. What is important is that the logic circuit 3 is capable of determining the output current i provided at the output pin IS. S . Through the output current i S The information transmitted may depend on the input signal DEN (which is a logic signal) and also on the specific switching pattern of the signal DEN. Further, the information may additionally depend on the input signal S applied to the input pin IN. IN In general, the multiplexer 7 and the current source Q can be regarded as a current output circuit, where the output current level can be determined by the logic circuit 3.

[0053] exist Fig.12 The circuit design shown in FIG. 1 allows reading out various settings of the logic circuit 3 and in particular reading out the selected characteristic curve used by the monitoring circuit 4 (see FIG. 1 ). Figure 5 ), and readout by the overcurrent shutdown function (see Figure 7 , comparator 6) at the current trip current i TRIP Further, the current sensing signal may be output at the pin IS. Depending on the actual implementation, the logic circuit 3 may be configured to output other information, such as, for example, a measured temperature value.

[0054] exist Fig.13 An example of the aforementioned diagnostic function is illustrated in the timing diagram of FIG. , which can be implemented (in particular) in the logic circuit 3. When the input signal S DEN When (diagnostic request signal, “diagnostic enable”) is set to, for example, a high level, a diagnostic current i is output at pin IS. S The diagnostic current i S The meaning (i.e., the diagnostic current i S The information conveyed) depends on the input signal S IN The logic level and signal S DEN The timing of the high level pulse. Fig.13 An example is shown in FIG. 1 , where the input signal S IN and S DEN And the diagnostic current i S An exemplary timing diagram of .

[0055] At the input signal S IN When at a low level, the low level indicates that the electronic switch 2 is turned off (see Figure 7 ), diagnostic request signal S DEN A high level causes the diagnostic current i S , the diagnostic current i S is output at pin IS, where the level of the diagnostic current indicates the fault status i S =i FAULT That is, the current i FAULT The level of the current i indicates the cause of the error that may cause the electronic fuse to shut down. Therefore, the overcurrent shutdown can be distinguished from the shutdown triggered by the excessively high junction temperature of the transistor forming the electronic switch, or from the shutdown triggered by the monitoring circuit 4 (because the estimated wire temperature has also become too high). It is understood that the current i FAULT It may also indicate that no errors were detected.

[0056] At the input signal S IN When it is at a high level, the high level indicates that the electronic switch 2 is turned on (normal operation), and the diagnosis request signal S DEN A high level causes the diagnostic current i S , the diagnostic current i S Indicates load current i L That is, the multiplexer 7 (see Fig.12 ) is controlled so that it outputs an analog current sensing signal i CS2 Or the current provided by a controllable current source Q, wherein the current source is controlled so that its output current is indicative of the measured load current. Fig.13 It can be seen that when the diagnosis request signal S DENAfter at least one given time period T0 (pulse pause time) has been at a low level, upon the occurrence of a rising edge in the diagnostic request signal S DEN , the high level of the diagnostic request signal S DEN causes a diagnostic current i L indicating the load current i S .

[0057] If the diagnostic request signal S DEN includes two or more "on pulses", where the (multiple) pauses between the on pulses are shorter than the time period T0, additional information (in addition to the load current) can be read out. In the example of Fig.13 , the fourth on pulse in the diagnostic request signal S DEN (the second timing diagram of Fig.13 ) follows the third conduction pulse, where the pause is shorter than T0 (pause time T P <T0), and thus, the diagnostic current i S output at the pin IS is set to indicate the selected wire characteristic (see Figure 5 ). Similarly, after a pause shorter than the given time period T0, the fifth (last) conduction pulse in the diagnostic request signal S DEN is also asserted, and thus, the diagnostic current i S output at the pin IS is set to indicate the currently used trip current i Figure 7 for triggering overcurrent shutdown (comparator 6, see TRIP ).

[0058] In summary, the diagnostic current is typically controlled according to the pulse pattern of the diagnostic request signal S DEN such that the current output circuit sets the value of the diagnostic current i S such that the value of the diagnostic current i S represents one of the following: load current (current sensing signals i CS , i CS2 , etc.), the selected characteristic curve (see Figure 5 ), the trip current i TRIP . The functions described above can be implemented using a finite state machine (also known as a finite automaton) and can thus be described by a state diagram, an example of which is shown in Fig.14 . For example, the state machine can be implemented in the logic circuit 3 (see Figure 7 ).

[0059] In Fig.14 , the states S11, S12, and S13 represent the normal operation of the electronic fuse circuit (input signal S IN=1), while states S21, S22 and S23 are only in the off state of the electronic switch (input signal S IN =0). In state S11, the electronic switch 2 is turned on, and the power supply node SUP is connected to the output node OUT (see Figure 7 ). In state S11, when the state changes from S12 to S11, or from S13 to S11, the timer is reset. When the predetermined time period T0 mentioned above has elapsed since the reset, the timer expires. When (in state S11) the diagnosis request signal S DEN When set to a high level (logic 1) in the first diagnostic request, and / or when the timer has elapsed, the state changes to S12, wherein the diagnostic current i output at the chip pin IS is S represents the load current i through the electronic switch (current reading state) L When the diagnosis request signal S DEN When set to low (logic 0), the state changes back to S11.

[0060] Likewise, when the diagnosis request signal S DEN is set to a high level and when the timer has not expired, the state changes to S13, wherein the diagnostic current i output at the chip pin IS is S Represents the configuration parameter of the electronic switch (configuration readout state). S The specific configuration parameter whose form is output depends on the frequency with which state S13 is entered (without S12 or S21 being entered). In this example, in response to the first change to state S13, the diagnostic current i S Equal to the current i indicating the current selected conductor characteristic SEL,T In response to the second change to state S13, the diagnostic current i S Equal to the current i indicating the currently selected trip current SEL,C In response to a third change to state S13, additional parameters may be read by setting the diagnostic current to an appropriate value, and so on. In state S11, for example, when changing back to state S11 from state S13 for the third time, the timer may not be reset. As a result, regardless of the length of the pulse pause, the diagnostic request signal S DEN A subsequent turn-on pulse will again cause a change in the current sensing state S12.

[0061] When (in state S21) the diagnosis request signal S DEN When it is set to high level (logic 1), the state changes to S22, where the diagnostic current i output at the chip pin IS is S Represents error information. When the diagnosis request signal S DENWhen is set to a low level (logic 0), the state changes back to S21. According to the input signal S received at the input pin IN of the integrated electronic fuse circuit IN The state S21 and S11 are entered at the level of . State S23 is substantially the same as state S13 and is considered to be an option (hence drawn with a dotted line) that may or may not be implemented depending on the actual product. The information that can be read out in state S23 may be different from the information that can be read out in state S13.

[0062] Fig.15 Including similar to Fig.13 The timing diagram of the input signal S IN At high level (input signal S IN =1), the diagnostic request (S DEN =1) can trigger the diagnostic current i S Instructions as above Fig.13 and Fig.14 The current sensing signal (i S =i CS2 )(See state S12, current reading). IN Switch to low level (input signal S IN =0), the diagnostic request (S DEN =1) can trigger a similar function, where the diagnostic current i S The first diagnostic request results in a diagnostic current i S Indicates fault status (i S =i FAULT ). The effect of subsequent diagnostic requests depends on the self-signal S DEN How much time has elapsed since the last high-to-low transition of . If the elapsed time is greater than T0, the diagnostic request will again cause the diagnostic current i S Indicates a fault condition. However, if the elapsed time is less than or equal to T0, additional information can be read (see Fig.14 , transition to state S23). Fig.15 In the example, the diagnostic current i S Can be set to i SEL,T or SEL,C , which indicate the currently selected conductor characteristics and the currently selected trip current respectively. Depending on the actual implementation of the product, additional information can be provided in the same way.

[0063] Fig.16 Examples of Fig.12 Modifications / enhancements of the circuit. Fig.16 How does the circuit shown in the figure generate the current i SELC 'One option, the current i SELC'Indicates connection to chip contact SEL C The external resistor R C As mentioned above, Fig.10 and Fig.11 As discussed, the external resistor R C The resistor determines the trip current i for overcurrent shutdown TRIP The following description explains how this resistance value can be "converted" into a current i SELC ', the current i SELC 'Represents parameter i TRIP , the parameter i TRIP can be implemented in an analog comparator (such as in Figure 7 The comparator 6 in the circuit is used as a reference and can also be used together with other parameters as a diagnostic current i S Output, such as Fig.13 As shown in the bottom figure of .

[0064] Therefore, in this example, the electronic fuse circuit includes a voltage regulating circuit VR, which is coupled to the chip contact SEL C , and is therefore coupled to the resistor R C The voltage regulator circuit VR is configured to regulate the current i SELC , the current i SELC On chip contact SEL C The output is connected to the resistor R C , making the chip contact SEL C The voltage generated at R C ·i SELC Approximately equal to the predetermined reference voltage V R (For example, V R =0.5V). Fig.16 As shown in FIG. 1 , the voltage regulator may include a current steering DAC (in Fig.16 The current steering DAC is configured to provide a current i SELC , the current i SELC The chip contacts the SELC and the current i SELC The level of is set according to a digital word marked CNT in the depicted example. The voltage regulation circuit VR also includes a control circuit CTRL configured to control the current i according to a given scheme and the resulting current i SELC to modify the digital register in which the digital word CNT is stored. The comparator is configured to contact SEL on the chip C The voltage at R C ·i SELC With the reference voltage V R is compared, and when the voltage RC ·i SELC Equal to or lower than the reference voltage V R When the comparator signals the control circuit CTRL, the comparator signals the voltage R C ·i SELC Equal to or lower than the reference voltage V R When, according to formula i SELC =V R / R C , the value CNT stored in the register (which determines i SELC ) is approximately equal to the resistor R C The resistance is proportional to the value CNT, and the digital value SEL C In a simple implementation, the control circuit 411 may basically include a counter which is reset, for example, at startup and added (so that the DAC output current i SELC ramp up) until the comparator indicates that the voltage R C ·i SELC The reference voltage V R A more sophisticated solution can be used to modify the register value CNT. Using a current mirror CM, it is possible to "copy" the current at the chip contact SEL C The current output at the mirror current i SELC ' can be supplied to the analog multiplexer 7, already referred to Fig.12 The analog multiplexer 7 is discussed.

[0065] Similar voltage regulation circuits and current mirrors can be used to provide current i SELT , the current in the chip contact SEL T (See Fig.10 ) is output and “mirrored” to obtain the corresponding mirror current i SELT ', the corresponding mirror current i SELT ' can also be supplied to the multiplexer 7. As referenced Fig.12 and Fig.13 As described above, the multiplexer can be controlled to select one of the currents input to the multiplexer 7. For example, according to Fig.13 In the scheme shown in FIG. 1 , the selected input current is output at the diagnostic pin IS as the diagnostic current i S .

[0066] Although the invention has been illustrated and described with respect to one or more implementations, changes and / or modifications may be made to the illustrated examples without departing from the spirit and scope of the appended claims. In particular, with respect to the various functions performed by the components or structures (units, components, devices, circuits, systems, etc.) described above, unless otherwise expressly stated, the terms used to describe these components (including references to "devices") are intended to correspond to any component or structure that performs the specified function of the described component (e.g., which is functionally equivalent), even if not structurally equivalent to the disclosed structure that performs that function in the exemplary implementation of the invention illustrated herein.

Claims

1. An integrated circuit, comprising: A power transistor (21) coupled between a power supply pin (SUP) and an output pin (OUT); A current sensing circuit is configured to sense a load current (i L ) and provide corresponding current sensing signals (CS, CS DIG ); The first configuration pin (SEL T ); A current output circuit (7; Q) configured to provide a diagnostic current (i S ); Diagnostic pin (DEN), used to receive the diagnostic request signal (S DEN ); as well as The control circuit (3) is configured as follows: Depending on the external circuit connected to the first configuration pin (R T ), select a characteristic curve representing the current versus time characteristics; According to the selected characteristic curve and the current sensing signal (CS, CS DIG ), generating a driving signal (S ON ); as well as According to the diagnosis request signal (S DEN ) pulse mode, controlling the current output circuit (7; Q) to set the diagnostic current (i S ) such that the value represents one of the following: the load current (i L ) and the selected characteristic curve.

2. The integrated circuit of claim 1 , further comprising: The second configuration pin (SEL C ); The control circuit (3) is further configured as follows: Depending on the external circuit connected to the second configuration pin (R T ), set the trip current for overcurrent shutdown (i TRIP ).

3. The integrated circuit of claim 2, further comprising: A comparator (6) is coupled to the current sensing circuit, and the comparator (6) is configured to trip the trip current (i TRIP ), a shutdown signal is generated.

4. The integrated circuit according to claim 2, The tripping current (i TRIP ) according to the external circuit connected to the second configuration pin (R T ), and is set according to the selected characteristic curve.

5. The integrated circuit according to any one of claims 1 to 4, In order to control the current output circuit (7; Q), the control circuit is configured as follows: The pulse pause before the diagnosis request is estimated, and the pulse pause is transmitted by the diagnosis request signal (S DEN )'s on pulse signal.

6. The integrated circuit according to claim 5, In order to control the current output circuit (7; Q), the control circuit is configured as follows: The current output circuit (7; Q) is controlled so that the diagnostic current is set to represent a specific parameter in dependence on the pulse pause preceding a specific diagnostic request.

7. The integrated circuit according to claim 5, In order to control the current output circuit (7; Q), the control circuit is configured as follows: The current output circuit (7; Q) is controlled such that the diagnostic current is set to represent a specific parameter depending on the pulse pause preceding a specific diagnostic request and depending on the number of diagnostic requests in which the corresponding preceding pulse pause was less than a predetermined pause time (T0).

8. The integrated circuit according to any one of claims 1 to 4, further comprising: Input pin (IN), used to receive input signal (S IN ); The control circuit (3) is configured to IN ) logic level to turn on or off the power transistor (21).

9. The integrated circuit according to any one of claims 1 to 4, further comprising: a monitoring circuit (4) configured to provide a temperature value indicative of a temperature of a conductor connected to the output pin (OUT) and estimated based on the sensed load current and the selected current-versus-time characteristic; The monitoring circuit (4) is further configured to provide a protection signal (OC) indicating whether the estimated temperature value is higher than a predetermined temperature threshold; and The control circuit is configured to cause the power transistor (21) to be turned off in response to the protection signal (OC) indicating that the estimated temperature value is higher than the predetermined temperature threshold.

10. A method for operating an integrated circuit, comprising: sensing a load current (i) through a power transistor (21) coupled between a power supply pin (SUP) and an output pin (OUT) of the integrated circuit L ) and provide corresponding current sensing signals (CS, CS DIG ); Depending on the connection to the first configuration pin (SEL T ) of the external circuit (R T ), select a characteristic curve representing the current versus time characteristics; According to the selected characteristic curve and the current sensing signal (CS, CS DIG ), generating a driving signal (S ON ); A diagnostic request signal (S) is received at a diagnostic pin (DEN) of the integrated circuit. DEN ); A diagnostic current (i S ), wherein according to the diagnosis request signal (S DEN ) pulse mode to set the diagnostic current (i S ), so that the diagnostic current (i S ) represents one of the following: the load current (i L ) and the selected characteristic curve.

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