Decoding method, device, communication chip and network equipment

Abstract

The embodiments of the present application disclose a decoding method, device, communication chip and network equipment, which belong to the field of communication technology. The method includes: in the process of iterative decoding of the code block, obtaining the decoding bits and external information output by the current decoder, the current decoder is the first decoder or the second decoder performing iterative decoding; in response to the decoding bits failing to pass the check, obtaining the absolute value mean of the external information obtained by the most recent n iterative decodings, n being an integer greater than or equal to 2; in response to the n absolute value means satisfying the iterative decoding convergence condition, stopping the iterative decoding. The scheme provided by the embodiments of the present application can ensure good decoding performance, and there is no need to wait for the iterative decoding number to reach the maximum iterative decoding number, thereby reducing the decoding delay and achieving the effect of improving the decoding speed.

Description

Technical Field

[0001] The embodiments of the present application relate to the field of communication technology, and in particular to a decoding method, device, communication chip and network equipment. Background Art

[0002] Turbo code is a parallel cascaded convolutional code. It is widely used in digital communication systems because of its superior performance when the signal-to-noise ratio is low and its strong anti-fading and anti-interference capabilities.

[0003] In the related art, Turbo decoding uses two decoders to perform iterative decoding to achieve good decoding performance. It stops iteration based on the maximum number of iterations and the cyclic redundancy check (CRC). When the signal-noise ratio (SNR) is low, the CRC fails. At this time, an unreasonable setting of the maximum number of iterations will result in poor decoding performance or a longer decoding delay. Summary of the invention

[0004] The embodiments of the present application provide a decoding method, device, communication chip and network equipment. The technical solution is as follows:

[0005] On the one hand, an embodiment of the present application provides a decoding method, the method comprising:

[0006] In the process of iteratively decoding the code block, the decoded bits and external information output by the current decoder are obtained, wherein the current decoder is the first decoder or the second decoder performing iterative decoding;

[0007] In response to the decoded bit failing the check, obtaining an absolute value average of the extrinsic information obtained by the most recent n iterative decodings, where n is an integer greater than or equal to 2;

[0008] In response to the n absolute value means satisfying an iterative decoding convergence condition, the iterative decoding is stopped.

[0009] On the other hand, an embodiment of the present application provides a decoding device, the device comprising:

[0010] A decoding circuit, used for obtaining decoding bits and external information output by a current decoder during iterative decoding of a code block, wherein the current decoder is a first decoder or a second decoder performing iterative decoding;

[0011] A verification circuit, configured to obtain, in response to the decoding bit failing verification, an absolute value average of the extrinsic information obtained by the most recent n iterative decodings, where n is an integer greater than or equal to 2;

[0012] The control circuit is used to stop iterative decoding in response to the average of the n absolute values ​​satisfying the iterative decoding convergence condition.

[0013] On the other hand, an embodiment of the present application provides a communication chip, which is used to implement the above decoding method.

[0014] On the other hand, an embodiment of the present application provides a network device, the network device comprising a processor, a memory and a transceiver, the processor being connected to the transceiver and the memory respectively;

[0015] The processor includes the communication chip as described in the above aspect.

[0016] The technical solution provided by the embodiments of the present application includes at least the following beneficial effects:

[0017] In an embodiment of the present application, the decoded bits obtained by decoding the first decoder or the second decoder are first checked. If the check fails, the absolute value mean of the external information of the most recent n iterative decodings is obtained. Since the external information tends to be stable during the iterative decoding process, the embodiment of the present application uses the absolute value mean of the external information to determine whether the iterative decoding convergence condition is met. When the condition is met, the iterative decoding is stopped to ensure good decoding performance, and there is no need to wait for the iterative decoding number to reach the maximum iterative decoding number, thereby reducing the decoding delay and achieving the effect of improving the decoding speed. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 is a block diagram of a communication system provided by an exemplary embodiment of the present application;

[0019] Figure 2 A method flow chart of a decoding method provided by an exemplary embodiment of the present application is shown;

[0020] Figure 3 A method flow chart of a decoding method provided by another exemplary embodiment of the present application is shown;

[0021] Figure 4 A schematic diagram of an implementation of an encoding method provided by an exemplary embodiment of the present application is shown;

[0022] Figure 5 A schematic diagram of an implementation of a decoding method provided by an exemplary embodiment of the present application is shown;

[0023] Figure 6 A method flow chart of a decoding method provided by another exemplary embodiment of the present application is shown;

[0024] Figure 7 A schematic diagram of an implementation of a decoding method provided by an exemplary embodiment of the present application is shown;

[0025] Figure 8 A structural block diagram of a decoding device provided by an embodiment of the present application is shown;

[0026] Fig. 9 It is a schematic diagram of the structure of a network device provided by an exemplary embodiment of the present application. DETAILED DESCRIPTION

[0027] In order to make the objectives, technical solutions and advantages of the present application clearer, the implementation methods of the present application will be further described in detail below with reference to the accompanying drawings.

[0028] The term "multiple" as used herein refers to two or more than two. "And / or" describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can mean: A exists alone, A and B exist at the same time, and B exists alone. The character " / " generally indicates that the related objects are in an "or" relationship.

[0029] Figure 1 A block diagram of a communication system provided by an exemplary embodiment of the present application is shown. The communication system may include: a base station 101 and a terminal 102.

[0030] Base station 101 is a device deployed in an access network to provide wireless communication functions for terminals. Base stations may include various forms of macro base stations, micro base stations, relay stations, access points, etc. In systems using different wireless access technologies, the names of devices with base station functions may be different. For example, in the Long Term Evolution (LTE) system, it is called an evolved Node B (eNodeB) or eNB; in the 5G NR-U system, it is called a gNodeB or gNB. With the evolution of communication technology, the description of "base station" may change.

[0031] The terminal 102 may include various handheld devices with wireless communication functions, vehicle-mounted devices, wearable devices, computing devices or other processing devices connected to a wireless modem, as well as various forms of user equipment, mobile stations (MS), terminal devices, etc. For the convenience of description, the above-mentioned devices are collectively referred to as terminals. Wireless communication can be performed between the base station 101 and the terminal 102.

[0032] In the process of base station 101 sending information to terminal 102, base station 101 encodes the information and sends it, and terminal 102 can use the decoding method provided in the embodiment of the present application to decode the received code block; in the process of terminal 102 sending information to base station 101, terminal 102 encodes the information and sends it, and base station 101 can use the decoding method provided in the embodiment of the present application to decode the received code block. It can be seen that the decoding method provided in the embodiment of the present application can be applied to both the terminal and the base station, and the embodiment of the present application does not limit this. And to facilitate the description of the embodiment of the present application, the following embodiment is schematically explained by taking the decoding method applied to a network device as an example.

[0033] In the related art, the following two methods are used to terminate Turbo iterative decoding.

[0034] 1. Preset the maximum number of iterations. When the decoder iteration number reaches the maximum number of iterations, terminate the iterative decoding.

[0035] 2. Combining the maximum number of iterations with CRC check, perform CRC check on the decoded bits obtained by the decoder each time. If the CRC check passes, the iterative decoding is terminated. If it fails, continue to check until the check passes or the maximum number of iterations is reached, and then terminate the iteration.

[0036] With the above scheme, if the maximum number of iterations is set too small, the decoding performance is poor, that is, the decoding block error rate is high; if the maximum number of iterations is set too large, if the SNR is low, the CRC check fails, and the only option is to wait for the iterative decoding number to reach the maximum number of iterative decoding numbers. At this time, an excessively long decoding delay is caused, affecting the decoding efficiency.

[0037] In the embodiment of the present application, the characteristic that the external information tends to be stable during the iterative decoding process is used to terminate the iterative decoding. The setting of the maximum number of iterations can be unlimited. When the SNR is high, the CRC check can be passed when the number of iterative decoding is small; when the SNR is low, the CRC check continues to fail. When the external information converges, the iteration is stopped, and then the number of iterative decoding is reduced while ensuring that the performance loss is small. There is no need to wait for the maximum number of iterations to be reached, thereby reducing the decoding delay. In this application, a larger maximum number of iterations will not affect the decoding delay, while in the related art, the maximum number of iterations needs to be used to stop the iteration. Therefore, the maximum number of iterations cannot be set too large.

[0038] Indicatively, if the maximum number of iterations is set to 30, when the CRC check fails, the iterative decoding times in the related art must reach 30 before the iteration can be terminated. However, in the actual decoding process, when the number of iterative decoding reaches 10, the external information has become stable, and the remaining 20 iterative decodings will not improve the decoding performance, but will cause a longer decoding delay. In the present application, the iteration is stopped when the external information is detected to be stable, and the number of iterative decoding is significantly reduced compared to the related art, thereby achieving the effect of reducing the decoding delay. In the present application, when the average number of iterative decoding is low, the decoding block error rate is also lower than the method in the related art, which can achieve the effect of reducing the decoding delay while ensuring the decoding performance.

[0039] Please refer to Figure 2 , which shows a method flow chart of a decoding method provided by an exemplary embodiment of the present application. This embodiment is described by taking the method used in a network device as an example. The network device is provided with a communication chip to execute the method. The method may include the following steps.

[0040] Step 201, in the process of iteratively decoding a code block, the decoding bits and external information output by the current decoder are obtained, and the current decoder is the first decoder or the second decoder performing iterative decoding.

[0041] External information refers to the reliability information extracted from each bit using the codeword correlation between decoded bits. Each decoder generates unique error correction information, namely external information, during the decoding process, which is provided to the next decoder for further error correction, thereby improving the error correction capability of the next decoder and reducing the decoding block error rate.

[0042] In a possible implementation, when iteratively decoding a code block, the first decoder decodes and outputs the decoded bits and external information, the external information is input into the second decoder as the prior information of the second decoder, the second decoder uses the obtained external information and other information to decode to obtain new decoded bits and external information, the new external information is input into the first decoder as the prior information of the first decoder, the first decoder decodes according to the new external information and other information, and obtains the decoded bits and external information again, the first decoder and the second decoder use the continuously updated external information to implement iterative decoding. After each decoding by the first decoder or the second decoder, the decoded bits and external information obtained by decoding are obtained, so that the decoded bits and external information can be used for subsequent judgment, and then the iterative decoding is terminated, and the final decoding result is output.

[0043] Step 202: In response to the decoded bit failing the check, an absolute value average of the extrinsic information obtained by the latest n iterative decodings is obtained, where n is an integer greater than or equal to 2.

[0044] Optionally, the embodiment of the present application can terminate iterative decoding by using the decoding bits and external information obtained through decoding.

[0045] In one possible implementation, the decoded bits obtained by each decoder are checked. If the check succeeds, the iterative decoding is stopped; if the check fails, the external information of the iterative decoding output of the current decoder is obtained, and the absolute value is averaged to obtain the absolute value mean and store it. Optionally, in order to reduce the amount of calculation, in the embodiment of the present application, the external information of some bits obtained can be averaged. That is, when the code block size is K, K′≤K external information can be selected to calculate its absolute value mean, and the calculation method is:

[0046]

[0047] in, represents the absolute mean of the nth external information, L e (k) represents the k-th bit of extrinsic information.

[0048] In the embodiment of the present application, the network device stores the average of the absolute values ​​of the external information output by the most recent n iterative decodings, where n is an integer greater than or equal to 2.

[0049] In one possible implementation, when the stored absolute value means reaches n, the first decoder or the second decoder outputs new external information, deletes the absolute value mean of the external information stored the longest, and adds the absolute value mean of the new external information, that is, updates the stored absolute value mean according to the first in first out (FIFO) principle.

[0050] Step 203: In response to the n absolute value means satisfying the iterative decoding convergence condition, stop the iterative decoding.

[0051] During the iterative decoding process, the external information gradually tends to be stable. At this time, when the first decoder or the second decoder generates new external information and inputs it to the next decoder, it cannot provide new error correction information. Further iteration will not bring or only a small performance gain, but will increase the decoding delay. At this time, iterative decoding needs to be stopped.

[0052] In a possible implementation, when the mean of the n absolute values ​​meets the iterative decoding convergence condition, that is, it is determined that the external information after n iterations converges and tends to be stable, the iterative decoding is stopped.

[0053] Whether the iterative decoding convergence condition is met is judged according to the absolute value average of the external information obtained by the latest n iterative decodings, and then the external information convergence is determined, indicating that the iterative decoding performance has reached or is close to the best. Stopping the iterative decoding at this time can ensure the decoding performance, that is, the decoding block error rate is low. Compared with the related technology that stops iterative decoding only when the maximum number of iterative decoding times is reached, this method can reduce the number of iterations after the external information tends to be stable, thereby reducing the decoding delay.

[0054] To summarize, in the embodiment of the present application, the decoded bits obtained by decoding by the first decoder or the second decoder are first checked. If the check fails, the absolute value mean of the external information of the most recent n iterative decodings is obtained. Since the external information tends to be stable during the iterative decoding process, the embodiment of the present application uses the absolute value mean of the external information to determine whether the iterative decoding convergence condition is met. When the condition is met, the iterative decoding is stopped to ensure good decoding performance, and there is no need to wait for the iterative decoding number to reach the maximum iterative decoding number, thereby reducing the decoding delay and achieving the effect of improving the decoding speed.

[0055] During the iterative decoding process, the external information will gradually become stable. In the embodiment of the present application, a fluctuation coefficient is introduced to indicate the stability of the external information. The fluctuation coefficient is determined according to the mean and variance of the absolute value means of n external information. When the fluctuation coefficient meets certain conditions, the iterative decoding is stopped.

[0056] Please refer to Figure 3 , which shows a method flow chart of a decoding method provided by another exemplary embodiment of the present application, and the method may include the following steps.

[0057] Step 301, in the process of iteratively decoding a code block, the decoded bits and external information output by the current decoder are obtained, and the current decoder is the first decoder or the second decoder performing the iteration.

[0058] Optionally, in an embodiment of the present application, the first decoder and the second decoder may adopt a convolutional code decoder (Decode Convolutional Code, DCC) using a Maximum A Posteriori (MAP) algorithm, and the code block is obtained by Turbo code encoding.

[0059] In a possible implementation, Figure 4 As shown, the Turbo encoder is composed of a first convolutional code encoder 401, a second convolutional code encoder 402 and an internal interleaver 403. The system information c is input to the first convolutional code encoder 401. k , get the mapped transmission symbol x k , and encode to obtain the verification information z k , input the c after being interleaved by the internal interleaver 403 to the second convolutional code encoder 402 k ′, encode to get the check information z k The first convolutional code encoder 401 and the second convolutional code encoder 402 are respectively provided with three delays, the number of their states is 8, and the code rate is 1 / 3, that is, 2 redundant bits are added for each input bit.

[0060] like Figure 5As shown, the Turbo decoder is composed of a first MAP DCC 501, a second MAP DCC 502, a first interleaver 503, a second interleaver 504 and a deinterleaver 505. During the first decoding, the external information is 0, and the system information c k The log-likelihood ratio L r (c k ) and the log-likelihood ratio of the check information obtained by the first convolutional code encoder 401 Input to the first MAP DCC 501 for decoding, and obtain the decoded bits and external information L e,1 (c k ), the second MAP DCC 502 uses the log-likelihood ratio of the system information interleaved by the second interleaver 504 and the log-likelihood ratio of the check information obtained by the second convolutional code encoder 402 and the external information L after being interleaved by the first interleaver 503 e,1 (c k ) to decode and obtain new decoded bits and external information L e,2 (c k ), external information L e,2 (c k ) is deinterleaved by the deinterleaver 505 and input into the first MAP DCC 501 again. The first MAP DCC 501 decodes again to obtain new decoding bits and external information. The decoder uses two MAP DCCs to continuously output new external information to realize iterative decoding.

[0061] Step 302: Update the number of iterative decoding times.

[0062] In the embodiment of the present application, in addition to using the decoding bit and external information to terminate the iteration, a maximum number of iterations is also set to terminate the iteration. In a possible implementation, after each decoding by the decoder, the number of iterative decoding is updated, that is, the number of iterative decoding is increased by one.

[0063] Step 303: In response to the number of iterative decoding reaching the maximum number of iterative decoding, stop iterative decoding.

[0064] In a possible implementation, after each decoding, the current accumulated number of iterative decoding times is detected, and when the number of iterative decoding times reaches the maximum number of iterative decoding times, the iterative decoding is stopped. It should be noted that in the embodiment of the present application, if the decoded bit fails to pass the check or the absolute value mean of the external information does not meet the iterative decoding convergence condition, but reaches the maximum number of iterative decoding times, the iterative decoding still needs to be terminated to avoid causing excessive decoding delay.

[0065] Step 304: in response to the decoded bit failing the check, obtaining the absolute value average of the extrinsic information obtained by the latest n iterative decodings, where n is an integer greater than or equal to 2.

[0066] Optionally, in the embodiment of the present application, a CRC check is applied to the decoded bits output by the MAP DCC. If the check passes, the decoding result is output and the iteration is terminated. If the check fails, the absolute value average of the external information obtained by the latest n iterative decoding is required to determine whether the iterative decoding convergence condition is met. It should be noted that the CRC check can be directly applied to the decoded bits output by the first MAP DCC 501, while the CRC check is applied to the decoded bits output by the second MAP DCC 502 after deinterleaving using a deinterleaver.

[0067] Step 305, determining the fluctuation coefficient according to the mean and variance of the n absolute value means, where the fluctuation coefficient is used to characterize the stability of the external information.

[0068] In the embodiment of the present application, the convergence condition of iterative decoding is determined by the fluctuation coefficient. In a possible implementation, the fluctuation coefficient is the ratio of the variance of the mean of n absolute values ​​to the mean, which is used to characterize the fluctuation degree of the continuously updated external information, and the use of the variance and the mean to represent it can avoid the problem of the small mean causing the small variance to interfere with the judgment compared to the use of the variance to represent the fluctuation degree.

[0069] Optional, latest N 1 The sequence of absolute value means can be expressed as: The mean is calculated as:

[0070]

[0071] Among them, μ is the nearest N 1 The mean of the absolute means, is the nth absolute value mean.

[0072] The variance is calculated as:

[0073]

[0074] Among them, σ 2 For the most recent N 1 The variance of the mean of the absolute values.

[0075] In one possible implementation, the coefficient of fluctuation is expressed as σ 2 / μ 2 .

[0076] It should be noted that, in order to reduce the amount of calculation, in another possible implementation, the variance is calculated as follows:

[0077]

[0078] Correspondingly, the coefficient of fluctuation can be expressed as σ / μ.

[0079] Step 306: Obtain the code block size of the code block.

[0080] Different code block sizes have different conditions for the extrinsic information to be stable during the decoding process. Therefore, in the embodiment of the present application, the code block size of the code block needs to be obtained, so as to determine the condition for measuring whether the extrinsic information is stable according to the code block size.

[0081] Step 307: determine a fluctuation coefficient threshold according to the code block size, where the fluctuation coefficient threshold is negatively correlated with the code block size.

[0082] In the embodiment of the present application, the fluctuation coefficient threshold refers to the critical value of the fluctuation coefficient. In a possible implementation, the fluctuation coefficient threshold is obtained by simulation according to the acquired code block size, and the threshold is negatively correlated with the code block size, that is, as the code block size increases, the fluctuation coefficient threshold is smaller.

[0083] It should be noted that step 306 and step 307 can be executed when decoding starts. This application only describes the setting of the fluctuation coefficient threshold and does not limit the execution sequence of the two steps.

[0084] Optionally, the network device may pre-store a correspondence table of fluctuation coefficient thresholds and code block sizes, and when the code block size is obtained, the fluctuation coefficient threshold may be determined using the correspondence table. Schematically, the correspondence table may be shown in Table 1:

[0085] Table 1

[0086] Block size Fluctuation coefficient threshold >5000 0.04 3000-5000 0.08 1000-3000 0.12 ＜1000 0.16

[0087] For example, when the acquired code block size is 6144, it can be determined that the fluctuation coefficient threshold is 0.04.

[0088] Step 308: In response to the fluctuation coefficient being less than the fluctuation coefficient threshold, stopping iterative decoding.

[0089] In a possible implementation, when the fluctuation coefficient is less than the fluctuation coefficient threshold, it indicates that the n absolute value means converge, that is, the external information tends to be stable and will no longer improve the error correction capability of the next decoder, and iterative decoding needs to be stopped. 2 / μ 2 When ≤α, it is determined that the iterative decoding convergence condition is met, where α is the fluctuation coefficient threshold. At this time, it is necessary to stop the iterative decoding.

[0090] Combined with the example in the above steps, the obtained code block size is 6144. If n is 8, the absolute value mean of the external information of the latest 8 iterative decoding is obtained. When the σ of the 8 absolute value means is 2 / μ 2 When it is less than 0.04, it indicates that the iterative decoding convergence condition is met and the iterative decoding can be stopped.

[0091] In addition, after the fluctuation coefficient of the absolute value mean of the external information decoded in the most recent n iterative decodings meets the convergence condition, the subsequently updated external information may still fluctuate. In order to ensure that the external information remains in a stable state, a termination counter is introduced in the embodiment of the present application. When the value of the termination counter reaches a certain condition, the iterative process is terminated.

[0092] Please refer to Figure 6 , which shows a method flow chart of a decoding method provided by another exemplary embodiment of the present application, and the method may include the following steps.

[0093] Step 601, in the process of iteratively decoding a code block, the decoding bits and external information output by the current decoder are obtained, and the current decoder is the first decoder or the second decoder performing the iteration.

[0094] Step 602, updating the number of iterative decoding times.

[0095] Step 603: In response to the number of iterative decoding reaching the maximum number of iterative decoding, stop iterative decoding.

[0096] Step 604: in response to the decoded bit failing the check, obtaining the absolute value average of the extrinsic information obtained by the latest n iterative decodings, where n is an integer greater than or equal to 2.

[0097] Step 605, determining the fluctuation coefficient according to the mean and variance of the n absolute value means, where the fluctuation coefficient is used to characterize the stability of the external information.

[0098] Step 606: Obtain the code block size of the code block.

[0099] Step 607, determining a fluctuation coefficient threshold according to the code block size, where the fluctuation coefficient threshold is negatively correlated with the code block size.

[0100] Steps 601 to 607 may refer to the above-mentioned steps 301 to 307, which will not be described in detail in this embodiment.

[0101] Step 608: In response to the fluctuation coefficient being less than the fluctuation coefficient threshold, updating the termination counter.

[0102] In a possible implementation, the absolute value mean of the extrinsic information of the most recent n iterative decodings is continuously updated as the iterative decoding proceeds. After each update, the mean and variance of the n absolute value means in the latest sequence need to be calculated to obtain the fluctuation coefficient. If the fluctuation coefficient of the n absolute value means in the latest sequence is less than the fluctuation coefficient threshold, the count of the termination counter is increased by one, and the termination counter is used to indicate the termination of the iterative decoding.

[0103] Indicatively, the absolute value mean of the external information of the most recent 8 iterative decodings can be obtained, and the fluctuation coefficient of the absolute value mean of the iterative decodings from the 1st to the 8th is less than α, and the value ρ of the termination counter becomes 1; after one iterative decoding, the absolute value mean of the most recent 8 times is updated to the absolute value mean of the external information of the iterative decodings from the 2nd to the 9th, and when the fluctuation coefficient of the absolute value mean of the iterative decodings from the 2nd to the 9th is less than α, the count ρ of the termination counter becomes 2.

[0104] Step 609: in response to the fluctuation coefficient being greater than the fluctuation coefficient threshold, clearing the termination counter.

[0105] In a possible implementation, there may be a fluctuation coefficient of the absolute value mean of the most recent n times that is greater than the fluctuation coefficient threshold, that is, σ 2 / μ 2 When >α, it indicates that the external information has not yet fully converged, and the termination counter needs to be cleared. When the fluctuation coefficient of the mean of the n absolute values ​​in the subsequently updated sequence meets the iterative decoding convergence condition, the termination counter is incremented by one.

[0106] Combined with the example in the above steps, the current count ρ of the termination counter is 2. When the fluctuation coefficient of the absolute value mean of the extrinsic information decoded from the 3rd to the 9th iteration is greater than α, the termination counter needs to be cleared, that is, the value ρ of the termination counter becomes 0. If the fluctuation coefficient of the absolute value mean of the extrinsic information decoded from the 4th to the 10th iteration is less than α, the value of the termination counter becomes 1.

[0107] Step 610, obtaining decoding performance requirements, where the decoding performance requirements include decoding block error rate requirements and decoding speed requirements.

[0108] Optionally, in an embodiment of the present application, it is necessary to obtain a decoding performance requirement in order to subsequently determine the counting threshold of the termination counter, and the decoding performance requirement includes a decoding block error rate requirement and a decoding speed requirement. Among them, the higher the decoding block error rate requirement, the lower the block error rate to be achieved by decoding. The decoding block error rate requirement can be represented by the decoding block error rate upper limit. For example, if the decoding block error rate upper limit is 10%, it is determined that the decoding block error rate requirement is low; if the decoding block error rate upper limit is 1%, it is determined that the decoding block error rate requirement is high.

[0109] Optionally, the decoding speed may be determined according to the type of service to which the decoding is applied. In a possible implementation, the correspondence between the service type and the decoding speed level may be pre-stored, and then the decoding speed requirement may be determined according to the service to which the current decoding is applied. Schematically, as shown in Table 2:

[0110] Table 2

[0111] Business Type Decoding speed Voice call service fast Video call service medium SMS service Low speed

[0112] Step 611, determining a counting threshold according to a decoding performance requirement, wherein the counting threshold is positively correlated with a decoding block error rate requirement, and the counting threshold is negatively correlated with a decoding speed requirement.

[0113] In the embodiment of the present application, the counting threshold of the termination counter is related to the decoding performance requirement. In one possible implementation, the counting threshold is determined according to the decoding block error rate requirement, and the decoding block error rate requirement is positively correlated with the counting threshold. When the decoding block error rate requirement is higher, it indicates that the decoding accuracy is required to be higher, and a larger counting threshold needs to be set to ensure the decoding accuracy. For example, when the upper limit of the decoding block error rate is 1%, the counting threshold can be set to 5, and when the upper limit of the decoding block error rate is 10%, the counting threshold can be set to 2.

[0114] In another possible implementation, the counting threshold is determined according to the decoding speed requirement, and the decoding speed requirement is negatively correlated with the counting threshold. When the decoding speed requirement is higher, it is necessary to terminate the iterative decoding as soon as possible, and a smaller counting threshold can be set to increase the decoding speed. For example, if the current service type is a voice call service, the counting threshold can be set to 2, and if the current service type is a text message service, the counting threshold can be set to 5.

[0115] Step 612: in response to the count of the termination counter reaching the count threshold, stop iterative decoding.

[0116] In a possible implementation, when the count of the termination counter reaches the count threshold, it indicates that the averages of the absolute values ​​of the most recent n times all meet the iterative decoding convergence condition, and the external information continues to be in a stable state, and the iterative decoding needs to be stopped at this time. That is, ρ>ρ th When , stop iterative decoding, ρ th is the counting threshold.

[0117] In the embodiment of the present application, the fluctuation coefficient is used to measure the stability of the external information. In order to ensure that the external information is continuously in a stable state, the fluctuation coefficient of the average of multiple n absolute values ​​is judged. When the iterative decoding convergence condition is met, the termination counter is updated. When the count of the termination counter reaches a certain value, the iterative decoding is stopped, thereby further ensuring the decoding performance and guaranteeing the decoding block error rate requirement.

[0118] The above method is applied to Turbo decoding, and the first decoder and the second decoder are MAP DCC, and the decoded bits output by the first decoder and the second decoder are subjected to CRC check. In an illustrative example, the complete process of the above decoding method is as follows: Figure 7 shown.

[0119] Step 701, the first MAP DCC or the second MAP DCC is decoded;

[0120] Step 702, outputting decoded bits and external information;

[0121] Step 703, check whether the maximum number of iterations has been reached, if so, execute step 712, if not, execute step 704;

[0122] Step 704, perform CRC check on the decoded bits, if successful, execute step 712, if failed, execute step 705;

[0123] Step 705, calculating the absolute mean of the external information and storing it;

[0124] Step 706, checking whether the stored absolute value means reaches n, if so, executing step 707;

[0125] Step 707, calculating the mean and variance of the n absolute value means to obtain the coefficient of fluctuation;

[0126] Step 708, determine whether the fluctuation coefficient is less than α, if so, execute step 709, if so, execute step 710;

[0127] Step 709, the termination counter is incremented by one;

[0128] Step 710, clearing the termination counter;

[0129] Step 711, detect whether the count of the termination counter is greater than ρ, if greater, execute step 712, if less, execute step 701;

[0130] Step 712, stop iterative decoding.

[0131] Please refer to Figure 8 , which shows a structural block diagram of a decoding device provided by an embodiment of the present application. The device includes:

[0132] The decoding circuit 801 is used to obtain the decoding bits and external information output by the current decoder during iterative decoding of the code block, where the current decoder is the first decoder or the second decoder performing iterative decoding;

[0133] A check circuit 802 is used for obtaining an absolute value average of the extrinsic information obtained by the latest n iterative decodings in response to the decoded bit failing the check, where n is an integer greater than or equal to 2;

[0134] The control circuit 803 is used to stop iterative decoding in response to the n absolute value means satisfying the iterative decoding convergence condition.

[0135] Optionally, the control circuit 803 is further used for:

[0136] Determine a fluctuation coefficient according to the mean and variance of the n absolute value means, wherein the fluctuation coefficient is used to characterize the stability of the external information;

[0137] In response to the fluctuation coefficient being less than a fluctuation coefficient threshold, iterative decoding is stopped.

[0138] Optionally, the decoding circuit 801 is further configured to obtain a code block size of the code block;

[0139] Optionally, the control circuit 803 is further configured to determine the fluctuation coefficient threshold according to the code block size, and the fluctuation coefficient threshold is negatively correlated with the code block size.

[0140] Optionally, the control circuit 803 is further used for:

[0141] In response to the fluctuation coefficient being less than the fluctuation coefficient threshold, updating a termination counter;

[0142] In response to the count of the termination counter reaching a count threshold, iterative decoding is stopped.

[0143] Optionally, the decoding circuit 801 is further used to obtain decoding performance requirements, where the decoding performance requirements include decoding block error rate requirements and decoding speed requirements.

[0144] Optionally, the control circuit 803 is further used to determine the counting threshold according to the decoding performance requirement, wherein the counting threshold is positively correlated with the decoding block error rate requirement, and the counting threshold is negatively correlated with the decoding speed requirement.

[0145] Optionally, the control circuit 803 is further configured to clear the termination counter in response to the fluctuation coefficient being greater than the fluctuation coefficient threshold.

[0146] Optionally, the decoding circuit 801 is also used to update the number of iterative decoding times.

[0147] Optionally, the control circuit 803 is further configured to stop iterative decoding in response to the number of iterative decoding times reaching a maximum number of iterative decoding times.

[0148] Optionally, the first decoder and the second decoder in the decoding device are MAP DCC decoders, the code block is obtained by Turbo code encoding, and the decoding bit verification method is CRC verification.

[0149] In an embodiment of the present application, the decoded bits obtained by decoding the first decoder or the second decoder are first checked. If the check fails, the absolute value mean of the external information of the most recent n iterative decodings is obtained. Since the external information tends to be stable during the iterative decoding process, the embodiment of the present application uses the absolute value mean of the external information to determine whether the iterative decoding convergence condition is met. When the condition is met, the iterative decoding is stopped to ensure good decoding performance, and there is no need to wait for the iterative decoding number to reach the maximum iterative decoding number, thereby reducing the decoding delay and achieving the effect of improving the decoding speed.

[0150] In the embodiment of the present application, the fluctuation coefficient is used to measure the stability of the external information. In order to ensure that the external information is continuously in a stable state, the fluctuation coefficient of the average of multiple n absolute values ​​is judged. When the conditions are met, the termination counter is updated. When the count of the termination counter reaches a certain value, the iterative decoding is stopped, thereby further ensuring the decoding performance and guaranteeing the decoding block error rate requirements.

[0151] An embodiment of the present application also provides a communication chip, which executes the above decoding method.

[0152] Please refer to Fig. 9 , which shows a schematic diagram of the structure of a network device provided by an exemplary embodiment of the present application. The communication device includes a processor 901, a memory 902 and a transceiver 903, and the processor 901 is connected to the transceiver 903 and the memory 902 respectively. The processor 901 includes a communication chip as provided in the above embodiment.

[0153] The processor 901 may include one or more processing cores. The processor 901 uses various interfaces and lines to connect the various parts of the entire network device, and executes various functions of the network device and processes data by running or executing instructions, programs, code sets or instruction sets stored in the memory 902, and calling data stored in the memory 902. Optionally, the processor 901 can be implemented in at least one hardware form of digital signal processing (DSP), field programmable gate array (FPGA), and programmable logic array (PLA). The processor 901 can integrate one or more combinations of a central processing unit (CPU), a graphics processing unit (GPU), a neural network processor (NPU), and a modem. Among them, the CPU mainly processes the operating system, user interface, and application programs; the GPU is responsible for rendering and drawing the content that needs to be displayed on the touch display; the NPU is used to implement artificial intelligence (AI) functions; and the modem is used to process wireless communications. It is understandable that the above-mentioned modem may not be integrated into the processor 901, but may be implemented by a separate chip. And the processor 901 includes the communication chip provided in the above-mentioned embodiment.

[0154] The memory 902 may include a random access memory (RAM) or a read-only memory (ROM). Optionally, the memory 902 includes a non-transitory computer-readable storage medium. The memory 902 may be used to store instructions, programs, codes, code sets, or instruction sets. The memory 902 may include a program storage area and a data storage area, wherein the program storage area may store instructions for implementing an operating system, instructions for at least one function (such as a touch function, a sound playback function, an image playback function, etc.), instructions for implementing the following various method embodiments, etc.; the data storage area may store data created according to the use of the network device (such as audio data, a phone book), etc.

[0155] The transceiver 903 may be implemented as a communication component, which may be a chip.

[0156] Those skilled in the art should be aware that in one or more of the above examples, the functions described in the embodiments of the present application can be implemented with hardware, software, firmware, or any combination thereof. When implemented using software, these functions can be stored in a computer-readable medium or transmitted as one or more instructions or codes on a computer-readable medium. Computer-readable media include computer storage media and communication media, wherein the communication media include any media that facilitates the transmission of a computer program from one place to another. The storage medium can be any available medium that a general or special-purpose computer can access.

[0157] The above description is only an optional embodiment of the present application and is not intended to limit the present application. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present application shall be included in the protection scope of the present application.

Claims

1. A decoding method, characterized in that: The method comprises: During iterative decoding of a code block, a decoded bit and external information output by a current decoder are obtained, wherein the current decoder is a first decoder or a second decoder performing iterative decoding, and the external information refers to reliability information extracted from each bit using codeword correlation between decoded bits; In response to the decoded bit failing the check, obtaining an absolute value average of the extrinsic information obtained by the most recent n iterative decodings, where n is an integer greater than or equal to 2; Determine a fluctuation coefficient according to the mean and variance of the n absolute value means, wherein the fluctuation coefficient is used to characterize the stability of the external information; In response to the fluctuation coefficient being less than a fluctuation coefficient threshold, updating a termination counter, the fluctuation coefficient threshold being negatively correlated with a code block size; In response to the fluctuation coefficient being greater than the fluctuation coefficient threshold, clearing the termination counter; In response to the count of the termination counter reaching a count threshold, iterative decoding is stopped, and the count threshold is determined according to a decoding performance requirement, wherein the count threshold is positively correlated with a decoding block error rate requirement of the decoding performance requirement, and the count threshold is negatively correlated with a decoding speed requirement of the decoding performance requirement.

2. The method according to claim 1, characterized in that After obtaining the decoded bits and external information output by the current decoder, the method further includes: Update the number of iterative decoding times; In response to the iterative decoding number reaching the maximum iterative decoding number, the iterative decoding is stopped.

3. The method according to claim 1, characterized in that The first decoder and the second decoder are maximum a posteriori probability convolutional code decoders MAP DCC, the code blocks are obtained by Turbo code encoding, and the verification method of the decoded bits is cyclic redundancy check CRC.

4. A decoding device, characterized in that: The device comprises: A decoding circuit, used for obtaining decoding bits and external information output by a current decoder during iterative decoding of a code block, wherein the current decoder is a first decoder or a second decoder for iterative decoding, and the external information refers to reliability information extracted for each bit by using codeword correlation between decoding bits; A verification circuit, configured to obtain, in response to the decoding bit failing verification, an absolute value average of the extrinsic information obtained by the most recent n iterative decodings, where n is an integer greater than or equal to 2; A control circuit, used for determining a fluctuation coefficient according to a mean and a variance of the n absolute value means, wherein the fluctuation coefficient is used for characterizing the stability of the external information; Also used for, in response to the fluctuation coefficient being less than a fluctuation coefficient threshold, updating a termination counter, the fluctuation coefficient threshold being negatively correlated with a code block size; In response to the fluctuation coefficient being greater than the fluctuation coefficient threshold, clearing the termination counter; In response to the count of the termination counter reaching a count threshold, iterative decoding is stopped, and the count threshold is determined according to a decoding performance requirement, wherein the count threshold is positively correlated with a decoding block error rate requirement of the decoding performance requirement, and the count threshold is negatively correlated with a decoding speed requirement of the decoding performance requirement.

5. A communication chip, characterized in that: The communication chip is used to implement the decoding method as described in any one of claims 1 to 3.

6. A network device, characterized in that: The network device comprises a processor, a memory and a transceiver, wherein the processor is connected to the transceiver and the memory respectively; The processor comprises the communication chip as claimed in claim 5.

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