VCSEL array with small pulse delay
By designing a symmetric current path arrangement structure in the VCSEL array, the problem of instability in short pulse emission delay is solved, and the accuracy and reliability of time-of-flight measurement are improved.
Patent Information
- Application Number
- CN201980043128.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2018-06-26
- Filing Date
- 2019-06-17
- Publication Date
- 2025-02-18
- Estimated Expiration
- 2039-06-17
AI Technical Summary
The existing VCSEL arrays have problems of delay instability in short pulse emission, which affects the accuracy of time-of-flight measurement.
By designing a symmetric current path arrangement structure in the VCSEL array, the combination of the first electrical contact body and the second electrical contact body is used to ensure that the current path has rotational symmetry, mirror symmetry or translational symmetry, thereby reducing the different current paths Impedance changes.
Reduced delay of optical pulses, improved reliability and accuracy of time-of-flight measurements, and simplified the design of the analytical evaluator.
Smart Images
Figure CN112335143B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to a vertical cavity surface emitting laser (VCSEL) array with small pulse delay, an illumination device comprising such a VCSEL array, a time-of-flight camera comprising such a VCSEL array or illumination device, and a method for manufacturing a VCSEL array. Background Art
[0002] A laser arrangement comprising a laser, in particular a VCSEL array, can be used for infrared illumination. Using short pulses, the VCSEL array is used, for example, in time-of-flight applications. Such applications include, for example, close-range gesture recognition and 3D spatial recognition for portable devices. For such applications, VCSEL arrays with an area of about 1 mm2 with an output power in the range of 1-10 W are discussed. The reliability of the measurement depends on the precise timing of the short pulses emitted by the VCSEL array.
[0003] US2015 / 0071320A1 discloses a method for manufacturing a VCSEL module, the VCSEL module comprising at least one VCSEL chip having a plurality of VCSEL units and a common carrier structure. The method comprises dividing the VCSEL chip into a plurality of sub-arrays, each sub-array having at least one VCSEL unit, and at least some of the sub-arrays being electrically connected in series. Summary of the invention
[0004] It is an object of the present invention to provide a VCSEL array with improved reliability.
[0005] According to a first aspect, a vertical cavity surface emitting laser (VCSEL) array is provided. The VCSEL array comprises at least two VCSEL subarrays. Each VCSEL subarray comprises a plurality of VCSELs arranged on a substrate. The at least two VCSEL subarrays are electrically contacted by means of a first electrical contact arrangement structure common to the VCSELs in the corresponding VCSEL subarrays and a second electrical contact arrangement structure. The second electrical contact arrangement structure comprises a plurality of second electrical contacts, each of which individually contacts a corresponding single VCSEL in the corresponding VCSEL subarray. Each second electrical contact comprises a second metal-semiconductor interface to a second semiconductor layer of a relevant VCSEL in the plurality of VCSELs. The second electrical contact is arranged to be able to electrically pump a relevant VCSEL in the plurality of VCSELs along a current path to the first electrical contact arrangement structure. The current path between the first electrical contact arrangement structure and the second electrical contact through the plurality of VCSELs is characterized by having at least one symmetry selected from the group of rotational symmetry, mirror symmetry and translational symmetry.
[0006] Compared with an asymmetric arrangement, the symmetry of the current paths, or in other words, the symmetry of the arrangement of the contacts that provide current to the VCSELs within the subarray, can avoid or at least limit impedance variations along different current paths. The smaller the impedance variation (particularly the different resistances and inductances of the current paths across different VCSELs), the smaller the potential delay of the light pulses emitted by the different VCSELs included in the corresponding subarray. Because the start time of the light pulse is required to be combined with the reception time of the reflected laser to determine the flight time (round trip time), the smaller the delay of the light pulses between different VCSELs, the more accurate the measurement result of the flight time in the field of view of the VCSEL array. In addition, because the different start times of the light pulses do not need to be considered, the design of the analytical evaluator for analyzing and evaluating the flight time can be simplified. The VCSEL array can include two, three, four or more VCSEL subarrays.
[0007] The current path is defined by a path between an electrical contact that individually contacts each single VCSEL and one or more electrical contacts that provide a common electrical contact for each VCSEL subarray. Each VCSEL comprises an optical resonator, the optical resonator comprising a first DBR, an active layer, and a second DBR (and optionally some intermediate support layers, such as current apertures, matching layers, etc.). Thus, each current path comprises a path through the optical resonator of the corresponding VCSEL and a path to a common electrical contact, such as through a substrate or a current distribution layer. The first electrical contact arrangement may, for example, comprise a first electrical contact structure electrically connected to at least one first electrical contact. The first electrical contact is arranged to be able to electrically contact the substrate or the current distribution layer. In this embodiment, the current path is defined between a contact region (metal-semiconductor interface) of the at least one first electrical contact to the optical resonator (e.g., via the substrate or current distribution layer in one of the DBRs) and a contact region (metal-semiconductor interface) of the second electrical contact. The arrangement of the first electrical contact and the second electrical contact determines the symmetry of the current path, and is thus characterized by having the same symmetry.
[0008] The substrate of the at least two VCSEL subarrays may be a common substrate. The current path between the first electrical contact arrangement structure of the first VCSEL subarray and the second electrical contact of the multiple VCSELs of the first VCSEL subarray and the current path between the second electrical contact arrangement structure of the second VCSEL subarray and the second electrical contact of the multiple VCSELs of the second VCSEL subarray are characterized by having at least one symmetry selected from the group of rotational symmetry, mirror symmetry and translational symmetry. The symmetry is also obtained by the position of the corresponding contacts. Arranging the two subarrays symmetrically on the same substrate can further reduce the potential delay of the start time of the light pulse, thereby improving the reliability of the time of flight measurement results. The VCSEL array may include two, three, four or more groups of first VCSEL subarrays and second VCSEL subarrays symmetrically arranged on a common substrate.
[0009] The first electrical contact arrangement and the second electrical contact arrangement may be arranged on the same side of the base body.
[0010] The first electrical contact arrangement may be arranged to provide a cathode contact to the VCSEL. In this case, the second electrical contact arrangement is arranged to provide an anode contact to the VCSEL. If the substrate is n-doped (e.g., a gallium arsenide growth substrate that can be provided at high quality and low cost), the first electrical contact arrangement may be arranged to contact the substrate.
[0011] According to an alternative embodiment, the first electrical contact arrangement may be arranged to provide an anode contact to the VCSEL. In this embodiment, the second electrical contact arrangement is arranged to provide a cathode contact to the VCSEL. In this embodiment, the VCSEL may include a tunnel diode. This arrangement may be useful for reducing electrical losses, as described, for example, in EP0986846B1, incorporated herein by reference.
[0012] The first VCSEL sub-array and the second VCSEL sub-array and any other VCSEL sub-arrays comprised by the VCSEL array may be electrically contacted via a common first electrical contact arrangement.
[0013] The current paths may be arranged such that the length of the longest current path along the substrate and the corresponding VCSEL is less than 4 times, preferably less than 2 times and most preferably less than 1.5 times the length of the shortest current path along the substrate and the corresponding VCSEL. The current paths may be arranged such that the difference in electrical impedance of different current paths along the substrate and the corresponding VCSEL is less than 50% of the minimum impedance of the current path, more preferably less than 20% of the minimum impedance of the current path and most preferably less than 10% of the minimum impedance of the current path.
[0014] The current paths may be arranged so that the electrical impedance along the current paths of the respective VCSELs of the first VCSEL subarray is the same as the electrical impedance along the current paths of the respective VCSELs of the second VCSEL subarray. The symmetry of the current paths may be arranged so that the impedances of the paired VCSEL subarrays are substantially the same (up to production tolerances).
[0015] The current paths may in particular be arranged such that the electrical impedance along the current paths of the individual VCSELs is substantially the same (up to production tolerances). The VCSELs may be arranged around a common first electrical contact, for example, in a rotationally symmetrical arrangement. According to an alternative embodiment, the VCSELs may be arranged in a linear arrangement along an elongated first electrical contact.
[0016] The VCSEL may be a bottom emitter arranged to enable laser emission through or in the direction of the substrate if the substrate is (e.g. partially) removed to avoid or at least reduce absorption of the emitted laser light. In this case, the VCSEL array may be characterized by having a flip-chip arrangement comprising a plurality of bumps. The bumps are arranged to enable mounting the VCSEL array on a carrier. The bumps are further arranged to enable electrical connection to a first electrical contact arrangement and a second electrical contact arrangement. The bumps are arranged on a side of the substrate opposite to the light emitting side of the VCSEL array. The flip-chip arrangement may enable simplified assembly of a device comprising a VCSEL array.
[0017] The bumps may be arranged in a regular pattern. The regular pattern may support overall symmetry of impedance or current paths out of the optical resonator and the substrate to reduce variations or differences in overall impedance within a device including the VCSEL array.
[0018] A VCSEL array including a bottom emitting VCSEL may include at least one optical structure. The optical structure may be etched in a side of the substrate opposite to the side on which the VCSEL is arranged. The optical structure is arranged to be able to transform laser light emitted by the VCSEL array during operation of the VCSEL array. The optical structure is mechanically protected by a protective structure, the protective structure comprising a substrate material comprised by the substrate. The protective structure is arranged to avoid mechanical contact with the optical structure. The optical structure may, for example, be arranged to be able to transform the laser light by focusing and / or redirecting the laser light. The optical structure may include a single optical element or a plurality of optical elements arranged to individually transform the laser light emitted by the VCSEL. The highest point of the protective structure may define a plane that does not intersect the optical structure. The protective structure may surround the optical structure or a portion of the optical structure.
[0019] The protective structure may be aligned with the bumps so that when a force perpendicular to the plane of the VCSEL array is applied to the protective structure, the bending of the substrate between the two bumps is reduced. The alignment of the protective structure with the bumps may transfer the force applied to the VCSEL array directly to a carrier to which the VCSEL array may be mounted by means of the bumps. The plane of the VCSEL array may be a plane parallel to one of the surfaces of the substrate.
[0020] According to an alternative embodiment, the VCSEL may be a top emitter. The VCSEL may be arranged to be able to emit laser light in a direction away from the substrate. In this embodiment, the VCSEL array may, for example, include electrical contact pads arranged to be able to electrically contact the first electrical contact arrangement and the second electrical contact arrangement by means of wire bonding.
[0021] According to a second aspect, a light emitting device is provided. The light emitting device comprises at least one VCSEL array as described above and an electric driver for electrically driving the VCSEL. The light emitting device may further comprise a controller for providing a control signal for controlling the electric driver. The controller may, for example, comprise a storage device for storing data and a processing device for executing instructions comprised by the stored data. The stored data may, for example, comprise a sequence for providing an electric drive current to the VCSEL or a VCSEL subarray.
[0022] VCSEL arrays or lighting devices can be used in consumer devices (e.g., smartphones), vehicles, and high-power industrial applications to support gesture interfaces or 3D scanning in consumer and portable applications such as smartphones, laptops, tablets, etc.
[0023] User interfaces or indoor navigation for robotics, sports, industry, lighting, ...
[0024] For high-end applications in automotive mid-range detection (parking assistance, safe city driving),
[0025] High power industrial applications.
[0026] According to a third aspect, a time-of-flight camera is provided. The time-of-flight camera comprises a VCSEL array or a light emitting device according to any of the embodiments described above, a photodetector, an optional optical arrangement structure and an analytical evaluator. The optical arrangement structure can be arranged to focus the transformed laser light emitted by the laser arrangement structure and reflected by the object to the photodetector. The analytical evaluator is arranged to determine the distance to the object by means of an image of the transformed laser light detected by the photodetector.
[0027] According to a fourth aspect, a method for manufacturing or constructing a VCSEL array according to any of the embodiments described above is provided. The method comprises the following steps:
[0028] A vertical cavity surface emitting laser (VCSEL) array is provided, wherein the vertical cavity surface emitting laser includes at least two VCSEL sub-arrays, wherein each VCSEL sub-array includes a plurality of VCSELs arranged on a substrate,
[0029] The at least two VCSEL subarrays are electrically contacted by means of a first electrical contact arrangement common to the VCSELs in the respective VCSEL subarrays and a second electrical contact arrangement, wherein the second electrical contact arrangement comprises a plurality of second electrical contacts, each second electrical contact individually contacting a respective single VCSEL in the respective VCSEL subarray, wherein each second electrical contact comprises a second metal-semiconductor interface to a second semiconductor layer of a respective VCSEL of the plurality of VCSELs, wherein the second electrical contacts are arranged to enable electrical pumping of the respective VCSEL along a current path to the first electrical contact arrangement,
[0030] The first electrical contact arrangement and the second electrical contact are arranged such that a current path between the first electrical contact arrangement and the second electrical contact via the plurality of VCSELs is characterized by at least one symmetry selected from the group of rotational symmetry, mirror symmetry and translational symmetry.
[0031] These steps do not necessarily have to be performed in the order given above. The different layers comprised by the VCSEL array may be deposited by epitaxial methods, such as MOCVD, MBE, etc. The method may comprise further steps for manufacturing any of the VCSEL arrays described above.
[0032] It should be understood that the VCSEL array, the light emitting device, and the method of manufacturing the VCSEL array have similar and / or identical embodiments.
[0033] Further advantageous embodiments are defined below. BRIEF DESCRIPTION OF THE DRAWINGS
[0034] These and other aspects of the invention will be apparent from and elucidated with reference to the embodiments described hereinafter.
[0035] The present invention will now be described by way of example based on embodiments with reference to the accompanying drawings.
[0036] In the attached picture:
[0037] Figure 1 A schematic diagram of a first cross section of a VCSEL array is shown.
[0038] Figure 2 A schematic diagram of a second cross section of a VCSEL array is shown.
[0039] Figure 3 A schematic diagram showing a cross section of a second VCSEL array is shown.
[0040] Figure 4 A schematic diagram of a third VCSEL array is shown.
[0041] Figure 5 A schematic diagram of a fourth VCSEL array is shown.
[0042] Figure 6 A schematic diagram of a fifth VCSEL array is shown.
[0043] Figure 7 A schematic diagram of a sixth VCSEL array is shown.
[0044] Figure 8 A schematic diagram of the lighting device is shown.
[0045] Fig. 9 A simplified schematic diagram of a time-of-flight camera is shown.
[0046] Fig.10 A schematic diagram of a method for manufacturing a VCSEL array is shown.
[0047] In the drawings, like reference numerals refer to like objects throughout. Objects in the drawings are not necessarily drawn to scale. DETAILED DESCRIPTION
[0048] Various embodiments of the present invention will now be described with the aid of the accompanying drawings.
[0049] Figure 1 A schematic diagram of a first cross section of a first VCSEL array 100 is shown. The cross section of the VCSEL array 100 shows four bottom emitting VCSELs fabricated on a gallium arsenide substrate 110. Each VCSEL includes an optical resonator including a first DBR 115, an active layer 120, and a second DBR 135. The first DBR 115 is fabricated on the substrate 110, and the active layer 120 is sandwiched between the first DBR 115 and the second DBR 135. The first DBR 115 and the second DBR 135 include multiple pairs of layers with different refractive indices to provide reflectivity. The active layer 120 may include one or more quantum well layers (not shown). The optical resonator is characterized by a mesa structure that is etched down to the middle layer of the first DBR 115. The uppermost layer of the second DBR of each mesa is covered by a second electrical contact 150 that contacts each VCSEL individually. The side of the substrate 110 opposite to the processing side on which the optical resonator is processed is etched so that each VCSEL is associated with a corresponding optical structure 170. The optical structure 170 is a lens that is off-center relative to the center line of the associated VCSEL perpendicular to the substrate 110. The lens is arranged to be able to focus the laser light 10 emitted during operation of the VCSEL array 100 and to spread the laser light 10 to illuminate a defined field of view. Figure 2 One example of electrical contacting of the substrate 110 is discussed.
[0050] Figure 2 The VCSEL array 100 is shown with respect to Figure 1 Schematic diagram of a second section perpendicular to the section in question. Figure 2The electrical contacting of a single VCSEL subarray comprised by the VCSEL array 100 is shown. The optical device 170 (lens) etched in the substrate 110 is delimited by a protective structure 190, which in this embodiment comprises the original surface of the substrate 110. The protective structure 190 avoids or at least reduces the risk that the lens will be touched. The substrate 110 is electrically contacted by etching a hole in the first DBR 115. The electrical isolator 108 is deposited and then partially removed so that a first electrical contact 107 comprising a conductive material (metal) is deposited to provide electrical contact with the substrate 110. The first electrical contact 107 is separated from the first DBR 115 by means of the electrical isolator 108. The first electrical contact structure 105 (e.g., a metal layer) is then deposited and structured to enable electrical contact with the substrate 110. In this embodiment, the first electrical contact arrangement comprises the first electrical contact structure 105 and the first electrical contact 107. The first electrical contact 107 shares an interface with the substrate 110, which is the so-called contact region (metal-semiconductor interface). In this embodiment, the current path is defined by a path starting at the contact region, passing through the substrate 110 and ending at the contact region (metal-semiconductor interface) of the second electrical contact 150 after passing through the first DBR 115, the active layer 120 and the second DBR 135. The current path is not a single one-dimensional line, but describes the path along which most of the current flows from the contact region to the corresponding second electrical contact 150. Each VCSEL may include other layers not shown, such as current holes, stress matching layers, etc. The first electrical contact arrangement structure 105, 107 and the second electrical contact arrangement structure 150, 155 are arranged on the same side of the substrate 110.
[0051] Figure 3 A schematic diagram of a cross section of a second VCSEL array 100 is shown. Figure 2 Similar to the discussion, only one VCSEL subarray of the VCSEL array 100 is shown. In this case, the VCSEL array 100 includes a plurality of top-emitting VCSELs that emit laser light 10 in a direction away from the substrate 110. Each VCSEL includes a VCSEL array 100 having a plurality of top-emitting VCSELs that emit laser light 10 in a direction away from the substrate 110. Figure 1The optical resonator discussed is arranged in a table as discussed above. The substrate 110 is also contacted by means of a first electrical contact arrangement structure, which in this case includes a first electrical contact structure 107 with a metal-semiconductor interface and one layer (current distribution layer) of the first DBR 115. The second electrical contact 150 (metal contact) is electrically contacted with the uppermost layer of the second DBR 135 and is electrically isolated from the active layer and the first DBR 115 by means of an electrical isolator 108. The second electrical contact 150 is annular in shape so that the laser light 10 is emitted through the opening of the contact ring. The current path is defined by a path starting at the contact area (metal-semiconductor interface) between the current distribution layer and the first electrical contact 107, passing through the current distribution layer and terminating at the contact area (metal-semiconductor interface) of the second electrical contact 150 after passing through the first DBR 115, the active layer 120 and the second DBR 135.
[0052] Figure 4 A schematic diagram of a third VCSEL array 100 is shown. Figure 4 A top view of a second VCSEL array 100 is shown, comprising bottom emitting VCSELs arranged in six VCSEL sub-arrays. The electrical contacts of the VCSELs are Figure 2 The third VCSEL array 100 includes a substrate 110 on which the optical resonators of the VCSELs are fabricated. Figure 1 and Figure 2 As discussed, each VCSEL is electrically contacted by a circular second electrical contact 150 covering the uppermost layer of the second DBR 135. The second electrical contacts 150 of the VCSELs included in one VCSEL subarray are electrically connected to each other by means of an L-shaped second electrical contact structure 155. In this embodiment, the second electrical contact 150 and the second electrical contact structure 155 are constructed as a second electrical contact arrangement structure. In this embodiment, each VCSEL subarray includes a separate first electrical contact arrangement structure, as described with respect to Figure 2 As described, the first electrical contact arrangement structure includes a first electrical contact structure 105 in contact with two circular first electrical contacts 107. The first electrical contacts 107 and the second electrical contacts 150 of each VCSEL subarray are arranged so that the current paths of the four upper VCSELs and the four lower VCSELs have mirror symmetry. In addition, the current paths between adjacent VCSEL subarrays (e.g., between the first VCSEL subarray and the second VCSEL subarray) are symmetrical. Figure 4The second VCSEL array also includes bumps 159 arranged in a regular pattern. Each first electrical contact arrangement 105, 107 and second electrical contact arrangement 150, 155 is connected to the VCSEL array by a corresponding bump 159 (see also FIG. 1 ). Figure 8 The material, shape and thickness of the first electrical contact arrangement 105, 107 and the second electrical contact arrangement 150, 155 are selected to minimize the contribution to the overall impedance.
[0053] Figure 5 FIG. 1 shows a schematic diagram of a fourth VCSEL array 100. Figure 4 The VCSEL array 100 comprises eight VCSEL subarrays. The six VCSEL subarrays arranged in the middle of the VCSEL array are arranged such that two VCSEL subarrays are arranged around a common first electrical contact arrangement structure 105, 107. The outer VCSEL subarrays each comprise a separate first electrical contact arrangement structure 105, 107. The symmetry is substantially the same as with respect to Figure 4 The VCSEL array 100 surrounds Figure 5 The plane perpendicular to the central axis is rotated 180° to produce Figure 5 The same picture as shown in .
[0054] Figure 6 1 shows a schematic diagram of the fifth VCSEL array 100. The overall structure is also similar to that of Figure 4 and Figure 5 The two VCSEL subarrays are arranged around a common first electrical contact arrangement 105, 107. In this embodiment, the first electrical contact 107 is rectangular and extends parallel to the longitudinal extension direction of the VCSELs included in the VCSEL subarray. Therefore, the electrical impedance of the current path between the contact areas of the first electrical contact 107 and the second electrical contact 150 is substantially the same. In this embodiment, each first electrical contact arrangement 105, 107 and the second electrical contact arrangement 150, 155 is connected to the VCSEL subarray by two corresponding bumps 159 (see also Figure 8 The electrical conductivity of the first electrical contact structure 105 and the second electrical contact structure 155 is preferably high (eg, metal layers) so that the contribution to the overall impedance is low (substantially negligible).
[0055] Figure 7 A schematic diagram of a sixth VCSEL array 100 is shown. Figure 7 Shown with Figure 4 , Figure 5 and Figure 6 A similar top view of a sixth VCSEL array 100 includes bottom emitting VCSELs arranged in nine VCSEL sub-arrays. The electrical contacts of the VCSELs are Figure 2 The fifth VCSEL array 100 includes a substrate 110 on which the optical resonators of the VCSELs are fabricated. Figure 1 and Figure 2 As discussed, each VCSEL is electrically contacted by a circular second electrical contact 150 covering the uppermost layer of the second DBR 135. The second electrical contacts 150 of the VCSELs included in one VCSEL subarray are electrically connected to each other by means of a circular second electrical contact structure 155. In this embodiment, the second electrical contact 150 and the second electrical contact structure 155 are constructed as a second electrical contact arrangement. In this embodiment, as described with reference to Figure 2 As described, each VCSEL subarray includes a separate first electrical contact arrangement structure, the first electrical contact arrangement structure includes a circular first electrical contact structure 105, and the first electrical contact structure contacts a circular first electrical contact 107. The first electrical contacts 107 and the second electrical contacts 150 of each VCSEL subarray are arranged so that the current paths of the four VCSELs arranged around the corresponding first electrical contacts 107 have rotational symmetry. In addition, the current paths between adjacent VCSEL subarrays have translational symmetry. The symmetrical arrangement structure within the VCSEL subarray and between the VCSEL subarrays makes the impedance of the current path substantially the same. The sixth VCSEL array 100 also includes bumps 159 arranged in a regular pattern. Each first electrical contact arrangement structure 105, 107 and the second electrical contact arrangement structure 150, 155 is connected to the VCSEL array 100 through a corresponding bump 159 (see also Figure 8 ) electrical contact.
[0056] Figure 8A schematic diagram of a cross section of a lighting device comprising a VCSEL array 100 is shown. The VCSEL array 100 is mounted on a carrier 180 comprising an electric driver 230 by means of bumps 159. The electric driver 230 is arranged to be able to provide a drive current to the VCSEL array 100 via the bumps 159, so that the laser light 10 is emitted by the VCSELs and is focused by means of an optical structure 170 (lens) associated with the respective VCSEL. The lens is protected by means of a protective structure 190 aligned with the bumps 159. Therefore, the mechanical forces applied to the protective structure 190 are substantially completely transferred to the carrier 180 by means of the aligned bumps 159. Therefore, the bending of the base of the VCSEL array 100 between the bumps 159 can be reduced.
[0057] Fig. 9A schematic diagram of a time-of-flight camera 200 is shown. The time-of-flight camera 200 comprises a VCSEL array 100 according to any of the embodiments discussed above. The time-of-flight camera 200 further comprises a detector 221, which is arranged to be able to detect very short light pulses. Such short laser pulses may be caused by a transformed laser light 150 emitted by a laser included in the VCSEL array 100 that strikes an object 300. A portion of the transformed laser light 150 is reflected by the object 300, so that the reflected laser light 202 is received by an optical device 240 (e.g., a lens or a lens arrangement), which images or focuses the received laser light to the detector 221. The reflected laser light 202 causes a corresponding electrical signal in the detector 221. The electrical driver 230 may be arranged to be able to electrically drive the VCSEL array 100 or, alternatively, electrically drive each VCSEL or VCSEL subarray in the VCSEL array 100, respectively. The controller 250 is connected to the electric driver 230 to control, for example, the start and stop time of emitting laser pulses by the VCSEL array 100. The controller 250 is also connected to the detector 221 to receive the electrical signal caused by the reflected laser light 202 detected by the detector 221. The time-of-flight camera 200 also includes an optional interface 235 to transmit the start and stop time (or corresponding raw data) of the transformed laser light 150 emitted by the corresponding VCSEL or group of VCSELs and the reception time of the electrical signal caused by the reflected laser light 202. The transmitted data can be used to calculate the flight time of the laser light, thereby calculating the distance between the time-of-flight camera 200 and the object 300. Alternatively, the time-of-flight camera 200 may include an analysis and evaluation device (not shown) electrically connected to the controller 250 (or the analysis and evaluation device may include the controller 250 or be included by the controller 250) to determine the distance to the object. Several distance measurements may be used to determine the speed or even acceleration of the object 300. The symmetry of the arrangement of the current paths avoids large differences between the start times of the laser pulses after the corresponding current pulses are supplied to the VCSEL.
[0058] Fig.10A schematic diagram of a method for manufacturing a VCSEL array 100 is shown. In step 410, a vertical cavity surface emitting laser (VCSEL) array 100 is provided. The VCSEL array 100 comprises at least two VCSEL subarrays, wherein each VCSEL subarray comprises a plurality of VCSELs arranged on a substrate 110. In step 420, at least two VCSEL subarrays are electrically contacted by means of a first electrical contact arrangement 105, 107 and a second electrical contact arrangement 150, 155. The second electrical contact arrangement 150, 155 comprises a plurality of second electrical contacts. The second electrical contact 150 is arranged to be able to electrically pump an associated VCSEL of the plurality of VCSELs along a current path to the first electrical contact arrangement 105, 107. In step 430, a current path between the first electrical contact arrangement 105, 107 and the second electrical contact 150 via the plurality of VCSELs is arranged such that the current path is characterized by at least one symmetry selected from rotational symmetry, mirror symmetry, and translational symmetry.
[0059] While the invention has been illustrated and described in detail in the drawings and foregoing description, such illustration and description are to be considered illustrative or exemplary and not restrictive.
[0060] From reading this disclosure, other modifications will be apparent to persons skilled in the art.Such modifications may involve other features which are already known in the art and which may be used instead of or in addition to features already described herein.
[0061] Variations of the disclosed embodiments may be understood and implemented by those skilled in the art by studying the drawings, the disclosure and the appended claims. In the claims, the word "comprising" does not exclude other elements or steps, and the singular form does not exclude a plurality of elements or steps. The fact that certain measures are recited in mutually different dependent claims does not indicate that a combination of these measures cannot be used to advantage.
[0062] Any reference signs in the claims should not be construed as limiting the scope of the claims.
[0063] List of reference numerals:
[0064] 10 Laser
[0065] 100 Vertical Cavity Surface Emitting Laser (VCSEL) Array
[0066] 105 first electrical contact structure
[0067] 107 first electrical contact
[0068] 108 galvanic isolator
[0069] 110 base
[0070] 115The first distributed Bragg reflector (DBR)
[0071] 120 active layer
[0072] 135 Second DBR
[0073] 150 second electrical contact
[0074] 155 second electrical contact structure
[0075] 159 Bump
[0076] 170 optical structure
[0077] 180 bearing parts
[0078] 190 Protective Structure
[0079] 200 Time of Flight Camera
[0080] 202 reflected laser
[0081] 221 Photodetector
[0082] 230 electric drive
[0083] 235 interface
[0084] 240 Optical Devices
[0085] 250 Controller
[0086] 300 objects
[0087] 410 Steps to set up a VCSEL array
[0088] 420 Step of making electrical contact between at least two VCSEL sub-arrays
[0089] 430 Steps for arranging current paths
Claims
1. A vertical cavity surface emitting laser (VCSEL) array (100), the vertical cavity surface emitting laser array comprising at least two VCSEL sub-arrays, wherein: Each VCSEL subarray comprises a plurality of VCSELs arranged on a substrate (110), wherein the at least two VCSEL subarrays are electrically contacted by means of a first electrical contact arrangement structure (105, 107) common to the VCSELs in the corresponding VCSEL subarrays and a second electrical contact arrangement structure (150, 155), wherein the second electrical contact arrangement structure (150, 155) comprises a plurality of second electrical contacts (150), each second electrical contact (150) individually contacts a corresponding single VCSEL in the corresponding VCSEL subarray, wherein each second electrical contact (150) comprises a plurality of second electrical contacts (150), each second electrical contact (150) individually contacts a corresponding single VCSEL in the corresponding VCSEL subarray, and ... The invention relates to a VCSEL having a second metal-semiconductor interface extending from a first electrical contact to a second semiconductor layer of an associated VCSEL of the plurality of VCSELs, wherein the second electrical contact (150) is arranged to be able to electrically pump the associated VCSEL along a current path to the first electrical contact arrangement (105, 107), wherein the current path between the first electrical contact arrangement (105, 107) and the second electrical contact (150) through the plurality of VCSELs is characterized by having at least one symmetry selected from the group of rotational symmetry, mirror symmetry and translational symmetry, thereby avoiding or at least limiting impedance variations along different current paths.
2. The VCSEL array (100) according to claim 1, wherein: The substrates (110) of the at least two VCSEL sub-arrays are a common substrate (110), wherein: A current path between a first electrical contact arrangement (105, 107) of a first VCSEL subarray and a second electrical contact (150) via a plurality of VCSELs of a first VCSEL subarray and a current path between a second electrical contact arrangement (105, 107) of a second VCSEL subarray and a second electrical contact (150) via a plurality of VCSELs of a second VCSEL subarray are characterized by having at least one symmetry selected from the group of rotational symmetry, mirror symmetry and translational symmetry.
3. The VCSEL array (100) according to claim 1 or 2, wherein: The first electrical contact arrangement (105, 107) comprises at least one first electrical contact (107), wherein the at least one first electrical contact (107) comprises a first metal-semiconductor interface to a first semiconductor layer of the VCSEL array (100), wherein a current path is defined between the first metal-semiconductor interface and a second metal-semiconductor interface.
4. The VCSEL array (100) according to claim 1 or 2, wherein: The first electrical contact arrangement (105, 107) and the second electrical contact arrangement (150, 155) are arranged on the same side of the base body (110).
5. The VCSEL array (100) according to claim 1 or 2, wherein: The current paths are arranged such that the length of the longest current path along the substrate (110) and the corresponding VCSEL is less than 4 times the length of the shortest current path along the substrate (110) and the corresponding VCSEL.
6. The VCSEL array (100) according to claim 5, wherein: The current paths are arranged such that the length of the longest current path along the substrate (110) and the corresponding VCSEL is less than twice the length of the shortest current path along the substrate (110) and the corresponding VCSEL.
7. The VCSEL array (100) according to claim 5, wherein: The current paths are arranged such that the length of the longest current path along the substrate (110) and the corresponding VCSEL is less than 1.5 times the length of the shortest current path along the substrate (110) and the corresponding VCSEL.
8. The VCSEL array (100) according to any one of claims 1, 2, 6 and 7, wherein: The current paths are arranged such that the difference in electrical impedance of different current paths along the substrate (110) and the corresponding VCSEL is less than 50% of the minimum impedance of the current paths.
9. The VCSEL array (100) according to claim 8, wherein: The current paths are arranged such that the difference in electrical impedance of different current paths along the substrate (110) and the corresponding VCSEL is less than 20% of the minimum impedance of the current paths.
10. The VCSEL array (100) according to claim 8, wherein: The current paths are arranged such that the difference in electrical impedance of different current paths along the substrate (110) and the corresponding VCSEL is less than 10% of the minimum impedance of the current paths.
11. The VCSEL array (100) according to any one of claims 1, 2, 6, 7, 9, 10, wherein: The current paths are arranged such that an electrical impedance along the current paths of the respective VCSELs of the first VCSEL subarray is the same as an electrical impedance along the current paths of the respective VCSELs of the second VCSEL subarray.
12. The VCSEL array according to claim 8, wherein: The current paths are arranged so that the electrical impedance along the current paths of the individual VCSELs is the same.
13. The VCSEL array according to claim 11, wherein: The current paths are arranged so that the electrical impedance along the current paths of the individual VCSELs is the same.
14. The VCSEL array (100) according to any one of claims 1, 2, 6, 7, 9, 10, 12, 13, wherein: VCSELs are bottom emitters.
15. The VCSEL array (100) according to claim 14, wherein: The VCSEL array (100) is characterized by a flip chip arrangement structure including a plurality of bumps (159), wherein the bumps (159) are arranged to enable the VCSEL array (100) to be mounted on a carrier (180), wherein the bumps (159) are also arranged to enable electrical connection to a first electrical contact arrangement structure (105, 107) and a second electrical contact arrangement structure (150, 155), and wherein the bumps (159) are arranged on a side of a substrate (110) opposite to a light emitting side of the VCSEL array (100).
16. The VCSEL array (100) of claim 14, comprising at least one optical structure (170), wherein: An optical structure (170) is etched in a side of the substrate opposite to the side on which the VCSELs are arranged, wherein the optical structure (170) is arranged to be able to transform laser light (10) emitted by the VCSEL array (100) during operation of the VCSEL array (100), wherein the optical structure (170) is mechanically protected by a protective structure (190), the protective structure comprising a substrate material comprised by the substrate (110), wherein the protective structure (190) is arranged to be able to avoid mechanical contact with the optical structure (170).
17. The VCSEL array (100) according to claim 16, wherein: The protection structure (190) is aligned with the bumps (159) such that when a force perpendicular to the plane of the VCSEL array (100) is applied to the protection structure (190), bending of the substrate (110) between the two bumps is reduced.
18. A light emitting device comprising at least one VCSEL array (100) according to any one of the preceding claims and an electrical driver (230) for providing an electrical driving current to the VCSELs.
19. A time-of-flight camera (200), comprising the light emitting device according to claim 18 or the VCSEL array (100) according to any one of claims 1 to 17, the time-of-flight camera (200) further comprising a light detector (221) for detecting laser light (10) reflected by an object (300) and an analysis and evaluation device, wherein: The analysis and evaluation device is arranged to be able to determine the distance to the object (300) by means of the laser light (10) detected by the light detector (221).
20. A method for manufacturing a laser arrangement (100), the method comprising the following steps: A vertical cavity surface emitting laser (VCSEL) array (100) is provided, wherein the vertical cavity surface emitting laser array comprises at least two VCSEL sub-arrays, wherein each VCSEL sub-array comprises a plurality of VCSELs arranged on a substrate (110), The at least two VCSEL subarrays are electrically contacted by means of a first electrical contact arrangement (105, 107) common to the VCSELs in the respective VCSEL subarrays and a second electrical contact arrangement (150, 155), wherein the second electrical contact arrangement (150, 155) comprises a plurality of second electrical contacts (150), each second electrical contact (150) individually contacting a respective single VCSEL in the respective VCSEL subarray, wherein each second electrical contact (150) comprises a second metal-semiconductor interface to a second semiconductor layer of a respective VCSEL of the plurality of VCSELs, wherein the second electrical contacts (150) are arranged to enable electrical pumping of the respective VCSEL along a current path to the first electrical contact arrangement (105, 107), The first electrical contact arrangement (105, 107) and the second electrical contact (150) are arranged so that a current path between the first electrical contact arrangement (105, 107) and the second electrical contact (150) via the plurality of VCSELs is characterized by at least one symmetry selected from the group of rotational symmetry, mirror symmetry and translational symmetry, thereby avoiding or at least limiting impedance variations along different current paths.
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