Method, device, electronic equipment and storage medium for resource management

Abstract

Embodiments of the present disclosure provide a method, device, electronic device and computer readable storage medium for resource management. The method comprises determining a plurality of virtual functions to be supported, wherein each of the plurality of virtual functions corresponds to a virtual machine running on a computing device. The method further comprises dividing a set of physical resources into a plurality of subsets of physical resources in a predetermined proportion, the number of the subsets of physical resources being the same as the number of the virtual functions. The method further comprises allocating the plurality of subsets of physical resources to the plurality of virtual functions respectively. Embodiments of the present disclosure can realize virtualization of physical resources in a space division multiplexing manner, with small hardware and software overhead, while improving system security and reliability.

Description

TECHNICAL FIELD

[0001] Embodiments of the present disclosure generally relate to the technical field of computer technology, and more particularly, to a method, apparatus, electronic device and computer readable storage medium for resource management. BACKGROUND

[0002] With the rapid development of cloud computing, modern data centers often use virtualization technology to improve the utilization rate of physical resources of servers. The separation of virtual machine software and hardware can better perform operations such as software management, fault detection and system maintenance. Virtualization technology enables a physical server to run multiple virtual servers, thereby improving the utilization rate of the physical server and greatly reducing the deployment cost of cloud computing.

[0003] Artificial intelligence (AI) computing is widely used in cloud computing, and various graphics processing units (GPUs) or AI acceleration cards are also massively deployed. Through single root input / output (I / O) virtualization (SR-IOV) technology, these acceleration cards can quickly support virtualization. However, there are still many problems to be solved in the traditional scheme of supporting virtual machines by using acceleration cards. SUMMARY

[0004] Embodiments of the present disclosure relate to a method, apparatus, electronic device and computer readable storage medium for resource management.

[0005] In a first aspect of the present disclosure, a method for resource management is provided. The method includes determining a plurality of virtual functions to be supported, wherein each of the plurality of virtual functions corresponds to a virtual machine running on a computing device. The method also includes dividing a set of physical resources into a plurality of subsets of physical resources in a predetermined proportion, the number of the subsets of physical resources being the same as the number of the virtual functions. The method further includes allocating the plurality of subsets of physical resources to the plurality of virtual functions, respectively.

[0006] In a second aspect of the present disclosure, an apparatus for resource management is provided. The apparatus includes a virtual function determining module configured to determine a plurality of virtual functions to be supported, wherein each of the plurality of virtual functions corresponds to a virtual machine running on a computing device. The apparatus also includes a resource set dividing module configured to divide a set of physical resources into a plurality of subsets of physical resources in a predetermined proportion, the number of the subsets of physical resources being the same as the number of the virtual functions. The apparatus further includes a resource subset allocating module configured to allocate the plurality of subsets of physical resources to the plurality of virtual functions, respectively.

[0007] In a third aspect of the disclosure, an electronic device is provided. The electronic device includes one or more processors and a storage device. The storage device is to store one or more programs. When the one or more programs are executed by the one or more processors, the one or more processors implement the method of the first aspect.

[0008] In a fourth aspect of the disclosure, a computer-readable storage medium is provided, having stored thereon a computer program which, when executed by a processor, implements the method of the first aspect.

[0009] In a fifth aspect of the disclosure, a computer program product is provided, comprising a computer program which, when executed by a processor, implements the method of the first aspect.

[0010] It should be understood that all statements herein made regarding the exemplary embodiments of the disclosure are intended to encompass both the specific and generic examples herein disclosed. Furthermore, where a definition or use of a term in one or more portions of the specification is contrary or in addition to the definition or use of that term in other portions, the definition or use in that other portion prevails over the definition or use in the one or more portions wherein it is contrary. BRIEF DESCRIPTION OF DRAWINGS

[0011] The above and other objects, features and advantages of embodiments of the disclosure will become more apparent from the following detailed description when taken in conjunction with the accompanying drawings in which a number of embodiments of the present disclosure are illustrated by way of example and not limitation. Like reference numerals can be used to denote like elements throughout the accompanying drawings.

[0012] Figure 1 a schematic diagram illustrating an example environment in which some embodiments of the disclosure can be implemented;

[0013] Figure 2 a schematic flow diagram illustrating a method for managing resources according to an embodiment of the disclosure;

[0014] Figure 3 a schematic flow diagram illustrating an example process of partitioning and allocating a set of physical resources according to an embodiment of the disclosure;

[0015] Figure 4 a schematic block diagram illustrating a register for managing an address range according to an embodiment of the disclosure;

[0016] Figure 5 a schematic block diagram illustrating an apparatus for managing resources according to an embodiment of the disclosure; and

[0017] Figure 6 a schematic block diagram of an apparatus that can be used to implement an embodiment of the disclosure is shown.

[0018] Throughout the drawings, identical or similar reference numerals can be used to denote identical or similar components. DETAILED DESCRIPTION

[0019] The principles and spirits of the present disclosure will be described below with reference to several exemplary embodiments shown in the accompanying drawings. It should be understood that the description of these specific embodiments is only to enable those skilled in the art to better understand and implement the present disclosure, and not to limit the scope of the present disclosure in any way.

[0020] As mentioned above, AI computing is widely used in cloud computing, and various GPUs or AI acceleration cards are also massively deployed. However, the traditional scheme generally uses a time division multiplexing strategy to virtualize physical resources. For example, for computing resources, the GPU or AI acceleration card usually adopts a time slice-based scheduling strategy to schedule computing resources to virtual machines. Generally, each time slice scheduled to a virtual machine can be set to 6 milliseconds. Once the time slice scheduled for the virtual machine is used up, the use of computing resources is switched to the next virtual machine. Within each time slice, the currently running virtual machine can occupy all computing resources (also referred to simply as computing power in this paper). However, this time division scheduling strategy has a large overhead. For example, a general GPU context switch needs up to hundreds of microseconds, such as 0.2 to 0.5 milliseconds, which means 3.33%-8.33% overhead relative to a 6-millisecond time slice.

[0021] In addition, in the traditional scheme, the data interaction between the GPU and the host basically needs to pass through a direct memory access (DMA) unit. In virtualization, the direct memory access unit is also time-division multiplexed between virtual machines. This results in a very large software overhead and complexity. First, in order to achieve the security isolation between virtual machines, the operation command of the direct memory access unit needs to pass through the virtual machine manager (VMM) or hypervisor (Hypervisor) for forwarding, thereby reducing the system performance. Because a large software overhead is generated when performing the operation of entering or exiting the virtual machine (VM_Entry and VM_Exit). Second, in order to reduce the entry and exit operations of the virtual machine, the system software needs to use complex technical means to ensure system performance, such as virtual shadow technology (virtual-shadow) and the like. In this way, the multi-command queue and complex command ring generated also increase the complexity of the system software.

[0022] In view of the above problems and potential other problems in the traditional scheme, the embodiments of the present disclosure propose a method, device, electronic equipment and computer readable storage medium for resource management, which aims to realize secure and space-division multiplexing physical resource virtualization. The so-called space-division strategy in this paper refers to allocating physical resources (for example, computing resources) to different virtual functions (or corresponding virtual machines) at a certain ratio, thereby avoiding various problems existing in the traditional time-division multiplexing strategy.

[0023] On the other hand, in the embodiments of this disclosure, by implementing a hardware isolation mechanism between virtual functions (or corresponding virtual machines), the execution of each virtual machine will not be affected by other virtual machines, thereby making the system more secure and reliable. For example, embodiments of this disclosure can employ a multi-channel direct memory access unit, and the channels can be hardware isolated, for example, through a virtual access control unit. In this way, the access commands of each virtual machine can directly operate the direct memory access unit without the need for interception and forwarding by the virtual machine manager, thus eliminating the need for complex software queues, which greatly reduces the software overhead of the system. Furthermore, in the embodiments of this disclosure, the virtual machine manager (or hypervisor) can be implemented simply. This is because the system only needs to configure the corresponding control unit according to the number of virtual machines and resource allocation during initialization, for example, by setting the registers that record resource allocation information accordingly.

[0024] In summary, the embodiments of this disclosure require fewer hardware resources, resulting in lower hardware costs. Furthermore, the software overhead is also low, avoiding the complex scheduling and overhead of time-division multiplexing strategies, thus making them easy to implement, maintain, and deploy. In addition, the embodiments of this disclosure achieve hardware isolation between virtual functions, thereby improving system security and reliability. Moreover, the virtual machine drivers in the embodiments of this disclosure can be the same as those in cases where virtualization is not supported, requiring no modification. Therefore, the embodiments of this disclosure can effectively solve various problems existing in traditional physical resource virtualization schemes, thereby better realizing the virtualization of physical resources (such as AI accelerator cards), and are particularly suitable for cloud computing technology scenarios. Several embodiments of this disclosure are described below with reference to the accompanying drawings.

[0025] Figure 1 A schematic diagram of an example environment 100 in which some embodiments of this disclosure can be implemented is shown. For example... Figure 1 As shown, the example environment 100 may include a computing device 102 and a system-on-a-chip (SoC) 104. The computing device 102 can be various types of computing devices capable of running virtual machines, examples of which include, but are not limited to, personal computers, server computers, handheld or laptop devices, mobile devices (such as mobile phones, personal digital assistants (PDAs), media players, etc.), multiprocessor systems, consumer electronics, minicomputers, mainframe computers, distributed computing environments including any of the above systems or devices, and so on. In some embodiments, the computing device 102 may support Peripheral Component Interconnect High Speed ​​(PCIe) interface functionality to enable communication and interconnection with the SoC 104. Additionally, the computing device 102 may also support I / O devices through Single Root I / O Virtualization (SR-IOV) functionality to improve I / O device utilization.

[0026] As shown, multiple virtual machines 106-1, 106-2, ..., 106-N (hereinafter collectively referred to as virtual machines 106) can run on computing device 102, where N represents a natural number, meaning that any number of virtual machines 106 can run on computing device 102. Generally, a virtual machine refers to an application execution environment created by a specific application on the hardware platform of a physical machine. Users can run applications and interact with this environment as if using a physical machine. When creating a virtual machine 106, computing device 102 typically needs to allocate a certain amount of physical resources from the computing device 102 hosting the virtual machine 106 through a manager for the virtual machine 106 to use during operation. These physical resources can be any available physical resources used to run the virtual machine 106, including but not limited to computing resources (e.g., CPU, GPU, FPGA, etc.), storage resources (e.g., memory, storage disks, etc.), network resources (e.g., network interface cards, etc.), and so on.

[0027] In example environment 100, system-on-a-chip 104 is communicatively coupled to computing device 102. Generally, a system-on-a-chip (SoC) refers to a complete system integrated on a single chip; specifically, it is a system or product formed by combining multiple integrated circuits with specific functions on a single chip, containing a complete hardware system and its embedded software. For example, AI accelerator cards or various GPUs can be implemented using SoC 104. However, it should be understood that, besides AI accelerator cards and GPUs, SoC 104 can implement any suitable system or function as needed.

[0028] In some embodiments, the system-on-chip 104 can support single-root I / O virtualization, making the system-on-chip 104 appear as multiple independent physical devices. In other words, the system-on-chip 104 can support physical functions (PFs) and virtual functions (VFs). For example, a physical function can be a full-featured PCIe function that supports single-root I / O virtualization. Physical functions can be discovered, managed, and configured like ordinary PCIe devices. In contrast, virtual functions are lightweight PCIe functions that can be associated with physical functions. For example, each virtual function can be derived from a physical function and assigned to a virtual machine.

[0029] exist Figure 1 In the example, for N virtual machines 106 running on computing device 102, the system-on-chip 104 can support virtual functions 116-1, 116-2, ..., 116-N (hereinafter collectively referred to as virtual functions 116), where each virtual function in virtual function 116 can correspond to one virtual machine in virtual machine 106. Although Figure 1The virtual functions 116 are depicted as corresponding one-to-one with the virtual machines 106, but the correspondence between the virtual functions 116 and the virtual machines 106 is not limited thereto. In other embodiments, there can be any suitable correspondence between the virtual machines 106 and the virtual functions 116.

[0030] The system-on-chip 104 also includes various physical units for supporting the virtual functions 116, such as the compute units 108-1, 108-2, …, 108-M (hereinafter can be collectively referred to as the compute units 108, where M is a natural number) and the direct memory access unit 110. The compute units 108 can provide computing resources (or computing power), and thus can provide virtual computing power for the virtual functions 116. The direct memory access unit 110 can be used to provide access channel resources to the memory, and thus can provide virtual access capability to the memory for the virtual functions 116.

[0031] The system-on-chip 104 also includes a control unit 112 for controlling various operations and functions thereof. The control unit 112 can be any device that implements control functions, including but not limited to a special purpose computer, a general purpose computer, a general purpose processor, a microprocessor, a microcontroller, or a state machine. The control unit 112 can also be implemented as an individual computing device or a combination of computing devices, such as a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors in conjunction with a DSP core, or any other such configuration.

[0032] The system-on-chip 104 also includes a communication link 114 for communicatively coupling the compute units 108, the direct memory access unit 110, and the control unit 112. The communication link 114 can be any form of connection or coupling that enables communication and interconnection between the components of the system-on-chip 104, including but not limited to various types of buses. In some embodiments, the communication link 114 can include a network-on-chip (NoC).

[0033] It should be understood that Figure 1 The example environment 100 only schematically depicts the units, modules, or components that are relevant to the embodiments of the present disclosure in the specific implementation. In a concrete implementation, the example environment 100 can also include other units, modules, or components for other functions. In addition, although Figure 1 A specific number of various units, modules, or components are depicted in the example environment 100, but these specific numbers are only exemplary and are not intended to limit the scope of the present disclosure in any way. In other embodiments, the example environment 100 can include any suitable number of various units, modules, or components. Therefore, the embodiments of the present disclosure are not limited to Figure 1 The depicted specific devices, chips, units, modules, or components are not intended to limit the embodiments of the present disclosure to any specific computing system environment for implementing virtual machines and virtual functions. The following is described in conjunction with Figure 2An example method for resource management according to embodiments of the present disclosure is described.

[0034] Figure 2 A schematic flowchart of a method 200 for managing resources according to embodiments of the present disclosure is shown. In some embodiments, the method 200 can be performed at the system-on-chip 104 communicatively coupled with the computing device 102. For example, the method 200 can be implemented by the control unit 112 of the system-on-chip 104. In this case, the method 200 can be implemented by a processor or processing unit of the control unit 112. In other embodiments, all or part of the method 200 can also be implemented by a computing device independent of the example environment 100, or can be implemented by other units in the example environment 100. For ease of discussion, the method 200 will be described in conjunction with Figure 1 the example environment 100.

[0035] As described above, by virtualizing the physical functions, the system-on-chip 104 can provide the virtual functions 116 to the plurality of virtual machines 106 running on the computing device 102. Generally, one virtual machine (e.g., the virtual machine 106-1) running on the computing device 102 can correspond to one virtual function (e.g., the virtual function 116-1) supported by the system-on-chip 104. However, in other embodiments, one virtual machine running on the computing device 102 can also correspond to a plurality of virtual functions supported by the system-on-chip 104, or a plurality of virtual machines running on the computing device 102 can correspond to one virtual function supported by the system-on-chip 104. In other words, in embodiments of the present disclosure, the virtual machines 106 running on the computing device 102 and the virtual functions supported by the system-on-chip 104 can have any reasonable correspondence.

[0036] Accordingly, at 210, to better provide the virtual functions to the virtual machines 106 running on the computing device 102, the control unit 112 of the system-on-chip 104 first determines a plurality of virtual functions 116 to be supported by the system-on-chip 104. Since each of the plurality of virtual functions 116 is to correspond to a virtual machine 106 running on the computing device 102, the control unit 112 can determine the plurality of virtual functions 116 based on the correspondence between the virtual machines 106 and the virtual functions 116. For example, in the depicted example where one virtual machine 106 corresponds to one virtual function, the control unit 112 can determine that the system-on-chip 104 is to support N virtual functions 116 corresponding to N virtual machines 106, respectively. Similarly, regardless of the correspondence between the virtual machines 106 and the virtual functions 116, the control unit 112 can determine the plurality of virtual functions 116 to be supported by the system-on-chip 104. Figure 1

[0037] ​However, the control unit 112 is not limited to using the above-described approach to determine the plurality of virtual functions 116. In other embodiments, the control unit 112 can determine a reasonable number of virtual functions 116 based on the total amount of physical resources of the system-on-chip 104, and then map the virtual functions 116 to the virtual machines 106 running on the computing device 102. Alternatively, the control unit 112 can also receive an instruction from a user or an administrator of the system-on-chip 104, and determine the plurality of virtual functions 116 based on the instruction. That is, the number of virtual functions 116 to be supported by the system-on-chip 104 can be configured by a user or an administrator of the system-on-chip 104. More generally, the control unit 112 can determine the number of virtual functions 116 to be supported by the system-on-chip 104 by any suitable approach.

[0038] At 220, the control unit 112 divides the set of physical resources of the system-on-chip 104 into a plurality of subsets of physical resources in a predetermined ratio, where the number of subsets of physical resources is the same as the number of virtual functions 116. That is, where the system-on-chip 104 supports N virtual functions 116, the control unit 112 divides the set of physical resources of the system-on-chip 104 into N subsets of physical resources, where the division is based on the predetermined ratio.

[0039] In particular, the control unit 112 can divide the set of physical resources into N subsets of physical resources based on the characteristics of the physical units that provide the set of physical resources. As an example, in some cases, the set of physical resources of the system-on-chip 104 is provided by a plurality of physical units. For instance, in the example of Figure 1 , the set of computing resources of the system-on-chip 104 is provided by M computing units 108. In this case, the control unit 112 can divide the M computing units into N subsets of physical resources.

[0040] In contrast, in other cases, the set of physical resources of the system-on-chip 104 is provided by one physical unit. For instance, in the example of Figure 1 , the set of DMA resources of the system-on-chip 104 is provided by one DMA unit 110. In this case, the control unit 112 can divide the internal resources of the DMA unit 110 into N subsets of physical resources. An example of dividing the set of physical resources in different cases will be described below in connection with Figure 3 .

[0041] Figure 3A schematic flowchart illustrating an example process 300 for partitioning and allocating a set of physical resources according to an embodiment of the present disclosure is shown. Process 300 can be considered as an embodiment of method 200. Therefore, in some embodiments, process 300 may be executed at a system-on-a-chip 104 communicatively coupled to computing device 102. For example, process 300 may be implemented by a control unit 112 of system-on-a-chip 104. In this case, process 300 may be implemented by a processor or processing unit of control unit 112. In other embodiments, all or part of process 300 may also be implemented by a computing device independent of example environment 100, or may be implemented by other units in example environment 100.

[0042] like Figure 3 As shown, at 310, the control unit 112 can determine whether the physical resource set of the system-on-chip 104 is provided by one physical unit or by multiple physical units. If the physical resource set is provided by multiple physical units, then at 320, the control unit 112 can divide the set of multiple physical units into multiple physical unit subsets according to a predetermined ratio, wherein the multiple physical unit subsets obtained can each correspond to multiple physical resource subsets.

[0043] For example, suppose in Figure 1 In the illustrated example, N is 3, meaning that computing device 102 runs three virtual machines 106-1, 106-2, and 106-3, and the system-on-a-chip 104 supports three virtual functions 116-1, 116-2, and 116-3. It is also assumed that M is 8, meaning that the system-on-a-chip 104 has eight computing units 108-1 to 108-8. Furthermore, it is further assumed that the predetermined ratio for partitioning the physical resource set is 1:2:1, meaning that the physical resource set will be allocated to the three virtual functions 116-1, 116-2, and 116-3, and their corresponding three virtual machines 106-1, 106-2, and 106-3, in a 1:2:1 ratio.

[0044] In this case, the control unit 112 can divide the 8 compute units 108-1 to 108-8 into 3 physical resource subsets. The 3 physical resource subsets correspond to the 3 virtual functions 116-1, 116-2, and 116-3, respectively. As an example only, the first physical resource subset can include 2 compute units, e.g., compute units 108-1 and 108-2. The second physical resource subset can include 4 compute units, e.g., compute units 108-3, 108-4, 108-5, and 108-6. The third physical resource subset can include 2 compute units, e.g., compute units 108-7 and 108-8. With such a division, it can be ensured that a separate physical unit as a whole is used for a certain virtual function, thereby improving the isolation between virtual functions.

[0045] It should be appreciated that the specific number of compute units, the specific number of virtual functions, the number of compute units included in each physical resource subset, and the specific compute units, and the specific predetermined ratio described herein are for illustrative and explanatory purposes only and are not intended to limit the scope of the present disclosure in any way. In other embodiments, the system-on-chip 104 can include any number of compute units, any number of virtual functions, any number of compute units that can be included in each physical resource subset, and any specific compute units, and the division of the physical resource set can use any predetermined ratio.

[0046] On the other hand, if at 310 the control unit 112 determines that the physical resource set of the system-on-chip 104 is provided by one physical unit, at 350 the control unit 112 can divide the physical resources of the physical unit into a plurality of resource portions in a predetermined ratio, where the plurality of resource portions can correspond to a plurality of physical resource subsets, respectively. For example, the direct memory access resources of the system-on-chip 104 are provided by one direct memory access unit 110, which can be used by all virtual functions 116. In this case, the control unit 112 can divide the direct memory access resources inside the direct memory access unit 110 into a plurality of resource portions in a predetermined ratio.

[0047] In particular, assume that the direct memory access unit 110 internally has 8 access channels (hereinafter can be referred to as CH1 to CH8), which can support 8-way parallel execution of direct memory access, but the 8 channels can share 1 configuration interface (such as an Advanced Peripheral Bus (APB) interface). Further, still assume that the predetermined proportion for dividing the set of physical resources is 1 :2: 1, then the controller 112 can divide the 8 channels inside the direct memory access unit 110 into three resource portions. The 3 resource portions correspond to the 3 virtual functions 116-1, 116-2 and 116-3 respectively. As an example only, the first resource portion can include 2 channels, e.g., CH1 and CH2. The second resource portion can include 4 channels, e.g., CH3, CH4, CH5 and CH6. The third resource portion can include 2 channels, e.g., CH7 and CH8. With such a division, the division of physical resources among different virtual functions can still be achieved in the case that the number of physical units providing the physical resources is indivisible.

[0048] The above describes embodiments in which the control unit 112 divides the subset of physical resources according to one or more physical units. However, embodiments of the present disclosure are not limited thereto, in other embodiments, the control unit 112 can also divide the subset of physical resources in other ways. For example, in the case that there are multiple physical units, the control unit 112 can divide each physical unit into multiple resource portions according to the predetermined proportion. As another example, in the case that there are multiple physical units, the control unit 112 can divide a portion of the physical units into a subset of physical units with a single physical unit, and divide each of the other portion of the physical units into multiple resource portions. More generally, the control unit 112 can divide the set of physical resources into the subset of physical resources according to the predetermined proportion in any appropriate way.

[0049] Further, the predetermined proportion for dividing the set of physical resources can be reasonably determined by the control unit 112 based on various relevant factors. For example, the control unit 112 can determine the predetermined proportion based on the amount of physical resources required by the multiple virtual machines 106 corresponding to the multiple virtual functions 116. In this way, the control unit 112 can reasonably divide the set of physical resources of the system-on-chip 104 according to the actual requirements of the virtual machines 106. Additionally or alternatively, the control unit 112 can determine the predetermined proportion based on the load levels of the virtual machines 106. Thus, the set of physical resources of the system-on-chip 104 can be allocated more to virtual machines 106 that are currently more heavily loaded. Additionally or alternatively, the control unit 112 can determine the predetermined proportion based on the quality-of-service levels of the virtual machines 106. For example, the control unit 112 can divide a larger proportion of physical resources for virtual machines 106 with higher quality-of-service levels.

[0050] More generally, the control unit 112 can determine the predetermined ratio to fairly divide the set of physical resources of the system-on-chip 104 into N subsets of physical resources according to any other relevant factor that can affect the allocation of resources. Moreover, by setting and adjusting the predetermined ratio, the system-on-chip 104 can support different ratios of physical resource allocation, i.e. multiple modes, for example mode 1 can divide the physical resources in a ratio of 1 / 4, 1 / 4 and 1 / 2, mode 2 can divide the physical resources in a ratio of 1 / 2, 1 / 2 and mode 3 can be a ratio of 1 / 1, i.e. no division of the set of physical resources. In this way, the system-on-chip 104 can achieve flexible allocation of physical resources among the virtual functions 116.

[0051] Referring back to Figure 2 At 230, the control unit 112 allocates the divided subsets of physical resources to the plurality of virtual functions, respectively. For example, in the depicted example, the control unit 112 allocates the divided N subsets of physical resources to the N virtual functions 116-1 to 116-N, respectively, thereby achieving isolation of physical resources among different virtual functions while allocating physical resources to the virtual functions. An example of allocating the subsets of physical resources in different cases will be described below in connection with Figure 1 Figure 3

[0052] As shown in Figure 3 , in the case where the set of physical resources is provided by a plurality of physical units, at 330, the control unit 112 can determine, for each subset of physical units of the plurality of subsets of physical units, an identifier of a virtual function to which the subset of physical units is to be allocated. For example, continuing with the specific example of 8 compute units assumed above, the control unit 112 can determine, for the first subset of physical resources, i.e. compute units 108-1 and 108-2, that the identifier of the virtual function 116-1 to which it is to be allocated is 116-1. Similarly, the control unit 112 can determine, for the second subset of physical resources, i.e. compute units 108-3 to 108-6, that the identifier of the virtual function 116-2 to which it is to be allocated is 116-2. Likewise, the control unit 112 can determine, for the third subset of physical resources, i.e. compute units 108-7 and 108-8, that the identifier of the virtual function 116-3 to which it is to be allocated is 116-3.

[0053] ​​At 340, the control unit 112 can associate the identifier of the virtual function with each physical unit in the subset of physical units. For example, the control unit 112 can associate the compute units 108-1 and 108-2 with the identifier 116-1 of the virtual function 116-1, associate the compute units 108-3 through 108-6 with the identifier 116-2 of the virtual function 116-2, and associate the compute units 108-7 and 108-8 with the identifier 116-3 of the virtual function 116-3. In this way, the control unit 112 can identify in a straightforward and explicit manner which virtual function a certain compute unit is assigned to.

[0054] In some embodiments, the virtual function identifier associated with each physical unit can be stored internally to the physical unit, e.g., in a register internal to the physical unit. As an example, the identifier 116-1 of the virtual function 116-1 corresponding to the compute unit 108-1 can be stored in an internal register of the compute unit 108-1. Table 1 below illustrates the correspondence between the compute units 108, the virtual functions 116, and the virtual machines 106 in the specific example described above.

[0055] Table 1

[0056]

[0057] Based on the association illustrated in Table 1 above, the control unit 112 can use the individual compute units to support their corresponding virtual functions. As an example, for each of the plurality of compute units 108, e.g., for the compute unit 108-1, the control unit 112 can determine that the identifier associated with the compute unit 108-1 is 116-1. The virtual function identified by this identifier is the virtual function 116-1. The control unit 112 can then use the compute unit 108-1 to support the virtual function 116-1.

[0058] Similarly, the control unit 112 can use the compute unit 108-2 to support the virtual function 116-1, the compute units 108-3 through 108-6 to support the virtual function 116-2, and the compute units 108-7 and 108-8 to support the virtual function 116-3. In this way, the control unit 112 can determine in a straightforward and explicit manner which virtual function a certain compute unit is assigned to, and use the compute unit to support the virtual function.

[0059] Continuing with the example above, Figure 3When the physical resource set is provided by a single physical unit, at position 360, the control unit 112 can determine multiple address ranges within the physical unit for multiple resource portions of that physical unit. For example, continuing with the example assuming that the direct memory access unit 110 includes eight access channels, the control unit 112 can determine a first address range for a first resource portion of the direct memory access unit 110 (i.e., channels CH1 and CH2), a second address range for a second resource portion of the direct memory access unit 110 (i.e., channels CH3 to CH6), and a third address range for a third resource portion of the direct memory access unit 110 (i.e., channels CH7 and CH8).

[0060] At address 370, control unit 112 can assign multiple defined address ranges to multiple virtual functions. For example, control unit 112 can assign a first address range to virtual function 116-1, a second address range to virtual function 116-2, and a third address range to virtual function 116-3. In this way, control unit 112 can assign different resource portions represented by different address ranges to multiple virtual functions, thereby achieving hardware isolation between different virtual functions in a way that allows access to different resource portions within a single physical unit. The following section combines... Figure 4 This describes an example of accessing different portions of a single physical unit through address ranges.

[0061] Figure 4 A schematic block diagram of a register 400 for managing address ranges according to an embodiment of the present disclosure is shown. Figure 4 As shown, the system-on-chip 104 can set a corresponding register 400 for each virtual function in the virtual function 116. The register 400 can be for an accessible address range, and it can include a valid bit 410, a base address field 420, and an address space size field 430.

[0062] The valid bit 410 indicates whether the address needs to be checked, that is, whether the address range corresponding to register 400 can be accessed by the virtual function. For example, if the valid bit 410 for the address range recorded in register 400 for virtual function 116-1 is set to 0, it means that virtual function 116-1 can access the address range. Conversely, if the valid bit 410 for the address range recorded in register 400 for virtual function 116-1 is set to 1, it means that virtual function 116-1 cannot access the address range. It will be understood that the specific value of the valid bit 410 here is only an example and is not intended to limit the scope of this disclosure in any way. In other embodiments, the valid bit 410 may also take different specific values ​​to represent specific meanings, and may even be represented by multiple bits.

[0063] The start address field 420 represents the start address of the address range for which the register 400 is directed, and the address space size field 430 represents the address space size of the address range for which the register 400 is directed. Thus, in some embodiments, the address range for which a particular virtual function has legal access can be represented as (assuming an effective bit width of 26 bits): {base, 8 bits 0} <= address [25:0] < {base, 8 bits 0} + size. Further, in some embodiments, the register 400 can be set to have a bit length of 32 bits, for example, represented as bits 0 to 32. In this case, the address space size field 430 can include bits 0 to 12, the start address field 420 can include bits 13 to 30, and the effective bits 410 can include bit 31. However, in other embodiments, the register 400 can have any number of bits, and the individual fields therein can also have any suitable number of bits. Additionally, in some embodiments, the minimum allocation granularity of an address range in the direct memory access unit 110 can be set to 256 bytes. However, it will be understood that other granularities are also possible in embodiments of the present disclosure.

[0064] In some embodiments, the register 400 can be disposed in a virtual access control unit (VAC). The virtual access control unit, for example, is an access control module disposed on the system-on-chip 104, and its main function can include access control for physical functions and virtual functions. For system security, the virtualization process needs to isolate different virtual machines from each other. As such, the pass-through that a physical function and a virtual function can access can be different. Generally speaking, a physical function can access all pass-throughs on the system-on-chip 104, while a virtual function can only access a subset of the pass-throughs. For example, a physical function can access the depicted register 400 in Figure 4 , while a virtual function cannot access the register 400.

[0065] Thus, in accessing a single physical unit that provides a set of physical resources, the control unit 112 can determine, based on an access request of a virtual function of the plurality of virtual functions to the physical unit, an address within the physical unit that the virtual function is to access. If the determined address is within the address range allocated to the virtual function, the control unit 112 can allow the virtual function to access the address, otherwise the control unit 112 does not allow the virtual function to access the address. In this way, the control unit 112 can prevent a virtual function from accessing a portion of resources that is not allocated to it, thereby guaranteeing hardware isolation between different portions of resources accessible by different virtual functions within a single physical unit.

[0066] As an example, assume that Figure 1The starting address of the internal resources of the direct memory access unit 110 in the example of FIG. 1 is 0xDB40_0000, and each channel requires 0x200 of register space, which is still divided in a 1 :2:1 ratio for use by the three virtual functions 116-1, 116-2, and 116-3 (and corresponding virtual machines 106-1, 106-2, and 106-3). The corresponding configuration of the registers 400 in this case can be represented as Table 2 below, where the notation "0x" indicates that the following number is in hexadecimal.

[0067] Table 2

[0068]

[0069] In this case, assume that the virtual function 116-1 (corresponding to the virtual machine 106-1) requests access to the address 0xDB40_0400. Since this address is within the address range defined by 0xDB40_0400 (0xDB40_0000 ~ 0xDB40_03FF), the access is legal. In this case, the control unit 112 can allow the virtual function 116-1 to normally access the address. For another example, assume that the virtual function 116-1 requests access to the address 0xDB40_0500. Since this address is not within the address range defined by 0xDB40_0400 (0xDB40_0000 ~ 0xDB40_03FF), the access is illegal. In this case, the control unit 112 can return an access error message (e.g., by the virtual access control unit) to prevent the virtual function 116-1 from accessing the address.

[0070] In this way, the control unit 112 can effectively prevent a virtual function (or virtual machine) from accessing resources assigned to other virtual functions (virtual machines), thereby achieving hardware isolation between virtual machines. In some embodiments, the system-on-chip 104 can also be provided with a separate register configuration channel for controlling access by the virtual functions 116-1 to 116-N to the direct memory access unit 110.

[0071] Figure 5 A schematic block diagram of an apparatus 500 for managing resources according to embodiments of the present disclosure is shown. In some embodiments, the apparatus 500 can be included in the computing device 102 or implemented as the computing device 102. Figure 1

[0072] As Figure 5 ​As shown, the apparatus 500 includes a virtual function determining module 510, a resource set dividing module 520, and a resource subset allocating module 530. The virtual function determining module 510 is configured to determine a plurality of virtual functions to be supported, wherein each of the plurality of virtual functions corresponds to a virtual machine running on the computing device. The resource set dividing module 520 is configured to divide a physical resource set into a plurality of physical resource subsets in a predetermined proportion, a number of the plurality of physical resource subsets being the same as a number of the virtual functions. The resource subset allocating module 530 is configured to allocate the plurality of physical resource subsets to the plurality of virtual functions respectively.

[0073] In some embodiments, the resource set dividing module 520 can include a physical unit dividing module configured to divide a set of a plurality of physical units into a plurality of physical unit subsets in a predetermined proportion in response to the physical resource set being provided by the plurality of physical units, the plurality of physical unit subsets respectively corresponding to the plurality of physical resource subsets.

[0074] In some embodiments, for each of the plurality of physical unit subsets, the resource subset allocating module 530 can include an identifier determining module configured to determine an identifier of a virtual function to which the physical unit subset is to be allocated, and an associating module configured to associate the identifier with each of the physical units in the physical unit subset.

[0075] In some embodiments, for each of the plurality of physical units, the apparatus 500 can further include an associated function determining module configured to determine the virtual function identified by the identifier associated with the physical unit, and a virtual function supporting module configured to use the physical unit to support the virtual function.

[0076] In some embodiments, the resource set dividing module 520 can include a physical resource dividing module configured to divide physical resources of a physical unit into a plurality of resource portions in a predetermined proportion in response to the physical resources being provided by the physical unit, the plurality of resource portions respectively corresponding to the plurality of physical resource subsets.

[0077] In some embodiments, the resource subset allocating module 530 can include an address range determining module configured to determine a plurality of address ranges of the plurality of resource portions within the physical unit, and an address range allocating module configured to allocate the plurality of address ranges to the plurality of virtual functions respectively.

[0078] In some embodiments, the apparatus 500 can further include an access address determining module configured to determine an address within the physical unit to be accessed by a virtual function of the plurality of virtual functions based on an access request of the virtual function to the physical unit, and an access permitting module configured to permit the virtual function to access the address in response to the address being within an address range allocated to the virtual function.

[0079] In some embodiments, the apparatus 500 can further include a predetermined ratio determining module configured to determine the predetermined ratio based on at least one of the amount of physical resources, the load level, and the quality of service level of the plurality of virtual machines corresponding to the plurality of virtual functions.

[0080] In some embodiments, the apparatus 500 can be on a system on chip coupled communicatively with a computing device.

[0081] Figure 6 A schematic block diagram of an apparatus 600 that can be used to implement embodiments of the present disclosure is shown. As shown, the apparatus 600 includes a central processing unit (CPU) 601 that can perform various appropriate actions and processes according to computer program instructions stored in a read-only memory device (ROM) 602 or loaded into a random access memory device (RAM) 603 from a storage unit 608. Various programs and data required for operation of the apparatus 600 can also be stored in the RAM 603. The CPU 601, the ROM 602, and the RAM 603 are connected to each other through a bus 604. An input / output (I / O) interface 605 is also connected to the bus 604. Figure 6

[0082] Various components in the apparatus 600 are connected to the I / O interface 605, including an input unit 606, such as a keyboard, a mouse, etc.; an output unit 607, such as various types of displays, speakers, etc.; the storage unit 608, such as magnetic disks, optical disks, etc.; and a communication unit 609, such as a network card, a modem, a wireless communication transceiver, etc. The communication unit 609 allows the apparatus 600 to exchange information / data with other apparatuses through a computer network, such as the Internet, and / or various telecommunication networks.

[0083] The various processes and processes described above, such as the example methods 200 and 300, can be performed by the processing unit 601. For example, in some embodiments, the example methods 200 and 300 can be implemented as a computer software program tangibly embodied in a machine-readable medium, such as the storage unit 608. In some embodiments, part or all of the computer program can be loaded and / or installed on the apparatus 600 via the ROM 602 and / or the communication unit 609. When the computer program is loaded into the RAM 603 and executed by the CPU 601, one or more steps of the example methods 200 and 300 described above can be performed.

[0084] ​As used herein, the terms "includes," "including," "has," "having," "contains," "containing," "comprises," "comprising," "characterized by" and the like can be used interchangeably. As used herein, the term "includes" and its variants are intended to cover non-exclusive inclusions, such that a process, method, article, or apparatus that includes items that are recited as being included can include these items as well as other items not specifically recited. As used herein, the terms "based on" and "based upon" are used interchangeably and are intended to mean "based at least in part on." As used herein, the terms "one embodiment," "an embodiment," "exemplary embodiment," and the like are utilized to describe a particular embodiment discussed in the context of the description. However, it is contemplated that the described embodiment can be implemented in various ways. As such, the terms "one embodiment," "an embodiment," "exemplary embodiment,” and the like are not utilized in a limiting sense, and are utilized to describe one particular embodiment discussed in the context of the description. It is also contemplated that the features, components, and / or steps described with respect to one embodiment can be combined with features, components, and / or steps described with respect to one or more other embodiments.

[0085] As used herein, the term "determining" encompasses a wide variety of actions. For example, "determining" can include calculating, computing, processing, deriving, investigating, looking up (such as, for example, looking up in a table, a database or another data structure), ascertaining and the like. Also, "determining" can include receiving (such as, for example, receiving information), accessing (such as, for example, accessing data in a memory) and the like. Also, "determining" can include resolving, selecting, choosing, establishing and the like.

[0086] It should be noted that embodiments of the present disclosure can be implemented by hardware, software, or a combination of software and hardware. The hardware portion can be implemented using special purpose logic; the software portion can be stored in a memory and executed by a proper instruction execution system, such as a microprocessor or a dedicated design hardware. Those skilled in the art can understand that the above-mentioned devices and methods can be implemented using computer executable instructions and / or included in processor control codes, such as providing such codes on a programmable memory or a data carrier such as an optical or electronic signal carrier.

[0087] Moreover, while operations of methods of the present disclosure are described in a particular order in the drawings, this is not required or implied in any particular order of performing the operations, or that all of the illustrated operations be performed to achieve desirable results. Rather, the order of steps depicted in the flowcharts can be changed. Additionally or alternatively, certain steps can be omitted, combined into a single step, and / or broken into multiple steps. It should also be noted that features and functions of two or more devices according to the present disclosure can be embodied in one device. Conversely, features and functions of one device described above can be further divided into multiple devices.

[0088] While the present disclosure has been described with reference to several particular embodiments, it is understood that the present disclosure is not limited to the particular embodiments disclosed. The present disclosure is intended to cover various modifications and equivalent arrangements included within the spirit and scope of the appended claims.

Claims

1. A method for resource management, comprising: determining a plurality of virtual functions to be supported, wherein each of the plurality of virtual functions corresponds to a virtual machine running on a computing device; dividing a set of physical resources into a plurality of subsets of physical resources in a predetermined proportion, the number of the plurality of subsets of physical resources being the same as the number of the virtual functions; and allocating the plurality of subsets of physical resources to the plurality of virtual functions, respectively; wherein dividing the set of physical resources into the plurality of subsets of physical resources in the predetermined proportion comprises: in response to the physical resources being provided by a multi-channel direct memory access unit, dividing the physical resources of the direct memory access unit into a plurality of channel groups in the predetermined proportion, the plurality of channel groups respectively containing one or more channels, the plurality of channel groups respectively corresponding to the plurality of subsets of physical resources; allocating the plurality of subsets of physical resources to the plurality of virtual functions comprises: determining a plurality of address ranges of the plurality of channel groups within the direct memory access unit; and allocating the address ranges corresponding to the plurality of channel groups to the plurality of virtual functions, respectively.

2. The method of claim 1, wherein dividing the set of physical resources into the plurality of subsets of physical resources comprises: in response to the set of physical resources being provided by a plurality of physical units, dividing the set of the plurality of physical units into a plurality of subsets of physical units in the predetermined proportion, the plurality of subsets of physical units respectively corresponding to the plurality of subsets of physical resources.

3. The method of claim 2, wherein allocating the plurality of subsets of physical resources to the plurality of virtual functions comprises: for each subset of physical units in the plurality of subsets of physical units, determining an identifier of a virtual function to which the subset of physical units is to be allocated; and associating the identifier with each physical unit in the subset of physical units.

4. The method of claim 3, further comprising: for each physical unit in the plurality of physical units, determining a virtual function identified by the identifier associated with the physical unit; and using the physical unit to support the virtual function.

5. The method of claim 1, further comprising: based on a request of a virtual function in the plurality of virtual functions for access to the direct memory access unit, determining an address within the direct memory access unit to be accessed by the virtual function; and in response to the address being within an address range allocated to the virtual function, allowing the virtual function to access the address.

6. The method of claim 1, further comprising: determining the predetermined proportion based on at least one of a physical resource requirement, a load level, and a quality of service level of a plurality of virtual machines corresponding to the plurality of virtual functions.

7. The method of claim 1, wherein the method is performed at a system on chip (SoC) chip communicatively coupled to the computing device.

8. An apparatus for resource management, comprising: ​ ​ ​ ​ a virtual function determination module configured to determine a plurality of virtual functions to be supported, wherein each of the plurality of virtual functions corresponds to a virtual machine running on the computing device; a resource set partitioning module configured to partition a set of physical resources into a plurality of physical resource subsets in a predetermined proportion, a number of the plurality of physical resource subsets being the same as a number of the plurality of virtual functions; and a resource subset allocation module configured to allocate the plurality of physical resource subsets to the plurality of virtual functions, respectively. The resource set partitioning module includes: a physical resource partitioning module configured to partition, in response to the physical resources being provided by a multi-channel direct memory access unit, the physical resources of the direct memory access unit into a plurality of channel groups in the predetermined proportion, the plurality of channel groups respectively containing one or more channels, the plurality of channel groups respectively corresponding to the plurality of physical resource subsets; The resource subset allocation module includes: an address range determination module configured to determine a plurality of address ranges of the plurality of channel groups within the direct memory access unit; and an address range allocation module configured to allocate the address ranges corresponding to the plurality of channel groups to the plurality of virtual functions, respectively.

9. The apparatus of claim 8, wherein the resource set partitioning module includes: a physical unit partitioning module configured to partition, in response to the set of physical resources being provided by a plurality of physical units, the plurality of physical units into a plurality of physical unit subsets in the predetermined proportion, the plurality of physical unit subsets respectively corresponding to the plurality of physical resource subsets.

10. The apparatus of claim 9, wherein for each of the plurality of physical unit subsets, the resource subset allocation module includes: an identifier determination module configured to determine an identifier of a virtual function to which the physical unit subset is to be allocated; and an association module configured to associate the identifier with each of the physical units in the physical unit subset.

11. The apparatus of claim 10, wherein for each of the plurality of physical units, the apparatus further includes: an associated function determination module configured to determine a virtual function identified by the identifier associated with the physical unit; and a virtual function support module configured to use the physical unit to support the virtual function.

12. The apparatus of claim 8, further comprising: an access address determination module configured to determine, based on an access request of a virtual function of the plurality of virtual functions to the direct memory access unit, an address within the direct memory access unit to be accessed by the virtual function; and an access permission module configured to permit the virtual function to access the address in response to the address being within an address range allocated to the virtual function.

13. The apparatus of claim 8, further comprising: a predetermined proportion determination module configured to determine the predetermined proportion based on at least one of a physical resource requirement amount, a load level, and a quality of service level of a plurality of virtual machines corresponding to the plurality of virtual functions. ​ ​ ​ ​ 14. The apparatus of claim 8, wherein the apparatus is on a system-on-a-chip (SoC) chip communicatively coupled with the computing device.

15. An electronic device, comprising: one or more processors; and storage storing one or more programs, which, when executed by the one or more processors, cause the one or more processors to perform the method of any of claims 1-7.

16. A computer-readable storage medium having stored thereon a computer program, which, when executed by a processor, performs the method of any of claims 1-7.

17. A computer program product comprising a computer program which, when executed by a processor, performs the method according to any of claims 1-7.

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