Conveying method in substrate processing system

Abstract

The present invention provides a conveying method in a substrate processing system. The conveying method in the substrate processing system of the present invention includes a tray feeding step, a measuring step, an adjusting step, a substrate loading step and a tray sending out step. In the tray feeding step, a tray capable of loading a semiconductor substrate and an edge ring is fed into a loading chamber provided with a loading table. In the measuring step, the position of the edge ring loaded on the tray is measured to obtain the position information of the edge ring. In the adjusting step, the position of the semiconductor substrate is adjusted based on the obtained position information. In the substrate loading step, the semiconductor substrate after position adjustment is loaded on the tray. In the tray sending out step, the tray loaded with the semiconductor substrate and the edge ring is sent out from the above-mentioned loading chamber. The present invention can configure the semiconductor substrate in the correct position relative to the edge ring.

Description

Technical Field

[0001] The invention relates to a conveying method in a substrate processing system. Background Art

[0002] Sometimes, in plasma processing of a semiconductor substrate, an edge ring (also called a focus ring) is arranged along the periphery of the semiconductor substrate arranged in a chamber (processing container) at a predetermined vacuum degree. By arranging the edge ring, the plasma at the periphery of the semiconductor substrate can be controlled, so that the periphery and the center of the semiconductor substrate can be processed uniformly. At this time, the positional relationship between the semiconductor substrate and the edge ring becomes important. Therefore, it is required to accurately transport the semiconductor substrate to the edge ring.

[0003] In addition, the edge ring is consumed by plasma processing, and therefore needs to be replaced regularly. The edge ring is usually replaced by opening the chamber in which the edge ring is arranged to the atmosphere. As a method for replacing the edge ring without opening the chamber to the atmosphere, the following method is proposed, namely, providing an edge ring storage chamber connected to a vacuum transfer chamber, and using a transfer mechanism of the vacuum transfer chamber to transfer the edge ring to the chamber.

[0004] In addition, there is known a technique in which semiconductor substrates are placed on trays and transported into a chamber by each tray.

[0005] Prior art literature

[0006] Patent Literature

[0007] Patent Document 1: Japanese Patent Application Publication No. 2017-084872

[0008] Patent Document 2: Japanese Patent Application Publication No. 2006-196691

[0009] Patent Document 3: Japanese Patent Application Publication No. 2011-114178 Summary of the invention

[0010] Technical problem to be solved by the invention

[0011] Generally, a semiconductor substrate is transported into a chamber via an atmospheric transport chamber, a load lock chamber, and a vacuum transport chamber. Therefore, even if the transport mechanism is controlled to correctly transport the semiconductor substrate to the edge ring disposed in the chamber, there is a possibility that the semiconductor substrate deviates from the transport mechanism until the semiconductor substrate is transported into the chamber, and cannot be transported correctly. In addition, when the edge ring is transported into the chamber using the transport mechanism of the vacuum transport chamber, the edge ring needs to be correctly transported and placed on a placement table for placing the edge ring.

[0012] The present invention provides a technique for arranging a semiconductor substrate at a correct position relative to an edge ring.

[0013] Technical solutions for solving technical problems

[0014] A conveying method in a substrate processing system according to one embodiment of the present invention includes a tray feeding step, a measuring step, an adjusting step, a substrate loading step, and a tray unloading step. In the tray feeding step, a tray capable of loading a semiconductor substrate and an edge ring is fed into a loading chamber provided with a loading table. In the measuring step, the position of the edge ring loaded on the tray is measured to obtain the position information of the edge ring. In the adjusting step, the position of the semiconductor substrate is adjusted based on the obtained position information. In the substrate loading step, the semiconductor substrate after position adjustment is loaded on the tray. In the tray unloading step, the tray loaded with the semiconductor substrate and the edge ring is unloaded from the above-mentioned loading chamber.

[0015] Effects of the Invention

[0016] According to the technique of the present invention, the semiconductor substrate can be arranged in a correct position relative to the edge ring. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 It is a diagram showing a structural example of a substrate processing system.

[0018] Figure 2 It is a diagram showing a configuration example of a processing device.

[0019] Figure 3 This is a diagram showing an example of the shape of a tray.

[0020] Figure 4 This is a diagram showing an example of the shape of an edge ring placed on a tray.

[0021] Figure 5 This is a diagram showing an example of the shape of an edge ring and a wafer placed on a tray.

[0022] Figure 6 It is a diagram showing a configuration example of a placement device.

[0023] Figure 7 This is a flowchart showing an example of the processing procedure of the transport method.

[0024] Figure 8 This is a diagram showing an example of a transportation method.

[0025] Fig. 9 This is a diagram showing an example of a transportation method.

[0026] Fig.10 This is a diagram showing an example of a transportation method.

[0027] Fig.11 This is a diagram showing an example of a transportation method.

[0028] Fig.12 This is a graph showing the relationship between the electrostatic capacitance per unit area and the attractive force per unit area of ​​the electrostatic chuck of the processing device.

[0029] Fig.13 : is a figure which shows the positional relationship between the rotation angle sensor and the horizontal position sensor.

[0030] Fig.14 This is a diagram showing the correct positional relationship between the edge ring and the wafer.

[0031] Fig.15 This is a diagram showing an example of wafer position adjustment.

[0032] Fig.16 This is a diagram showing an example of wafer position adjustment.

[0033] Fig.17 This is a diagram showing an example of wafer position adjustment.

[0034] Fig.18 This is a diagram showing an example of wafer position adjustment.

[0035] Fig.19 1 is a diagram showing a configuration example of a substrate processing system in which a tray storage unit 5 is connected to a vacuum transfer chamber.

[0036] Fig. 20 This is a diagram showing an example of a tray in which an edge ring mounting portion and a substrate mounting portion are formed at the same height.

[0037] Fig.21 This is a diagram showing an example of applying a DC voltage to the tray body without using lift pins.

[0038] Fig. 22 This is a diagram showing another example of applying a DC voltage to the tray body without using lift pins.

[0039] Fig.23 This is a diagram showing another example of applying a DC voltage to the tray body without using lift pins.

[0040] Fig.24 This is a diagram showing an example of neutralizing the wafer W without using lift pins.

[0041] Fig.25 FIG. 1 is a diagram showing another example of eliminating static electricity from the wafer W without using lift pins.

[0042] Fig.26 This is a diagram showing an example of a tray functioning as a bipolar electrostatic chuck.

[0043] Fig. 27 This is a diagram showing an example of a placement device that places the placement tray TR8.

[0044] Description of Reference Numerals

[0045] 100, 200 substrate handling system

[0046] 2 Edge ring storage

[0047] 3 Alignment

[0048] 4 Processing device

[0049] 5 Pallet storage

[0050] 11 Atmospheric transport chamber

[0051] 12 Load Lock Chamber

[0052] 13 Vacuum conveying chamber

[0053] 14 FOUP

[0054] 15 1st conveying mechanism

[0055] 16. Second conveying mechanism. DETAILED DESCRIPTION

[0056] Hereinafter, embodiments of the technology of the present invention will be described based on the drawings. In the following embodiments, the same reference numerals are attached to the same configurations, and repeated descriptions are omitted.

[0057] <Structure of substrate processing system>

[0058] Figure 1 It is a diagram showing a structural example of a substrate processing system.

[0059] exist Figure 1 In the figure, the substrate processing system 100 includes a FOUP 14, an atmospheric transfer chamber 11, an edge-ring stocker 2, a tray stocker 5, an aligner 3, a load lock room 12, a vacuum transfer chamber 13, a processing device 4, a first transfer mechanism 15 and a second transfer mechanism 16.

[0060] FOUP14 is a container capable of storing semiconductor substrates (hereinafter sometimes referred to as "wafers"), and has an openable and closable lid. When FOUP14 storing the wafers is mounted in the atmospheric transfer chamber 11, the lid of FOUP14 is engaged with the gate door GT of the atmospheric transfer chamber 11 and the latch of the lid of FOUP14 is released, so that the lid of FOUP14 can be opened. In this state, by opening the gate GT, the lid of FOUP14 moves together with the gate GT and the lid of FOUP14 is opened, so that the inside of FOUP14 is connected to the inside of the atmospheric transfer chamber 11.

[0061] The atmospheric conveying chamber 11 is maintained in an atmospheric atmosphere, and the atmospheric conveying chamber 11 is connected to the edge ring storage unit 2 and the tray storage unit 5 via an openable and closable opening and closing member 23. A plurality of edge rings are stored in the edge ring storage unit 2. A plurality of trays are stored in the tray storage unit 5. In addition, the atmospheric conveying chamber 11 is connected to the aligner 3 via an opening 22. In addition, a first conveying mechanism 15 is provided in the atmospheric conveying chamber 11, and the first conveying mechanism 15 delivers wafers, edge rings, and trays between the FOUP 14, the edge ring storage unit 2, the tray storage unit 5, the aligner 3, and the load lock chamber 12. The first conveying mechanism 15 has a base 15a, a multi-jointed arm 15b, and a picker 15c. The root end side of the arm 15b is connected to the base 15a, and the front end side of the arm 15b is connected to the picker 15c. The base 15a can move in the direction of the arrow (the long side direction of the atmospheric conveying chamber 11) in the atmospheric conveying chamber 11. The picker 15c is formed in a U shape and supports the wafer, the edge ring and the tray. When the edge ring is taken out from the edge ring storage unit 2 by the picker 15c, the opening and closing member 23 between the edge ring storage unit 2 and the atmospheric conveying chamber 11 is opened, and when the tray is taken out from the tray storage unit 5 by the picker 15c, the opening and closing member 23 between the tray storage unit 5 and the atmospheric conveying chamber 11 is opened.

[0062] The atmospheric transfer chamber 11 and the vacuum transfer chamber 13 are connected via the load lock chamber 12. The vacuum transfer chamber 13 is maintained in a vacuum atmosphere. The atmospheric transfer chamber 11 and the load lock chamber 12 and the vacuum transfer chamber 13 and the load lock chamber 12 are separated by gate valves G. Normally, the gate valves G are closed. When a wafer, an edge ring, or a tray is transferred from the atmospheric transfer chamber 11 to the load lock chamber 12 by the first transfer mechanism 15, the gate valves G provided between the atmospheric transfer chamber 11 and the load lock chamber 12 are opened. Furthermore, when a tray carrying an edge ring and a wafer is taken out from the load lock chamber 12 by the second transfer mechanism 16 and transferred to the vacuum transfer chamber 13, the gate valves G provided between the load lock chamber 12 and the vacuum transfer chamber 13 are opened.

[0063] The load lock chamber 12 is provided with a vacuum pump (not shown) as an exhaust mechanism and a leak valve (not shown) for returning the pressure to atmospheric pressure, and the load lock chamber 12 can switch between atmospheric atmosphere and vacuum atmosphere. When a wafer, an edge ring, or a tray is transported from the atmospheric transport chamber 11 to the load lock chamber 12 by the first transport mechanism 15, the load lock chamber 12 is switched to the atmospheric atmosphere, and when a tray carrying a wafer and an edge ring is taken out of the load lock chamber 12 by the second transport mechanism 16 and transported to the vacuum transport chamber 13, the load lock chamber 12 is switched to the vacuum atmosphere.

[0064] A second conveying mechanism 16 is provided in the vacuum conveying chamber 13, and the second conveying mechanism 16 delivers a tray carrying a wafer and an edge ring between the load lock chamber 12 and the processing device 4. The second conveying mechanism 16 has a base 16a, a multi-jointed arm 16b, and a picker 16c. The root end side of the arm 16b is connected to the base 16a, and the front end side of the arm 16b is connected to the picker 16c. The base 16a can move in the direction of the arrow (the long side direction of the vacuum conveying chamber 13) in the vacuum conveying chamber 13. The picker 16c is formed in a U shape and supports the tray carrying the wafer and the edge ring.

[0065] The vacuum transfer chamber 13 and the processing apparatus 4 are separated by a gate valve G. Normally, the gate valve G is closed. When the tray carrying the wafer and the edge ring is transferred from the vacuum transfer chamber 13 to the processing apparatus 4 by the second transfer mechanism 16, the gate valve G provided between the vacuum transfer chamber 13 and the processing apparatus 4 is opened.

[0066] The processing device 4 processes the wafer to be processed in a vacuum atmosphere. The processing device 4 performs processes such as etching and film formation on the wafer placed on the tray.

[0067] <Structure of Processing Device>

[0068] Figure 2 It is a diagram showing a configuration example of a processing device. Figure 2 The processing device 4 shown constitutes a parallel-plate substrate processing device of a capacitive coupling type.

[0069] exist Figure 2 In the embodiment, the processing apparatus 4 includes a processing container, that is, a chamber 10, which is made of a metal such as aluminum or stainless steel. The chamber 10 is securely grounded.

[0070] A disc-shaped susceptor 12 is horizontally arranged in the chamber 10. A tray TR1 carrying a wafer W and an edge ring ER is placed on the susceptor 12. The susceptor 12 also functions as a lower electrode. A gate valve G for opening and closing a wafer W inlet and outlet is installed on the side wall of the chamber 10. The susceptor 12 is made of a metal such as aluminum, and is supported by an insulating cylindrical support 14 extending vertically upward from the bottom of the chamber 10.

[0071] An annular exhaust passage 18 is formed between a conductive cylindrical support portion (inner wall portion) 16 extending vertically upward from the bottom of the chamber 10 along the outer circumference of the cylindrical support portion 14 and the side wall of the chamber 10. An exhaust port 22 is provided at the bottom of the exhaust passage 18.

[0072] The exhaust port 22 is connected to an exhaust device 26 via an exhaust pipe 24. The exhaust device 26 includes a vacuum pump such as a turbomolecular pump and can reduce the pressure of the processing space PS in the chamber 10 to a desired vacuum level. The chamber 10 is preferably maintained at a constant pressure in the range of 10 mTorr to 3500 mTorr.

[0073] On the susceptor 12, a wafer W as a substrate processing target is placed via the tray TR1, and an edge ring ER is arranged to surround the wafer W. The edge ring ER is made of a conductive material such as Si or SiC or an insulating material such as SiO2, and is placed on the upper surface of the tray TR1.

[0074] In addition, an electrostatic chuck 40 for wafer adsorption is provided on the upper surface of the susceptor 12. The electrostatic chuck 40 is formed by sandwiching a sheet-like or mesh-like conductor between a film-like or plate-like dielectric. The conductor in the electrostatic chuck 40 is electrically connected to a DC power supply 42 disposed outside the chamber 10 via a switch 44 and a power supply line 46. The wafer W is electrostatically adsorbed to the electrostatic chuck 40 via the tray TR1 by utilizing the Coulomb force generated in the electrostatic chuck 40 by the DC voltage applied from the DC power supply 42 to the electrostatic chuck 40 when the switch 44 is turned on.

[0075] An annular coolant chamber 48 extending in the circumferential direction is provided inside the susceptor 12. A coolant (e.g., cooling water) at a predetermined temperature is circulated and supplied to the coolant chamber 48 from a cooling unit (not shown) via pipes 50 and 52. By controlling the temperature of the coolant, the temperature of the wafer W can be controlled. Furthermore, in order to improve the accuracy of the temperature of the wafer W, a heat transfer gas (e.g., He gas) from a heat transfer gas supply unit (not shown) is supplied between the tray TR1 and the wafer W via a gas supply pipe 51 and a gas passage 56 in the susceptor 12.

[0076] A disk-shaped upper electrode 60 is provided on the top of the chamber 10 so as to be parallel to (ie, face) the susceptor 12. The upper electrode 60 is mounted on the top of the chamber 10 via a ring-shaped insulator 98 made of, for example, ceramic.

[0077] The upper electrode 60 includes: an electrode plate 64 that is exactly face-to-face with the base 12; and an electrode support 66 that can detachably support the electrode plate 64 from the back (top) of the electrode plate 64. As the material of the electrode plate 64, a conductive material such as Si or Al is preferred. The electrode support 66 is composed of, for example, aluminum that has been subjected to an acid-resistant aluminum treatment. As described above, in the processing device 4, the disc-shaped base 12 (i.e., the lower electrode) and the disc-shaped upper electrode 60 are arranged parallel to each other.

[0078] The gas supply unit 76 supplies the processing gas to the chamber 10. In order to supply the processing gas to the processing space PS set between the upper electrode 60 and the susceptor 12, the upper electrode 60 is used as a shower head. In more detail, a gas diffusion chamber 72 is provided inside the electrode support 66, and a large number of gas release holes 74 that penetrate from the gas diffusion chamber 72 to the susceptor 12 side are formed in the electrode support 66 and the electrode plate 64. The gas inlet port 72a provided at the upper part of the gas diffusion chamber 72 is connected to the gas supply pipe 78 extending from the gas supply unit 76.

[0079] The upper electrode 60 is connected to the first RF (Radio Frequency) power supply 150 via the first matcher 152. The first matcher 152 can match the impedance of the first RF power supply 150 side with the impedance of the load (mainly the electrode, plasma, chamber) side. The first RF power supply 150 can apply a high-frequency voltage for plasma generation having a frequency in the range of 30 to 150 MHz to the upper electrode 60. By applying a high-frequency voltage to the upper electrode 60 in this way, plasma can be generated in a preferred dissociated state and at a high density in the processing space PS, and plasma processing can be performed under lower pressure conditions. The frequency of the output voltage of the first RF power supply 150 is preferably 50 to 80 MHz, and is typically adjusted to a frequency of 60 MHz or thereabouts.

[0080] The susceptor 12 as the lower electrode is connected to the second RF power supply 160 via the second matching device 162 and the connecting rod 36. The second matching device 162 can match the impedance of the second RF power supply 160 side with the impedance of the load (mainly the electrode, plasma, chamber) side. The second RF power supply 160 can apply a high-frequency voltage for bias having a frequency in the range of several hundred kHz to several tens of MHz to the susceptor 12. The frequency of the output voltage of the second RF power supply 160 is typically adjusted to 2 MHz or 13.56 MHz.

[0081] <Shape of tray, edge ring and wafer>

[0082] Figure 3 is a diagram showing an example of the shape of a tray. Figure 4 is a diagram showing an example of the shape of an edge ring placed on a tray. Figure 5 This is a diagram showing an example of the shape of an edge ring and a wafer placed on a tray.

[0083] like Figure 3 As shown, the tray TR1 has a disk-like shape and includes: a conductive tray body 101; a dielectric film 102 formed so as to cover the periphery of the tray body 101; a lift pin contact portion 103; and through holes 104, 105, and 106. The through hole 104 is used to pass through the gas passage 56 ( Figure 2 ) is a through hole for supplying heat transfer gas between the tray TR1 and the wafer W. The through hole 105 is a through hole for the lift pins for lifting the wafer W. The through hole 106 is a through hole for the lift pins for lifting the edge ring ER. The lift pin contact portion 103 is a portion of the back surface of the tray body 101 that is contacted by the lift pins for lifting the tray TR1, and the dielectric film 102 is not formed. The lift pin contact portion 103 can be formed as a recessed portion corresponding to the shape of the lift pin. In addition, a substrate mounting portion 108 capable of mounting the wafer W and an edge ring mounting portion 107 capable of mounting the edge ring ER are formed on the upper surface of the tray TR1. The edge ring mounting portion 107 is provided around the substrate mounting portion 108. That is, the substrate mounting portion 108 and the edge ring mounting portion 107 each include: a conductive tray body 101; and a dielectric film 102 formed so as to cover the periphery of the tray body 101. The edge ring mounting portion 107 is formed at a position lower than the substrate mounting portion 108. The dielectric film 102 only needs to be formed on at least the upper surface of the tray body 101.

[0084] In addition, if Figure 4 As shown, the edge ring ER has an annular shape, and the outer peripheral portion of the edge ring ER is circular, while a flat portion FL having a flat shape is formed in a part of the inner peripheral portion of the edge ring ER. The edge ring ER is placed on the edge ring placement portion 107 on the upper surface of the tray TR1. In addition, the inner peripheral portion of the edge ring ER is formed to be thinner than the outer peripheral portion of the edge ring ER. That is, the inner peripheral portion of the edge ring ER is formed so that when the edge ring ER is placed on the edge ring placement portion 107, the upper surface of the inner peripheral portion of the edge ring ER is substantially the same height as the upper surface of the substrate placement portion 108 or is lower than the upper surface of the substrate placement portion 108. In addition, the outer peripheral portion of the edge ring ER is formed so that when the wafer W is placed on the substrate placement portion 108 on the upper surface of the tray TR1, the upper surface of the outer peripheral portion of the edge ring ER is substantially the same height as the upper surface of the wafer W or is higher than the upper surface of the wafer W.

[0085] In addition, if Figure 5As shown, the wafer W has a disc-like shape, and a V-shaped notch NT is formed in a part of the outer periphery of the wafer W. The wafer W is placed on the substrate placement portion 108 on the upper surface of the tray TR1. When the wafer W is placed on the substrate placement portion 108, the wafer W is placed in a manner such that the notch NT overlaps with the flat portion FL of the edge ring ER. As described above, the substrate placement portion 108 includes: a support surface that supports the back surface of the wafer W; and through holes 104 and 105 that penetrate the tray body 101 and the dielectric film 102. In addition, the area of ​​the substrate placement portion 108 is smaller than the area of ​​the wafer W. That is, when the wafer W is placed, the outer periphery of the wafer W where the notch NT is formed is located outside the outer periphery of the substrate placement portion 108 and on the inner periphery of the edge ring ER.

[0086] As described above, the wafer W and the edge ring ER can be placed on the tray TR1.

[0087] <Structure of the mounting device>

[0088] Figure 6 is a diagram of a structural example of a loading device. Figure 6 The loading device 12A shown is used as the load lock chamber 12. Figure 6 In the embodiment, the placing device 12A includes a container 201, a rotation angle sensor 202, a horizontal position sensor 203, a placing table 204, a first lifting pin 205, a second lifting pin 206, a third lifting pin 207, a DC power supply 208, and a switch 209. The rotation angle sensor 202 is provided on the upper wall of the container 201, and the horizontal position sensor 203 is provided on the side wall of the container 201. The placing table 204 is accommodated in the conductive container 201. In addition, the placing device 12A includes: a first lifting mechanism (not shown) for lifting and lowering the first lifting pin 205; a second lifting mechanism (not shown) for lifting and lowering the second lifting pin 206 independently of the first lifting pin 205; and a third lifting mechanism (not shown) for lifting and lowering the third lifting pin 207 independently of the first lifting pin 205 and the second lifting pin 206. The first lifting pin 205, the second lifting pin 206, and the third lifting pin 207 are made of a conductive material (for example, Ni, Al, etc.). The first lift pin 205 is connected to a DC power supply 208 via a switch 209. The second lift pin 206 and the third lift pin 207 are grounded. In addition, the mounting device 12A is provided with a vacuum pump (not shown) as an exhaust mechanism capable of making the pressure inside the container 201 lower than the atmospheric pressure, and a leak valve (not shown) for returning the pressure inside the container 201 to the atmospheric pressure.

[0089] <Transportation Method in Substrate Processing System>

[0090] Figure 7 This is a flowchart showing an example of the processing procedure of the transport method. Figure 8 to Figure 11This is a diagram showing an example of a transportation method.

[0091] exist Figure 7 In the process, first, the pallet TR1 is conveyed to the load lock chamber 12 by the first conveying mechanism 15 in step S1. The pallet TR1 is stored in the pallet storage unit 5 connected to the atmospheric conveying chamber 11. The pallet TR1 is conveyed from the pallet storage unit 5 by the first conveying mechanism 15, and the pallet TR1 placed on the picker 15c is conveyed into the load lock chamber 12 (into the loading device 12A). At this time, the pressure in the load lock chamber 12 becomes the atmospheric pressure.

[0092] Next, in step S2, the tray TR1 is placed on the placement table 204 in the load lock chamber 12. Figure 8 As shown, the first lift pins 205 are raised to separate the tray TR1 from the picker 15 c (ie, the tray TR1 is raised). At this time, the first lift pins 205 contact the lift pin contact portions 103 on the back surface of the tray body 101 .

[0093] Next, while keeping the position of the first lift pin 205 Figure 8 In the state of the position shown, the picker 15 c is withdrawn from the load lock chamber 12 .

[0094] Next, the first lift pins 205 are lowered (that is, the tray TR1 is lowered), so that the tray TR1 is placed on the mounting table 204 .

[0095] Next, in step S3, the edge ring ER is transported to the load lock chamber 12 using the first transport mechanism 15. The edge ring ER is stored in the edge ring storage unit 2 connected to the atmospheric transport chamber 11. The edge ring ER is transported from the edge ring storage unit 2 by the first transport mechanism 15, and the edge ring ER placed on the picker 15c is transported into the load lock chamber 12.

[0096] Next, in step S4, the edge ring ER is placed on the tray TR1 of the placement table 204 placed in the load lock chamber 12. Fig. 9 As shown, the third lift pins 207 are raised to separate the edge ring ER from the pickup 15c (i.e., the edge ring ER is raised). At this time, the third lift pins 207 contact the back surface of the edge ring ER via the through holes 106 of the tray TR1. Since the third lift pins 207 are grounded, the front end of the third lift pins 207 contact the back surface of the edge ring ER, thereby enabling the edge ring ER to be de-staticized.

[0097] Next, while keeping the position of the third lift pin 207 Fig. 9 In the state of the position shown, the picker 15 c is withdrawn from the load lock chamber 12 .

[0098] Next, the edge ring ER is placed on the tray TR1 by lowering the third lift pins 207 (that is, lowering the edge ring ER).

[0099] Next, in step S5, the position of the edge ring ER placed on the tray TR1 is measured. Fig.10 As shown, the position of the edge ring ER placed on the tray TR1 is measured using the rotation angle sensor 202 and the horizontal position sensor 203, and the position information of the edge ring ER is acquired. A signal indicating the acquired position information is transmitted to the aligner 3. The rotation angle sensor 202 can be realized by using, for example, a CCD (Charge-Coupled Device). By photographing the flat portion FL from above the edge ring ER, the rotation angle RA of the edge ring ER relative to a predetermined reference position RP is measured, and the rotation angle information RAI indicating the rotation angle RA is acquired as the first position information of the edge ring ER. The horizontal position sensor 203 can be realized by using, for example, a laser beam irradiated toward the edge ring ER from the side of the edge ring ER. By measuring the distance between the horizontal position sensor 203 and the outer periphery of the edge ring ER, the horizontal position deviation HP of the edge ring ER relative to the predetermined reference position RP is measured, and the horizontal position information HPI indicating the position deviation HP is acquired as the second position information of the edge ring ER. Thus, the position information transmitted from the load lock chamber 12 to the aligner 3 includes the rotation angle information RAI of the edge ring ER and the horizontal position information HPI of the edge ring ER.

[0100] Next, in step S6, the position of the wafer W is adjusted in the aligner 3. The wafer W is transported from the FOUP 14 to the aligner 3 by the first transport mechanism 15. Then, the aligner 3 adjusts the position of the wafer W based on the position information transmitted from the load lock chamber 12. That is, the aligner 3 rotates the wafer W based on the rotation angle information RAI of the edge ring ER, and on the other hand, adjusts the horizontal position of the wafer W based on the horizontal position information HPI of the edge ring ER. The details of adjusting the position of the wafer W will be described later.

[0101] Next, in step S7, the wafer W is transported to the load lock chamber 12 using the first transport mechanism 15. The position-adjusted wafer W is placed on the picker 15c of the first transport mechanism 15, and is transported from the aligner 3 to the top of the mounting table 204 in the load lock chamber 12.

[0102] Next, in step S8, the wafer W is placed on the tray TR1 of the mounting table 204 placed in the load lock chamber 12. Fig.11As shown in FIG. 1 , the second lift pins 206 are raised to separate the wafer W from the pickup 15c (i.e., the wafer W is raised). At this time, the second lift pins 206 contact the back surface of the wafer W through the through holes 105 of the tray TR1. Since the second lift pins 206 are grounded, the front ends of the second lift pins 206 contact the back surface of the wafer W, thereby enabling the wafer W to be statically removed.

[0103] Next, while keeping the position of the second lift pin 206 Fig.11 In the state of the position shown, the picker 15 c is withdrawn from the load lock chamber 12 .

[0104] Next, the second lift pins 206 are lowered (ie, the wafer W is lowered) to place the wafer W on the tray TR1.

[0105] Next, in step S9, a DC voltage is applied to the tray body 101. The vacuum pump starts exhausting the container 201, and the first lift pins 205 are brought into contact with the lift pin contact portion 103. The switch 209 is turned on to connect the first lift pins 205 to the DC power supply 208, and the DC power supply 208 applies a positive DC voltage to the first lift pins 205. By applying a positive DC voltage to the first lift pins 205, a positive DC voltage can be applied to the tray body 101 from the DC power supply 208 via the first lift pins 205 and the lift pin contact portion 103. The wafer W is electrostatically attracted to the tray TR1 by the Coulomb force generated on the tray TR1 by the DC voltage applied to the tray body 101. In addition, when the material of the edge ring ER is a conductive material such as Si or SiC, the edge ring ER is also electrostatically attracted to the tray TR1. As described above, the wafer W is attracted to the tray TR1 by causing the first lift pins 205 to contact the back surface of the tray body 101 and applying a DC voltage to the tray body 101 via the first lift pins 205 .

[0106] Next, in step S10, the tray TR1 carrying the edge ring ER and the wafer W is carried into the processing device 4. The switch 209 is turned off to stop the application of the DC voltage to the tray body 101, and the first lift pins 205 are raised in a state where the front ends of the first lift pins 205 are in contact with the back surface of the tray TR1. After the application of the DC voltage to the tray body 101 is stopped, the tray TR1 is also charged, so that the wafer W can be attracted and held on the tray TR1.

[0107] Next, the tray TR1 is transported out by the second transport mechanism 16 in the vacuum transport chamber 13. The picker 16c of the second transport mechanism 16 is inserted into the load lock chamber 12 so that the picker 16c is positioned below the tray TR1 lifted by the first lift pins 205.

[0108] Next, the first lift pins 205 are lowered to place the tray TR1 on the picker 16 c. The picker 16 c is then withdrawn from the load lock chamber 12 and the tray TR1 carrying the wafer W and edge ring ER is transported from the load lock chamber 12 to the processing apparatus 4 by the second transport mechanism 16 .

[0109] During the time when the tray TR1 carrying the wafer W and the edge ring ER is transported from the load lock chamber 12 to the processing apparatus 4, the tray TR1 is still in a charged state, so the wafer W after position adjustment continues to be adsorbed on the tray TR1. Thus, the position of the wafer W after position adjustment can be prevented from shifting during the process of transporting the wafer W from the load lock chamber 12 to the processing apparatus 4.

[0110] In addition, the edge ring ER is generally heavier than the wafer W. Therefore, when the tray TR1 is transported from the load lock chamber 12 to the processing device 4, the edge ring ER is less likely to shift than the wafer W. Therefore, even if the edge ring ER is made of an insulating material such as SiO2, transportation using the tray TR1 is effective. However, when the edge ring ER is made of a conductive material such as Si or SiC, not only the wafer W but also the edge ring ER can be adsorbed to the tray TR1, which is more effective.

[0111] The tray TR1 transported to the processing device 4 is placed on the susceptor 12 (electrostatic chuck 40) in the processing device 4. The susceptor 12 is provided with lifting pins (not shown), and the tray TR1 is placed on the susceptor 12 (electrostatic chuck 40) in the same order as step S2. After the tray TR1 is placed on the electrostatic chuck 40, the switch 44 is turned on, and a DC voltage is applied to the electrostatic chuck 40 by the DC power supply 42. As a result, the wafer W is attracted to the electrostatic chuck 40 via the tray TR1.

[0112] Next, in step S11 , plasma processing such as etching is performed.

[0113] After the plasma treatment is completed, the tray TR1 carrying the edge ring ER and the wafer W is sent out from the processing device 4 in step S12. The tray TR1 sent out from the processing device 4 is placed on the placement table 204 in the load lock chamber 12. After the pressure in the load lock chamber 12 is restored to atmospheric pressure using a leak valve (not shown), the wafer W is sent out from the load lock chamber 12 by the first transport mechanism 15. The sent out wafer W is stored in the FOUP 14.

[0114] The edge ring ER and the tray TR1 may be stored in the edge ring storage unit 2 and the tray storage unit 5, respectively, or may not be stored. A new wafer W may be introduced while the edge ring ER and the tray TR1 are placed on the stage 204 in the load lock chamber 12. That is, the next process may be started from step S5 or step S6. In addition, when replacing the consumed edge ring ER, the consumed edge ring ER may be stored in the edge ring storage unit 2 and a new edge ring ER may be introduced. That is, the next process may be started from step S3.

[0115] <Attraction of electrostatic chuck>

[0116] The tray TR1 carried into the processing apparatus 4 in step S10 is placed on the electrostatic chuck 40. Therefore, the wafer W is not placed directly on the electrostatic chuck 40 but is placed via the tray TR1. Fig.12 This is a graph showing the relationship between the electrostatic capacitance per unit area and the attraction force per unit area of ​​the electrostatic chuck of the processing device. For example, when the thickness of the dielectric layer above the electrode built into the electrostatic chuck is 0.3 mm, the thickness of the dielectric film 102 on the upper surface of the tray body 101 and the dielectric film 102 on the lower surface of the tray body 101 are 0.1 mm, and the relative dielectric constant of each dielectric is 8.5, the electrostatic capacitance of the tray TR1 is 0.124 μF / m 2 In this case, when a DC voltage of 5 kV is applied to the electrostatic chuck 40 by the DC power supply 42, a Coulomb force of attraction of about 170 Torr per unit area can be obtained in the electrostatic chuck 40. Thus, when a heat-conducting gas is supplied between the tray TR1 mounted on the electrostatic chuck 40 and the wafer W in the processing apparatus 4, a sufficient attraction force can be obtained by utilizing the pressure of the heat-conducting gas to prevent the wafer W from leaving.

[0117] <Adjustment of Wafer Position>

[0118] Fig.13 is a diagram showing the positional relationship between the rotation angle sensor and the horizontal position sensor. Fig.13 As shown, in the placement device 12A, the edge ring ER is placed on the tray TR1 so that the flat portion FL is located below the rotation angle sensor 202. In addition, in the placement device 12A, horizontal position sensors 203 are provided at three locations around the edge ring ER placed on the tray TR1.

[0119] Fig.14 This is a diagram showing the correct positional relationship between the edge ring and the wafer. Fig.14As shown, in the correct positional relationship between the edge ring ER and the wafer W, the center of the edge ring ER coincides with the center of the wafer W, and the apex of the concave portion of the notch NT of the wafer W is located at the center of the flat portion FL of the edge ring ER. Therefore, in order to set the correct positional relationship between the edge ring ER and the wafer W, a straight reference line L1 and a straight reference line L2 are set in advance. The reference position RP is defined by the horizontal reference line L1 and the vertical reference line L2. The reference line L1 and the reference line L2 intersect each other perpendicularly. In the correct positional relationship between the edge ring ER and the wafer W, the intersection of the reference line L1 and the reference line L2 coincides with the center of the edge ring ER and the center of the wafer W, and on the reference line L1, the apex of the concave portion of the notch NT is located at the center of the flat portion FL.

[0120] Figure 15 to Figure 18 This is a diagram showing an example of wafer position adjustment. Fig.15 and Fig.17 Indicates the position of the edge ring ER placed on the tray TR1, Fig.16 and Fig.18 The position of the wafer W after position adjustment is shown.

[0121] The edge ring ER placed on the tray TR1 is measured by using the horizontal position sensor 203. Fig.15 As shown in FIG. 1 , the horizontal positional offset HP relative to the reference position RP defined by the reference line L1 and the reference line L2 is measured. In the measurement of the positional offset HP, as shown in FIG. Fig.15 As shown in FIG. 1 , a horizontal straight line LA and a vertical straight line LB are set relative to the edge ring ER placed on the tray TR1. The straight lines LA and LB intersect each other perpendicularly, the intersection of the straight lines LA and LB coincides with the center of the edge ring ER, and the center of the flat portion FL is located on the straight line LA. Then, the horizontal position sensor 203 is used to measure the direction and amount of deviation of the intersection of the straight lines LA and LB relative to the intersection of the reference line L1 and the reference line L2 as the position deviation HP. Then, in the adjustment of the horizontal position of the wafer W performed in the aligner 3, as shown in FIG. Fig.16 As shown in FIG. 1 , the center position of the wafer W is moved from the intersection of the reference line L1 and the reference line L2 by the amount of the position offset HP. Thus, the center of the edge ring ER placed on the tray TR1 can be moved by the amount of the position offset HP to coincide with the center of the wafer W, so that the gap between the inner periphery of the edge ring ER and the outer periphery of the wafer W arranged in the edge ring ER can be constant over the entire periphery.

[0122] In addition, the edge ring ER placed on the tray TR1 is measured using the rotation angle sensor 202. Fig.17 The rotation angle RA is measured relative to the reference position RP defined by the reference line L1 and the reference line L2 as shown in FIG. Fig.17As shown, a horizontal straight line LC and a vertical straight line LD are set relative to the edge ring ER placed on the tray TR1. The straight line LC and the straight line LD intersect each other perpendicularly, and the intersection of the straight line LC and the straight line LD coincides with the center of the edge ring ER and the intersection of the reference line L1 and the reference line L2, and the center of the flat portion FL is located on the straight line LC. Therefore, the rotation angle RA of the straight line LC relative to the reference line L1 is measured by the rotation angle sensor 202. Then, by rotating the wafer W in the aligner 3, the wafer W is rotated from the reference position RP by the rotation angle RA. As a result, as shown in FIG. Fig.18 As shown, the wafer W can be placed on the flat portion FL by shifting the rotation angle RA so that the apex of the recessed portion of the notch NT of the wafer W is located at the center of the flat portion FL of the edge ring ER placed on the tray TR1.

[0123] In the present embodiment, the edge ring ER and the wafer W are placed on the tray TR1 in the load lock chamber 12 and transported to the processing device 4. The placement position of the edge ring ER is measured in the load lock chamber 12, and the position of the wafer W is adjusted based on the measurement result, and the wafer W is placed on the tray TR1. Therefore, even if there is a deviation in the placement position of the edge ring ER, the wafer W can be transported to a relatively correct position relative to the edge ring ER. In addition, since the tray TR1 can electrostatically adsorb the wafer W and the edge ring ER, the edge ring ER and the wafer W placed on the tray TR1 can be transported to the processing device 4 without deviation in the load lock chamber 12. In addition, when the wafer W is transported to the edge ring ER arranged in the processing device 4, the relative position of the edge ring ER and the wafer W may be offset due to the error generated when the wafer W is transported from the load lock chamber 12 to the processing device 4. However, in the present embodiment, the wafer W is transported to the edge ring ER in the load lock chamber 12, and therefore, the relative position of the edge ring ER and the wafer W does not deviate due to the transport error from the load lock chamber 12 to the processing device 4. That is, in this embodiment, the wafer W can be transported to a relatively accurate position relative to the edge ring ER in the load lock chamber 12, and the wafer W and the edge ring ER can be transported from the load lock chamber 12 to the processing device 4 while maintaining their relative positions. Therefore, the wafer W can be uniformly plasma-processed in the processing device 4.

[0124] The embodiments of the present invention are illustrative in all aspects and should not be considered as restrictive. In fact, the above-mentioned embodiments can be specifically implemented in various ways. In addition, the above-mentioned embodiments can be omitted, replaced, and changed in various ways without departing from the scope of the claims and their ideas.

[0125] For example, in the above-mentioned embodiment, the example in which the tray storage unit 5 is connected to the atmospheric transport chamber 11 is described, but it is also possible to connect the tray storage unit 5 to the atmospheric transport chamber 11. Fig.19 As shown, the tray storage portion 5 is connected to the vacuum transport chamber 13 . Fig.19 1 is a diagram showing a configuration example of a substrate processing system in which a tray storage unit 5 is connected to a vacuum transfer chamber. In addition, the edge ring storage unit 2 may be connected to the vacuum transfer chamber 13. In the above case, the edge ring and / or tray is transported into the load lock chamber 12 by the second transport mechanism 16.

[0126] In the above-described embodiment, the edge ring and the wafer are placed on the tray in the load lock chamber 12, but this may be performed outside the load lock chamber 12. For example, a placement device 12A different from the load lock chamber 12 may be connected to the atmospheric transfer chamber 11, and the tray on which the edge ring and the wafer are placed in the placement device 12A may be transported into the load lock chamber 12.

[0127] In the above-mentioned embodiment, in step S2, the tray TR1 is placed on the mounting table 204, but it is not necessary to place it there. In step S3, the first lift pins 205 may be lowered to a level that allows the edge ring ER to be fed in, and the processing after step S3 may be performed while the tray TR1 is supported by the first lift pins 205.

[0128] In the above-described embodiment, the pallets are stored in the pallet storage unit 5, the edge rings are stored in the edge ring storage unit 2, and these are respectively transported to the load lock chamber 12, but the pallets on which the edge rings are preliminarily loaded may be stored in the pallet storage unit 5. In this case, the processing of step S3 and step S4 can be omitted. In addition, the edge ring storage unit 2, the third lifting pin 207 of the loading device 12A for lifting the edge ring, and the through hole 106 of the pallet TR1 through which the third lifting pin 207 passes can be omitted.

[0129] In the above-mentioned embodiment, an example is described in which an edge ring whose inner circumference is located below the outer circumference of the wafer W is used, but the inner circumference of the edge ring may not be located below the outer circumference of the wafer W. That is, in the tray TR1, the edge ring mounting portion 107 is formed at a position lower than the substrate mounting portion 108, but the edge ring mounting portion may be formed at a position higher than the substrate mounting portion or at the same position as the substrate mounting portion.

[0130] Fig. 20 FIG. 1 is a diagram showing an example of a tray in which an edge ring mounting portion and a substrate mounting portion are formed at the same height. Fig. 20In the embodiment, the tray TR2 has a disk-like shape and includes: a conductive tray body 251; a dielectric film 252 formed so as to cover the periphery of the tray body 251; an annular groove 253; an annular protective member 254 received in the groove 253; a lift pin contact portion 255; and through holes 256 and 257. The dielectric film 252 only needs to be formed on at least the upper surface of the tray body 251. The through hole 256 is used to pass through the gas passage 56 ( Figure 2 ) is a through hole for supplying heat-conducting gas between the tray TR2 and the wafer W. In addition, the through hole 257 is a through hole for the lifting pins for lifting the wafer W. In addition, the through hole for the lifting pins for lifting the edge ring ER is not provided on the tray TR2, but the through hole may be provided. In addition, a substrate mounting portion 259 capable of mounting the wafer W and an edge ring mounting portion 258 capable of mounting the edge ring ER are formed on the upper surface of the tray TR2. The edge ring mounting portion 258 is provided around the substrate mounting portion 259. The substrate mounting portion 259 and the edge ring mounting portion 258 are formed on the same plane.

[0131] In the tray TR2, the outer periphery of the wafer W does not overlap with the inner periphery of the edge ring ER, and therefore, the dielectric film between the wafer W and the edge ring ER is exposed to the plasma during the plasma treatment. Therefore, it is considered that the wafer W is contaminated by the dielectric film or the material constituting the tray body exposed due to the consumption of the dielectric film. Therefore, in the tray TR2, a protective member 254 is provided between the substrate mounting portion 259 and the edge ring mounting portion 258. The protective member 254 is accommodated in the groove 253 provided between the substrate mounting portion 259 and the edge ring mounting portion 258. The material of the protective member 254 is preferably the same as the material of the edge ring ER. In the tray TR2, the shapes of the edge ring ER and the tray TR2 can be simplified.

[0132] In the above-described embodiment, the DC voltage is applied to the tray body 101 by the first lift pins 205 connected to the DC power supply 208. However, the DC voltage may be applied to the tray body 101 without using the lift pins.

[0133] Fig.21 This is a diagram showing an example of applying a DC voltage to the tray body without using lift pins. Fig.21 The loading device 12B shown is used as the load lock chamber 12. Figure 6 The description and / or illustration of the overlapping parts of the loading device 12A are omitted. Fig.21In the embodiment, the mounting device 12B includes a conductive mounting table 352, an insulating support portion 351, a DC power supply 353, and conductive lifting pins 501. The lifting pins 501 are grounded. The tray TR3 is mounted on the mounting table 352. The edge ring ER and the wafer W are mounted on the tray TR3. The wafer W is mounted on the tray TR3 by the lifting and lowering of the lifting pins 501. Thus, the wafer W is de-electrified when it is lifted and lowered by the lifting pins 501.

[0134] In the tray TR3, a dielectric film 361 is formed in a stacked manner on a conductive tray body 362. In the tray TR3, the dielectric film 361 is formed only on the upper surface of the tray body 362, and the lower surface of the tray body 362 is not covered with the dielectric film. Figure 3 The tray TR1 shown in FIG. 1 is different from the tray TR3. That is, a conductive tray main body 362 is exposed on the lower surface of the tray TR3. Therefore, when the tray TR3 carrying the edge ring ER and the wafer W is placed on the mounting table 352, a DC voltage is applied to the mounting table 352 by the DC power supply 353, thereby applying a DC voltage to the tray main body 362. As a result, a Coulomb force is generated in the tray TR3, and the wafer W is electrostatically attracted to the tray TR3.

[0135] Fig. 22 This is a diagram showing another example of applying a DC voltage to the tray body without using lift pins. Fig. 22 The loading device 12C shown is used as the load lock chamber 12. Fig.21 The description and / or illustration of the parts of the placing device 12B shown in the figure are omitted. The placing device 12C is similar to the placing device 12B in that the conductive placing table 352 is provided with a conducting terminal 361 on the upper surface thereof. Fig.21 The conducting terminal 361 may be formed by protruding a part of the conductive mounting table 352, or may be formed by a member different from the mounting table 352. For example, the conducting terminal 361 may be formed by a spring.

[0136] The tray TR4 is placed on the mounting table 352. The tray TR4 includes: a conductive tray body 451; a dielectric film 452 formed to cover the periphery of the tray body 451; and a DC power supply connection portion 453. The DC power supply connection portion 453 is a portion of the back side of the tray body 451 that is in contact with the conductive terminal 361, and the dielectric film 452 is not formed. The DC power supply connection portion 453 can be formed as a concave portion corresponding to the shape of the conductive terminal 361. The DC power supply connection portion 453 is provided in the tray TR4, which is similar to Figure 3When the tray TR4 carrying the edge ring ER and the wafer W is placed on the mounting table 352, the conducting terminal 361 of the mounting table 352 contacts the tray body 451 via the DC power supply connection portion 453. Thus, when the tray TR4 carrying the edge ring ER and the wafer W is placed on the mounting table 352, a DC voltage is applied to the mounting table 352 by the DC power supply 353, thereby applying a DC voltage to the tray body 451. Thus, a Coulomb force is generated on the tray TR4, and the wafer W is electrostatically attracted to the tray TR4.

[0137] Fig.23 This is a diagram showing another example of applying a DC voltage to the tray body without using lift pins. Fig.23 The loading device 12D shown is used as the load lock chamber 12. Fig. 22 The description and / or illustration of the parts of the loading device 12C shown in the figure are omitted. In the loading device 12D, the loading table 371 is composed of an insulating member, and the DC power supply 355 is not connected to the loading table 371. Fig. 22 The placement device 12C shown is different. A conductive conduction terminal 361 is provided on the upper surface of a placement table 371, and the conduction terminal 361 is directly connected to a DC power supply 355. The tray TR5 is placed on the placement table 371.

[0138] The tray TR5, like the tray TR4, includes: a conductive tray body 471; a dielectric film 472 formed so as to cover the periphery of the tray body 471; and a DC power supply connection portion 473. When the tray TR5 carrying the edge ring ER and the wafer W is placed on the mounting table 371, the conductive terminal 361 of the mounting table 371 contacts the tray body 471 via the DC power supply connection portion 473. Thus, in a state where the tray TR5 carrying the edge ring ER and the wafer W is placed on the mounting table 371, a DC voltage can be applied to the tray body 471 by the DC power supply 355. Thus, the Coulomb force is generated on the tray TR5 due to the DC voltage applied to the tray body 471, and the wafer W is electrostatically attracted to the tray TR5.

[0139] In the above-described embodiment, the wafer W is de-staticized using the grounded conductive lift pins. However, the wafer W may be de-staticized without using the lift pins.

[0140] Fig.24 This is a diagram showing an example of neutralizing the wafer W without using lift pins. Fig.24 The loading device 12E shown is used as the load lock chamber 12. Fig.21 The description and / or illustration of the overlapping parts of the loading device 12B are omitted. Fig.241, the loading device 12E has a grounding member 354. The loading device 12E is different from the loading device 12B in that the loading device 12E uses the grounding member 354 to remove static electricity from the wafer W instead of using the grounded lifting pins 501. The grounding member 354 is electrically connected to the grounded container 201. The grounding member 354 is configured to be able to contact the wafer W loaded on the tray TR6. Alternatively, the grounding member 354 may be able to contact not only the wafer W but also the edge ring ER.

[0141] like Fig.24 As shown, the wafer W is grounded by bringing the grounding member 354 into contact with the wafer W to remove static electricity. When the tray TR6 carrying the edge ring ER and the wafer W is placed on the mounting table 352, a DC voltage is applied to the mounting table 352 by the DC power supply 353. Thus, the Coulomb force is generated on the tray TR6 by the DC voltage applied to the mounting table 352, and the wafer W is electrostatically attracted to the tray TR6.

[0142] Fig.25 FIG. 1 is a diagram showing another example of eliminating static electricity from the wafer W without using lift pins. Fig.25 The loading device 12F shown is used as the load lock chamber 12. Fig. 22 The description and / or illustration of the overlapping parts of the loading device 12C are omitted. Fig.25 In FIG. 1 , the mounting device 12F includes an RF power source 392 connected to a conductive mounting table 382 .

[0143] When the tray TR7 carrying the edge ring ER and the wafer W is placed on the mounting table 382, ​​the DC power supply 391 is connected to the tray body 481 via the DC power supply connection portion 483. In a state where the DC power supply 391 is connected to the tray body 481, a DC voltage is applied to the tray body 481 by the DC power supply 391. In addition, the RF power supply 392 applies a high-frequency voltage for plasma generation having a frequency in the range of 30 to 150 MHz to the mounting table 382. By applying a high-frequency voltage to the mounting table 382 in this way, plasma PLS can be generated in the container 201. Then, the edge ring ER and the wafer W are grounded via the plasma PLS generated in the container 201. Thus, a Coulomb force is generated in the tray TR7 by the DC voltage applied to the tray body 481, and the wafer W is electrostatically adsorbed to the tray TR7.

[0144] Furthermore, in the above-described embodiment, the tray is configured to function as a monopolar electrostatic chuck, but may be configured to function as a bipolar electrostatic chuck.

[0145] Fig.26 FIG. 1 is a diagram showing an example of a tray functioning as a bipolar electrostatic chuck. Fig.26, the tray TR8 has a disc-like shape and includes: a conductive first tray body 302; a conductive second tray body 301; a dielectric film 303 formed in a manner covering the periphery of the first tray body 302 and the second tray body 301; an insulating layer 304; lift pin contact portions 305, 306; and through holes 307, 308. The tray TR8 is different from the tray TR1 in that the tray body is divided into the first tray body 302 and the second tray body 301 by the insulating layer 304, and lift pin contact portions are respectively provided on the first tray body 302 and the second tray body 301. The insulating layer 304 electrically separates the first tray body 302 and the second tray body 301 in the horizontal direction. The through hole 307 is used to pass through the gas passage 56 ( Figure 2 ) A through hole for supplying heat transfer gas between the tray TR2 and the wafer W. The through hole 308 is a through hole for lift pins.

[0146] Fig. 27 It is a figure which shows an example of the placement device which places the tray TR8. Fig. 27 The loading device 12G shown is used as the load lock chamber 12. Fig. 27 In the embodiment, the placing device 12G includes a first lifting pin 401, an insulating second lifting pin 409, a first DC power source 407, a second DC power source 405, and switches 406 and 408. Figure 6 The loading device 12A shown in the figure is different. The first lifting pin 401 has a conductive first pin 404, a conductive second pin 403, and an insulating support portion 402 connecting the first pin 404 and the second pin 403. In addition, the loading device 12G includes: a first lifting mechanism (not shown) for lifting the first lifting pin 401; and a second lifting mechanism (not shown) for lifting the second lifting pin 409 independently of the first lifting pin 401. The first pin 404 is connected to the first DC power supply 407 via a switch 408, and the second pin 403 is connected to the second DC power supply 405 via a switch 406.

[0147] like Fig. 27As shown, the tray TR9 on which the wafer W and the edge ring ER are placed is placed on the stage 204. The first pin 404 and the second pin 403 are in contact with the lift pin contact parts 305 and 306. By turning on the switch 408, the first pin 404 is connected to the first DC power supply 407, and the first DC power supply 407 applies a positive DC voltage to the first pin 404. By applying the positive DC voltage to the first pin 404, a positive DC voltage is applied to the first tray body 302 from the first DC power supply 407 via the first pin 404 and the lift pin contact part 306. In addition, by turning on the switch 406, the second pin 403 is connected to the second DC power supply 405, and the second DC power supply 405 applies a negative DC voltage to the second pin 403. By applying a negative DC voltage to the second pins 403, a negative DC voltage is applied from the second DC power supply 405 to the second tray body 301 via the second pins 403 and the lift pin contact portion 305. The wafer W is electrostatically attracted to the tray TR2 by the Coulomb force generated on the tray TR2 by the DC voltage applied to the first tray body 302 and the second tray body 301. In addition, when the material of the edge ring ER is a conductive material such as Si or SiC, the edge ring ER is also electrostatically attracted to the tray TR2.

[0148] In the above-described embodiment, in step S6, the aligner 3 rotates the wafer W and adjusts the horizontal position of the wafer W. However, the horizontal position of the wafer W may be adjusted by controlling the first conveying mechanism 15 based on the horizontal position information HPI of the edge ring ER. That is, the wafer W is conveyed to the top of the mounting table 204 by the first conveying mechanism 15 based on the horizontal position information HPI of the edge ring ER, thereby adjusting the horizontal position of the wafer W so that the center of the edge ring ER coincides with the center of the wafer W.

[0149] The operations of the components of the substrate processing systems 100 and 200 and the operations (processing sequence) of the entire substrate processing systems 100 and 200 are controlled by a control unit (not shown). An example of the control unit is a microcomputer.

[0150] In addition, the embodiments of the present invention are illustrative in all aspects and should not be considered restrictive. In fact, the above-mentioned embodiments can be implemented in various ways. In addition, the above-mentioned embodiments can be omitted, replaced, and changed in various ways without departing from the scope of the claims and their ideas. For example, in the above description, etching is described as an example of substrate processing, but the substrate processing to which the technology of the present invention can be applied is not limited to etching. For example, by changing the vacuum degree and processing gas of the processing space PS to a vacuum degree and conditions suitable for film formation, the technology of the present invention can also be applied to film formation, which is one of the substrate processing.

[0151] Regarding the above-mentioned embodiments, the following additional remarks are also disclosed.

[0152] (Note 1)

[0153] A tray capable of carrying a semiconductor substrate, comprising:

[0154] a substrate mounting portion capable of mounting the semiconductor substrate; and

[0155] an edge ring mounting portion disposed around the substrate mounting portion and capable of mounting an edge ring,

[0156] The substrate mounting portion and the edge ring mounting portion include:

[0157] An electrically conductive tray body; and

[0158] A dielectric film is formed on at least the upper surface of the tray body.

[0159] (Note 2)

[0160] In the pallet described in Note 1,

[0161] The edge ring mounting portion is formed at a position lower than the substrate mounting portion.

[0162] (Note 3)

[0163] In the tray described in Note 2,

[0164] The area of ​​the substrate mounting portion is smaller than the area of ​​the semiconductor substrate.

[0165] (Note 4)

[0166] In the pallet described in Note 1,

[0167] The substrate mounting portion and the edge ring mounting portion are formed on the same plane.

[0168] (Note 5)

[0169] In the tray described in Note 4,

[0170] A protective member is provided between the substrate mounting portion and the edge ring mounting portion.

[0171] (Note 6)

[0172] In the pallet described in Note 5,

[0173] The protection member is accommodated in a groove provided between the substrate mounting portion and the edge ring mounting portion.

[0174] (Note 7)

[0175] In the pallet described in Note 1,

[0176] The substrate mounting portion includes:

[0177] a supporting surface for supporting the back side of the semiconductor substrate; and

[0178] A through hole penetrates the tray body and the dielectric film.

[0179] (Note 8)

[0180] In the pallet described in Note 1,

[0181] It also includes an insulating layer that electrically separates the tray body in a horizontal direction.

[0182] (Note 9)

[0183] A loading device, comprising:

[0184] Loading table;

[0185] a first lifting pin for lifting and lowering the tray placed on the above-mentioned mounting table;

[0186] a second lift pin for lifting and lowering the semiconductor substrate placed on the tray;

[0187] a first lifting mechanism for lifting the first lifting pin;

[0188] a second lifting mechanism for lifting the second lifting pin independently of the first lifting pin; and

[0189] A voltage applying unit applies a voltage to the tray.

[0190] (Note 10)

[0191] In the loading device described in Appendix 9,

[0192] The voltage applying unit is a DC power source connected to the mounting table.

[0193] (Note 11)

[0194] In the loading device described in Appendix 9,

[0195] The mounting table has a conducting terminal for electrically connecting the tray and the mounting table.

[0196] (Note 12)

[0197] In the loading device described in Appendix 9,

[0198] The voltage applying unit is a first DC power source connected to the first lift pin.

[0199] (Note 13)

[0200] In the loading device described in Appendix 9,

[0201] The second lift pin is grounded.

[0202] (Note 14)

[0203] In the loading device described in Appendix 12,

[0204] The first lifting pin includes:

[0205] Pin 1;

[0206] Pin 2; and

[0207] an insulating support portion connecting the first pin and the second pin,

[0208] The first DC power supply is connected to the first pin.

[0209] The placement device further includes a second DC power source connected to the second pin.

[0210] (Note 15)

[0211] In the loading device described in Appendix 9,

[0212] The device further includes a third lift pin for lifting and lowering the edge ring placed on the tray.

[0213] (Note 16)

[0214] In the loading device described in Appendix 15,

[0215] The third lift pin is grounded.

[0216] (Note 17)

[0217] The loading device according to claim 9 further includes:

[0218] a container for housing the mounting table; and

[0219] An exhaust mechanism capable of making the pressure inside the container lower than the atmospheric pressure.

[0220] (Note 18)

[0221] In the loading device described in Appendix 9,

[0222] Also included is an RF power supply connected to the mounting table.

Claims

1. A conveying method in a substrate processing system, characterized in that: include: A tray-feeding step of feeding a tray capable of carrying a semiconductor substrate and an edge ring into a loading chamber provided with a loading table, the tray including a conductive tray body and a dielectric film formed on at least an upper surface of the tray body; A measuring step of measuring, in the loading chamber, the position of the edge ring loaded on the tray to obtain position information of the edge ring; An adjusting step of adjusting the position of the semiconductor substrate based on the position information; A substrate loading step of conveying the semiconductor substrate after position adjustment into the loading chamber and loading it on the tray; A step of applying a voltage to the tray body to electrostatically adsorb the semiconductor substrate to the tray; as well as A tray transporting step of transporting the tray on which the semiconductor substrate and the edge ring are mounted from the loading chamber to a processing device.

2. The conveying method according to claim 1, characterized in that: The application of the voltage in the adsorption step is performed by using first lift pins for placing the tray on the mounting table.

3. The conveying method according to claim 2, characterized in that: The adsorption step comprises: a contact step of causing the first lift pin to contact the back surface of the tray body; and A voltage applying step of applying a voltage to the first lift pin.

4. The conveying method according to claim 1, characterized in that: The application of the voltage in the adsorption step is performed using a conduction terminal provided on the mounting table.

5. The conveying method according to claim 1, characterized in that: The loading chamber is connected to an atmospheric transport chamber provided with a first transport mechanism.

6. The conveying method according to claim 1, characterized in that: The position information includes rotation angle information of the edge ring and horizontal position information of the edge ring.

7. The conveying method according to claim 6, characterized in that: The method further includes a substrate transporting step of transporting the semiconductor substrate to an upper portion of the mounting table by a first transporting mechanism. In the adjustment step performed before the substrate conveying step, the semiconductor substrate is rotated based on the rotation angle information.

8. The conveying method according to claim 6, characterized in that: The method further includes a substrate transporting step of transporting the semiconductor substrate to an upper portion of the mounting table by a first transporting mechanism. In the adjusting step performed before the substrate conveying step, the horizontal position of the semiconductor substrate is adjusted based on the horizontal position information.

9. The conveying method according to claim 6, characterized in that: The method further includes a substrate transporting step of transporting the semiconductor substrate to an upper portion of the mounting table by a first transporting mechanism. In the substrate transport step, the semiconductor substrate is transported to above the mounting table by the first transport mechanism based on the horizontal position information.

10. The conveying method according to claim 5, characterized in that: The substrate loading step comprises: a substrate raising step of raising the second lifting pins so as to separate the semiconductor substrate from the first conveying mechanism; and A substrate lowering step of placing the semiconductor substrate on the tray by lowering the second lift pins.

11. The conveying method according to claim 10, characterized in that: The second lift pin is grounded, and static electricity is removed from the semiconductor substrate during the substrate lifting step.

12. The conveying method according to claim 5, characterized in that: In the tray carrying step, the tray is carried into the loading chamber by the first conveying mechanism.

13. The conveying method according to claim 5, characterized in that: The loading chamber is a load lock chamber connected to the atmospheric transfer chamber and the vacuum transfer chamber provided with a second transfer mechanism.

14. The conveying method according to claim 13, characterized in that: In the tray carrying step, the tray is carried into the loading chamber by the second conveying mechanism.

15. The conveying method according to claim 1, characterized in that: The tray carried into the loading chamber in the tray carrying step carries the edge ring.

16. The conveying method according to claim 1, characterized in that: The step further includes an edge ring placing step of placing the edge ring on the tray between the tray feeding step and the measuring step.

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