Light emitting device and display device including the same

Abstract

The light emitting device includes: a substrate; a light emitting element disposed on the substrate and having a first end and a second end in a longitudinal direction; a first bank and a second bank disposed on the substrate and spaced apart from each other at a predetermined distance, and the light emitting element is interposed between the first bank and the second bank; a first electrode and a second electrode, the first electrode being disposed on the first bank to be adjacent to the first end of the light emitting element, and the second electrode being disposed on the second bank to be adjacent to the second end of the light emitting element; and a first contact electrode and a second contact electrode, the first contact electrode coupling the first electrode to the first end of the light emitting element, and the second contact electrode coupling the second electrode to the second end of the light emitting element. When viewed on a plane, the first electrode partially overlaps the first bank, and the second electrode partially overlaps the second bank.

Description

Technical Field

[0001] Various embodiments of the present disclosure relate to a light emitting device and a display apparatus having the same. Background Art

[0002] Light emitting diodes (hereinafter referred to as "LEDs") can have relatively satisfactory durability even under adverse environmental conditions and have good performance in terms of life span and brightness. Recently, research on technology for applying such LEDs to various display devices has become significantly more active.

[0003] As part of such research, a technology is being developed to manufacture a rod-type LED having a very small size corresponding to the micrometer or nanometer level by using an inorganic crystal structure (e.g., a structure obtained by growing a nitride-based semiconductor). For example, the rod-type LED can be manufactured to have a size small enough to form a pixel of a self-luminous display device, etc. Summary of the invention

[0004] Technical issues

[0005] Various embodiments of the present disclosure are directed to a light emitting device including a rod-type LED and a display apparatus having the same.

[0006] Technical Solution

[0007] According to an embodiment of the present disclosure, a light emitting device may include: a substrate; a light emitting element disposed on the substrate, and the light emitting element has a first end and a second end in a longitudinal direction; a first bank (or partition wall) and a second bank (or partition wall), disposed on the substrate, and the first partition wall and the second partition wall are spaced apart from each other by a predetermined distance, and the light emitting element is interposed between the first partition wall and the second partition wall; a first electrode and a second electrode, the first electrode being disposed on the first partition wall to be adjacent to the first end of the light emitting element, and the second electrode being disposed on the second partition wall to be adjacent to the second end of the light emitting element; and a first contact electrode and a second contact electrode, the first contact electrode coupling the first electrode to the first end of the light emitting element, and the second contact electrode coupling the second electrode to the second end of the light emitting element. When viewed on a plane, the first electrode may partially overlap the first partition wall, and the second electrode may partially overlap the second partition wall.

[0008] In an implementation, the first electrode may be disposed on a side surface of the first partition wall, and the second electrode may be disposed on a side surface of the second partition wall.

[0009] In an embodiment, the light-emitting device may further include: a passivation layer, which is arranged between the first partition wall and the second partition wall and the substrate; a first insulating layer, which is arranged between the passivation layer and the light-emitting element; a second insulating layer, which is arranged on the light-emitting element and exposes the first end and the second end of the light-emitting element to the outside; a third insulating layer, which is arranged on the first contact electrode to cover the first contact electrode; and a fourth insulating layer, which is arranged on the second contact electrode to cover the second contact electrode.

[0010] In an embodiment, the third and fourth insulating layers may include an insulating material having the same refractive index as that of the first and second electrodes.

[0011] In an embodiment, the light emitting device may further include a first alignment line and a second alignment line disposed between the substrate and the passivation layer, and the first alignment line and the second alignment line extend in one direction when viewed on a plane.

[0012] In an embodiment, the first alignment line may be electrically coupled to the first electrode, and the second alignment line may be electrically coupled to the second electrode.

[0013] In an embodiment, the light emitting device may further include: a first encapsulation layer disposed between the first electrode and the first contact electrode and covering the first electrode; and a second encapsulation layer disposed between the second electrode and the second contact electrode and covering the second electrode.

[0014] In an embodiment, the light emitting element may include: a first semiconductor layer (or conductive semiconductor layer) doped with a first conductive dopant; a second semiconductor layer (or conductive semiconductor layer) doped with a second conductive dopant; and an active layer disposed between the first conductive semiconductor layer and the second conductive semiconductor layer. The light emitting element may include a light emitting diode having a micrometer-scale or nanometer-scale cylindrical shape or a micrometer-scale or nanometer-scale prismatic shape.

[0015] According to an embodiment of the present disclosure, a display device may include: a substrate having a display area and a non-display area; a pixel circuit component disposed in the display area of ​​the substrate and including at least one transistor and a passivation layer disposed on the transistor; and a display element layer disposed on the passivation layer and including at least one light-emitting element having a first end and a second end in a longitudinal direction. Here, the display element layer may include: a first partition wall and a second partition wall disposed on the passivation layer and spaced apart from each other at a predetermined distance, and the light-emitting element is interposed between the first partition wall and the second partition wall; a first electrode and a second electrode, the first electrode being disposed on the first partition wall adjacent to the first end of the light-emitting element, and the second electrode being disposed on the second partition wall adjacent to the second end of the light-emitting element; and a first contact electrode and a second contact electrode, the first contact electrode coupling the first electrode to the first end of the light-emitting element, and the second contact electrode coupling the second electrode to the second end of the light-emitting element. When viewed on a plane, the first electrode may partially overlap the first partition wall, and the second electrode may partially overlap the second partition wall.

[0016] According to an embodiment of the present disclosure, a display device may include: a substrate having a display area and a non-display area; a pixel circuit component disposed in the display area of ​​the substrate and including at least one transistor and a passivation layer disposed on the transistor; and a display element layer disposed on the passivation layer and including at least one light-emitting element having a first end and a second end in a longitudinal direction. Here, the display element layer may include: a first partition wall and a second partition wall disposed on the passivation layer and spaced apart from each other at a predetermined distance, and the light-emitting element is interposed between the first partition wall and the second partition wall; a first electrode and a second electrode, the first electrode being disposed on the first partition wall and the second electrode being disposed on the second partition wall; a first contact electrode and a second contact electrode, the first contact electrode coupling the first electrode to the first end of the light-emitting element and the second contact electrode coupling the second electrode to the second end of the light-emitting element; an insulating layer disposed on the first contact electrode and the second contact electrode; a light-shielding pattern disposed on the insulating layer; and a color filter layer disposed on the light-shielding pattern. When viewed on a plane, the first electrode completely overlaps the first partition wall, and the second electrode completely overlaps the second partition wall.

[0017] Beneficial Effects

[0018] According to an embodiment of the present disclosure, a light emitting device having improved light emitting efficiency and a display apparatus having the same are provided. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 is a perspective view showing a rod-type light emitting diode according to an embodiment of the present disclosure.

[0020] Figure 2a and Figure 2bis a circuit diagram showing a unit light emitting area of ​​a light emitting device according to an embodiment of the present disclosure.

[0021] Figure 3 The present invention is a display device (particularly using a display device including a display device) according to an embodiment of the present invention. Figure 1 A schematic plan view of a display device in which a light-emitting device of a rod-type LED is used as a light source.

[0022] Figure 4 It is shown Figure 3 An equivalent circuit diagram of one of the pixels shown in .

[0023] Figure 5 The light emitting device is shown in FIG. Figure 3 A plan view of a unit light emitting area in one of the pixels shown in FIG.

[0024] Figure 6a is along Figure 5 A cross-sectional view taken along line II'.

[0025] Figure 6b is corresponding to Figure 5 The cross-sectional view along line II' shows Figure 6a Embodiment of the light emitting device.

[0026] Figure 7a yes Figure 6a an enlarged cross-sectional view of area EA1 in FIG. 1 , and Figure 7b yes Figure 6b An enlarged cross-sectional view of area EA2 in FIG.

[0027] Figure 8a to Figure 8h It is shown in sequence that the manufacturing Figure 6a A cross-sectional view of a method of displaying a device is shown in FIG.

[0028] Figures 9 to 12 is corresponding to Figure 5 1 and 2. A cross-sectional view taken along line II' of FIG. 1 shows a display device according to an embodiment of the present disclosure.

[0029] Fig.13 yes Fig.12 An enlarged cross-sectional view of area EA3.

[0030] Fig.14 A display device according to an embodiment of the present disclosure is shown, and in particular, is a plan view showing a unit light emitting region provided in one pixel of a light emitting device.

[0031] Fig.15 is along Fig.14 A cross-sectional view taken along line II-II'.

[0032] Invention method

[0033] Since the present disclosure allows various changes and multiple embodiments, exemplary embodiments will be shown in the drawings and described in detail in the written description. However, this is not intended to limit the present disclosure to a specific embodiment or practice, and it should be understood that all changes, equivalents and substitutions that do not depart from the spirit and technical scope of the present disclosure are included in the present disclosure.

[0034] Throughout the disclosure, the same reference numerals represent the same elements throughout the various figures and embodiments of the present disclosure. For clarity, the size of the elements in the drawings may be amplified. It should be understood that although the terms "first", "second", etc. can be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another element. For example, without departing from the teachings of the present disclosure, the first element discussed below can be referred to as the second element. Similarly, the second element can also be referred to as the first element. In the present disclosure, the singular form is also intended to include the plural form, unless the context clearly indicates otherwise.

[0035] It should also be understood that when used in this specification, the terms "comprise", "include", "have", etc. specify the presence of the stated features, wholes, steps, operations, elements, parts and / or combinations thereof, but do not exclude the presence or addition of one or more other features, wholes, steps, operations, elements, parts and / or combinations thereof. In addition, when a first part such as a layer, a film, a region or a plate is disposed on a second part, the first part may not only be directly disposed on the second part, but a third part may be interposed between them. In addition, when it is stated that a first part such as a layer, a film, a region or a plate is formed on a second part, the surface of the second part on which the first part is formed is not limited to the upper surface of the second part, but may include other surfaces of the second part (such as a side surface or a lower surface). Conversely, when a first part such as a layer, a film, a region or a plate is below the second part, the first part may not only be directly below the second part, but a third part may be interposed between them.

[0036] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the accompanying drawings.

[0037] Figure 1 is a perspective view showing a rod-type light emitting diode according to an embodiment of the present disclosure. Figure 1 2 , the rod type light emitting diode LD having a cylindrical shape has been illustrated, but the present disclosure is not limited thereto.

[0038] refer to Figure 1The rod type light emitting diode LD according to an embodiment of the present disclosure may include a first conductive semiconductor layer 11, a second conductive semiconductor layer 13, and an active layer 12 interposed between the first conductive semiconductor layer 11 and the second conductive semiconductor layer 13. The rod type light emitting diode LD may be a light emitting element.

[0039] For example, the rod type light emitting diode LD has a stacked body formed by sequentially stacking a first conductive semiconductor layer 11, an active layer 12, and a second conductive semiconductor layer 13. In the following description, for convenience of explanation, the rod type light emitting diode LD will be referred to as a 'rod type LED LD'.

[0040] In an embodiment of the present disclosure, the rod-type LED LD may be provided in the form of a rod extending in one direction. If the direction in which the rod-type LED LD extends is defined as a longitudinal direction, the rod-type LED LD may have a first end and a second end relative to the longitudinal direction in which the rod-type LED LD extends.

[0041] In an implementation, one of the first conductive semiconductor layer 11 and the second conductive semiconductor layer 13 may be disposed on the first end, and the other of the first conductive semiconductor layer 11 and the second conductive semiconductor layer 13 may be disposed on the second end.

[0042] In an embodiment, the rod-type LED LD may be provided in a cylindrical shape. Herein, the term "rod-type" includes a rod-like shape or a bar-like shape extending in a longitudinal direction (e.g., having an aspect ratio greater than 1), such as a cylindrical shape and a prismatic shape. For example, the length of the rod-type LED LD may be greater than its diameter.

[0043] The rod-type LED LD may be manufactured in a small size, with a diameter and / or a length corresponding to, for example, a micrometer-scale or nanometer-scale size.

[0044] However, the size of the pole type LED LD according to an embodiment of the present disclosure is not limited thereto, and the size of the pole type LED LD may be changed according to requirements of a display device to which the pole type LED LD is to be applied.

[0045] The first conductive semiconductor layer 11 may include, for example, at least one n-type semiconductor layer. For example, the first conductive semiconductor layer 11 may include a semiconductor layer including a semiconductor material of InAlGaN, GaN, AlGaN, InGaN, AlN, and InN, and doped with a first conductive dopant such as Si, Ge, or Sn.

[0046] The material of the first conductive semiconductor layer 11 is not limited thereto, however, the first conductive semiconductor layer 11 may be formed of various other materials.

[0047] The active layer 12 may be formed on the first conductive semiconductor layer 11 and may have a single quantum well or a multi-quantum well structure. In an embodiment of the present disclosure, a cladding layer (not shown) doped with a conductive dopant may be formed on and / or below the active layer 12. For example, the cladding layer may be an AlGaN layer or an InAlGaN layer. In addition, the active layer 12 may be formed using a material such as AlGaN or AlInGaN.

[0048] If an electric field having a predetermined voltage or more is applied to opposite ends of the rod type LED LD, the rod type LED LD emits light by coupling of electron-hole pairs in the active layer 12 .

[0049] The second conductive semiconductor layer 13 may be disposed on the active layer 12 and may include a semiconductor layer having a different type from that of the first conductive semiconductor layer 11. For example, the second conductive semiconductor layer 13 may include at least one p-type semiconductor layer. For example, the second conductive semiconductor layer 13 may include a semiconductor layer including a semiconductor material of InAlGaN, GaN, AlGaN, InGaN, AlN, and InN and doped with a second conductive dopant such as Mg.

[0050] The material of the second conductive semiconductor layer 13 is not limited thereto, however, the second conductive semiconductor layer 13 may be formed of various other materials.

[0051] In an embodiment of the present disclosure, the rod-type LED LD may include not only a first conductive semiconductor layer 11, an active layer 12, and a second conductive semiconductor layer 13, but may also include a fluorescent layer, another active layer, another semiconductor layer, and / or an electrode layer disposed on and / or below each layer.

[0052] In addition, the rod type LED LD may further include an insulating film 14. In an embodiment of the present disclosure, the insulating film 14 may be omitted or may be provided to cover only some of the first conductive semiconductor layer 11, the active layer 12, and the second conductive semiconductor layer 13.

[0053] For example, the insulating film 14 may be provided on a portion of the stick type LED LD except for the opposite ends of the stick type LED LD so that the opposite ends of the stick type LED LD are exposed.

[0054] Despite Figure 1 1 is shown with the insulating film 14 having a part thereof removed, but this is merely for convenience of explanation, and the actual rod-type LED LD may be formed such that the entire side surface of its cylindrical body is surrounded by the insulating film 14 .

[0055] The insulating film 14 may be provided to surround at least a portion of the outer peripheral surface of the first conductive semiconductor layer 11, the active layer 12 and / or the second conductive semiconductor layer 13. For example, the insulating film 14 may be provided to surround at least the outer peripheral surface of the active layer 12.

[0056] In an embodiment of the present disclosure, the insulating film 14 may include a transparent insulating material. For example, the insulating film 14 may include a material selected from SiO 2 、Si 3 N 4 、Al 2 O 3 and TiO 2 At least one insulating material in the group consisting of, but not limited to this. In other words, various materials having insulating properties can be used.

[0057] If the insulating film 14 is provided on the rod type LED LD, the active layer 12 may be prevented from being short-circuited with the first electrode (not shown) and / or the second electrode (not shown).

[0058] Furthermore, the insulating film 14 can reduce or prevent the occurrence of defects on the surface of the rod type LED LD, thereby improving the life and efficiency of the rod type LED LD. Even when a plurality of rod type LED LDs are disposed adjacent to each other, the insulating film 14 can prevent the rod type LED LDs from being undesirably short-circuited with each other.

[0059] The above-mentioned rod-type LED LD can be used as a light source of various display devices. For example, the rod-type LED LD can be used in a lighting device or a self-luminous display device.

[0060] Figure 2a and Figure 2b is a circuit diagram showing a unit light emitting area of ​​a light emitting device according to an embodiment of the present disclosure.

[0061] In particular, Figure 2a and Figure 2b An example of forming a pixel of an active light emitting display panel is shown. In an embodiment of the present disclosure, a unit light emitting region may be a pixel region in which a single pixel is disposed.

[0062] refer to Figure 2a , the pixel PXL may include at least one rod type LED LD, and a driving circuit 144 coupled to the rod type LED LD to drive the rod type LED LD.

[0063] A first electrode (eg, an anode electrode) of the rod type LED LD may be coupled to a first driving power source VDD via a driving circuit 144, and a second electrode (eg, a cathode electrode) of the rod type LED LD may be coupled to a second driving power source VSS.

[0064] The first driving power source VDD and the second driving power source VSS may have different potentials. For example, the second driving power source VSS may have a potential lower than the first driving power source VDD by a value equal to or greater than a threshold voltage of the rod type LED LD.

[0065] The rod type LED LD may emit light having brightness corresponding to a driving current controlled by the driving circuit 144 .

[0066] although Figure 2a An embodiment is shown in which each pixel PXL includes one rod type LED LD, but the present disclosure is not limited thereto. For example, the pixel PXL may include a plurality of rod type LED LDs coupled to each other in parallel.

[0067] In an embodiment of the present disclosure, the driving circuit 144 may include a first transistor M1, a second transistor M2, and a storage capacitor Cst. However, the structure of the driving circuit 144 is not limited to Figure 2a The embodiment shown in .

[0068] The first transistor (M1; switching transistor) includes a first electrode coupled to a data line (e.g., the jth data line Dj) and a second electrode coupled to a first node N1. Here, the first electrode and the second electrode of the first transistor M1 may be different electrodes. For example, if the first electrode is a source electrode, the second electrode is a drain electrode. The first transistor M1 includes a gate electrode coupled to a scan line (e.g., the i-th scan line Si).

[0069] When a scan signal having a voltage (e.g., a low level voltage) capable of turning on the first transistor M1 is provided from a scan line (e.g., the i-th scan line Si), the first transistor M1 is turned on to electrically couple the data line (e.g., the j-th data line Dj) with the first node N1. Here, a data signal of a corresponding frame is provided to the data line (e.g., the j-th data line Dj), and thereby the data signal is transmitted to the first node N1. The data signal transmitted to the first node N1 is stored in the storage capacitor Cst.

[0070] The second transistor (M2; driving transistor) includes a first electrode coupled to the first driving power source VDD and a second electrode coupled to the first electrode of the rod type LED LD. The second transistor M2 includes a gate electrode coupled to the first node N1. The second transistor M2 may control the amount of driving current to be provided to the rod type LED LD in response to the voltage of the first node N1.

[0071] One electrode of the storage capacitor Cst is coupled to the first driving power source VDD, and the other electrode thereof is coupled to the first node N1. The storage capacitor Cst may be charged with a voltage corresponding to a data signal supplied to the first node N1 and maintain the charged voltage until a data signal of a subsequent frame is supplied thereto.

[0072] For convenience, Figure 2a The driving circuit 144 shown in FIG. 1 has a relatively simple structure and includes a first transistor M1 configured to transmit a data signal to the pixel PXL, a storage capacitor Cst configured to store the data signal, and a second transistor M2 configured to provide a driving current corresponding to the data signal to the rod type LED LD.

[0073] However, the present disclosure is not limited to the aforementioned structure, and the structure of the driving circuit 144 may be changed in various ways. For example, the driving circuit 144 may further include at least one transistor element (such as a transistor element configured to compensate for the threshold voltage of the second transistor M2, a transistor element configured to initialize the first node N1, a transistor element configured to control the light emission time of the rod-type LED LD) and / or other circuit elements (such as a boost capacitor for increasing the voltage of the first node N1).

[0074] In addition, despite the Figure 2a 1 and 14. The transistors (eg, the first transistor M1 and the second transistor M2) included in the driving circuit 144 are shown as being formed of P-type transistors, but the present disclosure is not limited thereto. In other words, at least one of the first transistor M1 and the second transistor M2 included in the driving circuit 144 may be an N-type transistor.

[0075] refer to Figure 2b In the embodiment of the present disclosure, the first transistor M1 and the second transistor M2 may be N-type transistors. In addition to the change in the connection position of some components due to the change in transistor type, Figure 2b The configuration and operation of the drive circuit 144 shown in FIG. 1 is similar to that of FIG. Figure 2a The configuration and operation of the driving circuit 144 shown in . Therefore, redundant additional description of this embodiment will be omitted.

[0076] Figure 3 The present invention is a display device (particularly using a display device including a display device) according to an embodiment of the present invention. Figure 1 A schematic plan view of a display device in which a light-emitting device of a rod-type LED is used as a light source.

[0077] refer to Figures 1 to 3, a display device according to an embodiment of the present disclosure may include a substrate SUB, pixels PXL disposed on the substrate SUB, a driver disposed on the substrate SUB and configured to drive the pixels PXL, and a line component (not shown) connecting the pixels PXL to the driver.

[0078] The substrate SUB may have a display area DA and a non-display area NDA.

[0079] The display area DA may be an area in which pixels PXL for displaying an image are disposed. The non-display area NDA may be an area in which a driver for driving the pixels PXL and a portion of a line member (not shown) for coupling the pixels PXL to the driver are disposed.

[0080] The display area DA may have various shapes, such as a closed polygon with linear edges, a circle with curved edges, an ellipse, or a semicircle with linear edges and curved edges, a semiellipse, or the like.

[0081] In the case where the display area DA has a plurality of regions, each region may have various forms such as a closed polygon with linear sides and a semicircle, a semiellipse with curved sides, etc. The surface areas of the plurality of regions may be the same or different from each other.

[0082] In an embodiment of the present disclosure, an example in which the display area DA is provided as a single area having a rectangular shape including linear sides will be described.

[0083] The non-display area NDA may be disposed on at least one side of the display area DA. In an embodiment of the present disclosure, the non-display area NDA may surround the periphery of the display area DA.

[0084] The pixels PXL may be disposed in the display area DA on the substrate SUB. Each pixel PXL refers to a minimum unit for displaying an image, and a plurality of pixels PXL may be provided.

[0085] Each of the pixels PXL may include at least one rod-type LED LD that emits white light and / or colored light. Each pixel PXL may emit light having any one of red, green, and blue colors, but the pixel PXL is not limited thereto. For example, each of the pixels PXL may emit light having any one of cyan, magenta, yellow, and white colors.

[0086] The pixels PXL may be arranged in a matrix along rows extending in a first direction DR1 and columns extending in a second direction DR2 crossing the first direction DR1. However, the arrangement of the pixels PXL is not limited to a specific arrangement. In other words, the pixels PXL may be arranged in various forms.

[0087] The driver may provide a signal to each pixel PXL through the line component, and thus may control the operation of the pixel PXL. Figure 3 , line components are omitted for ease of explanation.

[0088] The driver may include: a scan driver SDV configured to provide a scan signal to each of the pixels PXL through a scan line; an emission driver EDV configured to provide an emission control signal to each of the pixels PXL through an emission control line; a data driver DDV configured to provide a data signal to each of the pixels PXL through a data line; and a timing controller (not shown). The timing controller may control the scan driver SDV, the emission driver EDV, and the data driver DDV.

[0089] Figure 4 It is shown Figure 3 An equivalent circuit diagram of one of the pixels shown in .

[0090] For ease of explanation, Figure 4 , one pixel PXL coupled to the j-th data line Dj, the i-1-th scan line Si-1, the ith scan line Si, and the i+1-th scan line Si+1 is shown.

[0091] refer to Figure 3 and Figure 4 , the pixel PXL according to the embodiment of the present disclosure may include a rod type LED LD, first to seventh transistors T1 to T7 , and a storage capacitor Cst.

[0092] The rod type LED LD may have a first end coupled to the first transistor T1 via the sixth transistor T6 and a second end coupled to the second driving power source VSS. The rod type LED LD may emit light having a predetermined brightness corresponding to a current supplied from the first transistor T1.

[0093] A source electrode of the first transistor (T1; driving transistor) may be coupled to a first driving power source VDD via a fifth transistor T5, and a drain electrode thereof may be coupled to a first end of the rod-type LED LD via a sixth transistor T6. The first transistor T1 controls a current flowing from the first driving power source VDD to a second driving power source VSS via the rod-type LED LD in response to a voltage of a first node N1 connected to a gate electrode thereof.

[0094] The second transistor (T2; switching transistor) is connected between the j-th data line Dj and the source electrode of the first transistor T1. The gate electrode of the second transistor T2 is connected to the i-th scan line Si. When a scan signal is provided to the i-th scan line Si, the second transistor T2 is turned on, so that the source electrode of the first transistor T1 is electrically connected to the j-th data line Dj.

[0095] The third transistor T3 is coupled between the drain electrode of the first transistor T1 and the first node N1. The gate electrode of the third transistor T3 is coupled to the i-th scan line Si. When the scan signal is provided to the i-th scan line Si, the third transistor T3 is turned on, so that the drain electrode of the first transistor T1 is electrically coupled to the first node N1. Therefore, when the third transistor T3 is turned on, the first transistor T1 can be connected in the form of a diode.

[0096] The fourth transistor T4 may be coupled between the first node N1 and the initialization power supply Vint. The gate electrode of the fourth transistor T4 is coupled to the i-1th scan line Si-1. When the scan signal is supplied to the i-1th scan line Si-1, the fourth transistor T4 is turned on so that the voltage of the initialization power supply Vint is supplied to the first node N1. The initialization power supply Vint may be set to a voltage lower than the data signal.

[0097] The fifth transistor T5 may be coupled between the first driving power source VDD and the source electrode of the first transistor T1. The gate electrode of the fifth transistor T5 may be coupled to the i-th emission control line Ei. The fifth transistor T5 may be turned off when the i-th emission control line Ei is provided with an emission control signal, and may be turned on in other cases.

[0098] The sixth transistor T6 is coupled between the drain electrode of the first transistor T1 and the first end of the rod type LED LD. The gate electrode of the sixth transistor T6 may be coupled to the i-th emission control line Ei. The sixth transistor T6 may be turned off when the emission control signal is provided to the i-th emission control line Ei, and may be turned on in other cases.

[0099] The seventh transistor T7 is coupled between the initialization power supply Vint and the first end of the rod-type LED LD. The gate electrode of the seventh transistor T7 is coupled to the i+1th scanning line Si+1. The seventh transistor T7 can be turned on when the scanning signal is supplied to the i+1th scanning line Si+1, so that the voltage of the initialization power supply Vint can be supplied to the first end of the rod-type LED LD.

[0100] The storage capacitor Cst may be coupled between the first driving power source VDD and the first node N1. The storage capacitor Cst may store a voltage corresponding to the data signal and a threshold voltage of the first transistor T1.

[0101] Meanwhile, when the rod type LED LD is arranged in one pixel PXL, a first alignment line (not shown) is coupled to the second node N2, and a second alignment line (not shown) is coupled to the second end of the rod type LED LD.

[0102] A ground voltage (not shown) may be applied to the first alignment line, and an AC voltage may be applied to the second alignment line. When predetermined voltages having different voltage levels are applied to the first alignment line and the second alignment line, respectively, an electric field may be generated between the second node N2 and the second end of the rod type LED LD. The rod type LED LD may be aligned in a desired region within the pixel PXL by the electric field.

[0103] Figure 5 is a diagram showing the arrangement of the light emitting device in Figure 3 A plan view of a unit light emitting region in one of the pixels shown in, Figure 6a It is along Figure 5 A cross-sectional view taken along line II' of Figure 6b is corresponding to Figure 5 The cross-sectional view along the line II' is shown Figure 6a An embodiment of the light emitting device, Figure 7a yes Figure 6a an enlarged cross-sectional view of area EA1, and Figure 7b yes Figure 6b An enlarged cross-sectional view of area EA2.

[0104] Although for convenience, Figure 5 It is shown that a plurality of rod-type LEDs are arranged in a horizontal direction, but the arrangement of the rod-type LEDs is not limited thereto. Figure 5 In the embodiment, the unit light emitting area may be a pixel area in which one pixel is set.

[0105] In addition, for convenience, Figure 5 The transistor connected to the rod-type LED and the signal line connected to the transistor are not shown.

[0106] refer to Figures 1 to 7b , a display device according to an embodiment of the present disclosure may include a substrate SUB, a pixel circuit part PCL disposed on the substrate SUB, and a display element layer DPL disposed on the pixel circuit part PCL.

[0107] The substrate SUB may include an insulating material such as glass, an organic polymer, or a crystal. In addition, the substrate SUB may be made of a flexible material so as to be bendable or foldable, and may have a single-layer or multi-layer structure.

[0108] For example, the substrate SUB may include at least one of polystyrene, polyvinyl alcohol, polymethyl methacrylate, polyethersulfone, polyacrylate, polyetherimide, polyethylene naphthalate, polyethylene terephthalate, polyphenylene sulfide, polyarylate, polyimide, polycarbonate, cellulose triacetate, and cellulose acetate propionate. However, the material of the substrate SUB is not limited to this example, and various suitable materials may be used.

[0109] The pixel circuit part PCL may include a buffer layer BFL disposed on a substrate SUB, first and second transistors T1 and T2 disposed on the buffer layer BFL, and first and second alignment lines ARL1 and ARL2.

[0110] The display element layer DPL may include first and second partition walls PW1 and PW2 , a plurality of rod type LEDs LD, first and second electrodes REL1 and REL2 , and first and second contact electrodes CNE1 and CNE2 .

[0111] For convenience of explanation, the pixel circuit part PCL will be described first, and then the display element layer DPL will be described.

[0112] The buffer layer BFL may prevent impurities from diffusing into each of the first transistor T1 and the second transistor T2. The buffer layer BFL may have a single-layer structure or a multi-layer structure including a plurality of layers.

[0113] In the case where the buffer layer BFL has a multi-layer structure, each layer may be formed of the same material or different materials. The buffer layer BFL may be omitted according to the material or processing conditions of the substrate SUB.

[0114] The first transistor T1 may be a driving transistor electrically coupled to some of the rod type LEDs LD to drive the rod type LEDs LD. The second transistor T2 may be a switching transistor that switches the first transistor T1.

[0115] Each of the first and second transistors T1 and T2 may include a semiconductor layer SCL, a gate electrode GE, and first and second transistor electrodes EL1 and EL2.

[0116] The semiconductor layer SCL may be disposed on the buffer layer BFL. The semiconductor layer SCL may have a first region in contact with the first transistor electrode EL1 and a second region in contact with the second transistor electrode EL2. A region between the first region and the second region may be a channel region.

[0117] In an embodiment of the present disclosure, the first region may be any one of a source region and a drain region, and the second region may be the other of the source region and the drain region.

[0118] The semiconductor layer SCL may be a semiconductor pattern formed of polysilicon, amorphous silicon, oxide semiconductor, etc. The channel region may be a semiconductor pattern not doped with impurities, ie, an intrinsic semiconductor. Each of the first region and the second region may be a semiconductor pattern doped with impurities.

[0119] The gate electrode GE may be disposed on the semiconductor layer SCL with the gate insulating layer GI interposed therebetween.

[0120] The first and second transistor electrodes EL1 and EL2 may respectively contact the first and second regions of the semiconductor layer SCL through corresponding contact holes passing through the interlayer insulating layer ILD and the gate insulating layer GI.

[0121] The first alignment line ARL1 may be disposed on the interlayer insulating layer ILD and may be electrically coupled to the first electrode REL1 through the second contact hole CH2 A first alignment voltage may be applied to the first alignment line ARL1 .

[0122] The first alignment line ARL1 may transmit a first alignment voltage to the first electrode REL1 in order to align the rod type LED LD in one pixel PXL.

[0123] The second alignment line ARL2 may be disposed on the interlayer insulating layer ILD and may be electrically coupled to the second electrode REL2 through the third contact hole CH3 A second alignment voltage may be applied to the second alignment line ARL2 .

[0124] The second alignment line ARL2 may transmit a second alignment voltage to the second electrode REL2 in order to align the rod type LED LD in one pixel PXL.

[0125] In an embodiment of the present disclosure, a ground voltage may be applied to the first alignment line ARL1 as a first alignment voltage, and an AC voltage may be applied to the second alignment line ARL2 as a second alignment voltage.

[0126] When predetermined voltages having different voltage levels are respectively applied to the first and second alignment lines ARL1 and ARL2 , an electric field may be formed between the first and second electrodes REL1 and REL2 .

[0127] In a plan view, the first alignment line ARL1 and the second alignment line ARL2 may extend in the second direction DR2. In an embodiment of the present disclosure, the first alignment line ARL1 may be disposed to correspond to only one pixel PXL. The second alignment line ARL2 may be disposed to correspond to one pixel PXL and another pixel (not shown) adjacent to the pixel PXL along the second direction DR2.

[0128] In an embodiment of the present disclosure, after aligning the rod type LED LD in one pixel PXL, the second alignment line ARL2 may be used as a driving voltage line for supplying the second driving power VSS to the second end EP2 of each rod type LED LD.

[0129] A passivation layer PSV may be disposed on the first and second transistors T1 and T2 and the first and second alignment lines ARL1 and ARL2 .

[0130] The passivation layer PSV may have a first contact hole CH1 exposing a portion of the first transistor electrode EL1 of the first transistor T1 to the outside, and second and third contact holes CH2 and CH3 .

[0131] In the embodiment of the present disclosure, although the first alignment line ARL1 and the second alignment line ARL2 are described as being disposed in the pixel circuit part PCL, the present disclosure is not limited thereto.

[0132] For example, the first and second alignment lines ARL1 and ARL2 may be disposed in the display element layer DPL. In this case, the first and second alignment lines ARL1 and ARL2 may be disposed on the same layer as the first and second electrodes REL1 and REL2 and may include the same material as the first and second electrodes REL1 and REL2.

[0133] Each of the rod type LEDs LD included in the display element layer DPL may include a first conductive semiconductor layer 11 , a second conductive semiconductor layer 13 , and an active layer 12 interposed between the first conductive semiconductor layer 11 and the second conductive semiconductor layer 13 .

[0134] In an implementation, the rod type LED LD may further include an electrode layer (not shown) disposed on the second conductive semiconductor layer 13 .

[0135] In addition, the electrode layer may include a metal or a metal oxide. For example, chromium (Cr), titanium (Ti), aluminum (Al), gold (Au), nickel (Ni) and oxides or alloys thereof, and ITO (indium tin oxide) may be used alone or in combination with one another. However, the present disclosure is not limited thereto.

[0136] Each of the rod type LEDs LD may have a first end EP1 and a second end EP2 in a longitudinal direction thereof.

[0137] One of the first conductive semiconductor layer 11 and the second conductive semiconductor layer 13 may be disposed at the first end EP1, and the other of the first conductive semiconductor layer 11 and the second conductive semiconductor layer 13 may be disposed at the second end EP2. Each of the rod type LEDs LD may emit colored light and / or white light.

[0138] The first and second ends EP1 and EP2 of each of the rod type LEDs LD may be exposed to the outside by a second insulating layer IL2 covering a portion of an upper surface of each of the rod type LEDs LD. The second insulating layer IL2 may be formed of an inorganic insulating layer including an inorganic material or an organic insulating layer including an organic material.

[0139] A first insulating layer IL1 may be disposed under each of the rod type LEDs LD.

[0140] The first insulating layer IL1 may fill a space between each of the rod type LEDs LD and the passivation layer PSV, stably support each of the rod type LEDs LD, and prevent each of the rod type LEDs LD from being removed.

[0141] In an embodiment of the present disclosure, the first insulating layer IL1 may include an inorganic insulating layer including an inorganic material, or an organic insulating layer including an organic material.

[0142] The first partition wall PW1 and the second partition wall PW2 may define a unit light emitting region in one pixel PXL.

[0143] The first and second partition walls PW1 and PW2 may be disposed on the passivation layer PSV and may be spaced apart from each other by a predetermined distance. The first and second partition walls PW1 and PW2 may be disposed on the passivation layer PSV to be spaced apart from each other by a distance equal to or greater than the length of one rod type LED LD.

[0144] The first partition wall PW1 and the second partition wall PW2 may include an insulating material including an inorganic material or an organic material, but the present disclosure is not limited thereto.

[0145] Each of the first partition wall PW1 and the second partition wall PW2 may have a curved cross-section (such as a semicircular or semi-elliptical shape) whose width decreases in a direction from the bottom to the top, such as Figure 6a and Figure 7a As shown in . However, the present disclosure is not limited thereto. A width W of a lower surface of each of the first partition wall PW1 and the second partition wall PW2 contacting the passivation layer PSV may be about 6 μm to 7 μm. However, the present disclosure is not limited thereto.

[0146] In an embodiment, each of the first partition wall PW1 and the second partition wall PW2 may have a trapezoidal shape with a side surface inclined at a predetermined angle, such as Figure 6b and Figure 7bIn this case, each of the first partition wall PW1 and the second partition wall PW2 may have a lower surface S4 contacting the passivation layer PSV, an upper surface S1 facing the lower surface S4 and having a narrower width than the lower surface S4, and a first side surface S2 and a second side surface S3 coupled to the lower surface S4 and the upper surface S1, as shown in FIG. Figure 7b Therefore, each of the first partition wall PW1 and the second partition wall PW2 may have a trapezoidal cross-section.

[0147] Here, the second side surface S3 may be adjacent to one of the opposite ends EP1 and EP2 of each of the rod-type LEDs LD, and the first side surface S2 may face the second side surface S3. The second side surface S3 may extend from one end of the upper surface S1 to have a predetermined inclination angle θ1 based on a normal line perpendicular to the lower surface S4. The inclination angle θ1 may be less than 90°. Therefore, the second side surface S3 may be inclined. The first side surface S2 may be inclined at the same inclination angle as the inclination angle θ1 of the second side surface S3.

[0148] A cross-section of each of the first partition wall PW1 and the second partition wall PW2 may have various shapes such as a circle, a rectangle, a triangle, or a polygon, but is not limited to the above-described embodiment.

[0149] The first partition wall PW1 and the second partition wall PW2 may be arranged on the same plane on the passivation layer PSV, and may have the same height.

[0150] The first electrode REL1 may be disposed on a side surface of the first partition wall PW1 and the passivation layer PSV. In addition, the second electrode REL2 may be disposed on a side surface of the second partition wall PW2 and the passivation layer PSV.

[0151] For convenience of explanation, the first electrode REL1 disposed on the side surface of the first partition wall PW1 will be referred to as a 1-1th electrode REL1 , and the second electrode REL2 disposed on the side surface of the second partition wall PW2 will be referred to as a 2-1th electrode REL2 .

[0152] When viewed on a plane, the 1-1th electrode REL1 may partially overlap the first partition wall PW1 , and the 2-1th electrode REL2 may partially overlap the second partition wall PW2 .

[0153] The 1-1 electrode REL1 and the 2-1 electrode REL2 may correspond to shapes of the first partition wall PW1 and the second partition wall PW2 .

[0154] Therefore, when the first partition wall PW1 has a trapezoidal cross section, the 1-1th electrode REL1 may be inclined to correspond to the inclination angle θ1 of the second side surface S3 of the first partition wall PW1. In addition, when the first partition wall PW1 has a semicircular or semi-elliptical cross section, the 1-1th electrode REL1 may have a curvature corresponding to the curved surface of the first partition wall PW1.

[0155] Likewise, when the second partition wall PW2 has a trapezoidal cross section, the 2-1st electrode REL2 may be inclined to correspond to the inclination angle of the second side surface S3 of the second partition wall PW2. In addition, when the second partition wall PW2 has a semicircular or semi-elliptical cross section, the 2-1st electrode REL2 may have a curvature corresponding to the curved surface of the second partition wall PW2.

[0156] In an embodiment of the present disclosure, the 1-1th electrode REL1 and the 2-1th electrode REL2 may allow light emitted from opposite ends EP1 and EP2 of the rod type LED LD to travel in a direction (eg, a front direction) in which an image is displayed.

[0157] In particular, since the 1-1st electrode REL1 and the 2-1st electrode REL2 have shapes corresponding to the first partition wall PW1 and the second partition wall PW2, light emitted from the opposite ends EP1 and EP2 of each of the rod-type LEDs LD can be reflected by the 1-1st electrode REL1 and the 2-1st electrode REL2 to further travel in the front direction. Therefore, the efficiency of light emitted from each of the rod-type LEDs LD can be improved.

[0158] As the distance d1 between the 1-1th electrode REL1 and the first end EP1 of each of the rod type LED LD decreases, light emitted from the first end EP1 of each of the rod type LED LD can travel to the 1-1th electrode REL1 with less loss. Therefore, the efficiency of light emitted from the first end EP1 of each of the rod type LED LD can be improved.

[0159] Likewise, as the distance between the 2-1st electrode REL2 and the second end EP2 of each of the rod type LEDs LD decreases, light emitted from the second end EP2 of each of the rod type LEDs LD may travel to the 2-1st electrode REL2 with less loss.

[0160] In an embodiment of the present disclosure, the first and second partition walls PW1 and PW2 may serve as reflective members that improve the efficiency of light emitted from each of the rod type LEDs LD together with the 1-1th and 2-1th electrodes REL1 and REL2.

[0161] Any one of the 1-1st electrode REL1 and the 2-1st electrode REL2 may be an anode electrode, and the other may be a cathode electrode. In an embodiment of the present disclosure, the 1-1st electrode REL1 may be an anode electrode, and the 2-1st electrode REL2 may be a cathode electrode.

[0162] The 1-1th electrode REL1 and the 2-1th electrode REL2 may be disposed on the same plane and may have the same height.

[0163] The first electrode REL1 (hereinafter referred to as "1-2 electrode") disposed on the passivation layer PSV may be electrically coupled to the first alignment line ARL1 through a second contact hole CH2 formed through the passivation layer PSV. When the rod type LED LD is aligned in one pixel PXL, a first alignment voltage of the first alignment line ARL1 may be applied to the 1-2 electrode REL1 through the second contact hole CH2.

[0164] Furthermore, the 1-2 electrode REL1 may be electrically coupled to the first transistor electrode EL1 of the first transistor T1 through a first contact hole CH1 formed through the passivation layer PSV. When the rod type LED LD is driven, a signal supplied to the first transistor T1 may be transmitted to the 1-2 electrode REL1 through the first contact hole CH1.

[0165] The second electrode REL2 (hereinafter referred to as "2-2 electrode") disposed on the passivation layer PSV may be electrically coupled to the second alignment line ARL2 through a third contact hole CH3 formed through the passivation layer PSV. Therefore, when the rod type LED LD is aligned in one pixel PXL, a second alignment voltage of the second alignment line ARL2 may be applied to the 2-2 electrode REL2 through the third contact hole CH3.

[0166] In an embodiment of the present disclosure, when driving the rod type LED LD, the second driving power VSS may be applied to the second alignment line ARL2. Therefore, when driving the rod type LED LD, the second driving power VSS of the second alignment line ARL2 may be transmitted to the 2-2 th electrode REL2 through the third contact hole CH3.

[0167] The 1-1st electrode REL1 and the 1-2nd electrode REL1 and the 2-1st electrode REL2 and the 2-2nd electrode REL2 may be made of a conductive material having a predetermined reflectivity. The conductive material may include a metal such as Ag, Mg, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr, Ti or an alloy thereof, a conductive oxide such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO) or indium tin zinc oxide (ITZO), and a conductive polymer such as PEDOT.

[0168] Furthermore, the 1-1 and 1-2 electrodes REL1 and the 2-1 and 2-2 electrodes REL2 may have a single layer structure. However, not limited thereto, the electrodes may have a multilayer structure formed by stacking two or more materials among metals, alloys, conductive oxides, and conductive polymers.

[0169] In particular, the 1-1st and 1-2nd electrodes REL1 and the 2-1st and 2-2nd electrodes REL2 may have a multilayer structure so as to minimize a voltage drop due to a signal delay when a signal is transmitted to the opposite ends EP1 and EP2 of each of the rod-type LEDs LD. In such an embodiment, the 1-1st and 1-2nd electrodes REL1 and the 2-1st and 2-2nd electrodes REL2 may have a multilayer structure in which ITO, Ag, and ITO are stacked in this order, or Ti, Al, and Ti are stacked in this order. However, the present disclosure is not limited thereto.

[0170] The materials of the 1-1st and 1-2nd electrodes REL1 and the 2-1st and 2-2nd electrodes REL2 are not limited to the above materials. For example, the 1-1st and 1-2nd electrodes REL1 and the 2-1st and 2-2nd electrodes REL2 may be formed of a material having a predetermined reflectivity so that light emitted from the opposite ends EP1 and EP2 of each of the rod-type LEDs LD travels in a direction (e.g., a front direction) in which an image is displayed.

[0171] A first encapsulation layer CPL1 may be disposed on the 1-1 electrode REL1 and the 1-2 electrode REL1. The first encapsulation layer CPL1 may prevent the 1-1 electrode REL1 and the 1-2 electrode REL1 from being damaged due to defects occurring during a manufacturing process of the display device, and may further enhance adhesion between the 1-1 electrode REL1 and the 1-2 electrode REL1 and the pixel circuit part PCL.

[0172] The first encapsulation layer CPL1 may be made of a transparent conductive material such as IZO in order to minimize the loss of light emitted from the first end EP1 of each of the rod type LEDs LD and then reflected by the 1-1th electrode REL1 and the 1-2th electrode REL2 in the front direction.

[0173] When viewed on a plane, the first encapsulation layer CPL1 may overlap the 1-1th and 1-2th electrodes REL1 and the first partition wall PW1 .

[0174] A first contact electrode CNE1 that reliably electrically and / or physically couples the 1-1th electrode REL1 with the first end EP1 of each of the rod-type LEDs LD may be disposed on the first encapsulation layer CPL1 .

[0175] The first contact electrode CNE1 may be formed of a transparent conductive material. For example, the transparent conductive material may include ITO, IZO, ITZO, etc. However, the first contact electrode CNE1 is not limited to the above materials.

[0176] The first contact electrode CNE1 may cover and overlap the 1-1th and 1-2th electrodes REL1 and REL1 when viewed on a plane. In addition, the first contact electrode CNE1 may partially overlap the first end EP1 of each of the rod type LEDs LD.

[0177] In an embodiment, when the first encapsulation layer CPL1 is omitted, the first contact electrode CNE1 may be directly disposed on the 1-1th electrode REL1 and the 1-2th electrode REL1 to be directly coupled to the 1-1th electrode REL1 and the 1-2th electrode REL1.

[0178] A third insulating layer IL3 may be disposed on the first contact electrode CNE1 to cover the first contact electrode CNE1. The third insulating layer IL3 may prevent the first contact electrode CNE1 from being exposed to the outside, thereby preventing the first contact electrode CNE1 from being corroded.

[0179] The third insulating layer IL3 may be formed of an inorganic insulating layer including an inorganic material or an organic insulating layer including an organic material. Although the third insulating layer IL3 may have a single-layer structure as shown, the present disclosure is not limited thereto. For example, the third insulating layer IL3 may have a multi-layer structure.

[0180] The second electrode REL2 may be provided with a second encapsulation layer CPL2, which may prevent the 2-1st and 2-2nd electrodes REL2 from being damaged due to defects occurring during the manufacturing process of the display device, and may further enhance adhesion between the 2-1st and 2-2nd electrodes REL2 and the pixel circuit part PCL.

[0181] The second encapsulation layer CPL2 may be disposed on the same layer as the first encapsulation layer CPL1 and may include the same material as the first encapsulation layer CPL1. The second encapsulation layer CPL2 may overlap the 2-1st and 2-2nd electrodes REL2 and the second partition wall PW2 when viewed on a plane.

[0182] The second contact electrode CNE2 may be disposed on the second encapsulation layer CPL2. When viewed on a plane, the second contact electrode CNE2 may cover and overlap the 2-1st electrode REL2 and the 2-2nd electrode REL2. In addition, the second contact electrode CNE2 may overlap the second end EP2 of each of the rod-type LEDs LD.

[0183] The second contact electrode CNE2 may be made of the same material as that of the first contact electrode CNE1, but is not limited thereto.

[0184] In an embodiment, when the second encapsulation layer CPL2 is omitted, the second contact electrode CNE2 may be directly disposed on the 2-1st electrode REL2 and the 2-2nd electrode REL2 to be directly coupled to the 2-1st electrode REL2 and the 2-2nd electrode REL2.

[0185] A fourth insulating layer IL4 may be disposed on the second contact electrode CNE2 to cover the second contact electrode CNE2.

[0186] The fourth insulating layer IL4 may prevent the second contact electrode CNE2 from being exposed to the outside, thereby preventing the second contact electrode CNE2 from being corroded. The fourth insulating layer IL4 may be an inorganic insulating layer or an organic insulating layer.

[0187] An overcoat layer OC may be disposed on the fourth insulating layer IL4 .

[0188] The overcoat layer OC may be a planarization layer for planarizing a step structure formed by a component disposed under the overcoat layer OC. In addition, the overcoat layer OC may function as an encapsulation layer for preventing oxygen or water from penetrating into the rod type LED LD.

[0189] In an embodiment, the overcoat layer OC may be omitted. When the overcoat layer OC is omitted, the fourth insulating layer IL4 may serve as an encapsulation layer that prevents oxygen or water from penetrating into the rod type LED LD.

[0190] A polarizing film POL may be disposed on the overcoat layer OC.

[0191] The polarizing film POL may have a polarization axis and may linearly polarize light in a direction perpendicular to the polarization axis. For example, the polarizing film POL may absorb light aligned with the polarization axis and allow light perpendicular to the polarization axis to pass through the polarizing film POL. Therefore, when light passes through the polarizing film POL, the light may be linearly polarized in a direction perpendicular to the polarization axis.

[0192] The polarizing film POL may absorb light that is aligned with a polarization axis, reflected by the display device, and then emitted among light introduced into the display device from an external device, thereby reducing reflectivity of external light of the display device.

[0193] As described above, the first end EP1 of each of the rod-type LEDs LD may be coupled to the 1-1th electrode REL1, and the second end EP2 of each of the rod-type LEDs LD may be coupled to the 2-1th electrode REL2. For example, the first conductive semiconductor layer 11 of each of the rod-type LEDs LD may be coupled to the 1-1th electrode REL1, and the second conductive semiconductor layer 13 of each of the rod-type LEDs LD may be coupled to the 2-1st electrode REL2.

[0194] Therefore, the first conductive semiconductor layer 11 and the second conductive semiconductor layer 13 of each of the rod type LEDs LD may receive a predetermined voltage through the 1-1th electrode REL1 and the 2-1th electrode REL2.

[0195] If an electric field of a predetermined voltage or more is applied to the opposite ends EP1 and EP2 of each of the rod type LEDs LD, each of the rod type LEDs LD emits light due to coupling of electron-hole pairs in the active layer 12 .

[0196] Light emitted from the first end EP1 of each of the rod type LEDs LD may travel to the 1-1th electrode REL1 facing the first end EP1. Light incident to the 1-1th electrode REL1 may be reflected by the 1-1th electrode REL1 in a front direction to travel toward the third and fourth insulating layers IL3 and IL4.

[0197] In an embodiment of the present invention, in order to improve the light output efficiency of light reflected by the 1-1 electrode REL1 in the front direction (hereinafter referred to as "first reflected light"), the third insulating layer IL3 and the fourth insulating layer IL4 may be insulating layers having the same refractive index as that of the 1-1 electrode REL1.

[0198] If the third and fourth insulating layers IL3 and IL4 each have a refractive index smaller than that of the 1-1th electrode REL1, a portion of the first reflected light may be absorbed by the third and fourth insulating layers IL3 and IL4 through a total reflection condition.

[0199] Therefore, in an embodiment of the present disclosure, the refractive index of each of the third and fourth insulating layers IL3 and IL4 may be set to be equal to the refractive index of the 1-1th electrode REL1 , thereby improving light output efficiency of the first reflected light without light loss.

[0200] Light emitted from the second end EP2 of each of the rod type LEDs LD may travel to the 2-1st electrode REL2 facing the second end EP2. Light incident to the 2-1st electrode REL2 may be reflected in the front direction by the 2-1st electrode REL2.

[0201] Light reflected by the 2-1st electrode REL2 in the front direction (hereinafter referred to as 'second reflected light') may proceed toward the third insulating layer IL3 and the fourth insulating layer IL4 .

[0202] Since the third and fourth insulating layers IL3 and IL4 have the same refractive index as that of the 2-1st electrode REL2, the second reflected light can pass through the third and fourth insulating layers IL3 and IL4 without loss. Therefore, the light output efficiency of the second reflected light can be improved.

[0203] In an embodiment of the present disclosure, in order to improve the light output efficiency of each of the first reflected light and the second reflected light passing through the fourth insulating layer IL4, the overcoat layer OC disposed on the fourth insulating layer IL4 may be formed of an organic insulating layer having the same refractive index as that of the fourth insulating layer IL4.

[0204] As described above, in the display device according to the embodiment of the present disclosure, each of the 1-1th electrode REL1 and the 2-1th electrode REL2 may be disposed to overlap a portion of the corresponding partition wall when viewed on a plane.

[0205] In other words, the 1-1st electrode REL1 and the 2-1st electrode REL2 may be disposed only in a specific area in the display device. More specifically, the 1-1st electrode REL1 may be disposed only on the side surface of the first partition wall PW1, and the 2-1st electrode REL2 may be disposed only on the side surface of the second partition wall PW2.

[0206] In this case, among external light incident on the display device, light traveling to the upper surface of the corresponding partition wall may be absorbed by the third and fourth insulating layers IL3 and IL4 and the overcoat layer OC due to the absence of the 1-1 and 2-1 electrodes REL1 and REL2.

[0207] Therefore, the display device according to the embodiment of the present disclosure can minimize poor visibility caused by external light.

[0208] In a conventional display device, the 1-1st electrode REL1 and the 2-1st electrode REL2 completely cover the corresponding partition wall. Therefore, the area occupied by the 1-1st electrode REL1 and the 2-1st electrode REL2 in the conventional display device may be larger than the area occupied by the 1-1st electrode REL1 and the 2-1st electrode REL2 of the display device according to an embodiment of the present disclosure.

[0209] When external light is incident on a conventional display device, the external light may be reflected by the 1-1 electrode REL1 and the 2-1 electrode REL2 completely covering the corresponding partition walls and may be visually recognized from the outside. Therefore, the image quality of the conventional display device may be deteriorated due to the increase in reflectivity of external light.

[0210] Therefore, in the embodiment of the present disclosure, the 1-1 electrode REL1 and the 2-1 electrode REL2 are disposed to overlap only a portion of the corresponding partition wall, so that the degradation of image quality due to external light is reduced or minimized.

[0211] Figure 8a to Figure 8h It is shown in sequence that the manufacturing Figure 6a A cross-sectional view of a method of displaying a device is shown in FIG.

[0212] refer to Figures 1 to 8a , a pixel circuit component PCL is formed on a substrate SUB.

[0213] The pixel circuit part PCL includes first and second transistors T1 and T2 , first and second alignment lines ARL1 and ARL2 , and a passivation layer PSV.

[0214] Each of the first transistor T1 and the second transistor T2 may include a semiconductor layer SCL disposed on a buffer layer BFL on a substrate SUB, a gate electrode GE disposed on the semiconductor layer SCL, and first and second transistor electrodes EL1 and EL2 coupled to the semiconductor layer SCL, with a gate insulating layer GI interposed therebetween.

[0215] A portion of the first transistor electrode EL1 of the first transistor T1 may be exposed to the outside through a first contact hole CH1 formed through the passivation layer PSV.

[0216] The first and second alignment lines ARL1 and ARL2 may be formed on the interlayer insulating layer ILD. The first and second alignment lines ARL1 and ARL2 may be disposed on the same layer as the first and second transistor electrodes EL1 and EL2 and may include the same material as the first and second transistor electrodes EL1 and EL2.

[0217] A portion of the first alignment line ARL1 may be exposed to the outside through a second contact hole CH2 formed through the passivation layer PSV, and a portion of the second alignment line ARL2 may be exposed to the outside through a third contact hole CH3 formed through the passivation layer PSV.

[0218] refer to Figures 1 to 8b , a first partition wall PW1 and a second partition wall PW2 are formed on the passivation layer PSV.

[0219] The first partition wall PW1 and the second partition wall PW2 may be disposed on the passivation layer PSV to be spaced apart from each other by a predetermined distance. In an embodiment of the present disclosure, the first partition wall PW1 and the second partition wall PW2 may be formed of an organic insulating layer that facilitates adjustment of a tilt angle.

[0220] Each of the first partition wall PW1 and the second partition wall PW2 may have a curved cross-section, such as a semicircular cross-section or a semi-elliptical cross-section. In an embodiment, a cross-section of each of the first partition wall PW1 and the second partition wall PW2 may have a trapezoidal shape having side surfaces S2 and S3 inclined at a predetermined inclination angle.

[0221] refer to Figures 1 to 8c , the first electrode REL1 and the second electrode REL2 including a conductive material having a high reflectivity are formed on the passivation layer PSV on which the first partition wall PW1 and the second partition wall PW2 are disposed.

[0222] The first electrode REL1 may be disposed on the passivation layer PSV and the second side surface S3 of the first partition wall PW1. The second electrode REL2 may be disposed on the passivation layer PSV and the second side surface S3 of the second partition wall PW2.

[0223] The first electrode REL1 disposed on the passivation layer PSV may be electrically coupled to the first transistor electrode EL1 of the first transistor T1 through the first contact hole CH1 .

[0224] In addition, the first electrode REL1 disposed on the passivation layer PSV may be electrically coupled to the first alignment line ARL1 through the second contact hole CH2. Figure 5 as shown in .

[0225] The second electrode REL2 disposed on the passivation layer PSV may be electrically coupled to the second alignment line ARL2 through the third contact hole CH3 .

[0226] The first electrode REL1 disposed on the side surface of the first partition wall PW1 may correspond to the shape of the first partition wall PW1. Likewise, the second electrode REL2 disposed on the side surface of the second partition wall PW2 may correspond to the shape of the second partition wall PW2.

[0227] refer to Figures 1 to 8d , first and second encapsulation layers CPL1 and CPL2 including a transparent conductive material are formed on the passivation layer PSV on which the first and second electrodes REL1 and REL2 are formed.

[0228] refer to Figures 1 to 8e A first insulating material layer (not shown) is deposited on the entire passivation layer PSV on which the first encapsulation layer CPL1 and the second encapsulation layer CPL2 are disposed.

[0229] Subsequently, in order to form an electric field between the first electrode REL1 and the second electrode REL2 , a first alignment voltage is applied to the first alignment line ARL1 , and a second alignment voltage is applied to the second alignment line ARL2 .

[0230] The first alignment voltage may be a ground voltage, and the second alignment voltage may be an AC voltage.

[0231] When predetermined voltages having different levels are respectively applied to the first and second alignment lines ARL1 and ARL2 , an electric field may be formed between the first and second electrodes REL1 and REL2 .

[0232] The ground voltage is applied to the first electrode REL1 so as not to affect the electrical characteristics of the first transistor T1 coupled to the first electrode REL1.

[0233] In an embodiment of the present disclosure, since the first electrode REL1 is an anode electrode, when an AC or DC voltage having a predetermined voltage level different from a ground voltage is applied to the first electrode REL1, the first transistor T1 may be affected by the voltage applied to the first electrode REL1. Therefore, the electrical characteristics of the first transistor T1 may be changed, so that the pixel circuit component PCL may malfunction.

[0234] Therefore, in an embodiment of the present disclosure, in order to prevent the pixel circuit part PCL from malfunctioning, a ground voltage may be applied to the first electrode REL1 , and an AC or DC voltage having a predetermined voltage level may be applied to the second electrode REL2 .

[0235] As described above, in a state where an electric field is applied between the first electrode REL1 and the second electrode REL2 , the rod type LEDs LD may be distributed on the substrate SUB.

[0236] As an example of a method of distributing the rod-type LED LD, an inkjet printing method may be used. The inkjet printing method may include a method of placing a nozzle on the substrate SUB, dripping a solution including the rod-type LED LD through the nozzle, and distributing the rod-type LED LD on the substrate SUB. The method of distributing the rod-type LED LD on the substrate SUB is not limited thereto.

[0237] When the rod type LED LD is input, since an electric field is formed between the first electrode REL1 and the second electrode REL2 , self-alignment of the rod type LED LD may be induced.

[0238] If the rod type LED LD has been aligned, the supply of the first alignment voltage and the second alignment voltage may be stopped.

[0239] Subsequently, the first insulating material layer is patterned through a mask process to form a first insulating layer IL1 disposed under each of the rod type LEDs LD.

[0240] refer to Figures 1 to 8f A second insulating material layer (not shown) is deposited on the passivation layer PSV on which the rod type LEDs LD are aligned, and the second insulating layer IL2 is formed to expose opposite ends EP1 and EP2 of each of the rod type LEDs LD through a mask process.

[0241] A portion of each of the first and second alignment lines ARL1 and ARL2 may be removed through a mask process. Thus, the first alignment line ARL1 may be disposed to correspond to one pixel PXL.

[0242] Subsequently, the first contact electrode CNE1 is formed on the passivation layer PSV having the second insulating layer IL2 formed thereon.

[0243] The first contact electrode CNE1 may cover the first electrode REL1 and the first end EP1 of each of the rod type LEDs LD. The first electrode REL1 may be electrically coupled to the first end EP1 of each of the rod type LEDs LD through the first contact electrode CNE1.

[0244] refer to Figures 1 to 8g After depositing a third insulating material layer (not shown) on the passivation layer PSV on which the first contact electrode CNE1 is disposed, a third insulating layer IL3 is formed to cover the first contact electrode CNE1 by using a mask process.

[0245] Subsequently, the second contact electrode CNE2 is formed on the passivation layer PSV having the third insulating layer IL3 formed thereon.

[0246] The second contact electrode CNE2 may cover the second electrode REL2 and the second end EP2 of each of the rod type LED LD. The second electrode REL2 may be electrically coupled to the second end EP2 of each of the rod type LED LD through the second contact electrode CNE2.

[0247] refer to Figure 1 to Figure 8h , a fourth insulating layer IL4 is formed on the entire passivation layer PSV on which the second contact electrode CNE2 is disposed.

[0248] Subsequently, an overcoat layer OC is formed on the fourth insulating layer IL4 , and a polarizing film POL is formed on the overcoat layer OC.

[0249] Fig. 9 is corresponding to Figure 5A cross-sectional view of line I-I' of is used to illustrate a display device according to an embodiment of the present invention. In an embodiment of the present disclosure, the following description will focus on the differences from the aforementioned embodiment to avoid repeated explanations. Components that are not explained separately in the description below this embodiment are consistent with the components of the aforementioned embodiment. The same reference numerals will be used to represent the same components, and similar reference numerals will be used to represent similar components.

[0250] In addition to the second alignment line being electrically coupled to the second electrode through the second encapsulation layer, Fig. 9 The display device shown in FIG. 1 may have Figure 6a The display devices shown in FIG. 1 and FIG. 2 have substantially the same or similar configurations.

[0251] refer to Figures 5 to 9 , a display device according to an embodiment of the present disclosure may include a substrate SUB, a pixel circuit part PCL disposed on the substrate SUB, a display element layer DPL disposed on the pixel circuit part PCL, and an overcoat layer OC disposed on the display element layer DPL.

[0252] The pixel circuit part PCL may include a buffer layer BFL disposed on a substrate SUB, first and second transistors T1 and T2 disposed on the buffer layer BFL, first and second alignment lines ARL1 and ARL2 , and a passivation layer PSV.

[0253] The display element layer DPL may include first and second partition walls PW1 and PW2 , a plurality of rod type LEDs LD, first and second electrodes REL1 and REL2 , first and second encapsulation layers CPL1 and CPL2 , and first and second contact electrodes CNE1 and CNE2 .

[0254] The first electrode REL1 may be disposed on a side surface of the first partition wall PW1 and the passivation layer PSV. The second electrode REL2 may be disposed on a side surface of the second partition wall PW2 and the passivation layer PSV.

[0255] In an embodiment of the present disclosure, the second electrode REL2 may be disposed in one pixel PXL so as not to overlap the second alignment line ARL2. In this case, the second alignment line ARL2 and the second electrode REL2 may be electrically coupled through the second encapsulation layer CPL2 covering the second electrode REL2.

[0256] The second encapsulation layer CPL2 may be electrically coupled to the second alignment line ARL2 through the third contact hole CH3 formed through the passivation layer PSV. In addition, the second encapsulation layer CPL2 may be directly disposed on the second electrode REL2 disposed on the side surface of the second partition wall PW2 to be electrically coupled to the second electrode REL2.

[0257] Therefore, the second electrode REL2 may be finally coupled to the second alignment line ARL2 via the second encapsulation layer CPL2 .

[0258] Therefore, when aligning the rod type LED LD in one pixel PXL, the second alignment voltage of the second alignment line ARL2 can be applied to the second electrode REL2 through the second encapsulation layer CPL2. In addition, when driving the rod type LED LD, the second driving power VSS (see, for example, Figure 4 ) is transmitted to the second electrode REL2 through the second encapsulation layer CPL2.

[0259] Fig.10 and Fig.11 Each corresponds to Figure 5 The cross-sectional view of the line I-I' shows a display device according to an embodiment of the present invention. In the embodiment of the present disclosure, the following description will focus on the differences from the previous embodiment to avoid repeated explanation. The components that are not explained separately in the description below this embodiment are consistent with the components of the previous embodiment. The same reference numerals will be used to represent the same components, and similar reference numerals will be used to represent similar components.

[0260] In addition to the overcoat layer being provided as a color filter layer, Fig.10 and Fig.11 The display device shown in FIG. 1 may have Figure 6a The display devices shown in FIG. 1 and FIG. 2 have substantially the same or similar configurations.

[0261] refer to Figure 5 , Fig.10 and Fig.11 , a display device according to an embodiment of the present disclosure may include a substrate SUB, a pixel circuit component PCL disposed on the substrate SUB, a display element layer DPL disposed on the pixel circuit component PCL, and a color filter layer CF disposed on the display element layer DPL.

[0262] The pixel circuit part PCL may include a buffer layer BFL disposed on a substrate SUB, first and second transistors T1 and T2 disposed on the buffer layer BFL, first and second alignment lines ARL1 and ARL2 , and a passivation layer PSV.

[0263] The display element layer DPL may include first and second partition walls PW1 and PW2 , a plurality of rod type LEDs LD, first and second electrodes REL1 and REL2 , first and second encapsulation layers CPL1 and CPL2 , and first and second contact electrodes CNE1 and CNE2 .

[0264] The color filter layer CF can transmit only light of a preset wavelength and block light of other wavelength ranges, thereby reducing reflection of external light incident through the color filter layer CF. In this case, the display device has an effect of reducing reflection of external light even without using a separate polarizing film.

[0265] In addition, the color filter layer CF may function as a planarization layer for planarizing a step structure caused by the display element layer DPL.

[0266] In an embodiment of the present disclosure, the color filter layer CF may be formed of an organic material having the same refractive index as those of the third and fourth insulating layers IL3 and IL4 disposed on the first and second electrodes REL1 and REL2 .

[0267] In this case, light emitted from the rod type LED LD and reflected by the first and second electrodes REL1 and REL2 may not be absorbed by the third and fourth insulating layers IL3 and IL4 and the color filter layer CF, but may travel in the direction of displaying an image. Therefore, the efficiency of light emitted from the rod type LED LD may be improved.

[0268] exist Fig.11 In the embodiment shown in , the color filter layer CF may include a plurality of particles PTC.

[0269] The particulate PTC may be dispersed in the color filter layer CF to control the distribution of light emitted from the rod type LED LD and passing through the color filter layer CF.

[0270] In an embodiment of the present disclosure, the granular PTC may include particles of a metal conductive oxide or a metal conductive nitride, but is not limited thereto. For example, the granular PTC may be a void as an empty space. Examples of the metal conductive oxide may include titanium oxide (TiO 2 ) and zirconium oxide (ZrO 2 ).

[0271] Each of the particle PTCs may have various shapes according to the reflectance of the color filter layer CF, the thickness of the color filter layer CF, and the distance from the adjacent particle PTCs.

[0272] The particulate PTC may be dispersed in the color filter layer CF to scatter light propagating to the color filter layer CF, thereby preventing the light from being concentrated in a specific region of the color filter layer CF.

[0273] For each area of ​​the color filter layer CF, the density of the granular PTC can be adjusted differently. For example, when the light propagating to the color filter layer CF is concentrated in the central area of ​​the color filter layer CF, the granular PTC can be dispersed to be concentrated in the central area of ​​the color filter layer CF. However, the present disclosure is not limited to this, and the opposite situation is also possible.

[0274] Fig.12 is corresponding to Figure 5 A cross-sectional view taken along line II' of FIG. 1 to illustrate a display device according to another embodiment of the present disclosure, and Fig.13 yes Fig.12 FIG. 1 is an enlarged cross-sectional view of area EA3 of FIG. 1. In an embodiment of the present disclosure, the following description will focus on the differences from the previous embodiment to avoid repeated explanation. The components that are not explained separately in the following description of the present embodiment are consistent with the components of the previous embodiment. The same reference numerals will be used to represent the same components, and similar reference numerals will be used to represent similar components.

[0275] In addition to the light shielding pattern provided between the fourth insulating layer and the outer coating layer, Fig.12 The display device shown in FIG. Figure 5 and Fig.11 The display devices shown in FIG. 1 and FIG. 2 have substantially the same or similar configurations.

[0276] refer to Figure 5 , Fig.12 and Fig.13 , a display device according to an embodiment of the present disclosure may include a substrate SUB, a pixel circuit part PCL disposed on the substrate SUB, a display element layer DPL disposed on the pixel circuit part PCL, and a color filter layer CF.

[0277] The pixel circuit part PCL may include a buffer layer BFL disposed on a substrate SUB, first and second transistors T1 and T2 disposed on the buffer layer BFL, first and second alignment lines ARL1 and ARL2 , and a passivation layer PSV.

[0278] The display element layer DPL may include first and second partition walls PW1 and PW2 , a plurality of rod type LEDs LD, first and second electrodes REL1 and REL2 , first and second encapsulation layers CPL1 and CPL2 , and first and second contact electrodes CNE1 and CNE2 .

[0279] The display device may further include first and second light shielding patterns BLP1 and BLP2 disposed under the color filter layer CF.

[0280] The first and second light-shielding patterns BLP1 and BLP2 may include a black matrix and absorb external light incident to the display device, thereby reducing reflection of the external light.

[0281] The first and second light-shielding patterns BLP1 and BLP2 may be disposed on the fourth insulating layer IL4 of the display element layer DPL to be spaced apart from each other by a predetermined distance with each of the bar type LEDs LD interposed therebetween.

[0282] The first light blocking pattern BLP1 may cover a portion of the first partition wall PW1 and may not cover the first electrode REL1 (hereinafter referred to as “1-1 electrode”) disposed on a side surface (eg, a second side surface S3 ) of the first partition wall PW1 .

[0283] The second light-shielding pattern BLP2 may cover a portion of the second partition wall PW2 and may not cover the second electrode REL2 (hereinafter referred to as “2-1st electrode”) disposed on the side surface of the second partition wall PW2.

[0284] The first light-shielding pattern BLP1 may be spaced apart from the 1-1 electrode REL1 by a predetermined distance d2 with respect to a normal line NL vertically extending from an upper end of the 1-1 electrode REL1.

[0285] The predetermined distance d2 between the first light shielding pattern BLP1 and the 1-1th electrode REL1 may be determined by a light output angle θ2 of the 1-1th electrode REL1.

[0286] The light output angle θ2 may refer to an angle included in a range in which, when light emitted from the first end EP1 of each of the rod type LEDs LD is reflected by the 1-1th electrode REL1 in a direction in which an image is displayed, the light is not absorbed by the third and fourth insulating layers IL3 and IL4.

[0287] The light output angle θ2 may be determined by the inclination angle of the 1-1th electrode REL1. The inclination angle of the 1-1th electrode REL1 may correspond to the inclination angle θ1 of the second side surface S3 of the first partition wall PW1 (see, for example, Figure 7b ). Therefore, the light output angle θ2 may be determined by the inclination angle θ1 of the second side surface S3 of the first partition wall PW1.

[0288] For example, when the inclination angle θ1 of the second side surface S3 of the first partition wall PW1 is 28°, the light output angle θ2 of the 1-1st electrode REL1 may be 34°. Therefore, the first light shielding pattern BLP1 may be disposed on the fourth insulating layer IL4 to contact the slope inclined 34° to the left from the normal line NL without covering the 1-1st electrode REL1.

[0289] In an embodiment of the present disclosure, the second light-shielding pattern BLP2 and the 2-1st electrode REL2 may be spaced apart from each other by a predetermined distance d2 between the first light-shielding pattern BLP1 and the 1-1st electrode REL1.

[0290] The color filter layer CF may be disposed on the first and second light blocking patterns BLP1 and BLP2.

[0291] The color filter layer CF may transmit only light of a preset wavelength and block light of other wavelength ranges, thereby reducing reflection of external light incident through the color filter layer CF. In addition, the color filter layer CF may serve as a planarization layer for planarizing a step structure caused by the display element layer DPL.

[0292] In an embodiment of the present disclosure, the color filter layer CF may include an organic material having a refractive index that is the same as or similar to that of the third and fourth insulating layers IL3 and IL4 disposed on the first and second electrodes REL1 and REL2 .

[0293] Fig.14 A display device according to an embodiment of the present disclosure is shown, in particular, Fig.14 is a plan view showing a unit light emitting region provided in one pixel of a light emitting device, and Fig.15 It is along Fig.14 A cross-sectional view taken along line II-II'.

[0294] In the embodiments of the present disclosure, the following description will focus on the differences from the aforementioned embodiments to avoid repeated explanations. The components that are not explained separately in the description below the present embodiments are consistent with the components of the aforementioned embodiments. The same reference numerals will be used to represent the same components, and similar reference numerals will be used to represent similar components.

[0295] exist Fig.14 In the figure, for convenience, a plurality of rod-type LEDs arranged horizontally are shown. However, the arrangement of the rod-type LEDs is not limited thereto.

[0296] In addition, for convenience, Fig.14 Illustration of the transistor connected to the rod-type LED and the signal line connected to the transistor is omitted.

[0297] In addition to the first electrode covering the entire first partition wall and the second electrode covering the entire second partition wall, Fig.14 and Fig.15 The display device shown in FIG. 1 may have Fig.12 The display devices have substantially the same or similar configurations.

[0298] refer to Figure 14 to Figure 15 , a display device according to an embodiment of the present disclosure may include a substrate SUB, a pixel circuit component PCL disposed on the substrate SUB, a display element layer DPL disposed on the pixel circuit component PCL, and a color filter layer CF disposed on the display element layer DPL.

[0299] The pixel circuit part PCL may include a buffer layer BFL disposed on a substrate SUB, first and second transistors T1 and T2 disposed on the buffer layer BFL, first and second alignment lines ARL1 and ARL2 , and a passivation layer PSV.

[0300] The display element layer DPL may include first and second partition walls PW1 and PW2 , a plurality of rod type LEDs LD, first and second electrodes REL1 and REL2 , and first and second contact electrodes CNE1 and CNE2 .

[0301] When viewed on a plane, the first electrode REL1 may completely cover the first partition wall PW1 , and the second electrode REL2 may completely cover the second partition wall PW2 .

[0302] The color filter layer CF may function as a planarization layer for planarizing a step structure caused by the display element layer DPL.

[0303] In an embodiment of the present disclosure, the color filter layer CF may be formed of an organic material having the same refractive index as those of the third and fourth insulating layers IL3 and IL4 disposed on the first and second electrodes REL1 and REL2 .

[0304] The display device may further include first and second light-shielding patterns BLP1 and BLP2 disposed between the color filter layer CF and the fourth insulating layer IL4 .

[0305] The first and second light-shielding patterns BLP1 and BLP2 may include a black matrix and may absorb external light incident on the display device, thereby reducing reflection of the external light.

[0306] In an embodiment of the present disclosure, the first light-shielding pattern BLP1 may cover a portion of the first electrode REL1 , and the second light-shielding pattern BLP2 may cover a portion of the second electrode REL2 .

[0307] Since the first electrode REL1 and the second electrode REL2 completely cover the corresponding partition walls, a portion of external light incident on the display device may be reflected by the first electrode REL1 and the second electrode REL2.

[0308] In this case, the first and second light-shielding patterns BLP1 and BLP2 may absorb external light reflected by the first and second electrodes REL1 and REL2. Therefore, components disposed under the first and second light-shielding patterns BLP1 and BLP2 may be prevented from being visually recognized from the outside.

[0309] The display device according to the embodiment of the present disclosure can be used in various electronic devices. For example, the display device can be applied to televisions, notebook computers, cellular phones, smart phones, smart boards (PDs), portable multimedia players (PMPs), personal digital assistants (PDAs), navigation devices, various types of wearable devices (such as smart watches), etc.

[0310] Although various exemplary embodiments have been described above, those skilled in the art will appreciate that various modifications, additions and substitutions are possible, without departing from the scope and spirit of the present disclosure.

[0311] Therefore, the embodiments disclosed in this specification are for illustrative purposes only and do not limit the technical spirit of the present disclosure. The scope of the present disclosure must be defined by the appended claims and their equivalents.

Claims

1. A light emitting device, comprising: substrate; A light emitting element is disposed on the substrate, and the light emitting element has a first end and a second end in a longitudinal direction; A first bank and a second bank are provided on the substrate, and the first bank and the second bank are spaced apart from each other by a predetermined distance, and the light emitting element is interposed between the first bank and the second bank; a first electrode and a second electrode, wherein the first electrode is disposed on the first bank to be adjacent to the first end of the light emitting element, and the second electrode is disposed on the second bank to be adjacent to the second end of the light emitting element; as well as a first contact electrode and a second contact electrode, wherein the first contact electrode connects the first electrode to the first end of the light emitting element, and the second contact electrode connects the second electrode to the second end of the light emitting element, When viewed in a plane, the first electrode partially overlaps with the first bank, and the second electrode partially overlaps with the second bank.

2. The light emitting device according to claim 1, wherein: The first electrode is disposed on a side surface of the first bank, and the second electrode is disposed on a side surface of the second bank.

3. The light emitting device according to claim 2, further comprising: a passivation layer disposed between the first bank, the second bank and the substrate; A first insulating layer, disposed between the passivation layer and the light emitting element; a second insulating layer, disposed on the light emitting element and exposing the first end and the second end of the light emitting element to the outside; a third insulating layer, disposed on the first contact electrode to cover the first contact electrode; as well as a fourth insulating layer, disposed on the second contact electrode to cover the second contact electrode; The third insulating layer and the fourth insulating layer include insulating materials having the same refractive index as that of the first electrode and the second electrode.

4. The light emitting device according to claim 3, further comprising: a first alignment line and a second alignment line, disposed between the substrate and the passivation layer, and extending in one direction when viewed on the plane, Wherein, the first alignment line is electrically coupled to the first electrode, and the second alignment line is electrically coupled to the second electrode.

5. The light emitting device according to claim 4, further comprising: a first encapsulation layer, disposed between the first electrode and the first contact electrode and covering the first electrode; as well as The second encapsulation layer is disposed between the second electrode and the second contact electrode and covers the second electrode.

6. The light emitting device according to claim 1, wherein: The light emitting element comprises: a first semiconductor layer doped with a first conductive dopant; a second semiconductor layer doped with a second conductive dopant; and The active layer is disposed between the first semiconductor layer and the second semiconductor layer.

7. The light emitting device according to claim 6, wherein: The light emitting element includes a light emitting diode having a micrometer-scale or nanometer-scale cylindrical shape or having a micrometer-scale or nanometer-scale prismatic shape.

8. Display equipment, including: A substrate having a display area and a non-display area; a pixel circuit component disposed in the display region of the substrate and comprising at least one transistor and a passivation layer disposed on the transistor; as well as a display element layer disposed on the passivation layer and comprising at least one light emitting element having a first end and a second end in a longitudinal direction, Wherein, the display element layer comprises: a first bank and a second bank disposed on the passivation layer and spaced apart from each other by a predetermined distance, and the light emitting element is interposed between the first bank and the second bank; a first electrode and a second electrode, the first electrode being disposed on the first bank to be adjacent to the first end of the light emitting element, and the second electrode being disposed on the second bank to be adjacent to the second end of the light emitting element; and a first contact electrode and a second contact electrode, wherein the first contact electrode connects the first electrode to the first end of the light emitting element, and the second contact electrode connects the second electrode to the second end of the light emitting element, When viewed in a plane, the first electrode partially overlaps with the first bank, and the second electrode partially overlaps with the second bank.

9. The display device according to claim 8, further comprising: a first alignment line and a second alignment line, which are disposed between the substrate and the passivation layer and extend in a column direction when viewed on the plane, Wherein, the first alignment line is electrically coupled to the first electrode, and the second alignment line is electrically coupled to the second electrode.

10. The display device according to claim 8, wherein: The first electrode is disposed on a side surface of the first bank, and the second electrode is disposed on a side surface of the second bank.

11. The display device according to claim 10, further comprising: A first insulating layer, disposed between the passivation layer and the light emitting element; a second insulating layer, disposed on the light emitting element and exposing the first end and the second end of the light emitting element to the outside; a third insulating layer, disposed on the first contact electrode to cover the first contact electrode; as well as a fourth insulating layer, disposed on the second contact electrode to cover the second contact electrode; The third insulating layer and the fourth insulating layer include insulating materials having the same refractive index as that of the first electrode and the second electrode.

12. The display device according to claim 11, further comprising: The planarization layer is disposed on the fourth insulating layer and has a refractive index that is the same as that of the fourth insulating layer.

13. The display device according to claim 11, further comprising: The color filter layer is disposed on the fourth insulating layer and has the same refractive index as that of the fourth insulating layer.

14. The display device according to claim 13, wherein: The color filter layer includes light scattering particles dispersed in the color filter layer.

15. The display device according to claim 13, further comprising: a light shielding pattern, disposed between the fourth insulating layer and the color filter layer, The light shielding pattern includes a black matrix and partially corresponds to each of the first bank and the second bank.

16. The display device according to claim 8, wherein: The light emitting element comprises: a first conductive semiconductor layer doped with a first conductive dopant; a second conductive semiconductor layer doped with a second conductive dopant; and The active layer is disposed between the first conductive semiconductor layer and the second conductive semiconductor layer.

17. The display device according to claim 16, wherein: The light emitting element includes a light emitting diode having a micrometer-scale or nanometer-scale cylindrical shape or having a micrometer-scale or nanometer-scale prismatic shape.

18. Display equipment, including: A substrate having a display area and a non-display area; a pixel circuit component disposed in the display region of the substrate and comprising at least one transistor and a passivation layer disposed on the transistor; as well as a display element layer disposed on the passivation layer and comprising at least one light emitting element having a first end and a second end in a longitudinal direction, Wherein, the display element layer comprises: a first bank and a second bank disposed on the passivation layer and spaced apart from each other by a predetermined distance, and the light emitting element is interposed between the first bank and the second bank; a first electrode and a second electrode, the first electrode being disposed on the first bank, and the second electrode being disposed on the second bank; a first contact electrode and a second contact electrode, wherein the first contact electrode connects the first electrode to the first end of the light emitting element, and the second contact electrode connects the second electrode to the second end of the light emitting element; an insulating layer, disposed on the first contact electrode and the second contact electrode; a light shielding pattern, disposed on the insulating layer; and A color filter layer is disposed on the light shielding pattern, wherein, when viewed on a plane, the first electrode completely overlaps with the first bank, and the second electrode completely overlaps with the second bank, and The insulating layer includes an insulating material having a refractive index that is the same as a refractive index of the first electrode and a refractive index of the second electrode.

19. The display device according to claim 18, wherein: The light shielding pattern includes a black matrix and covers a portion of the first electrode and a portion of the second electrode.

20. The display device according to claim 19, wherein The color filter layer has the same refractive index as that of the insulating layer.

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