FMCW radar sensor with synchronized high-frequency module

Abstract

A method for encoding and storing digital data comprising a plurality of real arguments in a signal processing unit of a radar sensor, in which method at least one real argument r is stored in exponential representation of the form: r = m.b ‑k where m is a number mantissa of length p, b is an integer base number, and k is a positive number encoded as a number code of length q, characterized in that the argument r is converted into exponential representation of the form: r = m * .b ‑f(k) where m * is a mantissa, f is a function of k selected from a plurality of functions, and the selection of the function f is made in dependence on the value distribution of the argument to be stored.

Description

Technical Field

[0001] This invention relates to a method for encoding and storing digital data comprising multiple real parameters in a signal processing unit of a radar sensor, wherein at least one real parameter r is stored in an exponential representation of the following form:

[0002] r = m·b -k ,

[0003] Where m is the mantissa of length p, b is the base of the integer, and k is a positive number encoded as a digital Zahl of length q.

[0004] This invention relates particularly to the encoding and storage of digital data in radar sensors for motor vehicles. Background Technology

[0005] In radar sensors used in motor vehicles, the transmitted radar signals are mostly periodically frequency-modulated signals, such as a sequence of sequentially transmitted frequency ramps or a sequence of so-called OFDM symbols (OFDM = Orthogonal Frequency Division Multiplexing). The signal received from the target being located is downmixed into a low-frequency baseband and then digitized using an analog-to-digital converter after pre-amplification. Thus, each modulation cycle yields a time signal in the form of a vector x(n), whose components are either real or complex numbers depending on the demodulation method used, and these components are represented digitally. The number of components (i.e., the dimension of the vector) corresponds to the number of measurement time points at which the signal is analyzed and processed within the modulation cycle.

[0006] A vector x(n) can be transformed into a vector V(k) by at least one Fourier transform (e.g., FFT), the complex components of which describe the amplitude and phase of the received signal as a function of frequency k. The dimension of this vector corresponds to the number of frequency slots on the frequency axis and thus determines the frequency resolution.

[0007] In many known radar systems used in motor vehicles, each modulation cycle comprises multiple successive frequency ramps or OFDM symbols, which can be counted using an index y. In this case, this can be achieved through the vector V. y (k) A further Fast Fourier Transform at index y is performed to form a two-dimensional matrix. Each cell of this matrix then represents a combination of distance d and relative velocity v, and the cell—in which the parameter obtained by the two-dimensional FFT is maximized—represents an object located at distance d and relative velocity v.

[0008] If a radar sensor has an array with multiple receiving antennas and analyzes and processes the signals from the receiving antennas in separate receiving channels, the azimuth and / or elevation angle of the object can be determined based on the amplitude and phase relationships of the signals obtained for the same object in different channels.

[0009] As the requirements for range and angular resolution of radar sensors increase, the number of receiving channels also increases, along with the dimension of the vectors x(n) and V(k) to be processed within each channel. This results in a considerable amount of data to be processed in each modulation cycle. This necessitates not only a fast processor but also high storage capacity for temporarily storing digital input parameters and intermediate results obtained at each processing step. The increased demand for storage capacity leads to larger chip sizes, higher costs, and higher energy requirements.

[0010] According to ANSI / IEEE Standard 754-1985, the numerical representation of real numbers is r = m·2. -k The storage is in the form of . Then, the storage requirement for each real number is given by the sum of the length p of the mantissa m and the length q of the exponent k. To represent a complex number, two real numbers are needed, for example, the real part and the imaginary part.

[0011] The method described in US 9,541,637 B2 and WO 2015 / 185058 A1 uses data compression to keep storage requirements within limits. Summary of the Invention

[0012] The objective of this invention is to describe a method by which storage requirements can be further reduced or positioning accuracy can be improved given a certain amount of storage space.

[0013] According to the present invention, this task is solved by means of a method of the type mentioned at the beginning, in which the parameter r is transformed into an exponential representation of the following form for compressed storage:

[0014] r = m * ·b -f(k) ,

[0015] Where, m * It is the mantissa, f is the function chosen by k from among multiple functions, and the choice of function f is based on the distribution of the values ​​of the parameters to be stored.

[0016] Depending on the distribution of the values ​​of the parameters to be stored, the following may occur: b may be completely unnecessary in the exponential representation. -1Some lower powers. Then the function f can be chosen such that higher powers appear in the exponential representation instead of these unwanted powers, enabling higher resolution. Then a number k of length q is used to encode another more suitable power selection instead of b. -1 2 q The lowest power is used to achieve higher resolutions without requiring additional storage.

[0017] Advantageous configurations and extensions of the invention are described in preferred embodiments.

[0018] According to an advantageous extension of the invention, an exponent with b > 2 is used for compressed storage of parameters.

[0019] By replacing the standard base b=2 with a larger integer base, higher resolution can be achieved in the important parts of the parameters to be stored, given the total length of the mantissa and exponent. Conversely, this means that, given a resolution requirement, the length of the mantissa and / or exponent can be reduced, thus saving storage space.

[0020] In an advantageous implementation, the base b used is a power of 2, such as b = 4 or b = 8. The exponent representation then represents the conversion from one base (e.g., b = 2) to another base (e.g., b = 4), which can be performed very simply and requires almost no additional computation time. Alternatively, the parameter can also be generated in the digitization of the analog-to-digital converter with an exponent representation having b < 2.

[0021] The function f can be chosen before the radar sensor begins operation. The selection criteria are then the expected value distribution of the parameters to be stored, taking into account the characteristics of the radar sensor, the operating conditions, and the mission, and which value distribution is most likely to be expected.

[0022] However, the choice of function f can also be changed dynamically during the operation of the radar sensor, for example, when the required characteristics of the radar sensor change, or optionally based on random or continuous statistical analysis of the value distribution of the data to be stored. Attached Figure Description

[0023] The embodiments are further described below with reference to the accompanying drawings. The drawings show:

[0024] Figure 1 A simplified circuit diagram of a radar sensor on which this invention can be applied;

[0025] Figure 2 :according to Figure 1 A block diagram of the digital signal processing unit in a radar sensor;

[0026] Figure 3 Example of encoding numeric parameters in a standard format;

[0027] Figure 4 : A memory architecture for an encoding method according to an embodiment of the present invention;

[0028] Figures 5 to 7 Example of encoding data using a method according to an embodiment of the present invention;

[0029] Figure 8 Used to explain the basis Figures 5 to 7 A schematic diagram of a variant of the method;

[0030] Figure 9 and 10 : A histogram used to illustrate another variation of the method according to the second embodiment;

[0031] Figure 11 A block diagram of a signal processing stage for a method according to a second embodiment is shown. Detailed Implementation

[0032] Figure 1 An FMCW radar sensor is shown as an example. This FMCW radar sensor has a transmitting and receiving device 10 with four antenna elements 12, 14, 16, and 18, which together form a planar antenna array. The radar sensor is mounted in the vehicle such that the antenna elements 12 to 18 are arranged side by side at the same height, thereby achieving a certain angular resolution capability of the radar sensor in the horizontal direction (in azimuth).

[0033] The high-frequency section 20 for manipulating the antenna elements is formed, for example, by one or more MMICs (Monolithic Microwave Integrated Circuits) and has an oscillator 22 that feeds the transmitted signal to each antenna element. The frequency of the transmitted signal is periodically modulated in the form of a sequence of rising and / or falling frequency ramps. For example, each modulation period includes a sequence of so-called fast linear frequency modulation, i.e., frequency ramps with the same slope, each having a certain frequency offset from the others. The radar echoes received by the antenna elements 12 to 18 are coupled out by a circulator 24 and fed to a mixer 26, in which the radar echoes are mixed with the transmitted signal provided by the oscillator 22. In this way, baseband signals b1, b2, b3, b4 are obtained for each of the antenna elements, and these baseband signals are fed to an electronic control and analysis processing unit 28.

[0034] The control and analysis processing unit 28 includes a four-channel analog-to-digital converter 30 that digitizes and records the baseband signals b1 to b4 obtained from the four antenna elements. The resulting digital time signals are then further processed channel-by-channel in the signal processing unit 32. For example, the time signal for each ramp is transformed into a spectrum using a Fast Fourier Transform, which is then subjected to another Fourier Transform on the ramp index. A two-dimensional spectrum is thus obtained, from which the distance d and relative velocity v of the located object can be read.

[0035] The parameters obtained through Fourier transform are complex numbers, which describe the amplitude and phase of the received signal. Since the amplitude and phase relationship of signals received from the same object in different receiving channels depends on the azimuth angle of the relevant object, the azimuth angle θ of the object can also be determined with a certain accuracy in the angle estimation module 34.

[0036] exist Figure 2 The basic components of the signal processing unit 32 are shown in a block diagram. The signal processing unit has an input stage 36 that receives digital data from the analog-to-digital converter 30. In the compression stage 38, the data is compressed according to a method further described below. The data is then stored in compressed form in the memory 40. If further processing is required, the data is decompressed in the decompression stage 42 and then further processed in the processing stage 44.

[0037] Signal processing unit 32 may also have multiple linked processing stages 44, such as two FFT stages for two-dimensional Fourier transform. The processing result of the first stage is then recompressed and stored in another memory, which is then accessed by downstream processing stages via another decompression stage. In some applications, processing stage 44 or downstream processing stages may be configured such that they can directly process the compressed data, as if the compressed data were stored in memory 40. Then, the decompression stage 42 is bypassed or the data is passed without modification. Alternatively, it is also possible for a processing stage to directly modify the compressed data in memory 40. Then, downstream processing stages access the same memory 40.

[0038] According to standard IEEE 754-1985, the actual parameter is expressed as r = m·b -k The exponent representation is encoded and stored in the form of p. Here, b = 2, m is, for example, an 8-bit mantissa of length p, and k is, for example, a 3-bit positive integer of length q. Figure 3The image shows the digitization of the decimal number 0.8408203125 as an example. In its binary fixed-point representation, this number is represented by the bit sequence 01101011101, which is 11 bits long. Figure 3 In this bit sequence, the value of the corresponding binary position is a power of 2. The most significant bit has a value of 2. 0 The next digit has a value of 2. -1 ,etc.

[0039] Figure 3 Table 46 shows the transformation from a fixed-point number to a standard exponential representation with p = 8, q = 3, and a base b = 2. Since the exponent k has a length q = 3, k can take values ​​from 0 to 7. Accordingly, Table 46 has eight rows. Because the mantissa has a length p = 8, the three least significant bits of the original bit sequence must be discarded during the conversion to exponential representation. The eight-bit mantissa is entered into the following row of Table 46: this row (in the case of positive numbers) is located to the left of the first bit that is different from 0 in the original 11-bit sequence, which in the given example is in row k = 0. Therefore, the stored parameter can be represented as...

[0040] r = m0·2 -0 +m1·2 -1 +…+m7·2 -7 ,

[0041] Where, m i (i = 0 to 7) is the i-th digit of the mantissa m.

[0042] In this example, the mantissa is represented in two's complement format. In this format, for positive numbers, the most significant bit (at the left end of the sequence) must be 0, while for negative numbers, the most significant bit must be 1. If the original bit sequence has more than one leading zero, the leading zeros (except the last one) can be removed, and the exponent k is incremented by 1 for each removed zero.

[0043] As an example, Figure 3 Table 48 shows the encoding of the decimal number 0.02813720703125. The associated bit sequence has six leading zeros. Five zeros are removed and the remaining mantissa (the next 8 bits) is entered into row k=5.

[0044] Accordingly, in the case of negative numbers, leading 1s can be removed (except for the last one). Since the additional low-order bits can be recorded in the mantissa for the removed leading bits, higher precision can be achieved in the exponential representation when representing real numbers.

[0045] For the cases shown in Table 46, the original decimal number 0.840... is converted to an exponential decimal value of 0.8359375. A comparison of the two decimal numbers shows that limiting the mantissa to 8 bits results in a quantization error of 0.004 on the order of magnitude.

[0046] For the cases shown in Table 48, the corresponding decimal numbers for the original bit sequence and exponent representation are also illustrated. It can be seen that here, due to the scaling of k=5 bits, the quantization error is significantly smaller.

[0047] The processing stages 44 in the signal processing unit 32 are designed for specific task settings, and the basic characteristics of the data structures of the data to be processed and stored are known in advance. Therefore, it can be individually determined which variation of the method according to the invention should be used for each individual processing stage 44. If a large dynamic range is required, q is increased. If a smaller dynamic range is expected, p can be increased, thereby achieving higher accuracy. In some cases, it can also be operated with a larger base (e.g., b = 4 or b = 8) as desired, wherein the base should preferably be a power of 2.

[0048] Figure 4 An encoding method according to an embodiment of the present invention is illustrated. In this embodiment, k does not directly specify the exponent in the exponent representation; rather, k is merely the independent variable of the function f(k), and the function value of the function determines the exponent. The exponent representation therefore has the following form:

[0049] r = m * ·b f(k) ,

[0050] In this case, the last digit is m * mark.

[0051] exist Figure 4 Examples of value tables 58, 60, 62, and 64 are shown, each defining a different function f. The function values ​​or the powers derived therefrom, b, are explicitly stated in value tables 58, 60, and 62. f(k) Assignment of the independent variable k.

[0052] The advantage of this method is that it is not limited to the four lowest powers of 4, even when the length of the independent variable k to be stored is q = 2. 0 4 -1 4 -2 and 4 -3(As shown in value table 58), but alternatively, another set of four powers of 4 can also be used, as shown as examples in value tables 60 and 62. The choice of function f and the associated value table can then depend on which set of powers best suits the expected or discovered structure of the data to be stored. This will be further elaborated below.

[0053] In memory 40, data is stored in different data blocks 66, 68, and 70 in this example, and a pointer 72 is additionally stored for each data block, pointing to one of the value tables 58 to 64. The data in each data block is encoded and decoded using a function f specified by pointer 72.

[0054] exist Figure 5 The image shows a data set 74 to be stored. In this simplified example, the data set consists of only five bit sequences, each 22 bits long. However, in this example, the dynamic range is only 14 bits because all lower-order bits are 0. The first three bit sequences correspond to a magnitude of 2. 0 The real numbers in the sequence, and the last two digits indicate the order of magnitude 2. -4 or 2 -6 The smaller number in the range.

[0055] In addition, Figure 5 Three tables, 76, 78, and 80, are shown, each representing an exponential representation of one of the functions f shown in Figure 7. The corresponding value tables 58, 60, and 62 are similarly illustrated in Figure 8.

[0056] To check how well the exponential representation according to Table 76 fits data set 74, a row can now be selected from Table 76 for each bit sequence in data set 74, using a row that covers the bits different from 0 as well as possible. Bits covered in this way are marked in data set 74 by box 82. It can be seen that row k=0 completely covers the first bit sequence and row k=3 completely covers the last bit sequence. A few lower-order bits are lost in the other three bit sequences respectively.

[0057] If we now repeat the same procedure with tables 78 and 80, we will see that the total amount of data lost in these tables is greater. Therefore, in order to encode data set 74, the function f defined by value table 58 (Table 76) will be chosen.

[0058] Similarly, Figure 6 An example of data set 84 is shown, which can best be mapped to value table 60 (Table 78), and Figure 7 An example of data set 86 is shown, which can be best mapped to value table 62 (table 80).

[0059] Error metrics can be calculated as criteria for selecting the most suitable function f, such as the sum of quantization errors, mean square error, etc.

[0060] Figure 8 A broader data set 88 with a total of twenty bit sequences is shown. These bit sequences are roughly ordered, at least according to the decreasing magnitude of the real numbers represented by them. This corresponds to situations frequently encountered in practice. For example, the bit sequence could represent the amplitude of a received radar echo with an increasing frequency and a correspondingly increasing object distance. The ordering according to decreasing magnitude is automatically achieved based on the fact that radar echoes weaken as object distance increases.

[0061] To minimize storage requirements and / or improve accuracy, it is now desirable to divide this ordered or partially ordered data set into blocks 90, 92, and 94, and select a function f for each block that best matches its data structure. For example, a function f would be selected for block 90 that predominantly contains lower powers of four within its value range, while a function f would be selected for block 94 that predominantly contains higher powers of four within its value range, thereby reducing the occurrence of leading zeros or ones in all bit sequences within block 94.

[0062] If the area of ​​operation of the radar sensor is known, the choice of the function f for different blocks, as well as the base (p = 4 or higher), the length p of the mantissa, and the length q of the independent variable k, can be determined before the radar sensor begins operation. However, in another implementation, these parameters can also be dynamically matched based on the data to be processed during the operation of the radar sensor.

[0063] Instead of defining the function f using predefined and stored value tables 58, 60, 62, in another implementation, the functions f to be applied can be generated directly during data compression by selecting a power of four that best covers the valid bits in the bit sequence to be compressed.

[0064] For example, the function f can be selected or generated based on statistical analysis. In this statistical analysis, a histogram is created based on the bit sequence to be stored. This histogram describes the number n of the bit sequence for each power e of the base b, where the most significant bit (after removing leading ones or zeros) is located at b. -e With b -e-1 Within the interval between. An example of this histogram is... Figure 9 and 10 As shown in [the image]. Figure 9 In the middle, the value of the most significant bit is either in b 0 To b -1 Within the range, or within b-5 To b -7 Within the range. Since only four distinct powers can be described using an independent variable k of length 2, the four lowest powers are chosen from all the powers that appear, which in this example is b. 0 b -1 b -5 and b -6 Its valid bit is b. -7 The bit sequence starting in m·b -6 The encoding format must tolerate a certain amount of data loss.

[0065] Figure 10 An example is shown where the most significant bit is either in b -3 To b -5 Within the range, or within b -9 Therefore, in this case, the power b is chosen. -3 b -4 b -5 and b -9 .

[0066] Figure 11 A block diagram of signal processing unit 32' is shown, in which parameters for data compression can be dynamically matched. Here, a statistics module 96 is inserted between input stage 36 and compression stage 38. This statistics module performs statistical analysis on the data received from input stage 36, for example by creating... Figure 9 and 10 The histogram is of the type shown. If necessary, the data set to be stored is also divided into blocks with similar data structures in the statistics module 96. The statistical analysis results for the complete data set or for the blocks just considered are then submitted to the selection module 98, which determines the value table for the function f to be applied, and, if necessary, the optimal parameters p and q, and, if necessary, the base b, if the base should be greater than 4. The parameters (and function) determined by the selection module 98 are submitted to the compression stage 38, where they are used for data compression.

[0067] The compressed data, along with the parameters used (or pointers to the set of parameters used), is then stored block by block in memory 40.

[0068] The methods described so far have only considered the encoding of real numbers. However, it is understood that this method can also be applied to complex numbers, since each complex number can be represented by two real numbers, for example, by the real part and the imaginary part of the complex number, or also by the magnitude and phase of the complex number. The encoding method described above can then be used to encode each or at least one of the two real numbers representing a complex number. For example, the exponential representation can be used for the magnitude and the fixed-point representation for the phase. This representation of complex numbers is particularly advantageous in many applications in radar sensors because phase compensation is often required in data analysis and processing, which simplifies to a simple addition of phases when complex parameters are represented by magnitude and phase. Examples of applications include phase compensation in radars with synthetic aperture (SAR) or in radar sensors with OFDM modulation.

Claims

1. A method for encoding and storing digital data comprising a plurality of real parameters in a signal processing unit (32, 32') of an FMCW radar sensor, wherein at least one real parameter r is stored in an exponential representation of the following form: r=m·b -k , in, m is a mantissa of length p, b is the base, and k is a positive number encoded as a digit of length q, characterized in that the parameter r is converted into an exponential representation of the following form for compressed storage: r=m * ·b -f(k) , Where, m * The mantissa is k, f is a function chosen from among multiple functions, and the selection of function f is based on the distribution of the values ​​of the parameters to be stored. The FMCW radar sensor has a transmitting and receiving device with multiple antenna elements, which together form a planar antenna array. Specifically, for each individual processing stage of the signal processing unit, if a large dynamic range is required, q is increased; if a smaller dynamic range is expected, p is increased, thereby achieving higher accuracy. In this method, a number k of length q is used to select the encoding exponent in order to achieve higher resolution without additional storage requirements. Specifically, by replacing the standard base b=2 with a larger integer base, given the total length of the mantissa and exponent, higher resolution is achieved in the important part of the parameters to be stored. Furthermore, given the resolution requirements, the length of the mantissa and / or exponent is reduced, thus saving storage space. The selection of the function f and the associated value table depends on which set of powers best suits the expected or discovered structure of the data to be stored. An error metric is calculated as a standard for selecting the most suitable function f, and this error metric includes the sum and / or mean square error of the quantization error. The FMCW radar sensor is mounted in the vehicle such that the antenna elements are positioned side-by-side at the same height, thereby achieving a certain angular resolution capability for the radar sensor in the azimuth angle. Here, p and q are determined based on the known or expected data structure of the parameters to be stored. During the operation of the radar sensor, p and / or q and / or b are dynamically matched to the data structures of the parameters to be stored. The signal processing unit dynamically matches parameters used for data compression. The signal processing unit includes: Input level; Select module; The statistics module performs statistical analysis on the data received from the input level, wherein the data set to be stored is divided into blocks with similar data structures, and the statistical analysis results for the complete data set or for the blocks are submitted to the selection module, which determines a value table for the function f to be applied, and, if necessary, determines the optimal parameters p and q, and, if necessary, also determines the base b. The compression stage, where parameters and functions determined by the selection module are passed to the compression stage and used there for data compression in order to provide compressed data; The memory stores compressed data block by block, along with the parameters used or pointers to the set of parameters used. At least one processing level; A decompression stage is used to decompress data, wherein the decompressed data is processed in at least one processing stage for FFT. Specifically, the input level is coupled with the statistics module, the statistics module is coupled with the compression level and the selection module, and the selection module is coupled with the compression level. The compression stage is coupled to the memory, the memory is coupled to the decompression stage, and the decompression stage is coupled to at least one processing stage.

2. The method according to claim 1, wherein b is a power of 2.

3. The method according to claim 1 or 2, wherein an exponent having b>2 is used for compressed storage of the parameter r.

4. The method according to claim 1 or 2, wherein the following plurality of functions are pre-stored in the form of a value table (58, 60, 62): from which the function f is to be selected.

5. The method according to claim 1 or 2, wherein, during the operation of the radar sensor, the selection of the function f is changed according to the data structure of the parameters to be stored.

6. The method according to claim 1 or 2, wherein, during the operation of the radar sensor, the value of the selected function f is generated according to the data structure of the parameters to be stored.

7. The method according to claim 1 or 2, wherein parameters for data compression and / or functions for data compression are determined based on statistical analysis of the data to be stored.

8. The method according to claim 1 or 2, wherein the complex number is represented by the magnitude of the complex number and the phase of the complex number, and the exponential representation according to claim 1 is used for the magnitude.

9. An FMCW radar sensor, said FMCW radar sensor being used in a motor vehicle, characterized in that... A signal processing unit (32; 32') configured to implement the method according to any one of claims 1 to 7.

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