Display device

Abstract

The present disclosure relates to a display device including a display panel having a display area and a non-display area, a signal wiring disposed in the display area, a connection wiring disposed in the display area and electrically connected to the signal wiring, and a touch electrode disposed on the connection wiring. The connection wiring includes a diagonal portion extending in a diagonal direction and a first protrusion pattern protruding from the diagonal portion of the connection wiring. A portion of the first protrusion pattern overlaps the touch electrode.

Description

Technical Field

[0001] This disclosure relates to display devices. Background Technology

[0002] With the development of multimedia, the importance of display devices has been increasing. Various types of display devices have been developed and are in use, such as liquid crystal displays (LCDs) and organic light-emitting diode (OLED) displays. Among these types, OLED displays are self-emissive devices, which are considered popular due to their technical advantages, such as wide viewing angles.

[0003] Generally, an OLED display includes pixel circuitry and drivers configured to drive the pixel circuitry. Drivers may include scan drivers that provide scan signals to the pixel circuitry and data drivers that provide data signals to the pixel circuitry. The driving circuitry for the scan drivers and data drivers can be located in a non-display area adjacent to the display area. In terms of the function of the display device, the non-display area is considered unused space. Summary of the Invention

[0004] According to embodiments of this disclosure, a display device may include: a display panel including a display area and a non-display area; signal wiring disposed in the display area; connection wiring disposed in the display area and electrically connected to the signal wiring; and a touch electrode disposed on the connection wiring. The connection wiring may include: a diagonal portion extending in a diagonal direction; and a first protruding pattern protruding from the diagonal portion of the connection wiring. A portion of the first protruding pattern may overlap with the touch electrode.

[0005] Adjacent portions of the first protruding pattern may face each other, and the gap between adjacent portions of the first protruding pattern may overlap with the touch electrode.

[0006] The distance between adjacent portions of the first protruding pattern may be less than the line width of the touch electrode.

[0007] The signal wiring may extend in a first direction, and the first protruding pattern may protrude in the first direction or in a second direction intersecting the first direction.

[0008] The connection wiring may further include a second protruding pattern extending from an extension of the connection wiring. The extension may include a portion of the connection wiring other than the diagonal portion. A portion of the second protruding pattern may overlap with the touch electrode.

[0009] Adjacent portions of the second protruding pattern may face each other, and the gap between adjacent portions of the second protruding pattern may overlap with the touch electrode.

[0010] A portion of at least one first protruding pattern in the first protruding pattern and a portion of at least one second protruding pattern in the second protruding pattern may be adjacent to each other, and the gap between the portion of the at least one first protruding pattern in the first protruding pattern and the portion of the at least one second protruding pattern in the second protruding pattern may overlap with the touch electrode.

[0011] The first protruding pattern and the second protruding pattern may be alternately arranged in the second direction, and the interval between the first protruding pattern or the interval between the second protruding pattern may be substantially the same as the interval between the connecting wires arranged in the second direction.

[0012] The length of the first protruding pattern in the first direction may be different from the length of the second protruding pattern in the first direction.

[0013] The connection wiring may include: a first portion extending from the non-display area in a first direction; a second portion extending from one end of the first portion in a second direction intersecting the first direction; and a third portion extending from one end of the second portion in a direction opposite to the first direction.

[0014] The display device may include: a first conductive layer including the signal wiring; a second conductive layer disposed on the first conductive layer and including the connection wiring; and an insulating layer disposed between the first conductive layer and the second conductive layer. The connection wiring may contact the signal wiring through contact holes passing through the insulating layer.

[0015] The display device may further include: a first electrode layer disposed on the second conductive layer; a second electrode layer disposed on the first electrode layer; and a light-emitting layer disposed between the first electrode layer and the second electrode layer.

[0016] The first portion may be electrically connected to the signal wiring, and the third portion may be spaced apart from the first portion.

[0017] The display device may further include a dummy pattern disposed on one side of the connecting wire in the display area. The dummy pattern may include a diagonal portion extending in a diagonal direction.

[0018] The display device may further include: a first dummy protrusion pattern protruding from the diagonal portion of the dummy pattern, wherein a portion of at least one first dummy protrusion pattern and a portion of at least one first protrusion pattern are adjacent to each other.

[0019] The gap between a portion of at least one first dummy protrusion in the first dummy protrusion pattern and a portion of at least one first protrusion in the first protrusion pattern may overlap with the touch electrode.

[0020] The distance between a portion of at least one first dummy protrusion in the first dummy protrusion pattern and a portion of at least one first protrusion in the first protrusion pattern may be less than the line width of the touch electrode.

[0021] The dummy pattern and the connecting wiring can be set on the same conductive layer.

[0022] The touch electrode can be disposed in the display area, and may further include: a first touch electrode disposed in a first direction; and a connecting electrode electrically connected to the first touch electrode.

[0023] The touch electrode may further include a second touch electrode disposed in a second direction intersecting the first direction. The first touch electrode and the second touch electrode may be spaced apart from each other.

[0024] The display device may further include: a pixel disposed in the display area; and a pixel defining film defining the light-emitting area of ​​the pixel. The touch electrode may overlap with the pixel defining film. Attached Figure Description

[0025] The above and other aspects and features of this disclosure will become more apparent from the detailed description of the embodiments with reference to the accompanying drawings, in which:

[0026] Figure 1 This is a plan view showing a display device according to an embodiment;

[0027] Figure 2 This is a side view showing a display device according to an embodiment;

[0028] Figure 3 It is along Figure 1 A schematic cross-sectional view taken from line III-III';

[0029] Figure 4 It is shown Figure 3 A plan view of the touch sensing layer;

[0030] Figure 5 It is shown Figure 4 A magnified view of region A;

[0031] Figure 6 It is along Figure 5 A schematic cross-sectional view of line VI-VI';

[0032] Figure 7 This is a plan view showing the signal wiring, connection wiring, and fan-out wiring of a display device according to an embodiment;

[0033] Figure 8 It is shown Figure 7 A magnified view of region B;

[0034] Figure 9 It is along Figure 8 A schematic cross-sectional view of line IX-IX';

[0035] Figure 10 It is shown Figure 7 A magnified view of region C;

[0036] Figure 11 This illustrates the application of a touch sensing layer. Figure 7 A magnified view of region C;

[0037] Figure 12 It is along Figure 11 A schematic cross-sectional view of line XII-XII';

[0038] Figure 13 It is shown Figure 7 A magnified view of region D;

[0039] Figure 14 It is along Figure 13 A schematic cross-sectional view of line XIV-XIV';

[0040] Figure 15 It is along Figure 13 A schematic cross-sectional view of line XV-XV';

[0041] Figure 16 This is a plan view showing a display device according to another embodiment;

[0042] Figure 17 It is shown Figure 16 A magnified view of region E;

[0043] Figure 18 It is along Figure 17 A schematic cross-sectional view of line XVIII-XVIII';

[0044] Figure 19This is a plan view illustrating the signal wiring, connection wiring, and fan-out wiring of a display device according to another embodiment;

[0045] Figure 20 It is shown Figure 19 A magnified view of region F;

[0046] Figure 21 This illustrates the application of a touch sensing layer. Figure 19 A magnified view of region F;

[0047] Figure 22 It is along Figure 21 A schematic cross-sectional view of line XXII-XXII';

[0048] Figure 23 This is a perspective view showing a display device according to another embodiment;

[0049] Figure 24 It is shown Figure 23 A plan view of the display device; and

[0050] Figure 25 It is shown Figure 23 A plan view of the signal wiring, connection wiring and fan-out wiring of the display device. Detailed Implementation

[0051] In the following description, numerous specific details are set forth for purposes of explanation in order to provide a thorough understanding of various embodiments or implementations of the invention. As used herein, “embodiment” and “implementation” are interchangeable terms and are non-limiting examples of the apparatus or methods disclosed herein. However, it will be apparent, however, that various embodiments may be practiced without these specific details or with one or more equivalent arrangements. These various embodiments are not necessarily exclusive nor do they limit this disclosure. For example, particular shapes, configurations, and characteristics of an embodiment may be used or implemented in another embodiment.

[0052] Unless otherwise stated, the illustrated embodiments are to be understood as providing exemplary features of the invention. Therefore, unless otherwise stated, features, components, modules, layers, films, panels, regions and / or aspects of various embodiments (hereinafter individually or collectively referred to as “elements”) may be combined, separated, interchanged and / or rearranged in other ways without departing from the inventive concept.

[0053] Generally, crosshairs and / or shading are used in the accompanying drawings to clarify the boundaries between adjacent elements. Thus, unless otherwise stated, the presence or absence of crosshairs or shading does not convey or indicate any preference or requirement for a particular material, material properties, dimensions, scale, commonalities between the elements shown, and / or any other characteristics, properties, or characteristics of the elements. Furthermore, in the accompanying drawings, the dimensions and relative dimensions of elements may be exaggerated for clarity and / or descriptive purposes. A particular process sequence may be performed differently than is described when embodiments can be implemented differently. For example, two consecutively described processes may be performed substantially simultaneously or in the reverse order of their description. Moreover, the same reference numerals refer to the same elements.

[0054] When a component or layer is referred to as being "on," "connected to," or "coupled to" another component or layer, the component or layer may be directly on, directly connected to, or directly coupled to the other component or layer, or there may be intermediate components or layers present. However, when a component or layer is referred to as being "directly on," "directly connected to," or "directly coupled to" another component or layer, there are no intermediate components or layers present. Therefore, the term "connection" can refer to a physical connection, electrical connection, and / or fluid connection with or without intermediate components. Furthermore, the X-axis, Y-axis, and Z-axis are not limited to the three axes of a Cartesian coordinate system such as the x-axis, y-axis, and z-axis, but can be interpreted broadly. For example, the X-axis, Y-axis, and Z-axis can be perpendicular to each other, or can represent different directions that are not perpendicular to each other. For the purposes of this disclosure, "at least one of X, Y, and Z" and "at least one selected from the group consisting of X, Y, and Z" can be interpreted as only X, only Y, only Z, or any combination of two or more of X, Y, and Z, such as XYZ, XYY, YZ, and ZZ. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0055] Although the terms “first,” “second,” etc., may be used herein to describe various types of elements, these elements should not be limited by these terms. These terms are used to distinguish one element from another. Therefore, without departing from the teachings of this disclosure, the first element discussed below may be referred to as the second element.

[0056] For descriptive purposes, spatial relative terms such as “below,” “under,” “below,” “down,” “above,” “above,” “higher,” and “side” (e.g., as in “sidewall”) may be used herein to describe the relationship between one element and another (or more elements) as shown in the accompanying drawings. Spatial relative terms are intended to cover different orientations of the device in use, operation, and / or manufacture, other than those depicted in the drawings. For example, if the device in the drawings is flipped, an element described as “below” or “under” other elements or features would subsequently be oriented “above” other elements or features. Thus, the exemplary term “below” can cover both above and below orientations. Furthermore, the device may be oriented in other ways (e.g., rotated 90 degrees or in other orientations), and therefore, the spatial relative descriptive terms used herein shall be interpreted accordingly.

[0057] The terminology used herein is for the purpose of describing particular embodiments and is not intended to be limiting. As used herein, unless the context clearly indicates otherwise, the singular forms “a,” “an,” and “the” are also intended to include the plural forms. Furthermore, when used in this specification, the terms “comprising,” “including,” “containing,” and / or “having” indicate the presence of the stated features, integrals, steps, operations, elements, components, and / or groups thereof, but do not preclude the presence or addition of one or more other features, integrals, steps, operations, elements, components, and / or groups thereof. It will also be noted that, as used herein, the terms “substantially,” “about,” and other similar terms are used as approximations rather than terms of degree, and therefore, to explain the inherent biases in measurements, calculated values, and / or provided values ​​that would be recognized by those skilled in the art.

[0058] Various embodiments are described herein with reference to cross-sectional and / or exploded views, which are schematic diagrams of embodiments and / or intermediate structures. Thus, variations in the shapes of the figures will be expected, for example, due to manufacturing techniques and / or tolerances. Therefore, the embodiments disclosed herein should not be necessarily interpreted as limited to the shapes of the specifically shown areas, but will include, for example, deviations in shape due to manufacturing processes. In this way, the areas shown in the figures may be schematic in nature, and the shapes of these areas may not reflect the actual shapes of the areas of the device, and are therefore not necessarily intended to be limiting.

[0059] As is customary in the art, some embodiments are described and illustrated in the accompanying drawings according to functional blocks, units, and / or modules. Those skilled in the art will understand that these blocks, units, and / or modules are physically implemented by electronic (or optical) circuitry such as logic circuits, discrete components, microprocessors, hardwired circuits, storage elements, and wiring connections, which can be formed using semiconductor-based manufacturing techniques or other manufacturing techniques. Where blocks, units, and / or modules are implemented by microprocessors or other similar hardware, they can be programmed and controlled using software (e.g., microcode) to perform the various functions discussed herein, and can optionally be driven by firmware and / or software. It is also contemplated that each block, unit, and / or module can be implemented by dedicated hardware, or as a combination of dedicated hardware and processors performing some functions (e.g., one or more programmed microprocessors and associated circuitry). Furthermore, without departing from the scope of the inventive concept, each block, unit, and / or module of some exemplary embodiments may be physically separated into two or more interacting and discrete blocks, units, and / or modules. Furthermore, without departing from the scope of the inventive concept, some exemplary blocks, units and / or modules may be physically combined into more complex blocks, units and / or modules.

[0060] Unless otherwise defined, all terms used herein (including technical and scientific terms) have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure pertains. Unless expressly defined herein, terms such as those defined in a general dictionary shall be interpreted as having a meaning consistent with their meaning in the context of the relevant field and shall not be interpreted in an idealized or overly formalized sense.

[0061] Figure 1 This is a plan view showing the display device 1 according to an embodiment. Figure 2 This is a side view showing the display device 1 according to an embodiment.

[0062] refer to Figures 1 to 2 The display device 1 is a device for displaying images, such as still images or moving images. The display device 1 can be used in portable electronic devices such as mobile phones, smartphones, tablet PCs, smartwatches, watch phones, mobile communication terminals, e-notebooks, e-readers, portable multimedia players (PMPs), navigation devices, and ultra-mobile PCs (UMPCs), and can also be used as a display screen for various products such as televisions, laptop computers, monitors, billboards, and devices for the Internet of Things (IoT).

[0063] The display device 1 may include a display panel 10. The display panel 10 may be a flexible substrate comprising a flexible polymer material such as polyimide. Therefore, the display panel 10 may be flexible, bendable, foldable, and / or rollable.

[0064] Display panel 10 may include a display area DA in which an image is displayed and a non-display area NDA in which no image is displayed and which does not include the display area DA. The display area DA may include pixels PX.

[0065] The display panel 10 may include a main region MR and a curved region BR connected to one side of the main region MR. The display panel 10 may include a sub-region SR connected to the curved region BR and overlapping the main region MR in its thickness direction.

[0066] The main region MR may include the display region DA. The outer edge portion surrounding the display region DA of the main region MR may be the non-display region NDA.

[0067] The main region MR may have a planar shape, which may be the external shape of the display device 1. The main region MR may be a flat area located on a surface. However, this disclosure is not limited thereto. For example, in the main region MR, at least one of the remaining edges, except for the edge (edge) connected to the curved region BR, may be curved to form a curved surface, or may be curved in the vertical direction.

[0068] In the main region MR, when at least one of the remaining edges (excluding the edge connected to the curved region BR) forms a curved surface or is curved, the display region DA can be located in the corresponding region or extend to the corresponding region. However, this disclosure is not limited thereto; for example, the non-display region NDA, which does not display an image, can be located at the curved edge or the curved edge, or the display region DA and the non-display region NDA can be located together at the curved edge or the curved edge.

[0069] The non-display area NDA of the main area MR can be set in the area from the outer boundary of the display area DA to the edge of the display panel 10. Signal wiring DL, connection wiring DM (reference) Figure 7 Alternatively, a driving circuit for applying signals to the display area DA can be provided in the non-display area NDA of the main area MR. Additionally, the outermost black matrix can be provided in the non-display area NDA of the main area MR, but this disclosure is not limited thereto.

[0070] The curved region BR is connected to the main region MR. For example, the curved region BR may be connected to a short side of the main region MR. In the curved region BR, the display panel 10 may bend downwards with a curvature in a direction opposite to the third direction DR3 (i.e., in a direction opposite to the display surface). When the display panel 10 is bent in the curved region BR, the surface of the display panel 10 may be reversed. That is, an upward-facing surface of the display panel 10 may be changed to face outwards through the curved region BR and then downwards.

[0071] Sub-region SR extends from the curved region BR. Sub-region SR can extend from the side of the display panel 10 where it is curved (or fully curved) in a direction substantially parallel to the main region MR. Sub-region SR can overlap with the main region MR in the third direction DR3 (i.e., in the thickness direction of the display panel 10). Sub-region SR can overlap with the non-display area NDA at the edge of the main region MR, and can further overlap with the display area DA of the main region MR.

[0072] The driver chip 20 can be disposed in a sub-region SR of the display panel 10 (or a portion of the display panel 10 on which the driver chip 20 is disposed and electrically connected to the pads of the driver chip 20). The driver chip 20 can generate drive signals required to drive the pixel PX and provide the drive signals to the pixel PX defined in the display area DA. For example, the driver chip 20 can generate a data signal for determining the brightness of the pixel PX. The driver chip 20 can be connected via wiring DM and signal wiring DL (see reference). Figure 7 The data signal is supplied to the pixel PX.

[0073] The driver chip 20 can be attached to the display panel 10 via an anisotropic conductive film or via ultrasonic welding. The width of the driver chip 20 in the second direction DR2 can be smaller than the width of the display panel 10 in the second direction DR2.

[0074] The driving substrate 30 can be connected to the end of a sub-region SR of the display panel 10. A pad portion can be provided at the end of the sub-region SR, and the driving substrate 30 can be connected to the pad portion. The driving substrate 30 can be a flexible printed circuit board or a film.

[0075] Figure 3 It is along Figure 1 A schematic cross-sectional view taken from line III-III'.

[0076] refer to Figure 3 The display device 1 may include a substrate 101, a thin film transistor layer (TFTL), a light-emitting element layer (EML), a thin film encapsulation layer (TFEL), and a touch sensing layer (TSL).

[0077] The substrate 101 may be a flexible substrate that is bendable, foldable, and / or rollable. For example, the flexible substrate may include polyethersulfone (PES), polyacrylate (PA), polyarylate (PAR), polyetherimide (PEI), polyethylene naphthalate (PEN), polyethylene terephthalate (PET), polyphenylene sulfide (PPS), polyallylate, polyimide (PI), polycarbonate (PC), cellulose triacetate (CAT), cellulose acetate propionate (CAP), or combinations thereof.

[0078] A thin-film transistor layer (TFTL) can be disposed on the substrate 101. The thin-film transistors, scan lines, data lines, power lines, scan control lines, and connection lines linking the pads and data lines for each pixel PX can be formed in the TFTL. Each thin-film transistor may include a gate electrode, a semiconductor layer, a source electrode, and a drain electrode.

[0079] The thin-film transistor layer (TFTL) can be disposed in the display area (DA) and the non-display area (NDA). Specifically, the thin-film transistors, scan lines, data lines, and power lines of each pixel PX of the TFTL can be disposed in the display area (DA). The scan control lines and link lines of the TFTL can be disposed in the non-display area (NDA).

[0080] A light-emitting element layer (EML) can be disposed on a thin-film transistor layer (TFTL). The EML may include: pixels (PX), each PX including a first electrode, a light-emitting layer, and a second electrode; and a pixel defining film defining each PX. The light-emitting layer may be an organic light-emitting layer comprising organic materials. The light-emitting layer may include a hole transport layer, an organic light-emitting layer, and an electron transport layer. When a predetermined or selected voltage is applied to the first electrode through the thin-film transistors of the TFTL and a cathode voltage is applied to the second electrode, holes and electrons may move to the organic light-emitting layer through the hole transport layer and the electron transport layer, and may combine with each other in the organic light-emitting layer to emit light. The pixels of the EML may be disposed in the display area (DA). Reference will be made later. Figure 12 Describe the schematic cross-sectional structure of each pixel PX.

[0081] A thin-film encapsulation layer (TFEL) can be disposed on the light-emitting element layer (EML). The TFEL serves to prevent oxygen or moisture from penetrating into the EML. For this purpose, the TFEL may include at least one inorganic film. The inorganic film may include a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer, but this disclosure is not limited thereto. Additionally, the TFEL protects the EML from foreign matter such as dust. For this purpose, the TFEL may include at least one organic film. The organic film may be made of acrylic resin, epoxy resin, phenolic resin, polyamide resin, or polyimide resin, etc., but this disclosure is not limited thereto.

[0082] The thin-film encapsulation layer TFEL can be disposed in both the display area DA and the non-display area NDA. Specifically, the thin-film encapsulation layer TFEL can be configured to cover the light-emitting element layer EML in both the display area DA and the non-display area NDA and the thin-film transistor layer TFTL in the non-display area NDA.

[0083] The touch sensing layer TSL can be disposed on the thin film encapsulation layer TFEL. Because the touch sensing layer TSL is disposed directly on the thin film encapsulation layer TFEL, the thickness of the display device 1 can be reduced compared to the case where a separate touch panel including the touch sensing layer TSL is attached to the thin film encapsulation layer TFEL.

[0084] The touch sensing layer (TSL) may include touch electrodes for sensing user touches using a capacitive method, and routing lines connecting pads and touch electrodes. For example, the touch sensing layer (TSL) may use a self-capacitance method or a mutual capacitance method to sense user touches.

[0085] A cover window can be separately mounted on the touch sensing layer (TSL), and the touch sensing layer (TSL) and the cover window can be attached to each other using a transparent adhesive component. Furthermore, the arrangement of the touch sensing layer (TSL) is not limited to... Figure 3 The arrangement shown is not specifically limited in terms of the position of the touch sensing layer TSL, as long as the touch sensing layer TSL is placed between the light-emitting element layer EML and the cover window.

[0086] The touch sensing layer (TSL) will be described in more detail below.

[0087] Figure 4 It is shown Figure 3 A plan view of the touch sensing layer TSL. Figure 5 It is shown Figure 4 A magnified view of region A. Figure 6 It is along Figure 5 A schematic cross-sectional view taken from line VI-VI'.

[0088] refer to Figures 4 to 6 The touch sensing layer (TSL) includes a touch sensing area (TSA) for sensing user touches and a touch periphery area (TPA) disposed around the touch sensing area (TSA).

[0089] Touch electrode pads TP1 and TP2, as well as routing lines TL1, TL2, and RL, can be set in the touch periphery area TPA.

[0090] Touch electrode pads TP1 and TP2 can be disposed on one side of the display device 1. The touch circuit board can be attached to the touch electrode pads TP1 and TP2 using, for example, an anisotropic conductive film. As a result, the touch electrode pads TP1 and TP2 can be electrically connected to the touch circuit board.

[0091] Routing lines TL1, TL2, and RL can include the first routing line TL1, the second routing line TL2, and the third routing line RL.

[0092] The first routing line TL1 can be connected to one side of the first touch electrode TE. In an embodiment, one end of the first routing line TL1 can be connected to the first touch electrode TE disposed in a first portion of the touch sensing area TSA. In the four portions of the touch sensing area TSA, the first portion of the touch sensing area TSA can be the portion closer to the touch pad area where touch electrode pads TP1 and TP2 are disposed. The other end of the first routing line TL1 can be connected to some of the first touch electrode pads TP1 in the touch pad area. The first routing line TL1 can be used to connect one side of the first touch electrode TE and the first touch electrode pads TP1.

[0093] The second routing line TL2 can be connected to the other side of the first touch electrode TE. In an embodiment, one end of the second routing line TL2 can be connected to the first touch electrode TE located at the second portion of the touch sensing region TSA. The second portion of the touch sensing region TSA can be the portion opposite to the first portion of the touch sensing region TSA. Among the four portions of the touch sensing region TSA, the second portion of the touch sensing region TSA can be the portion located further away from the touch pad area where touch electrode pads TP1 and TP2 are located. The second routing line TL2 can be connected to the first touch electrode TE located at the second portion via the first and fourth portions of the touch sensing region TSA. The other end of the second routing line TL2 can be connected to other first touch electrode pads TP1 in the first touch electrode pad area of ​​the touch pad area. The second routing line TL2 can be used to connect the other side of the first touch electrode TE and the first touch electrode pads TP1.

[0094] The third routing line RL can be connected to one side of the second touch electrode RE. One end of the third routing line RL can be connected to the second touch electrode RE located at the third portion of the touch sensing area TSA. The third portion of the touch sensing area TSA can be the portion opposite to the fourth portion, and can be the portion located on the second direction DR2 between the first portion and the second portion. The other end of the third routing line RL can be connected to the second touch electrode pad TP2 in the touch pad area. The third routing line RL can be used to connect the second touch electrode RE and the second touch electrode pad TP2.

[0095] Although not shown in the attached diagram, the grounding wire may be further positioned outside the routing lines TL1, TL2, and RL.

[0096] The ground wire can be located on the outermost side of the touch sensing layer (TSL). A ground voltage can be applied to the ground wire. Therefore, when static electricity is applied from the outside, the static electricity can be discharged to the ground wire. One end of the ground wire can be electrically connected to the touch electrode pads TP1 and TP2.

[0097] A guard line can be further positioned between the routing line and the ground line. The guard line can be used to minimize coupling between routing lines or between a routing line and the ground line. The routing line can be electrically connected to the touch electrode pads TP1 and TP2.

[0098] The touch sensing area TSA can overlap with the display area DA. A touch electrode TSP can be disposed within the touch sensing area TSA. The touch electrode TSP can be configured to overlap with a pixel defining film 160 defining each pixel PX. Each pixel PX can include sub-pixels R, G1, G2, and B. This structure and configuration of the touch electrode TSP prevents a reduction in the opening area of ​​the sub-pixels R, G1, G2, and B.

[0099] Subpixels R, G1, G2, and B may include a first subpixel R that emits light of a first color, second subpixels G1 and G2 that emit light of a second color, and a third subpixel B that emits light of a third color. Second subpixels G1 and G2 may include a second A subpixel G1 and a second B subpixel G2. A first subpixel R, two second subpixels G1 and G2 (i.e., a second A subpixel G1 and a second B subpixel G2), and a third subpixel B may be defined as (or constitute) a pixel PX.

[0100] For example, such as Figure 5As shown, the first sub-pixel R and the third sub-pixel B can be alternately set in the first column in the first direction DR1, and the second A sub-pixel G1 and the second B sub-pixel G2 can be alternately set in the second column in the first direction DR1.

[0101] Subpixels R, G1, G2, and B can have different shapes and sizes. Figure 5 This shows that the third sub-pixel B has the largest size and the second sub-pixels G1 and G2 have the smallest sizes, but the sizes of sub-pixels R, G1, G2, and B are not limited to these. See below for reference. Figure 12 Describe in detail the schematic cross-sectional structure of each sub-pixel R, G1, G2, and B.

[0102] The touch electrode TSP may include a first touch electrode TE, a second touch electrode RE, and a connection electrode BE.

[0103] The first touch electrode TE and the second touch electrode RE can be spaced apart from each other. The first touch electrode TE can be disposed in a column on a first direction DR1, and the second touch electrode RE can be disposed in a row on a second direction DR2. The first touch electrodes TE disposed in each column on the first direction DR1 can be electrically connected. The second touch electrodes RE disposed in each row on the second direction DR2 can be electrically connected.

[0104] In the plan view, the first touch electrode TE and the second touch electrode RE can have a rhombus or triangular shape. In an embodiment, the first touch electrode TE and the second touch electrode RE disposed at the edge of the touch sensing area TSA can have a triangular shape in the plan view, and the other first touch electrodes TE and the second touch electrode RE can have a rhombus shape in the plan view.

[0105] like Figure 5 As shown, the first touch electrode TE and the second touch electrode RE can be formed as a mesh-like electrode. When a touch sensing layer TSL including the first touch electrode TE and the second touch electrode RE is formed on the thin-film encapsulation layer TFEL (or directly on the thin-film encapsulation layer TFEL), the distance between the second electrode of the light-emitting element layer EML and the first touch electrode TE or the second touch electrode RE of the touch sensing layer TSL can be small. Therefore, a high parasitic capacitance can be formed between the second electrode of the light-emitting element layer EML and the first touch electrode TE or the second touch electrode RE of the touch sensing layer TSL. To reduce the parasitic capacitance, the first touch electrode TE and the second touch electrode RE can be formed as follows: Figure 5 The mesh-like electrodes shown are not unpatterned electrodes made of conductive layers of transparent oxides such as indium tin oxide (ITO) or indium zinc oxide (IZO).

[0106] The first touch electrode TE and the second touch electrode RE can be configured to be spaced apart from each other, and the first touch electrodes TE that are adjacent to each other in the first direction DR1 can be electrically connected to each other through the connecting electrode BE. The first touch electrodes TE and the second touch electrodes RE can be configured to be coplanar, and the connecting electrode BE can be configured not to be coplanar with the first touch electrodes TE and the second touch electrodes RE. For example, as... Figure 6 As shown, the first touch electrode TE and the second touch electrode RE can be formed by the second touch conductive layer 152, and the connection electrode BE can be formed by the first touch conductive layer 151. The second touch insulating layer TIL2 can be disposed between the first touch conductive layer 151 and the second touch conductive layer 152. The first touch electrode TE can be electrically connected to the connection electrode BE through a first contact hole CNT1 that passes through the second touch insulating layer TIL2 and exposes the end of the connection electrode BE.

[0107] In an embodiment, the touch electrode TSP, which can serve as a first touch electrode TE, a second touch electrode RE, or a connecting electrode BE, can be configured to overlap with the gap G between the protruding patterns PP1 and PP2, which will be described below. The touch electrode TSP can block the gap G formed in the display area DA, thereby preventing phenomena such as reflection of external light and / or visibility of spots due to the gap G. This will be described in detail below.

[0108] The following sections will describe in detail the signal cabling DL, connection cabling DM, and fan-out cabling F used to transmit drive signals.

[0109] Figure 7 This is a plan view showing the signal wiring DL, connection wiring DM and fan-out wiring F of the display device 1 according to an embodiment. Figure 8 It is shown Figure 7 A magnified view of region B. Figure 9 It is along Figure 8 A schematic cross-sectional view of the line IX-IX'. Figure 10 It is shown Figure 7 A magnified view of region C. Figure 11 This illustrates the application of the touch sensing layer TSL. Figure 7 A magnified view of region C. Figure 12 It is along Figure 11 A schematic cross-sectional view taken from line XII-XII'. Figure 13 It is shown Figure 7 A magnified view of region D. Figure 14 It is along Figure 13 A schematic cross-sectional view taken from line XIV-XIV'. Figure 15 It is along Figure 13 A schematic cross-sectional view of the line XV-XV'.

[0110] refer to Figures 7 to 15 The display device 1 may include signal wiring DL, connection wiring DM and fan-out wiring F.

[0111] The signal wiring DL, connection wiring DM, and fan-out wiring F can be formed to extend in a first direction DR1 or a second direction DR2, and are configured to be substantially symmetrical with respect to a reference axis (not shown) passing through the central region of the display device 1. The signal wiring DL, connection wiring DM, and fan-out wiring F located on the left side of the display device 1 will be described below.

[0112] The signal routing DL can extend from the non-display area NDA of the main area MR, and can also be set in the display area DA. The signal routing DL can extend along the first direction DR1, and can be set at intervals (or sequentially) along the second direction DR2. The second direction DR2 can be a direction that intersects with the first direction DR1, and can be perpendicular to the first direction DR1.

[0113] Signal lines DL (or their ends) may be electrically connected to connection lines DM. Signal lines DL electrically connected to connection lines DM may be located in the lower part of the main area MR within the non-display area NDA. Signal lines DL may be, for example, data lines used to transmit data signals to pixels PX.

[0114] The connection cable DM can extend from the non-display area NDA of the main region MR through the display area DA to the non-display area NDA of the sub-region SR. The connection cable DM can be electrically connected to the signal cable DL in the non-display area NDA of the main region MR.

[0115] Connecting wiring (DM) can be configured not to be coplanar with layers containing signal wiring (DL). Connecting wiring (DM) can be insulated from signal wiring (DL) through an insulating layer. For example, ... Figure 8 and Figure 9 As shown, the signal wiring DL can be implemented using a third conductive layer 130, and the connection wiring DM can be implemented using a fourth conductive layer 140. The signal wiring DL and the connection wiring DM can be insulated from each other by a fourth insulating layer IL4. The third conductive layer 130 can include the signal wiring DL, and the fourth conductive layer can include the connection wiring DM. The connection wiring DM can be electrically connected to the signal wiring DL through contact holes that pass through the fourth insulating layer IL4 and expose the ends of the signal wiring DL.

[0116] Each connection trace DM may include a first portion DM1 extending from the non-display area NDA in a first direction DR1, a second portion DM2 extending from one end of the first portion DM1 in a second direction DR2, and a third portion DM3 extending from one end of the second portion DM2 in a direction opposite to the first direction DR1. The first portion DM1 of each connection trace DM may be electrically connected to a corresponding signal trace DL in the signal trace DL, and the third portion DM3 of each connection trace DM may be electrically connected to a corresponding fan-out trace F in the fan-out trace F. Therefore, each connection trace DM can receive a drive signal from the driver chip 20 through the third portion DM3, and can provide a drive signal to the pixel PX through the first portion DM1. The first portion DM1 and the third portion DM3 may be spaced apart from each other, and the second portion DM2 may be disposed between the first portion DM1 and the third portion DM3.

[0117] As described above, the display device 1 may include a connection cable DM disposed via the display area DA, and an image signal may be provided to the signal cable DL via the connection cable DM. Therefore, additional wasted space may not be required, whereas it would otherwise be necessary to directly connect the signal cable DL to the fan-out cable F. As a result, wasted space can be reduced or minimized.

[0118] The connecting cabling DM may be partially bent and includes a diagonal portion DMB extending in a diagonal direction. The diagonal portion DMB may be a portion in which the connecting cabling DM is bent in a first diagonal direction DR4 or a second diagonal direction DR5. Here, the first diagonal direction DR4 may refer to the diagonal direction between the first direction DR1 and the second direction DR2, and the second diagonal direction DR5 may refer to the diagonal direction between the first direction DR1 and a direction opposite to the second direction DR2.

[0119] like Figure 10 As shown, the diagonal portion DMB may have a shape in which one end of the connecting wiring DM extending in the first direction DR1 is bent along the first diagonal direction DR4 and / or the second diagonal direction DR5.

[0120] The diagonal portion of the DMB can have a shape that protrudes from one side of the connecting wiring DM. For example, as Figure 10 As shown, the diagonal portion DMB can protrude from one side of the connecting wiring DM in a direction opposite to the first diagonal direction DR4. The diagonal portion DMB can also protrude from one side of the connecting wiring DM in a second diagonal direction DR5.

[0121] The connection cabling DM may include protruding patterns PP1 and PP2 projecting from one side of each connection cabling DM. Protruding patterns PP1 and PP2 may each include a first protruding pattern PP1 projecting from a diagonal portion DMB of the respective connection cabling DM and a second protruding pattern PP2 projecting from an extension of the respective connection cabling DM. The extension may include any portion of the connection cabling DM other than the diagonal portion DMB. For example, the extension of the connection cabling DM may be any portion of the connection cabling DM other than the diagonal portion DMB.

[0122] Each of the first protruding patterns PP1 may have a shape that protrudes from one side of the diagonal portion DMB. The first protruding pattern PP1 may protrude in a first direction DR1, in a direction opposite to the first direction DR1, in a second direction DR2, and / or in a direction opposite to the second direction DR2.

[0123] Adjacent protruding patterns in the first protruding pattern PP1 may face each other. The first protruding pattern PP1 may include a portion (or end) that may overlap with the touch electrode TSP. Adjacent portions of the first protruding pattern PP1 may face each other.

[0124] A gap G may be defined between portions of the first protruding pattern PP1. For example, the gap G may be between adjacent portions of the first protruding pattern PP1 that face each other. The gap G between portions of the first protruding pattern PP1 may overlap with the touch electrode TSP. The gap G may overlap with the first touch electrode TE, the second touch electrode RE, or the connection electrode BE.

[0125] The width of the gap G between the portions (or ends) of the first protruding pattern PP1 can be smaller than the line width of the touch electrode TSP. Additionally, the width of the gap G can be smaller than the line width of the connecting wiring DM. The width of the gap G can be the distance between the facing portions (or ends) of the first protruding patterns PP1.

[0126] The width of the gap G can range from about 2.0 μm to about 3.0 μm. The linewidth of the touch electrode TSP can range from about 3.2 μm to about 4.8 μm. However, this disclosure is not limited thereto. In other embodiments, for example, the linewidth of the touch electrode TSP can range from about 4.8 μm to about 7.2 μm. The area in which the touch electrode TSP overlaps with the gap G can be increased, and therefore, phenomena such as reflection of external light and / or visibility of spots due to the gap G can be prevented more effectively. The linewidth of the connecting wiring DM can range from about 2.4 μm to about 3.6 μm. However, the width of the gap G and the linewidth of the wiring are not limited thereto. For example, the linewidth of the wiring can be in any range as long as the gap G overlaps with the touch electrode TSP.

[0127] Because the gap G between the first protruding patterns PP1 overlaps with the touch electrode TSP, the gap G formed in the display area DA can be blocked by the touch electrode TSP, thereby preventing phenomena such as reflection of external light and / or visibility of spots due to the gap G. The second protruding pattern PP2 may have a shape that protrudes from an extension of the connecting wiring DM other than the diagonal portion DMB. The second protruding pattern PP2 may protrude in the first direction DR1, in a direction opposite to the first direction DR1, in the second direction DR2, and / or in a direction opposite to the second direction DR2.

[0128] Adjacent protruding patterns PP2 in the second protruding pattern PP2 may face each other. The second protruding pattern PP2 may include a portion (or end) that may overlap with the touch electrode TSP. Adjacent portions of the second protruding pattern PP2 may face each other.

[0129] A gap G can be defined between the facing portions of the second protruding pattern PP2. The gap G between the portions of the second protruding pattern PP2 can overlap with the touch electrode TSP. The gap G can overlap with the first touch electrode TE, the second touch electrode RE, or the connection electrode BE.

[0130] The width of the gap G between the portions (or ends) of the second protruding pattern PP2 can be smaller than the line width of the touch electrode TSP. Additionally, the width of the gap G can be smaller than the line width of the connecting wiring DM. The width of the gap G can also be the distance between the facing portions (or ends) of the second protruding patterns PP2.

[0131] The width of the gap G can range from about 2.0 μm to about 3.0 μm. The linewidth of the touch electrode TSP can range from about 3.2 μm to about 4.8 μm. However, this disclosure is not limited thereto. In other embodiments, for example, the linewidth of the touch electrode TSP can range from about 4.8 μm to about 7.2 μm. The area in which the touch electrode TSP overlaps with the gap G can be increased, and phenomena such as reflection of external light and / or visibility of spots due to the gap G can be prevented more effectively. The linewidth of the connecting wiring DM can range from about 2.4 μm to about 3.6 μm. However, the width of the gap G and the linewidth of the wiring are not limited thereto. For example, the linewidth of the wiring can be in any range as long as the gap G between the second protruding patterns PP2 overlaps with the touch electrode TSP.

[0132] Since the gap G between the second protruding patterns PP2 overlaps with the touch electrode TSP, the gap G formed in the display area DA can be blocked by the touch electrode TSP, thereby preventing phenomena such as reflection of external light and / or visibility of spots due to the gap G.

[0133] At least one portion (or end) of the first protruding pattern PP1 and at least one portion (or end) of the second protruding pattern PP2 in the second protruding pattern PP2 may be adjacent to each other and face each other, and may overlap with the touch electrode TSP.

[0134] A gap G may be defined between a portion of at least one of the first protruding patterns PP1 facing each other and a portion of at least one of the second protruding patterns PP2. The gap G may overlap with each touch electrode TSP. The gap G between a portion of the first protruding pattern PP1 and a portion of the second protruding pattern PP2 may overlap with a first touch electrode TE, a second touch electrode RE, or a connecting electrode BE. The gap G formed in the display area DA may be blocked by the touch electrodes TSP, thereby preventing phenomena such as reflection of external light and / or visibility of spots due to the gap G.

[0135] The first protruding pattern PP1 and the second protruding pattern PP2 can be alternately arranged on the second direction DR2. The first protruding pattern PP1 can be arranged between the second protruding patterns PP2.

[0136] The first protruding pattern PP1 and / or the second protruding pattern PP2 can be arranged at a distance on the first direction DR1. For example, the distance between the first protruding patterns PP1 or the distance between the second protruding patterns PP2 arranged on the first direction DR1 can be substantially the same as the distance between the connecting wires DM arranged on the first direction DR1.

[0137] The first protruding pattern PP1 and / or the second protruding pattern PP2 can be arranged at a distance on the second direction DR2. For example, the distance between the first protruding patterns PP1 or the distance between the second protruding patterns PP2 arranged on the second direction DR2 can be substantially the same as the distance between the connecting wires DM arranged on the second direction DR2.

[0138] Each of the first protruding patterns PP1 can be set on one side of each of the second sub-pixels G1 and G2, and each of the second protruding patterns PP2 can be set on the other side of each of the second sub-pixels G1 and G2.

[0139] When the protruding patterns PP1 and PP2 extend in the first direction DR1, the length of the first protruding pattern PP1 in the first direction DR1 may be different from the length of the second protruding pattern PP2 in the first direction DR1.

[0140] When the protruding patterns PP1 and PP2 extend in the second direction DR2, the length of the first protruding pattern PP1 in the second direction DR2 may be different from the length of the second protruding pattern PP2 in the second direction DR2.

[0141] Figure 12 An embodiment is shown in which the gap G between the protruding patterns PP1 and PP2 overlaps with the first touch electrode TE, but the embodiment is not limited thereto. In other embodiments, the gap G between the protruding patterns PP1 and PP2 may overlap with the first touch electrode TE or the connection electrode BE.

[0142] The fan-out wiring F can extend from the driver chip 20 of the sub-region SR to the non-display area NDA of the main region MR.

[0143] Fan-out cabling F can be electrically connected to signal cabling DL or connection cabling DM. Some fan-out cabling F can be directly connected to some signal cabling DL, and the remaining fan-out cabling F can be directly connected to connection cabling DM and can be connected to signal cabling DL using connection cabling DM.

[0144] The fan-out wiring F can include a first fan-out wiring F1 and a second fan-out wiring F2. Figure 7 An embodiment is shown in which the first fan-out cabling F1 is directly connected to the signal cabling DL and the second fan-out cabling F2 is directly connected to the connection cabling DM; however, the embodiment is not limited thereto. In other embodiments, the first fan-out cabling F1 may be directly connected to the connection cabling DM, and the second fan-out cabling F2 may be directly connected to the signal cabling DL.

[0145] like Figure 13 As shown, each fan-out wiring F may include a main fan-out wiring 111 or 121, a bent fan-out wiring 141, and a sub-fan-out wiring 112 or 122.

[0146] The main fan-out wirings 111 and 121 and the sub-fan-out wirings 112 and 122 can be spaced apart from each other, and the bent fan-out wiring 141 can be used to connect the main fan-out wirings 111 and 121 with the sub-fan-out wirings 112 and 122.

[0147] The main fan-out wirings 111 and 121 can be located in the non-display area NDA of the main region MR. One end of the main fan-out wiring 111 or 121 can be connected to the corresponding one of the connection wiring DM or signal wiring DL. The other end of the main fan-out wiring 111 or 121 can be connected to the curved fan-out wiring 141.

[0148] The main fan-out wirings 111 and 121 can be connected (or directly connected) to the connection wiring DM or signal wiring DL on one side of the non-display area NDA of the main area MR.

[0149] The main fan-out wirings 111 and 121 can be configured not to be coplanar with the layers in which the connecting wirings DM or signal wirings DL are disposed. The main fan-out wirings 111 and 121 can be insulated from the connecting wirings DM or signal wirings DL through an insulating layer. Some of the main fan-out wirings 111 and 121 can be configured not to be coplanar and can be insulated from each other through an insulating layer.

[0150] For example, such as Figure 13 and Figure 14 As shown, the first main fan-out wiring 111 of the first fan-out wiring F1 can be connected (or directly connected) to the signal wiring DL. The first main fan-out wiring 111 can be implemented using a first conductive layer 110, and the signal wiring DL can be implemented using a third conductive layer 130. The first conductive layer 110 may include the first main fan-out wiring 111. The first main fan-out wiring 111 can be insulated from the signal wiring DL through a second insulating layer IL2 and a third insulating layer IL3. The signal wiring DL can be connected (or directly connected) to the first main fan-out wiring 111 through contact holes that pass through the second insulating layer IL2 and the third insulating layer IL3 and expose the end of the first main fan-out wiring 111.

[0151] like Figure 13 and Figure 15 As shown, the second main fan-out wiring 121 in the second fan-out wiring F2 can be connected (or directly connected) to the connecting wiring DM. The second main fan-out wiring 121 can be configured not to be coplanar with the layer in which the first main fan-out wiring 111 is disposed. The second main fan-out wiring 121 can be implemented using the second conductive layer 120, and the connecting wiring DM can be implemented using the fourth conductive layer 140. The second conductive layer 120 may include the second main fan-out wiring 121. The second main fan-out wiring 121 and the connecting wiring DM can be insulated from each other by the third insulating layer IL3 and the fourth insulating layer IL4. The connecting wiring DM can be connected (or directly connected) to the second main fan-out wiring 121 through contact holes that pass through the third insulating layer IL3 and the fourth insulating layer IL4 and expose the end of the second main fan-out wiring 121.

[0152] Sub-fanout wiring 112 and 122 can be set in sub-region SR.

[0153] Sub-fanout wirings 112 and 122 may extend in the first direction DR1 and may be arranged at an interval (or sequentially) in the second direction DR2. Sub-fanout wirings 112 and 122 may be spaced apart from each other. Sub-fanout wirings 112 and 122 may not overlap each other in the thickness direction.

[0154] Sub-fanout wirings 112 and 122 may be spaced apart from main fanout wirings 111 and 121. Sub-fanout wirings 112 and 122 may be electrically connected to main fanout wirings 111 and 121 via bent fanout wiring 141. One end of sub-fanout wirings 112 and 122 may be connected to the output terminal of driver chip 20, and the other end of sub-fanout wirings 112 and 122 may be connected to bent connection wiring 410. Sub-fanout wirings 112 and 122 may be configured to be coplanar with the layer in which main fanout wirings 111 and 121 are disposed.

[0155] For example, such as Figure 13 and Figure 14 As shown, one end of the first sub-fan-out wiring 112 of the first fan-out wiring F1 can be connected to a corresponding curved fan-out wiring 141. The first sub-fan-out wiring 112 can be electrically connected to the first main fan-out wiring 111 via the curved fan-out wiring 141. The first sub-fan-out wiring 112 can be configured to be coplanar with the first main fan-out wiring 111. The first sub-fan-out wiring 112 can be implemented using a first conductive layer 110. The first conductive layer 110 may include the first sub-fan-out wiring 112.

[0156] like Figure 13 and Figure 15 As shown, one end of the second sub-fan-out wiring 122 of the second fan-out wiring F2 can be connected to a corresponding curved fan-out wiring 141. The second sub-fan-out wiring 122 can be electrically connected to the second main fan-out wiring 121 via the curved fan-out wiring 141. The second sub-fan-out wiring 122 can be configured to be coplanar with the second main fan-out wiring 121. The second sub-fan-out wiring 122 can be implemented using a second conductive layer 120. The second conductive layer 120 may include the second sub-fan-out wiring 122.

[0157] The curved fan-out wiring 141 can be set in the curved region BR. The curved fan-out wiring 141 can extend in the first direction DR1 and can be set at intervals (or sequentially) in the second direction DR2.

[0158] One end of the bent fan-out wiring 141 can extend to the non-display area NDA of the main region MR and can be connected to the main fan-out wirings 111 and 121. The other end of the bent fan-out wiring 141 can extend to the sub-region SR and can be connected to the sub-fan-out wirings 112 and 122. The main fan-out wirings 111 and 121 and the sub-fan-out wirings 112 and 122 can be connected via the bent fan-out wiring 141.

[0159] The bent fan-out wiring 141 can be configured not to be coplanar with the layer in which the main fan-out wirings 111 and 121 and the sub-fan-out wirings 112 and 122 are disposed. The bent fan-out wiring 141 can be insulated from the main fan-out wirings 111 and 121 and the sub-fan-out wirings 112 and 122 by an insulating layer. The bent fan-out wiring 141 can be configured to be coplanar with the connecting wiring DM. The bent fan-out wiring 141 can be implemented using a fourth conductive layer 140. The fourth conductive layer 140 may include the bent fan-out wiring 141.

[0160] For example, such as Figure 13 and Figure 14 As shown, the bent fan-out wire 141 in the first fan-out wire F1 can connect the first main fan-out wire 111 and the first sub-fan-out wire 112. The bent fan-out wire 141 can be insulated from the first main fan-out wire 111 and the first sub-fan-out wire 112 through the second insulating layer IL2, the third insulating layer IL3, and the fourth insulating layer IL4. The end of the bent fan-out wire 141 can be connected to the first main fan-out wire 111 through contact holes that pass through the second insulating layer IL2, the third insulating layer IL3, and the fourth insulating layer IL4 and expose the end of the first main fan-out wire 111. The other end of the bent fan-out wire 141 can be connected to the first sub-fan-out wire 112 through contact holes that pass through the second insulating layer IL2, the third insulating layer IL3, and the fourth insulating layer IL4 and expose the end of the second sub-fan-out wire 122.

[0161] like Figure 13 and Figure 15 As shown, the bent fan-out wire 141 of the second fan-out wire F2 can connect to the second main fan-out wire 121 and the second sub-fan-out wire 122. The bent fan-out wire 141 can be insulated from the second main fan-out wire 121 and the second sub-fan-out wire 122 through the third insulating layer IL3 and the fourth insulating layer IL4. The end of the bent fan-out wire 141 can be connected to the second main fan-out wire 121 through contact holes that pass through the third insulating layer IL3 and the fourth insulating layer IL4 and expose the end of the second main fan-out wire 121. The other end of the bent fan-out wire 141 can be connected to the second sub-fan-out wire 122 through contact holes that pass through the third insulating layer IL3 and the fourth insulating layer IL4 and expose the end of the second sub-fan-out wire 122.

[0162] Signal cabling (DL), connection cabling (DM), and fan-out cabling (F) are not limited to Figures 7 to 15 The embodiments shown are illustrated, and the conductive layer constituting or including the wiring can be modified in various ways.

[0163] refer to Figure 12The display device 1 may include a substrate 101, a buffer layer BF, a semiconductor layer ACT, a first insulating layer IL1, a first conductive layer 110, a second insulating layer IL2, a second conductive layer 120, a third insulating layer IL3, a third conductive layer 130, a fourth insulating layer IL4, a fourth conductive layer 140, a fifth insulating layer IL5, a first electrode layer 171, a pixel defining film 160 including an opening exposing the first electrode layer 171, a light-emitting layer 172 disposed in the opening of the pixel defining film 160, a second electrode layer 173 disposed on the light-emitting layer 172 and the pixel defining film 160, and a passivation layer 170.

[0164] Each of the above layers can be formed as a single membrane, or it can be formed as a stacked membrane comprising multiple membranes. Other layers may also be disposed between the above layers.

[0165] The substrate 101 can support each layer disposed thereon. The substrate 101 can be made of an insulating material. The substrate 101 can be made of an inorganic material such as glass or quartz or an organic material such as polyimide. The substrate 101 can be a rigid substrate or a flexible substrate.

[0166] A buffer layer (BF) can be disposed on the substrate 101. The buffer layer (BF) can prevent the diffusion of impurity ions, prevent the penetration of moisture, and perform surface planarization. The buffer layer (BF) may include silicon nitride, silicon oxide, or silicon oxynitride, etc.

[0167] The semiconductor layer ACT can be disposed on the buffer layer BF. The semiconductor layer ACT forms the channel of the transistors in the pixel PX. The semiconductor layer ACT may include polycrystalline silicon. Polycrystalline silicon can be formed by crystallizing amorphous silicon.

[0168] When the semiconductor layer ACT is made of polycrystalline silicon and doped with ions, the ion-doped semiconductor layer ACT can be conductive. As a result, the semiconductor layer ACT can include not only the channel region of a transistor, but also the source and drain regions. The source and drain regions can be connected to opposite sides of each channel region.

[0169] In another embodiment, the semiconductor layer ACT may include monocrystalline silicon, low-temperature polycrystalline silicon, amorphous silicon, or oxide semiconductor. For example, the oxide semiconductor may include binary compound (AB) x ), ternary compounds (AB) x C y ) or quaternary compounds (AB) x C y D z The binary compound (AB) x ), ternary compounds (AB) x C y ) or quaternary compounds (AB)x C y D z Materials include indium, zinc, gallium, tin, titanium, aluminum, hafnium (Hf), zirconium (Zr), or magnesium (Mg). In embodiments, the semiconductor layer ACT may include ITZO (an oxide containing indium, tin, and titanium) or IGZO (an oxide containing indium, gallium, and tin).

[0170] The first insulating layer IL1 may be disposed on the semiconductor layer ACT. The first insulating layer IL1 may be disposed on the surface (or substantially the entire surface) of the substrate 101. The first insulating layer IL1 may be a gate insulating film with gate insulation function. The first insulating layer IL1 may include silicon compounds or metal oxides, etc. For example, the first insulating layer IL1 may include silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, tantalum oxide, hafnium oxide, zirconium oxide, or titanium oxide, etc. The first insulating layer IL1 may be a single film or a multilayer film comprising stacked films made of different materials.

[0171] The first conductive layer 110 may be disposed on the first insulating layer IL1. The first conductive layer 110 may include at least one metal selected from molybdenum (Mo), aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), calcium (Ca), titanium (Ti), tantalum (Ta), tungsten (W), and copper (Cu). The first conductive layer 110 may be a single film or a multilayer film. The first conductive layer 110 may include the first main fan-out wiring 111 and the first sub-fan-out wiring 112 of the first fan-out wiring F1 described above, the gate electrode of the transistor, and the first electrode of the storage capacitor.

[0172] The second insulating layer IL2 may be disposed on the first conductive layer 110. The second insulating layer IL2 may be disposed on the surface (or substantially the entire surface) of the substrate 101. The second insulating layer IL2 is used to insulate the first conductive layer 110 from the second conductive layer 120.

[0173] The second insulating layer IL2 may be an interlayer insulating film. The second insulating layer IL2 may include the same material as the first insulating layer IL1. The second insulating layer IL2 may include at least one material selected from the materials of the structural material described as the first insulating layer IL1.

[0174] The second conductive layer 120 may be disposed on the second insulating layer IL2. The second conductive layer 120 may include the second electrode of the storage capacitor. The second conductive layer 120 may be formed by overlapping the first conductive layer 110 with the second insulating layer IL2 therebetween to form the storage capacitor. The second conductive layer 120 may include at least one metal selected from molybdenum (Mo), aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), calcium (Ca), titanium (Ti), tantalum (Ta), tungsten (W), and copper (Cu). The second conductive layer 120 may include the same material as the first conductive layer 110. However, this disclosure is not limited thereto. The second conductive layer 120 may be a single film or a multilayer film. The second conductive layer 120 may include a second main fan-out wiring 121 and a second sub-fan-out wiring 122 of the second fan-out wiring F2.

[0175] The third insulating layer IL3 may cover the second conductive layer 120. The third insulating layer IL3 may insulate the second conductive layer 120 from the third conductive layer 130. The third insulating layer IL3 may include the same material as the first insulating layer IL1. The third insulating layer IL3 may include at least one material selected from the materials selected from the structural material described as the first insulating layer IL1.

[0176] The third conductive layer 130 can be disposed on the third insulating layer IL3. The third conductive layer 130 may include at least one metal selected from aluminum (Al), molybdenum (Mo), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), calcium (Ca), titanium (Ti), tantalum (Ta), tungsten (W), and copper (Cu). The third conductive layer 130 may be a single film or a multilayer film. For example, the third conductive layer 130 may have a stacked structure such as Ti / Al / Ti, Mo / Al / Mo, Mo / AlGe / Mo, or Ti / Cu. Figure 12 As shown, for example, the third conductive layer 130 may include signal wiring DL, a source electrode SE, and a drain electrode DE. The source electrode SE and the drain electrode DE can be connected to the source region and drain region of the semiconductor layer ACT, respectively, through contact holes passing through the third insulating layer IL3, the second insulating layer IL2, and the first insulating layer IL1.

[0177] The fourth insulating layer IL4 may cover the third conductive layer 130. The fourth insulating layer IL4 may be a through-hole layer. The fourth insulating layer IL4 may include organic insulating materials, such as polyacrylate resins, epoxy resins, phenolic resins, polyamide resins, polyimide resins, unsaturated polyester resins, polyphenylene ether resins, polyphenylene sulfide resins, or benzocyclobutene (BCB).

[0178] A fourth conductive layer 140 may be disposed on a fourth insulating layer IL4. The fourth conductive layer 140 may comprise the same material as the third conductive layer 130. The fourth conductive layer 140 may comprise at least one material selected from the materials described as the structural material of the third conductive layer 130. The fourth conductive layer 140 may comprise the aforementioned connection wiring DM and bent fan-out wiring 141.

[0179] A fifth insulating layer IL5 may be disposed on the fourth conductive layer 140. The fifth insulating layer IL5 may be a via layer. The fifth insulating layer IL5 may comprise the same material as the fourth insulating layer IL4. The fifth insulating layer IL5 may comprise at least one material selected from the materials chosen from the structural material described as the fourth insulating layer IL4.

[0180] The first electrode layer 171 may be disposed on the fifth insulating layer IL5. The first electrode layer 171 may have a stacked film structure formed by stacking a material layer with a high work function and a reflective material layer. The material layer with a high work function may be made of at least one selected from indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), and indium oxide (In2O3), or may include at least one selected from indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), and indium oxide (In2O3). The reflective material layer may be made of one selected from silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), lead (Pb), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), lithium (Li), calcium (Ca), and mixtures thereof, or may include one selected from silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), lead (Pb), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), lithium (Li), calcium (Ca), and mixtures thereof. A material layer with a high work function may be disposed on the reflective material layer and may be disposed close to the light-emitting layer 172. The first electrode layer 171 may have a multilayer structure of ITO / Mg, ITO / MgF, ITO / Ag, or ITO / Ag / ITO, but the embodiments are not limited thereto. The anode of the pixel may be formed by the first electrode layer 171. The anode may be connected to the drain electrode DE through a contact hole passing through the fourth insulating layer IL4.

[0181] Pixel defining film 160 may be disposed on first electrode layer 171. Pixel defining film 160 may comprise inorganic insulating materials such as silicon oxide, silicon nitride, silicon oxynitride, hafnium oxide, aluminum oxide, titanium oxide, tantalum oxide, or zinc oxide, or organic insulating materials such as polyacrylate resins, epoxy resins, phenolic resins, polyamide resins, polyimide resins, unsaturated polyester resins, polyphenylene ether resins, polyphenylene sulfide resins, or BCB. Pixel defining film 160 may be a single film or a multilayer film comprising stacked films made of different materials.

[0182] The pixel defining film 160 may include an opening that exposes the first electrode layer 171. This opening may define the light-emitting area of ​​each of the sub-pixels R, G1, G2, and B.

[0183] The light-emitting layer 172 can be disposed in the opening of the pixel-defining film 160. The light-emitting layer 172 may include an organic light-emitting layer, a hole injection / transport layer, and an electron injection / transport layer.

[0184] The second electrode layer 173 may be disposed on the light-emitting layer 172 and the pixel defining film 160. A cathode may be formed from the second electrode layer 173. The cathode may be disposed in the display area DA. In an embodiment, the cathode may be disposed in the entire (or substantially the entire) display area DA. The second electrode layer 173 may include a material layer having a low work function, said material layer being made of one selected from Li, Ca, LiF / Ca, LiF / Al, Al, Mg, Ag, Pt, Pd, Ni, Au, Nd, Ir, Cr, BaF, Ba and compounds or mixtures thereof, or comprising one selected from Li, Ca, LiF / Ca, LiF / Al, Al, Mg, Ag, Pt, Pd, Ni, Au, Nd, Ir, Cr, BaF, Ba and compounds or mixtures thereof. The second electrode layer 173 may further include a transparent metal oxide layer disposed on the material layer having a low work function.

[0185] A passivation layer 170 may be disposed on the second electrode layer 173. The passivation layer 170 prevents moisture or oxygen from permeating into the light-emitting layer 172. The passivation layer 170 may include at least one inorganic film and / or an organic film. The inorganic film may include, for example, films derived from Al. x O y TiO x ZrO x SiO x AlO x N y Al x N y SiO x N y Si x N yZnO x and Ta x O y At least one inorganic material selected from the group consisting of pentabromophenyl acrylate, ethyl 2-(9H-carbazole-9-yl)methacrylate, N-vinylcarbazole, bis(methacryloylthiophenyl)sulfide, and zirconium acrylate. The organic membrane may be a planarized membrane.

[0186] The touch sensing layer TSL can be set on the passivation layer 170.

[0187] The touch sensing layer TSL may include a first touch insulating layer TIL1, a first touch conductive layer 151, a second touch insulating layer TIL2, a second touch conductive layer 152, and a touch protective layer 180.

[0188] Each of the above layers can be formed as a single membrane, or it can be formed as a stacked membrane comprising multiple membranes. Other layers may also be disposed between the above layers.

[0189] The first touch insulating layer TIL1 may include an organic film and / or an inorganic film. For example, the organic film may include at least one selected from acrylic resins, methacrylic resins, polyisoprene, vinyl resins, epoxy resins, polyurethane resins, cellulose resins, siloxane resins, polyimide resins, polyamide resins, and dinaphthalene-containing resins. For example, the inorganic film may include at least one selected from alumina, titanium dioxide, silicon dioxide, silicon oxynitride, zirconium oxide, and hafnium oxide.

[0190] A first touch conductive layer 151 may be disposed on a first touch insulating layer TIL1. The first touch conductive layer 151 may include at least one selected from molybdenum, titanium, copper, aluminum, and alloys thereof. The first touch conductive layer 151 may include a connection electrode BE. As described above, the first touch conductive layer 151 constituting or including the connection electrode BE may have a grid shape. The first touch conductive layer 151 may be invisible to the user. To prevent a reduction in the aperture ratio of the pixel PX, the connection electrode BE may be configured to overlap with the pixel defining film 160.

[0191] A second touch insulating layer TIL2 may be disposed on the first touch conductive layer 151. The second touch insulating layer TIL2 can insulate the first touch conductive layer 151 from the second touch conductive layer 152. The second touch insulating layer TIL2 may include the same material as the first touch insulating layer TIL1. The second touch insulating layer TIL2 may include at least one material selected from the materials described as the structural material of the first touch insulating layer TIL1.

[0192] The second touch conductive layer 152 may be disposed on the second touch insulating layer TIL2. The second touch conductive layer 152 may include the same material as the first touch conductive layer 151. The second touch conductive layer 152 may include at least one material selected from the materials described as the structural material of the first touch conductive layer 151. The second touch conductive layer 152 may include the first touch electrode TE and the second touch electrode RE described above. As described above, the second touch conductive layer 152 constituting or including the first touch electrode TE and the second touch electrode RE may have a grid shape. The second touch conductive layer 152 may be invisible to the user. To prevent a reduction in the aperture ratio of the pixel PX, the first touch electrode TE and the second touch electrode RE may be configured to overlap with the pixel defining film 160.

[0193] A touch protective layer 180 may be disposed on the second touch conductive layer 152. The touch protective layer 180 may comprise the same material as the first touch insulating layer TIL1. The touch protective layer 180 may comprise at least one material selected from the materials chosen from the structural materials described as the first touch insulating layer TIL1.

[0194] In the following embodiments, the same components as those described above will be represented by the same reference numerals, and their repeated descriptions will be omitted or simplified.

[0195] Figure 16 This is a plan view showing a display device 1_1 according to another embodiment. Figure 17 It is shown Figure 16 A magnified view of region E. Figure 18 It is along Figure 17 A schematic cross-sectional view of line XVIII-XVIII'.

[0196] refer to Figures 16 to 18 The implementation method is different. Figures 1 to 15 An embodiment. In the display device 1_1, the anodes ANO1, ANO21, ANO22, and ANO3 of sub-pixels R, G1, G2, and B can overlap with the gap G between the protruding patterns PP1 and PP2.

[0197] The anodes ANO1, ANO21, ANO22 and ANO3 may include the first anode ANO1, the second anodes ANO21 and ANO22 and the third anode ANO3.

[0198] The first anode ANO1 can be set corresponding to the first sub-pixel R, the second anodes ANO21 and ANO22 can be set corresponding to the second sub-pixels G1 and G2, and the third anode ANO3 can be set corresponding to the third sub-pixel B. The second anodes ANO21 and ANO22 can include the second A anode ANO21 corresponding to the second A sub-pixel G1 and the second B anode ANO22 corresponding to the second B sub-pixel G2. Each of the anodes ANO1, ANO21, ANO22, and ANO3 can be implemented using the first electrode layer 171. The first electrode layer 171 can include the anodes ANO1, ANO21, ANO22, and ANO3.

[0199] Each anode ANO1, ANO21, ANO22, and ANO3 may include a protrusion AP.

[0200] The protrusion AP of the first anode ANO1 can protrude from the first anode ANO1 in the first direction DR1, the protrusion AP of the second anodes ANO21 and ANO22 can protrude from the second anodes ANO21 and ANO22 in the second direction DR2, and the protrusion AP of the third anode ANO3 can protrude from the third anode ANO3 in the first direction DR1.

[0201] The protrusions AP of the anodes ANO1, ANO21, ANO22, and ANO3 can overlap with the gap G between the protruding patterns PP1 and PP2. The gap G between the protruding patterns PP1 and PP2 can also overlap with the touch electrode TSP and the protrusions AP of the anodes ANO1, ANO21, ANO22, and ANO3. The gap G formed in the display area DA can be blocked twice by the protrusions AP of the anodes ANO1, ANO21, ANO22, and ANO3 and the touch electrode TSP, thus more effectively preventing phenomena such as reflection of external light and / or visibility of spots due to the gap G.

[0202] The position and orientation of the protrusions AP of the anodes ANO1, ANO21, ANO22, and ANO3 are not limited to... Figure 17 The embodiment shown. As long as the anodes ANO1, ANO21, ANO22, and ANO3 can overlap with the gap G between the protruding patterns PP1 and PP2, various modifications can be made to the position and orientation of the protrusions AP.

[0203] Figure 19 This is a plan view showing the signal wiring DL, connection wiring DM and fan-out wiring F of the display device 1_2 according to another embodiment. Figure 20 It is shown Figure 19 A magnified view of region F. Figure 21 This illustrates the application of a touch sensing layer. Figure 19 A magnified view of region F. Figure 22 It is along Figure 21 A schematic cross-sectional view of line XXII-XXII'.

[0204] refer to Figures 19 to 22 Examples and Figures 1 to 15 The embodiments differ. The display device 1_2 may further include a dummy pattern DP.

[0205] A dummy pattern DP can be placed within the display area DA and can be spaced apart from the connection wiring DM. A dummy pattern DP can also be placed around the connection wiring DM to have a grid pattern shape together with the connection wiring DM.

[0206] The dummy pattern DP may be partially curved and may include a diagonal portion DPB extending in a diagonal direction. The diagonal portion DPB may be the portion in which the dummy pattern DP is curved in a first diagonal direction DR4 or a second diagonal direction DR5.

[0207] like Figure 20 As shown, the diagonal portion DPB may have an end extending from the dummy pattern DP in the first direction DR1 that bends in the first diagonal direction DR4 and / or the second diagonal direction DR5.

[0208] The diagonal portion DPB can have a shape that protrudes from one side of the dummy pattern DP. For example, as Figure 20 As shown, the diagonal portion DPB can protrude from one side of the dummy pattern DP in a direction opposite to the first diagonal direction DR4.

[0209] A dummy pattern DP may include dummy protruding patterns DPP1 and DPP2 protruding from one side of the dummy pattern DP. DPP1 and DPP2 may include a first dummy protruding pattern DPP1 protruding from the diagonal portion DPB and a second dummy protruding pattern DPP2 protruding from an extension of each dummy pattern DP. The extension may include any portion of the dummy pattern DP other than the diagonal portion DPB. For example, the extension of the dummy pattern DP may be any portion of the dummy pattern DP other than the diagonal portion DPB.

[0210] Each first dummy protrusion pattern DPP1 may have a shape that protrudes from one side of the diagonal portion DPB. The first dummy protrusion pattern DPP1 may protrude in a direction opposite to the first direction DR1.

[0211] Each second dummy protrusion pattern DPP2 may have a shape that protrudes from an extension of the dummy pattern DP. The second dummy protrusion pattern DPP2 may protrude in a direction opposite to the first direction DR1.

[0212] The portions (or ends) of the dummy protruding patterns DPP1 and DPP2 of the dummy pattern DP and the portions (or ends) of the protruding patterns PP1 and PP2 of the connecting wiring DM can be adjacent to each other and can face each other. The portions of the adjacent dummy protruding patterns DPP1 and DPP2 and the portions of the protruding patterns PP1 and PP2 can overlap with the touch electrode TSP.

[0213] A gap G can be defined between portions (or ends) of adjacent dummy protrusions DPP1 and DPP2 and portions (or ends) of protrusions PP1 and PP2. The gap G between adjacent portions of dummy protrusions DPP1 and DPP2 and adjacent portions of protrusions PP1 and PP2 can overlap with the touch electrode TSP. The gap G can overlap with the first touch electrode TE, the second touch electrode RE, or the connecting electrode BE.

[0214] The width of the gap G between the dummy protrusions DPP1 and DPP2 and the protrusions PP1 and PP2 can be smaller than the line width of the touch electrode TSP. The width of the gap G can be smaller than the line width of the dummy pattern DP. The width of the gap G can be the distance between the portions (or ends) of the dummy protrusions DPP1 and DPP2 facing each other and the portions (or ends) of the protrusions PP1 and PP2.

[0215] The width of the gap G can be in the range of about 2.0 μm to about 3.0 μm. The linewidth of the touch electrode TSP can be in the range of about 3.2 μm to about 4.8 μm. However, this disclosure is not limited thereto. In other embodiments, for example, the linewidth of the touch electrode TSP can be in the range of about 4.8 μm to about 7.2 μm. The area in which the touch electrode TSP overlaps with the gap G can be increased, thereby more effectively preventing phenomena such as reflection of external light and / or visibility of spots due to the gap G. The linewidth of the dummy pattern DP can be in the range of about 2.4 μm to about 3.6 μm. However, the width of the gap G and the linewidth of the wiring are not limited thereto, and the range of the width of the gap G and the linewidth of the wiring are not limited thereto, as long as the gap G between the dummy protrusions DPP1 and DPP2 and the protrusions PP1 and PP2 overlaps with the touch electrode TSP. Since the gap G between the dummy protrusions DPP1 and DPP2 and the protrusions PP1 and PP2 overlaps with the touch electrode TSP, the gap G formed in the display area DA can be blocked by the touch electrode TSP. Therefore, phenomena such as reflection of external light and / or visibility of spots due to the gap G can be prevented.

[0216] The first dummy protruding pattern DPP1 and the second dummy protruding pattern DPP2 can be alternately set on the second direction DR2. The first dummy protruding pattern DPP1 can be set between the second dummy protruding patterns DPP2.

[0217] The first dummy protrusion pattern DPP1 and / or the second dummy protrusion pattern DPP2 can be set at a distance on the second direction DR2. For example, the distance between the dummy protrusion patterns DPP1 and DPP2 set on the second direction DR2 can be substantially the same as the distance between the connecting wires DM set on the second direction DR2.

[0218] The dummy pattern DP and the connecting wiring DM can be set to be coplanar. For example, as Figure 22 As shown, the dummy pattern DP can be implemented using a fourth conductive layer 140. The fourth conductive layer 140 may include the dummy pattern DP. However, this disclosure is not limited thereto. In other embodiments, the dummy pattern DP can be implemented using a conductive layer different from the connection wiring DM.

[0219] In the display device 1_2 including the dummy pattern DP, the dummy pattern DP can have a grid pattern shape in the display area DA together with the connecting wires DM. Therefore, abnormal patterns around the connecting wires DM can be minimized to prevent the connecting wires DM from becoming visible.

[0220] Figure 23 This is a perspective view showing a display device 1_3 according to another embodiment. Figure 24 It is shown Figure 23 A plan view of display device 1_3. Figure 25 It is shown Figure 23 A plan view of the signal wiring DL, connection wiring DM and fan-out wiring F of the display device 1_3.

[0221] refer to Figures 23 to 25 Examples and Figures 1 to 15 The embodiments differ. In the display device 1_3, the main area MR of the display panel 10_1 may include a front display area DA0, side display areas DA1, DA2, DA3 and DA4, and corner areas C1, C2, C3 and C4.

[0222] The front display area DA0 and the side display areas DA1, DA2, DA3, and DA4 are display areas DA in which images can be displayed. The corner areas C1, C2, C3, and C4 are non-display areas NDA in which images are not displayed. The corner areas C1, C2, C3, and C4 provide space through which signal cabling DL and connection cabling DM can pass.

[0223] The front display area DA0 can have a rectangular shape, comprising two long sides extending in the first direction DR1 and two short sides extending in the second direction DR2. However, the embodiments are not limited to this. In other embodiments, the corner where the short and long sides intersect can have a rounded polygonal shape.

[0224] The side display areas DA1, DA2, DA3 and DA4 may include a first side display area DA1, a second side display area DA2, a third side display area DA3 and a fourth side display area DA4.

[0225] The first side display area DA1 can be an area extending from the edge of the front display area DA0 in a direction opposite to the first direction DR1. The second side display area DA2 can be an area extending from the edge of the front display area DA0 in a direction opposite to the second direction DR2. The third side display area DA3 can be an area extending from the edge of the front display area DA0 in the first direction DR1. The fourth side display area DA4 can be an area extending from the edge of the front display area DA0 in the second direction DR2.

[0226] Aside from their positions, the first side display area DA1, the second side display area DA2, the third side display area DA3, and the fourth side display area DA4 can be constructed or configured in a similar manner. In the following description, the common features of the first side display area DA1, the second side display area DA2, the third side display area DA3, and the fourth side display area DA4 will be described based on the first side display area DA1, and repeated descriptions will be omitted.

[0227] The first side display area DA1 may extend outward from the edge of the front display area DA0 and may be bent at a predetermined angle or a selected angle. For example, the first side display area DA1 may be bent relative to the front display area DA0 at an angle ranging from about 90° to about 150°.

[0228] The first side display area DA1 can be connected to the curved area BR. For example... Figure 23 and Figure 24As shown, when the first side display area DA1 bends relative to the front display area DA0 (e.g., at a right angle), the curved area BR can bend again relative to the first side display area DA1 (e.g., at a right angle). The curved area BR can bend relative to the front display area DA0 (e.g., at an angle of approximately 180°). Therefore, the sub-area SR disposed on one side of the curved area BR can be disposed below the front display area DA0 in the thickness direction of the front display area DA0. The sub-area SR can overlap with the front display area DA0 and can be configured to be substantially parallel to the front display area DA0.

[0229] Corner areas C1, C2, C3, and C4 can be set or positioned between side display areas DA1, DA2, DA3, and DA4. Corner areas C1, C2, C3, and C4 can include a first corner area C1, a second corner area C2, a third corner area C3, and a fourth corner area C4 set or positioned between the first side display area DA1, the second side display area DA2, the third side display area DA3, and the fourth side display area DA4. The first corner area C1, the second corner area C2, the third corner area C3, and the fourth corner area C4 can be set as the four corners adjacent to the intersection of the long and short sides of the front display area DA0. Except for the positions of the first corner area C1, the second corner area C2, the third corner area C3, and the fourth corner area C4, they can be constructed or configured in a similar manner. In the following text, the common features of the first corner region C1, the second corner region C2, the third corner region C3, and the fourth corner region C4 will be described based on the first corner region C1, and repeated descriptions will be omitted.

[0230] The first corner area C1 can be set or positioned between the first side display area DA1 and the second side display area DA2. One end of the first corner area C1 can contact the first side display area DA1, and the other end of the first corner area C1 can contact the second side display area DA2.

[0231] The first corner region C1 can extend from the front display region DA0 and can be rounded to have curvature. The curvature of the first corner region C1 relative to the front display region DA0 can be greater than the curvature of the first side display region DA1 and the second side display region DA2 relative to the front display region DA0.

[0232] The first corner area C1 provides space where signal cabling DL can be connected to connection cabling DM.

[0233] The signal wiring DL can extend from the first corner area C1 and can be set in the side display areas DA1, DA2, DA3 and DA4 and the front display area DA0. The signal wiring DL can extend from the non-display area NDA between the first side display area DA1 and the curved area BR, and can be set in the side display areas DA1, DA2, DA3 and DA4 and the front display area DA0.

[0234] The connecting cable DM can extend from the non-display area NDA between the first side display area DA1 and the curved area BR, and can extend to the first corner area C1 via the first side display area DA1, the front display area DA0 or the second side display area DA2.

[0235] The connection cable DM can be electrically connected to the signal cable DL located in the first corner area C1. The connection cable DM can also be electrically connected to the signal cable DL in the non-display area NDA between the first side display area DA1 and the curved area BR.

[0236] The display device 1_3 may include a connection cable DM set through the display area DA, and can provide image signals to the signal cable DL through the connection cable DM. Therefore, no additional useless space is needed for connecting the signal cable DL to the fan-out cable F.

[0237] The fan-out wiring F can extend from the driver chip 20 of the sub-region SR to the non-display area NDA of the main region MR.

[0238] Fan-out wiring F can be electrically connected to signal wiring DL. Some of the fan-out wiring F can be connected (or directly connected) to some of the signal wiring DL, and the remaining fan-out wiring F can be connected (or directly connected) to the connection wiring DM and connected to the signal wiring DL via the connection wiring DM.

[0239] Due to the above references Figures 1 to 15 The signal routing (DL), connection routing (DM), and fan-out routing (F) are described, so their repeated descriptions are omitted.

[0240] In the above embodiments, as described above, since the connection wiring is arranged in the display area, the useless space of the display device can be reduced or minimized.

[0241] The gaps between the wiring can be blocked by the touch electrodes of the touch sensing layer, thereby preventing phenomena such as reflection of external light and / or visibility of spots due to the gaps. As a result, display quality can be improved.

[0242] The effects of this disclosure are not limited to the embodiments set forth herein. In closing this detailed description, those skilled in the art will understand that many variations and modifications can be made to the embodiments without substantially departing from the principles, spirit, and scope thereof. Therefore, the disclosed embodiments are used in a general and descriptive sense only and not for limiting purposes.

Claims

1. A display device, wherein, The display device includes: The display panel includes a display area and a non-display area; Signal wiring extends in a first direction and is disposed in the display area; Fan-out cabling is provided in the non-display area; Connecting wiring, disposed in the display area and used for electrically connecting the signal wiring and the fan-out wiring; and Touch electrodes are provided in the display area and disposed on the connection wiring, wherein the connection wiring includes: The diagonal portion extends in a diagonal direction relative to the first direction; and The first protruding pattern protrudes from the diagonal portion of the connecting wiring. Wherein, the first protruding pattern is parallel to the plane defined by the first direction and the second direction intersecting the first direction. Wherein, adjacent first protruding patterns in the first protruding pattern face each other, and The gap between the ends of the adjacent first protruding patterns overlaps with the touch electrode.

2. The display device according to claim 1, wherein, The distance between the ends of the adjacent first protruding patterns is less than the line width of the touch electrode.

3. The display device according to claim 1, wherein, The first protruding pattern protrudes in the first direction or the second direction.

4. The display device according to claim 3, wherein, The connecting wiring further includes a second protruding pattern projecting from an extension of the connecting wiring, wherein the extension includes the portion of the connecting wiring excluding the diagonal portion; and A portion of the second protruding pattern overlaps with the touch electrode.

5. The display device according to claim 4, wherein, The adjacent portions of the second protruding pattern face each other, and The gap between adjacent portions of the second protruding pattern overlaps with the touch electrode.

6. The display device according to claim 4, wherein, At least a portion of the first protruding pattern in the first protruding pattern and a portion of at least a second protruding pattern in the second protruding pattern are adjacent to each other, and The gap between a portion of at least one first protruding pattern in the first protruding pattern and a portion of at least one second protruding pattern in the second protruding pattern overlaps with the touch electrode.

7. The display device according to claim 4, wherein, The first protruding pattern and the second protruding pattern are alternately arranged in the second direction, and The spacing between the first protruding patterns or the spacing between the second protruding patterns is the same as the spacing between the connecting wires disposed in the second direction.

8. The display device according to claim 4, wherein, The length of the first protruding pattern in the first direction is different from the length of the second protruding pattern in the first direction.

9. The display device according to claim 1, wherein, The connection wiring also includes: The first portion extends from the non-display area in the first direction; The second portion extends from one end of the first portion in the second direction; and The third part extends from one end of the second part in a direction opposite to the first direction.

10. The display device according to claim 9, wherein, The display device includes: The first conductive layer includes the signal wiring; A second conductive layer is disposed on the first conductive layer and includes the connection wiring; and An insulating layer is disposed between the first conductive layer and the second conductive layer. The connection wiring contacts the signal wiring through a contact hole passing through the insulating layer.

11. The display device according to claim 10, wherein, The display device further includes: A first electrode layer is disposed on the second conductive layer; A second electrode layer is disposed on the first electrode layer; and A light-emitting layer is disposed between the first electrode layer and the second electrode layer.

12. The display device according to claim 9, wherein, The first portion is electrically connected to the signal wiring, and The third part is spaced apart from the first part.

13. The display device according to claim 1, wherein, The display device further includes: a dummy pattern disposed on one side of the connecting wire in the display area. The dummy pattern includes a diagonal portion extending in the diagonal direction.

14. The display device according to claim 13, wherein, The display device further includes: a first dummy protruding pattern protruding from the diagonal portion of the dummy pattern. Wherein, at least one portion of the first dummy protrusion pattern and at least one portion of the first protrusion pattern are adjacent to each other.

15. The display device according to claim 14, wherein, The gap between a portion of at least one first dummy protrusion in the first dummy protrusion pattern and a portion of at least one first protrusion in the first protrusion pattern overlaps with the touch electrode.

16. The display device according to claim 14, wherein, The distance between a portion of at least one first dummy protrusion in the first dummy protrusion pattern and a portion of the at least one first protrusion in the first protrusion pattern is less than the line width of the touch electrode.

17. The display device according to claim 13, wherein, The dummy pattern and the connecting wiring are disposed on the same conductive layer.

18. The display device according to claim 1, wherein, The touch electrode also includes: A first touch electrode is disposed in the first direction; and Connect the electrode, which is electrically connected to the first touch electrode.

19. The display device according to claim 18, wherein, The touch electrode further includes a second touch electrode disposed in the second direction. The first touch electrode and the second touch electrode are spaced apart from each other.

20. The display device according to claim 1, wherein, The display device further includes: Pixels, set in the display area; and A pixel defining film defines the light-emitting area of ​​the pixel. The touch electrode overlaps with the pixel defining film.

Images