Integrated circuit device

Abstract

An integrated circuit device is provided. The integrated circuit device includes: a lower electrode formed on a substrate; and an upper support structure disposed around and supporting the lower electrode. The upper support structure includes: an upper support pattern extending around the lower electrode in a lateral direction parallel to the substrate, the upper support pattern having a hole through which the lower electrode passes; and an upper spacer support pattern located between the upper support pattern and the lower electrode inside the hole, having an outer sidewall in contact with the upper support pattern and an inner sidewall in contact with the lower electrode, wherein the width of the upper spacer support pattern in the lateral direction decreases in the direction toward the substrate.

Description

[0001] This application claims priority to Korean Patent Application No. 10-2019-0114365, filed on September 17, 2019, with the Korean Intellectual Property Office, the entire disclosure of which is incorporated herein by reference. Technical Field

[0002] The inventive concept relates to an integrated circuit (IC) device and a method of manufacturing the IC device, and more specifically, to an IC device including a capacitor and a method of manufacturing the IC device. Background Technology

[0003] Due to advancements in electronic technology, the size of semiconductor devices has rapidly decreased, resulting in a reduction in the dimensions of the patterns that constitute these devices. Therefore, there is a need to develop structures that can include capacitors with increased capacitance while maintaining desired electrical characteristics at a smaller size. Summary of the Invention

[0004] The inventive concept provides an integrated circuit (IC) device that, even with an increase in the height of the lower electrode or a relative increase in the aspect ratio of the lower electrode, can prevent multiple lower electrodes of multiple capacitors from tilting or collapsing, thereby reducing / preventing the occurrence of unwanted short circuits between adjacent lower electrodes.

[0005] The inventive concept also provides a method for manufacturing IC devices that can prevent multiple lower electrodes of multiple capacitors from tilting or collapsing even if the height of the lower electrode is increased or the aspect ratio of the lower electrode is relatively increased, thereby improving the reliability and mass production efficiency of IC devices.

[0006] According to one aspect of the inventive concept, an IC device is provided, the IC device comprising: a lower electrode formed on a substrate; and an upper support structure configured to support the lower electrode, the upper support structure being disposed around the lower electrode. The upper support structure includes an upper support pattern extending around the lower electrode in a lateral direction parallel to the substrate. The upper support pattern has a hole through which the lower electrode passes. An upper spacer support pattern is disposed between the upper support pattern and the lower electrode inside the hole. The upper spacer support pattern has an outer sidewall in contact with the upper support pattern and an inner sidewall in contact with the lower electrode. The width of the upper spacer support pattern in the lateral direction decreases in the direction toward the substrate.

[0007] According to another aspect of the inventive concept, an IC device is provided, the IC device including a plurality of lower electrodes disposed on a substrate and spaced apart from each other. An upper support pattern extends in a lateral direction parallel to the substrate. The upper support pattern has a plurality of holes through which the plurality of lower electrodes pass. A plurality of upper spacer support patterns are arranged one-to-one within the plurality of holes. Each of the plurality of upper spacer support patterns includes an outer sidewall contacting the upper support pattern and an inner sidewall contacting a corresponding lower electrode among the plurality of lower electrodes. Each of the plurality of upper spacer support patterns has a width in the lateral direction, the width decreasing in the direction toward the substrate.

[0008] According to another aspect of the inventive concept, an IC device is provided, the IC device including a plurality of lower electrodes disposed on a substrate and spaced apart from each other. An upper support structure includes an upper support pattern and a plurality of upper spacer support patterns. The upper support pattern extends in a lateral direction parallel to the substrate and has a plurality of holes through which the plurality of lower electrodes pass. The plurality of upper spacer support patterns are arranged one-to-one within the plurality of holes. The lower support patterns extend laterally between the substrate and the upper support structure and contact the plurality of lower electrodes. A dielectric film contacts the plurality of lower electrodes, the upper support pattern, the plurality of upper spacer support patterns, and the lower support pattern. An upper electrode is located opposite the plurality of lower electrodes, and the dielectric film is located between the upper electrode and the plurality of lower electrodes. Each of the plurality of upper spacer support patterns has an outer sidewall that contacts the upper support pattern inside a corresponding hole in the plurality of holes and an inner sidewall that contacts a corresponding lower electrode in the plurality of lower electrodes. Each of the plurality of upper spacer support patterns has a width in the lateral direction, the width decreasing in the direction toward the substrate.

[0009] According to another aspect of the inventive concept, a method for manufacturing an IC device is provided. The method includes forming a molded structural pattern comprising a molded pattern and an upper support pattern sequentially stacked on a substrate. The molded structural pattern has a plurality of holes. An upper spacer support film is formed to cover the sidewalls and top surface of the upper support pattern. A plurality of lower electrodes are formed, respectively, within the plurality of holes, to contact the upper spacer support film and the molded pattern. A plurality of upper spacer support patterns are formed by removing portions of the upper spacer support film to expose the top surface of the upper support pattern. The plurality of upper spacer support patterns are respectively disposed between the upper support pattern and the plurality of lower electrodes. The molded pattern is removed to expose the sidewalls of each of the plurality of lower electrodes.

[0010] According to another aspect of the inventive concept, a method for manufacturing an IC device is provided. The method includes forming a molded structure on a substrate. The molded structure includes a molded film and an upper support film covering the molded film. A plurality of holes are formed through the molded structure to form a molded structure pattern. The molded structure pattern includes a molded pattern defining the plurality of holes and an upper support pattern. An upper spacer support film is formed inside each of the plurality of holes to cover the upper portion of the molded structure pattern. A plurality of lower electrodes are formed inside the plurality of holes, respectively. A plurality of upper spacer support patterns are formed by removing portions of the upper spacer support film to expose the top surface of the upper support pattern. The plurality of upper spacer support patterns are respectively disposed between the upper support pattern and the plurality of lower electrodes. A portion of the upper support pattern is removed to form a plurality of upper holes exposing the molded pattern. The molded pattern is removed through the plurality of upper holes to expose the plurality of lower electrodes between the substrate and the plurality of upper spacer support patterns. A dielectric film is formed to contact the surface of each of the plurality of lower electrodes, the surface of the upper support pattern, and each of the plurality of upper spacer support patterns. An upper electrode is formed on the dielectric film.

[0011] According to another aspect of the inventive concept, a method for manufacturing an IC device is provided. The method includes forming a molded structural pattern comprising a molded pattern and an upper support pattern sequentially stacked on a substrate. The molded structural pattern has a plurality of holes. An upper spacer support film is formed to cover the sidewalls and top surface of the upper support pattern. The upper spacer support film has a higher carbon atom content than the carbon atom content of the material included in the upper support pattern. A plurality of lower electrodes are formed, respectively, within the plurality of holes, to contact the upper spacer support film. The plurality of upper spacer support patterns are formed by removing portions of the upper spacer support film to expose the top surface of the upper support pattern. The plurality of upper spacer support patterns are respectively disposed between the upper support pattern and the plurality of lower electrodes. The molded pattern is removed to expose the sidewalls of each of the plurality of lower electrodes. Attached Figure Description

[0012] Embodiments of the inventive concept will become clearer from the following detailed description taken in conjunction with the accompanying drawings, in which:

[0013] Figure 1 This is a schematic planar layout of some components of the memory cell array region of an integrated circuit (IC) device according to an embodiment;

[0014] Figure 2A This is a plan view of some components of an IC device according to an embodiment;

[0015] Figure 2B It is along Figure 2A A schematic cross-sectional view of some components of an IC device taken by line 1X-1X';

[0016] Figure 3 This is a schematic cross-sectional view of some components of an IC device according to an embodiment;

[0017] Figure 4 This is a schematic cross-sectional view of some components of an IC device according to an embodiment;

[0018] Figure 5A This is a plan view of some components of an IC device according to an embodiment;

[0019] Figure 5B yes Figure 5A A schematic perspective view of some components of the IC device shown;

[0020] Figure 6A This is a plan view of some components of an IC device according to an embodiment;

[0021] Figure 6B It is along Figure 6A A schematic cross-sectional view of some components of an IC device taken by line 5X-5X';

[0022] Figure 7 This is a cross-sectional view of some components of an IC device according to an embodiment; and

[0023] Figures 8A to 8H This is a cross-sectional view of the process sequence of a method for manufacturing an IC device according to an embodiment. Detailed Implementation

[0024] The embodiments will now be described more fully with reference to the accompanying drawings, in which some embodiments are illustrated. Throughout the drawings, the same reference numerals are used to denote the same elements, and their repeated descriptions may be omitted.

[0025] It will be understood that when a component is referred to as being “connected to”, “bonded to”, or “on” another component, the component may be directly connected to / bonded to / on another component, or there may be intermediate components. Conversely, when a component is referred to as being “directly connected to” or “directly bonded to” another component, or “in contact with” or “on” another component, there are no intermediate components.

[0026] Figure 1 This is a schematic planar layout of some components of the memory cell array region of the integrated circuit (IC) device 10 according to an embodiment.

[0027] Reference Figure 1The IC device 10 may include a plurality of active regions AC extending parallel to each other at an angle to each of the X and Y directions in a plane. Multiple word lines WL may extend parallel to each other across the multiple active regions AC in the X direction. Multiple bit lines BL may extend parallel to each other on the multiple word lines WL in the Y direction, which intersects the X direction. For example, the X and Y directions may be perpendicular to each other. Each of the multiple bit lines BL may be connected to an active region AC via a direct contact DC.

[0028] Multiple buried contacts BC can be formed between two adjacent bit lines in multiple bit lines BL. Multiple conductive landing pads (or "pads") LP can be formed on the multiple buried contacts BC. Each of the multiple conductive landing pads LP can be arranged to at least partially overlap with the buried contact BC. Multiple lower electrodes LE can be formed on the multiple conductive landing pads LP. The multiple lower electrodes LE can be connected to multiple active regions AC through the multiple buried contacts BC and the multiple conductive landing pads LP.

[0029] Figure 2A This is a plan view of some components of the IC device 100 according to an embodiment. Figure 2B It is along Figure 2A A schematic cross-sectional view of some components of IC device 100 taken by line 1X-1X'.

[0030] Reference Figure 2A and Figure 2B IC device 100 can constitute Figure 1 A portion of the IC device 10 shown. Figure 2A and Figure 2B Some components of IC device 100 are omitted or briefly shown. However, the construction of IC device 100 is not limited to... Figure 2A and Figure 2B The construction shown is not interpreted as including the feature constructions described below.

[0031] IC device 100 may include: a substrate 110 including a plurality of active regions AC; and a lower structure 120 formed on the substrate 110. A plurality of conductive regions 124 may pass through the lower structure 120 and be respectively connected to a corresponding active region AC among the plurality of active regions AC.

[0032] Substrate 110 may include semiconductor elements (such as silicon (Si) and germanium (Ge)) or compound semiconductors (such as silicon carbide (SiC), gallium arsenide (GaAs), indium arsenide (InAs), and indium phosphide (InP)). Substrate 110 may include a semiconductor substrate and at least one insulating film or insulating structure, said at least one insulating film or insulating structure including at least one conductive region formed on the semiconductor substrate. The conductive region may include, for example, a doped well or a doped structure. Device isolation regions 112 may be formed in substrate 110 to define a plurality of active regions AC. Device isolation regions 112 may include oxide films, nitride films, or combinations thereof.

[0033] In some embodiments, the lower structure 120 may include an insulating film comprising a silicon oxide film, a silicon nitride film, or a combination thereof. In other embodiments, the lower structure 120 may include various conductive regions, such as interconnect layers, contact plugs, transistors, and insulating films configured to insulate the interconnect layers, contact plugs, and transistors from each other. A plurality of conductive regions 124 may include polysilicon, metal, conductive metal nitrides, metal silicides, or combinations thereof. The lower structure 120 may include reference... Figure 1 The description includes multiple bit lines BL. Each of the multiple conductive regions 124 may include a reference. Figure 1 The buried contact BC and conductive bonding pad LP are described.

[0034] An insulating pattern 126P having multiple openings 126H can be arranged on the lower structure 120 and multiple conductive regions 124. The insulating pattern 126P may include a silicon nitride film, a silicon carbonitride film, a boron-containing silicon nitride film, or a combination thereof.

[0035] Multiple capacitors CP1, including a dielectric film 160, an upper electrode UE, and multiple lower electrodes LE, can be arranged on multiple conductive regions 124. Each of the multiple lower electrodes LE can have a cylindrical shape, extending long in the vertical direction (Z direction) from the top surface of the conductive region 124 through an opening 126H of the insulating pattern 126P in a direction away from the substrate 110. For example, the Z direction is perpendicular to the X and Y directions. The dielectric film 160 and the upper electrode UE can be formed sequentially on the multiple lower electrodes LE. Although Figure 2A and Figure 2B An example is shown where each of the plurality of lower electrodes LE has a cylindrical shape, but the inventive concept is not limited thereto. For example, each of the plurality of lower electrodes LE may have a structure with a cylindrical or cup-shaped cross-section having a blocked bottom. For example, each of the lower electrodes LE may have a U-shaped cross-sectional view. The plurality of lower electrodes LE may be opposite to the upper electrode UE and the dielectric film 160 may be located between them.

[0036] Each of the plurality of lower electrodes LE and upper electrodes UE may include a metal film, a conductive metal oxide film, a conductive metal nitride film, a conductive metal oxynitride film, or a combination thereof. In some embodiments, each of the plurality of lower electrodes LE and upper electrodes UE may include titanium (Ti), Ti oxide, Ti nitride, Ti oxynitride, cobalt (Co), Co oxide, Co nitride, Co oxynitride, niobium (Nb), Nb oxide, Nb nitride, Nb oxynitride, tin (Sn), Sn oxide, Sn nitride, Sn oxynitride, or a combination thereof. For example, each of the lower electrodes LE and upper electrodes UE may include, but is not limited to, TiN, CoN, NbN, SnO2, or a combination thereof. The dielectric film 160 may include, but is not limited to, HfO2, ZrO2, Al2O3, La2O3, Ta2O3, Nb2O5, CeO2, TiO2, GeO2, or a combination thereof.

[0037] Multiple lower electrodes LE can be supported by a lower support pattern 142P and an upper support structure USS.

[0038] The upper support structure USS may include an upper support pattern 144P and a plurality of upper spacer support patterns 146P. The upper support pattern 144P may extend in a lateral direction parallel to the substrate 110, while surrounding the upper end of each of the plurality of lower electrodes LE at locations spaced apart from them. The plurality of holes 144H through which the plurality of lower electrodes LE pass (e.g., Figure 8C (As shown) can be formed in the upper support pattern 144P. A plurality of upper spacer support patterns 146P can be arranged in a one-to-one manner inside a plurality of holes 144H formed in the upper support pattern 144P. For example, each of the plurality of upper spacer support patterns 146P can be disposed between the upper support pattern 144P and a corresponding lower electrode LE formed inside the hole 144H in the upper support pattern 144P. Each of the plurality of upper spacer support patterns 146P can have an outer sidewall in contact with the upper support pattern 144P and an inner sidewall in contact with the corresponding lower electrode LE. Each of the plurality of upper spacer support patterns 146P can have a smaller width in the lateral direction toward the substrate 110. For example, the width or thickness of each of the upper spacer support patterns 146P in the horizontal / lateral direction parallel to the top surface of the substrate 110 can decrease from the top to the bottom of the upper spacer support pattern 146P. For example, the upper spacer support patterns 146P can have different widths in the horizontal / lateral directions.

[0039] Each of the plurality of holes 144H formed in the upper support pattern 144P may include an inclined sidewall SSW located separately from and opposite to the corresponding lower electrode LE, with the corresponding upper spacer support pattern 146P located between the corresponding lower electrode LE and the inclined sidewall SSW. For example, the inclined sidewall SSW may have an acute angle relative to the top surface of the substrate 110. The inclined sidewall SSW may be inclined such that it becomes closer to the lower electrode LE in the direction toward the substrate 110. For example, the lateral distance between the lower electrode LE and the inclined sidewall SSW may gradually decrease in the direction toward the substrate 110. The upper spacer support pattern 146P may include a portion having an inverted trapezoidal cross-sectional shape with its width decreasing toward the substrate 110. For example, the inverted trapezoidal cross-sectional shape of the upper spacer support pattern 146P may have a lower side extending in the lateral direction, an upper side extending in the lateral direction, and two other sides connecting the ends of the lower and upper sides respectively, with the length of the upper side being greater than the length of the lower side. The top surface of each of the plurality of lower electrodes LE, the top surface of the upper support pattern 144P, and the top surface of each of the plurality of upper spacer support patterns 146P may be coplanar.

[0040] The lower support pattern 142P can extend in a lateral direction parallel to the substrate 110 between the substrate 110 and the upper support structure USS, and contact multiple lower electrodes LE. Multiple holes 142H and multiple lower holes (see reference) through which the multiple lower electrodes LE pass. Figure 8G The LH can be formed in the lower support pattern 142P. Multiple lower electrodes LE can pass through multiple holes 144H formed in the upper support pattern 144P and multiple holes 142H formed in the lower support pattern 142P and extend in the vertical direction (Z direction).

[0041] Each of the plurality of upper spacer support patterns 146P may be located in the space between the upper support pattern 144P and the lower electrode LE, and may not include a portion of the space between the top level LV1 of the lower support pattern 142P and the bottom level LV2 of the upper support pattern 144P. For example, the bottom surface of each of the upper spacer support patterns 146P may be located at the same level as or higher than the bottom surface of its corresponding upper support pattern 144P. As used herein, the term "level" refers to the distance from the top surface of the substrate 110 in the vertical direction (Z direction or -Z direction).

[0042] Multiple upper holes UH can be formed in the upper support structure USS, which includes upper support pattern 144P and multiple upper spacer support patterns 146P. For example... Figure 2AAs shown, the planar shape of each of the multiple upper holes UH can be approximated as a rhombus planar shape with four adjacent lower electrodes LE as vertices. For example, the four sides of the rhombus planar shape connecting the four adjacent lower electrodes LE can be of the same length. However, the planar shape of each of the multiple upper holes UH is not limited to... Figure 2A The example shown is valid, and various modifications and changes can be made within the scope of the inventive concept. Multiple lower holes (see reference) Figure 8G The LH in the middle can be formed in the lower support pattern 142P, each of the plurality of lower holes having a planar shape corresponding to the planar shape of each of the plurality of upper holes UH.

[0043] Terms such as “about” or “approximately” as used herein may reflect quantities, dimensions, orientations, or layouts that vary only in a small relative manner and / or in a manner that does not significantly alter the operation, function, or structure of certain elements. For example, a range of “about 0.1 to about 1” may cover ranges such as 0% to 5% deviations near 0.1 and 0% to 5% deviations near 1, especially if such deviations maintain the same effect as the ranges listed.

[0044] Each of the plurality of upper spacer support patterns 146P may have an annular shape arranged concentrically with and surrounding the upper end of the lower electrode LE. However, at least some of the upper spacer support patterns 146P may not surround the lower electrode LE in a closed annular shape, but may surround the lower electrode LE in an open annular shape in which a portion of the closed annular shape is removed. The omitted opening portion from the annular shape forming the upper spacer support pattern 146P may be included in the upper aperture UH. For example, the omitted opening portion from the upper spacer support pattern 146P may be integrally formed with the upper aperture UH. For example, the omitted opening portion from the upper spacer support pattern 146P and the upper aperture UH may be a single space.

[0045] Each of the lower support pattern 142P and the upper support pattern 144P may include a silicon carbonitride film, a boron-containing silicon nitride film, or a combination thereof. In some embodiments, the lower support pattern 142P and the upper support pattern 144P may include the same material. In other embodiments, the lower support pattern 142P and the upper support pattern 144P may include different materials. In one example, each of the lower support pattern 142P and the upper support pattern 144P may include a silicon carbonitride film. In another example, the lower support pattern 142P may include a silicon carbonitride film, and the upper support pattern 144P may include a boron-containing silicon nitride film. However, according to embodiments, the materials included in the lower support film 142 and the upper support film 144 are not limited to the examples described above, and various modifications and changes can be made within the scope of the inventive concept. The lower support film 142 and the upper support film 144 are layers formed as the lower support pattern 142P and the upper support pattern 144P, respectively.

[0046] The upper spacer support pattern 146P may include a silicon carbonitride film, a boron-containing silicon nitride film, or a combination thereof.

[0047] In some embodiments, the lower support pattern 142P, the upper support pattern 144P, and the upper spacer support pattern 146P may comprise the same material. For example, each of the lower support pattern 142P, the upper support pattern 144P, and the upper spacer support pattern 146P may comprise a silicon carbonitride film.

[0048] In other embodiments, the lower support pattern 142P, the upper support pattern 144P, and the upper spacer support pattern 146P may comprise a first material containing the same elements (e.g., the same chemical elements). However, at least some of the lower support pattern 142P, the upper support pattern 144P, and the upper spacer support pattern 146P may include elements included in the first material in different amounts. For example, each of the lower support pattern 142P, the upper support pattern 144P, and the upper spacer support pattern 146P may comprise a silicon carbonitride film. In this case, the silicon carbonitride film included in the lower support pattern 142P and the upper support pattern 144P may have a first carbon atom content, and the silicon carbonitride film included in the upper spacer support pattern 146P may have a second carbon atom content. Here, the second carbon atom content may be higher than the first carbon atom content. In some embodiments, the carbon content of each of the lower support pattern 142P and the upper support pattern 144P may be selected in the range of about 3.5 atomic percentages (at%) to about 4.5 at%, and the carbon content of the upper spacer support pattern 146P may be selected in the range of about 4.5 at% to about 5.5 at%. For example, each of the lower support pattern 142P and the upper support pattern 144P may include a silicon carbonitride film having a carbon content of about 3.7 at% to about 4.3 at%, and the upper spacer support pattern 146P may include a silicon carbonitride film having a carbon content of about 4.7 at% to about 5.3 at%.

[0049] In other embodiments, at least some of the lower support pattern 142P, upper support pattern 144P, and upper spacer support pattern 146P may have different densities. For example, each of the lower support pattern 142P, upper support pattern 144P, and upper spacer support pattern 146P may include a material containing the same element (e.g., the same chemical element). In this case, the density of the material included in the lower support pattern 142P and upper support pattern 144P may be higher than the density of the material included in the upper spacer support pattern 146P. For example, the lower support pattern 142P and upper support pattern 144P may include a silicon carbonitride film with a first density, and the upper spacer support pattern 146P may include a silicon carbonitride film with a second density, which is lower than the first density.

[0050] In some other embodiments, the materials included in the lower support pattern 142P and the upper support pattern 144P may be different from the materials included in the upper spacer support pattern 146P. In one example, the lower support pattern 142P and the upper support pattern 144P may include a silicon carbonitride film, and the upper spacer support pattern 146P may include a boron-containing silicon nitride film. In another example, the lower support pattern 142P and the upper support pattern 144P may include a boron-containing silicon nitride film, and the upper spacer support pattern 146P may include a silicon carbonitride film.

[0051] In reference Figure 2A and Figure 2B In the described IC device 100, the space between the upper ends of the plurality of lower electrodes LE can be filled with an upper support pattern 144P and an upper spacer support pattern 146P. Therefore, sufficient separation distance can be ensured between the plurality of lower electrodes LE by the upper support pattern 144P and the upper spacer support pattern 146P. Thus, even if the height of the plurality of lower electrodes LE is increased and the aspect ratio of the plurality of lower electrodes LE is relatively increased to improve the capacitance of the plurality of capacitors CP1, tilting or collapse of the plurality of lower electrodes LE can be prevented. As a result, the occurrence of undesirable short circuits between adjacent lower electrodes LE can be prevented / reduced.

[0052] Figure 3 This is a schematic cross-sectional view of some components of the IC device 200 according to an embodiment. Figure 3 In the figures, the same reference numerals are used to indicate the same as those in the figures below. Figure 2A and Figure 2B For components that are identical to those in the original text, their detailed descriptions can be omitted.

[0053] Reference Figure 3 IC device 200 may have the same characteristics as the reference. Figure 2A and Figure 2B The IC device 100 described herein has a substantially identical construction. However, the IC device 200 may include an upper support structure USS2 configured to support a plurality of lower electrodes LE.

[0054] The upper support structure USS2 may include an upper support pattern 144P and multiple upper spacer support patterns 246P. The multiple upper spacer support patterns 246P may have the same characteristics as the referenced pattern. Figure 2A and Figure 2B The upper spacer support pattern 146P described is substantially identical in construction. However, each of the plurality of upper spacer support patterns 246P may include a protrusion PR2 extending toward the substrate 110 to a level LV3 lower than the bottom level LV2 of the upper support pattern 144P, to cover the sidewall of the lower electrode LE between the top level LV1 of the lower support pattern 142P and the bottom level LV2 of the upper support pattern 144P. The protrusion PR2 may be located between the lower electrode LE and the dielectric film 160. For example, the protrusion PR2 may cover the portion of the sidewall of the lower electrode LE located between the lower electrode LE and the dielectric film 160. In some embodiments, the protrusion PR2 of the upper spacer support pattern 246P may have an inverted triangular cross-sectional shape.

[0055] Figure 4 This is a schematic cross-sectional view of some components of the IC device 300 according to an embodiment. Figure 4 In the figures, the same reference numerals are used to indicate the same as those in the figures below. Figure 2A and Figure 2B For components that are identical to those in the original text, their detailed descriptions can be omitted.

[0056] Reference Figure 4 IC device 300 may have the same characteristics as the reference. Figure 2A and Figure 2B The IC device 100 described has a substantially the same construction. However, the IC device 300 may include an upper support structure USS3 configured to support a plurality of lower electrodes LE.

[0057] The upper support structure USS3 may include an upper support pattern 144P and multiple upper spacer support patterns 346P. The multiple upper spacer support patterns 346P may have the same characteristics as the referenced pattern. Figure 2A and Figure 2B The upper spacer support pattern 146P described has a substantially identical construction. However, each of the plurality of upper spacer support patterns 346P may have a bottom surface RS3 located at a level LV4 that is higher than the bottom level LV2 of the upper support pattern 144P.

[0058] The dielectric film 160 may include a portion that contacts the bottom surface RS3 of each of the plurality of upper spacer support patterns 346P. The portion of the dielectric film 160 that contacts the bottom surface RS3 of the upper spacer support pattern 346P may be located between the lower electrode LE and the upper support pattern 144P.

[0059] Figure 5A This is a plan view of some components of the IC device 400 according to an embodiment. Figure 5B yes Figure 5A A schematic perspective view of some components of the IC device 400 shown. Figure 5A and Figure 5B In the figures, the same reference numerals are used to indicate the same as those in the figures below. Figure 2A and Figure 2B For components that are identical to those in the original text, their detailed descriptions can be omitted.

[0060] Reference Figure 5A and Figure 5B IC device 400 may have the same characteristics as the reference. Figure 2A and Figure 2B The IC device 100 described has a substantially the same construction. However, the IC device 400 may include an upper support structure USS4 configured to support a plurality of lower electrodes LE.

[0061] The upper support structure USS4 may include an upper support pattern 444P and a plurality of upper spacer support patterns 446P. A plurality of holes 444H through which a plurality of lower electrodes LE pass may be formed in the upper support pattern 444P. The plurality of upper spacer support patterns 446P may be arranged in a one-to-one manner within the plurality of holes 444H formed in the upper support pattern 444P. For example, each of the plurality of upper spacer support patterns 446P may be disposed between the upper support pattern 444P and a corresponding lower electrode LE formed within the hole 444H in the upper support pattern 444P. Each of the plurality of upper spacer support patterns 446P may have an outer sidewall in contact with the upper support pattern 444P and an inner sidewall in contact with the lower electrode LE. Each of the plurality of upper spacer support patterns 446P may have a smaller width in the lateral direction toward the substrate 110. For example, the thickness of each of the upper spacer support patterns 446P in the lateral direction may decrease from the top to the bottom of the upper spacer support pattern 446P.

[0062] Multiple upper holes UH4 can be formed in the upper support pattern 444P. The planar shape of each of the multiple upper holes UH4 can approximate a parallelogram shape with four adjacent lower electrodes LE as vertices, and the two diagonals of the lower electrodes LE connecting the diagonals of the four lower electrodes LE can have different lengths. For example, in a planar view, each of the upper holes UH4 can have two pairs of parallel sides. For example, in a planar view, the diagonals connecting opposite vertices of the parallelogram in each of the upper holes UH4 can have different lengths. In some embodiments, in a planar view, the sides of the parallelogram shape of each of the upper holes UH4 can have different lengths. For example, in a planar view, a pair of opposite sides that are parallel to each other in the parallelogram of each of the upper holes UH4 can have a length different from the length of another pair of sides of the parallelogram of the upper hole UH4.

[0063] Further detailed construction of the upper support pattern 444P and the multiple upper spacer support patterns 446P can be found in reference. Figure 2A and Figure 2B The upper support pattern 144P and the upper spacer support pattern 146P described are basically the same in construction.

[0064] Figure 6A This is a plan view of some components of the IC device 500 according to an embodiment. Figure 6B It is along Figure 6A A schematic cross-sectional view of some components of IC device 500, taken along line 5X-5X'. Figure 6A and Figure 6B In the figures, the same reference numerals are used to indicate the same as those in the figures below. Figure 2A and Figure 2B For components that are identical to those in the original text, their detailed descriptions can be omitted.

[0065] Reference Figure 6A and Figure 6B IC device 500 may have the same characteristics as the reference. Figure 2A and Figure 2B The IC device 100 described has a substantially the same construction. However, the IC device 500 may include multiple capacitors CP5 comprising a dielectric film 160, an upper electrode UE, and multiple lower electrodes LE, and may include a lower support pattern 542P and an upper support structure USS5 supporting the multiple lower electrodes LE.

[0066] The upper support structure USS5 may include an upper support pattern 544P and a plurality of upper spacer support patterns 546P. A plurality of holes 544H through which a plurality of lower electrodes LE pass may be formed in the upper support pattern 544P. The plurality of upper spacer support patterns 546P may be arranged in a one-to-one manner within the plurality of holes 544H formed in the upper support pattern 544P. For example, each of the plurality of upper spacer support patterns 546P may be disposed between the upper support pattern 544P and a corresponding lower electrode LE formed within the hole 544H in the upper support pattern 544P. Each of the plurality of upper spacer support patterns 546P may have an outer sidewall in contact with the upper support pattern 544P and an inner sidewall in contact with the lower electrode LE. Each of the plurality of upper spacer support patterns 546P may have a smaller width in the lateral direction toward the substrate 110. For example, the thickness of each of the upper spacer support patterns 546P in the lateral direction may gradually decrease from the top to the bottom of the upper spacer support pattern 546P.

[0067] Multiple upper holes UH5 can be formed in the upper support pattern 544P. Each of the multiple upper holes UH5 can have an approximately rectangular planar shape, and five lower electrodes LE can be exposed at one upper hole UH5. Multiple lower holes LH5 can be formed in the lower support pattern 542P, and each of the lower holes LH5 has a planar shape corresponding to the planar shape of each of the multiple upper holes UH5.

[0068] Each of the plurality of upper spacer support patterns 546P may have an annular shape arranged concentrically with the lower electrode LE (e.g., concentrically with the lower electrode LE in a plan view) and surrounding the upper end of the lower electrode LE. Some of the plurality of upper spacer support patterns 546P may surround the lower electrode LE in a closed annular shape at positions spaced apart from the plurality of upper holes UH5 in the lateral direction. Others of the plurality of upper spacer support patterns 546P may not surround the lower electrode LE in a closed annular shape, but rather in an open annular shape in which a portion of the closed annulus is removed. The omitted opening portion from the annulus forming each of the plurality of upper spacer support patterns 546P may be included in the upper hole UH5. For example, the omitted opening portion from the upper spacer support pattern 546P may be integrally formed with the upper hole UH5.

[0069] The detailed construction of the lower support pattern 542P, the upper support pattern 544P, and the multiple upper spacer support patterns 546P can be found in the reference. Figure 2A and Figure 2B The lower support pattern 142P, upper support pattern 144P and upper spacer support pattern 146P described are basically the same in structure.

[0070] Figure 7 This is a cross-sectional view of some components of the IC device 600 according to an embodiment. Figure 7 The diagram schematically shows the relationship with along Figure 2A Some components corresponding to the section cut by line 1X-1X'. Figure 7 In the figures, the same reference numerals are used to indicate the same as those in the figures below. Figure 2A and Figure 2B For components that are identical to those in the original text, their detailed descriptions can be omitted.

[0071] Reference Figure 7 IC device 600 may have the same characteristics as the reference. Figure 2A and Figure 2B The IC device 100 described has a substantially the same construction. However, the IC device 600 may include a plurality of capacitors CP6 comprising a dielectric film 160, an upper electrode UE, and a plurality of lower electrodes LE6, and may include a lower support pattern 142P and an upper support structure USS6 supporting the plurality of lower electrodes LE6.

[0072] The upper support structure USS6 may include an upper support pattern 644P and multiple upper spacer support patterns 646P. The upper support pattern 644P and the multiple upper spacer support patterns 646P may have the same characteristics as referenced... Figure 2A and Figure 2BThe upper support pattern 144P and the plurality of upper spacer support patterns 146P described are constructed substantially the same. However, each of the top surface 644T and bottom surface 644B of the upper support pattern 644P may include a curved surface. The curved surface of the top surface 644T of the upper support pattern 644P may bulge in a direction away from the substrate 110, while the curved surface of the bottom surface 644B of the upper support pattern 644P may bulge toward the substrate 110. For example, both the upper and lower surfaces of the upper support pattern 644P (e.g., in a cross-sectional view) may be bulging, for example, between the two lower electrodes LE6. The radius of curvature of the top surface 644T may be smaller than the radius of curvature of the bottom surface 644B. ​​For example, as Figure 7 As shown, for example in a cross-sectional view, the upper surface of the upper support pattern 644P located between the two lower electrodes LE6 may be more convex than the lower surface of the upper support pattern 644P (e.g., with a smaller radius of curvature). Each of the plurality of upper spacer support patterns 646P may have: a top surface 646T, located at a level lower than the uppermost portion of the top surface 644T of the upper support pattern 644P; and a bottom surface 646B, located at a level higher than the lowermost portion of the bottom surface 644B of the upper support pattern 644P. The vertical length of each of the plurality of upper spacer support patterns 646P may be smaller than the vertical length of the upper support pattern 644P.

[0073] Multiple lower electrodes LE6 can have the same characteristics as the reference. Figure 2A and Figure 2B The described plurality of lower electrodes LEs are constructed in substantially the same manner. However, each of the plurality of lower electrodes LE6 may have a top surface LE6T comprising a surface that is convexly curved in a direction away from the substrate 110. The dielectric film 160 may conformally cover the surfaces of the lower support pattern 142P, the upper support pattern 644P, the plurality of lower electrodes LE6, and the plurality of upper spacer support patterns 646P.

[0074] Figures 8A to 8H This is a cross-sectional view of the process sequence (steps) of a method for manufacturing an IC device according to an embodiment. Figures 8A to 8H In the figures, the same reference numerals are used to indicate the same as those in the figures below. Figures 2A to 6B For components that are identical to those in the original text, their detailed descriptions can be omitted.

[0075] Reference Figure 8A A lower structure 120 and a conductive region 124 can be formed on a substrate 110 at the active region AC defined by the device isolation region 112. The conductive region 124 can pass through the lower structure 120 and be connected to the active region AC. Thereafter, an insulating film 126 can be formed to cover the lower structure 120 and the conductive region 124.

[0076] The insulating film 126 can be used as an etch stop layer during subsequent processes. The insulating film 126 may include an insulating material that has etch selectivity relative to the underlying structure 120. In some embodiments, the insulating film 126 may include a silicon nitride film, a silicon carbonitride film, a boron-containing silicon nitride film, or a combination thereof.

[0077] Reference Figure 8B A molded structure MST can be formed on the insulating film 126.

[0078] A molded structure MST may include multiple molded films and multiple support films. For example, a molded structure MST may include a first molded film 132, a lower support film 142, a second molded film 134, a third molded film 136, and an upper support film 144 sequentially stacked on an insulating film 126. Each of the first molded film 132, the second molded film 134, and the third molded film 136 may include a material having a relatively high etching rate relative to an etchant comprising ammonium fluoride (NH4F), hydrofluoric acid (HF), and water, and being removable by a stripping process using the etchant. In some embodiments, each of the first molded film 132, the second molded film 134, and the third molded film 136 may include an oxide film, a nitride film, or a combination thereof. For example, the first molded film 132 may include a borosilicate glass (BPSG) film. The BPSG film may include at least one of a first portion in which the concentration of dopant B (or boron) varies in the thickness direction of the BPSG film and a second portion in which the concentration of dopant P (or phosphorus) varies in the thickness direction of the BPSG film. The second molded film 134 may comprise a multilayer insulating film obtained by repeatedly and alternately stacking silicon oxide and silicon nitride films, each having a relatively small thickness. The third molded film 136 may comprise a silicon nitride film. However, the materials included in each of the first molded film 132, the second molded film 134, and the third molded film 136 are not limited to the examples described above, and various modifications and changes can be made within the scope of the inventive concept. Furthermore, the stacking order of the molded structure MST is not limited to... Figure 8B The example shown can be modified and altered in various ways within the scope of the inventive concept.

[0079] Each of the lower support film 142 and the upper support film 144 may comprise a silicon carbonitride film, a boron-containing silicon nitride film, or a combination thereof. In some embodiments, the lower support film 142 and the upper support film 144 may comprise the same material. In other embodiments, the lower support film 142 and the upper support film 144 may comprise different materials. In one example, each of the lower support film 142 and the upper support film 144 may comprise a silicon carbonitride film. In another example, the lower support film 142 may comprise a silicon carbonitride film, and the upper support film 144 may comprise a boron-containing silicon nitride film. However, according to embodiments, the materials comprised in the lower support film 142 and the upper support film 144 are not limited to the examples described above, and various modifications and changes can be made within the scope of the inventive concept.

[0080] Reference Figure 8C , can Figure 8B A mask pattern MP is formed on the shaped structure MST in the obtained structure. The mask pattern MP can be used as an etching mask and the insulating film 126 can be used as an etch stop layer to anisotropically etch the shaped structure MST to form multiple holes BH. The mask pattern MP may include a nitride film, an oxide film, a polycrystalline silicon film, a photoresist film, or a combination thereof.

[0081] The process of forming multiple holes BH may also include a wet etching process for etching / processing the structure obtained by anisotropic etching forming structure MST. During the anisotropic etching forming structure MST process and the wet etching process for etching / processing the structure obtained, a portion of the insulating film 126 may also be etched to form an insulating pattern 126P having multiple openings 126H that expose multiple conductive regions 124.

[0082] In an example wet etching process for etching / processing the structure obtained by anisotropic etch-molded structure MST, an etchant comprising a diluted sulfuric acid peroxide (DSP) solution can be used. While using the etchant to wet process the structure obtained by anisotropic etch-molded structure MST, portions of the first molded film 132 and the second molded film 134 exposed to the etchant can be removed. For example, when the first molded film 132 comprises a BPSG film and the concentration of dopant B or dopant P in the BPSG film increases toward the substrate 110, the amount of etching of the first molded film 132 due to the etchant can increase toward the substrate 110. Therefore, the amount of etching of the first molded film 132 due to the etchant can be greater near its bottom surface than near its top surface. Since the lower support film 142 between the first molding film 132 and the second molding film 134 has a thickness smaller than that of the first molding film 132 and the second molding film 134, the portion of the lower support film 142 exposed to the etchant during the wet process can be etched by the etchant together with the first molding film 132 and the second molding film 134.

[0083] As a result, a molding structure pattern MSP defining multiple holes BH can be obtained. The molding structure pattern MSP may include a first molding pattern 132P, a lower support pattern 142P, a second molding pattern 134P, a third molding pattern 136P, and an upper support pattern 144P.

[0084] For wet processes (e.g., wet etching), the etch selectivity of the third molding pattern 136P and the upper support pattern 144P relative to the etchant can be lower than that of the first molding film 132 and the second molding film 134 relative to the etchant. Therefore, during a wet etching process that etches the resulting structure by anisotropically etching the molded structure MST using an etchant, the amount of the third molding film 136 and the upper support film 144 consumed due to the etchant can be very small or very little compared to the amount of the first molding film 132 and the second molding film 134 consumed. For example, the etch rate of the third molding film 136 and the upper support film 144 relative to the etchant (e.g., wet etchant) in the wet etching process can be lower than the etch rate of the first molding film 132 and the second molding film 134 relative to the etchant in the wet etching process. After forming multiple holes BH, the corresponding sidewalls of the multiple holes BH in the defined molding structure pattern MSP of the first molding pattern 132P, the lower support pattern 142P, and the second molding pattern 134P can be closer to the normal direction perpendicular to the main surface of the substrate 110 than the sidewalls of the third molding film 136 and the upper support film 144 defining the multiple holes BH. For example, the lower sidewalls of the holes BH formed by the first molding pattern 132P, the second molding pattern 134P, and the lower support pattern 142P can be steeper than the upper sidewalls of the holes BH (e.g., forming a sharper angle with the vertical direction). The third molding pattern 136P and the upper support pattern 144P can have multiple inclined sidewalls SSW defining the multiple holes BH. Therefore, the portions of the multiple holes BH passing through the third molding film 136 and the upper support film 144 can have different cross-sectional areas, which gradually increase in the direction away from the substrate 110. For example, the cross-sectional area of ​​each hole BH at a higher level can be larger than the cross-sectional area of ​​the same hole BH at a lower level. Multiple inclined sidewalls SSW of the upper support pattern 144P can define multiple holes 144H.

[0085] Reference Figure 8D It can be seen from Figure 8C The resulting structure removes the mask pattern MP, and an upper spacer support film 146 can be formed inside and outside each of the multiple holes BH to cover the upper part of the shaped structure pattern MSP.

[0086] During the formation of the upper spacer support film 146, the upper spacer support film 146 may be non-conformally formed on the molded structural pattern MSP, but may be formed with degraded step coverage. For example, the upper spacer support film 146 may be formed at different locations with different thicknesses. For example, the upper spacer support film 146 may be formed as follows: Figure 8D The structure shown is formed on a portion of the structure obtained in the previous steps.

[0087] In some embodiments, the upper spacer support film 146 can be formed using a chemical vapor deposition (CVD) process or a plasma-enhanced CVD (PECVD) process. In this case, by controlling the deposition atmosphere (e.g., temperature, pressure, plasma formation conditions, etc.) used to form the upper spacer support film 146 or by controlling the flow rate of the source gas taking into account the adhesion coefficient of each atom included in the upper spacer support film 146, the upper spacer support film 146 can be formed to cover only the upper part of the shaped structural pattern MSP.

[0088] The upper spacer support film 146 can be formed to cover only the exposed surfaces of each of the third molding pattern 136P and the upper support pattern 144P located within the plurality of holes BH of the molding structure pattern MSP. The upper spacer support film 146 can cover the molding structure pattern MSP with greater thickness in a direction away from the substrate 110. For example, the thickness of the upper spacer support film 146 can gradually increase from its bottom, which is formed at the same level as the lower surface of the third molding pattern 136P, to its top, which is formed at the same level as the top surface of the molding structure pattern MSP. The lateral width W11 of the portion of the upper spacer support film 146 that covers and / or contacts the sidewall of the third molding pattern 136P can be smaller than the lateral width W12 of the portion of the upper spacer support film 146 that covers and / or contacts the sidewall of the upper support pattern 144P.

[0089] The upper spacer support film 146 may include a silicon carbonitride film, a boron-containing silicon nitride film, or a combination thereof.

[0090] In some embodiments, the upper support pattern 144P and the upper spacer support film 146 may comprise the same material. For example, each of the upper support pattern 144P and the upper spacer support film 146 may comprise a silicon carbonitride film.

[0091] In other embodiments, the upper support pattern 144P and the upper spacer support film 146 may comprise a first material containing the same elements (e.g., the same chemical elements). In this case, the upper support pattern 144P and the upper spacer support film 146 may comprise elements included in the first material in different amounts. For example, each of the upper support pattern 144P and the upper spacer support film 146 may comprise a silicon carbonitride film. In this case, the first carbon atom content of the silicon carbonitride film included in the upper support pattern 144P may be different from the second carbon atom content of the silicon carbonitride film included in the upper spacer support film 146. In some embodiments, the second carbon atom content of the upper spacer support film 146 may be higher than the first carbon atom content of the upper support pattern 144P. In this case, when the upper support pattern 144P and the upper spacer support film 146 are exposed to an etching atmosphere or cleaning atmosphere used for etching another material film during subsequent processes, the etch resistance of the upper support pattern 144P may be improved due to the relatively high carbon content of the upper spacer support film 146 surrounding the upper support pattern 144P.

[0092] In some embodiments, the carbon content of the upper support pattern 144P can be selected in the range of about 3.5 at% to about 4.5 at%, and the carbon content of the upper spacer support film 146 can be selected in the range of about 4.5 at% to about 5.5 at%. For example, the upper support pattern 144P may comprise a silicon carbonitride film having a carbon content of about 3.7 at% to about 4.3 at%, and the upper spacer support film 146 may comprise a silicon carbonitride film having a carbon content of about 4.7 at% to about 5.3 at%. When each of the upper support pattern 144P and the upper spacer support film 146 has too low a carbon content, each of the upper support pattern 144P and the upper spacer support film 146 will have insufficient etch resistance when exposed to an etching atmosphere or a cleaning atmosphere.

[0093] In other embodiments, the upper support pattern 144P and the upper spacer support film 146 may have different densities. For example, the upper support film 144P and the upper spacer support film 146 may comprise materials containing the same elements (e.g., the same chemical elements). In this case, the density of the material included in the upper support pattern 144P may be higher than the density of the material included in the upper spacer support film 146. For example, the upper support pattern 144P may comprise a silicon carbonitride film with a first density, and the upper spacer support film 146 may comprise a silicon carbonitride film with a second density, which is lower than the first density.

[0094] In some other embodiments, the upper support film 144 and the upper spacer support film 146 may comprise different materials. In one example, the upper support film 144 may comprise a silicon carbonitride film, and the upper spacer support film 146 may comprise a boron-containing silicon nitride film. In another example, the upper support film 144 may comprise a boron-containing silicon nitride film, and the upper spacer support film 146 may comprise a silicon carbonitride film.

[0095] However, the materials included in the upper support membrane 144 and the upper spacer support membrane 146 are not limited to the examples described above, and various modifications and changes can be made within the scope of the inventive concept.

[0096] Reference Figure 8E , can Figure 8D A conductive layer 150 is formed on the resulting structure. The conductive layer 150 can be formed to fill a plurality of holes BH and cover the top surface of the spacer support film 146.

[0097] The conductive layer 150 may include a metal film, a conductive metal oxide film, a conductive metal nitride film, a conductive metal nitride film, or a combination thereof. In some embodiments, the conductive layer 150 may include titanium (Ti), Ti oxide, Ti nitride, Ti nitride, cobalt (Co), Co oxide, Co nitride, Co nitride, niobium (Nb), Nb oxide, Nb nitride, Nb nitride, tin (Sn), Sn oxide, Sn nitride, Sn nitride, or a combination thereof. For example, the conductive layer 150 may include TiN, CoN, NbN, SnO2, or a combination thereof, but is not limited thereto. The conductive layer 150 may be formed using CVD processes, PECVD processes, metal-organic CVD (MOCVD) processes, or atomic layer deposition (ALD) processes.

[0098] Reference Figure 8F This can be achieved by performing an etch-back process or a chemical mechanical polishing (CMP) process until the top surface of the uppermost support pattern 144P, which serves as the uppermost layer of the shaped structural pattern MSP, is exposed, and from... Figure 8E The resulting structure removes a portion of the conductive layer 150 and a portion of the upper spacer support film 146. As a result, the conductive layer 150 remains in multiple pores BH (refer to...). Figure 8D The internal portion can form multiple lower electrodes LE, and the upper spacer support film 146 is retained in multiple holes BH (refer to...). Figure 8D The internal part can form multiple upper spacer support patterns 146P.

[0099] Multiple upper spacer support patterns 146P can be retained in multiple annular shapes between the molded structure pattern MSP and multiple lower electrodes LE.

[0100] After forming multiple lower electrodes LE, the space between the upper ends of the multiple lower electrodes LE can be retained in a state filled with an upper support pattern 144P including an inclined sidewall SSW and multiple upper spacer support patterns 146P covering the inclined sidewall SSW of the upper support pattern 144P. Since the multiple upper spacer support patterns 146P are respectively retained between the upper support pattern 144P and the multiple lower electrodes LE, the separation distance between the upper ends of the multiple lower electrodes LE can be larger than the separation distance when the multiple upper spacer support patterns 146P are omitted.

[0101] Reference Figure 8G It can be seen from Figure 8F The resulting structure removes a portion of the upper support pattern 144P and a portion of the multiple upper spacer support patterns 146P to form multiple upper holes UH. Then, the third molding pattern 136P and the second molding pattern 134P can be removed through the multiple upper holes UH, for example, by a wet etching process. Next, the portion of the lower support pattern 142P exposed through the multiple upper holes UH can be removed to form multiple lower holes LH. Then, the first molding pattern 132P can be removed through the multiple lower holes LH, for example, by a wet etching process, to expose the top surface of the insulating pattern 126P.

[0102] By changing the planar shape of each of the multiple upper holes UH and multiple lower holes LH, various modifications can be made to the planar shapes of the upper holes UH and lower holes LH. For example, the upper holes UH and / or lower holes LH can have the following characteristics: Figure 2A The planar shape shown has multiple upper holes UH, having Figure 5A and Figure 5B The planar shape shown has multiple upper holes UH4 and / or has Figure 6A The planar shape of the multiple upper holes UH5 shown is a planar shape.

[0103] After removing the first molding pattern 132P, the second molding pattern 134P and the third molding pattern 136P, the sidewalls of the multiple lower electrodes LE can be exposed, and the upper support pattern 144P and the multiple upper spacer support patterns 146P retained in the space between the multiple lower electrodes LE can form the upper support structure USS.

[0104] A wet etching process for removing the third molded pattern 136P and the second molded pattern 134P, and a wet etching process for removing the first molded pattern 132P, can be performed using an etchant containing ammonium fluoride (NH4F), hydrofluoric acid (HF), and water. During the wet etching process for removing the third molded pattern 136P and the second molded pattern 134P, the portion of the upper spacer support pattern 146P retained between the third molded pattern 136P and the lower electrode LE can also be exposed to the etchant. This is because the portions of the multiple upper spacer support patterns 146P between the third molded pattern 136P and the lower electrode LE have the characteristics described above. Figure 8D The relatively small lateral width W11 described means that during the wet etching process to remove the third molding pattern 136P and the second molding pattern 134P, the lower portion of each of the plurality of upper spacer support patterns 146P exposed to the etchant can also be removed by the etchant. As a result, only portions of the plurality of upper spacer support patterns 146P can be retained between the upper support pattern 144P and the plurality of lower electrodes LE.

[0105] In some embodiments, multiple upper spacer support patterns 146P may not be retained between the top horizontal LV1 of the lower support pattern 142P and the bottom horizontal LV2 of the upper support pattern 144P, allowing the sidewalls of the lower electrode LE to be exposed.

[0106] In other embodiments, in the structure obtained by a wet etching process that removes the third molding pattern 136P and the second molding pattern 134P, at least a portion of the plurality of upper spacer support patterns 146P may be retained extending toward the substrate 110 to a level LV3 lower than the bottom level LV2 of the upper support pattern 144P (see reference). Figure 3 This covers the sidewall of the lower electrode LE located between the top horizontal LV1 of the lower support pattern 142P and the bottom horizontal LV2 of the upper support pattern 144P. In this case, as... Figure 3 As shown, an upper spacer support pattern 246P with protrusions PR2 can be obtained.

[0107] In some other embodiments, during the wet etching process of removing the third molding pattern 136P and the second molding pattern 134P, portions of the plurality of upper spacer support patterns 146P retained between the upper support pattern 144P and the plurality of lower electrodes LE can be removed. As a result, as Figure 4 As shown, multiple upper spacer support patterns 346P can be obtained having a bottom surface RS3 located at a level LV4 that is higher than the bottom level LV2 of the upper support pattern 144P.

[0108] In some other embodiments, during the wet etching process for removing the third pattern 136P and the second pattern 134P, it is possible to... Figure 8FThe resulting structure removes a portion of each of the plurality of lower electrodes LE, a portion of the upper support pattern 144P, and a portion of each of the plurality of upper spacer support patterns 146P. The result is as follows: Figure 7 As shown, an upper support pattern 644P having a top surface 644T and a bottom surface 644B, each having a convex curved surface, a plurality of upper spacer support patterns 646P having a vertical length smaller than the vertical length of the upper support pattern 644P, and a plurality of lower electrodes LE6 having a top surface LE6T, each having a convex curved surface.

[0109] Reference Figure 8H A dielectric film 160 can be formed to cover the exposed surface of the lower electrode LE.

[0110] The dielectric film 160 can be formed using the ALD process. The dielectric film 160 may include, but is not limited to, HfO2, ZrO2, Al2O3, La2O3, Ta2O3, Nb2O5, CeO2, TiO2, GeO2, or combinations thereof.

[0111] After that, it is possible Figure 8H An upper electrode UE is formed on the resulting structure to cover the dielectric film 160, thereby manufacturing... Figure 2B The IC device 100 shown includes a capacitor CP1. The upper electrode UE can be formed using CVD, MOCVD, physical vapor deposition (PVD), or ALD processes.

[0112] In reference Figures 8A to 8H In the described method for manufacturing an IC device, the space between the upper ends of multiple lower electrodes LE can be filled with an upper support pattern 144P and an upper spacer support pattern 146P. Therefore, sufficient spacing can be ensured between the upper ends of the multiple lower electrodes LE. Thus, even if the height of the multiple lower electrodes LE is increased and their aspect ratio is relatively increased to improve capacitance, tilting or collapse of the multiple lower electrodes LE can be prevented. As a result, unwanted short circuits between adjacent lower electrodes LE can be prevented, and the mass production efficiency and reliability of the IC device can be improved.

[0113] Although the inventive concept has been specifically shown and described with reference to embodiments thereof, it will be understood that various changes in form and detail may be made therein without departing from the spirit and scope of the claims.

Claims

1. An integrated circuit device, the integrated circuit device comprising: The lower electrode is formed on the substrate; as well as The upper support structure is configured to support the lower electrode, and the upper support structure is arranged around the lower electrode. The upper support structure includes: an upper support pattern surrounding the lower electrode and extending in a transverse direction parallel to the substrate, the upper support pattern having a hole through which the lower electrode passes; and an upper spacer support pattern located between the upper support pattern and the lower electrode inside the hole, having an outer sidewall in contact with the upper support pattern and an inner sidewall in contact with the lower electrode, wherein the width of the upper spacer support pattern in the transverse direction decreases towards the substrate. The upper support pattern and the upper spacer support pattern include carbon atoms. The carbon atom content of the upper spacer support pattern is higher than that of the upper support pattern.

2. The integrated circuit device according to claim 1, wherein, The upper support pattern has an inclined sidewall, which is located separately from and opposite to the lower electrode. The upper spacer support pattern is located between the inclined sidewall and the lower electrode. The inclined sidewalls of the upper support pattern become closer to the lower electrode in the lateral direction along the direction toward the substrate.

3. The integrated circuit device according to claim 1, wherein, The upper spacer support pattern has an annular shape that is concentrically arranged with the lower electrode and surrounds the upper end of the lower electrode.

4. The integrated circuit device according to claim 1, wherein, The upper spacer support pattern includes a portion of a trapezoidal or triangular cross-sectional shape with a width that decreases in the direction toward the base.

5. The integrated circuit device according to claim 1, wherein, The upper spacer support pattern includes a silicon carbonitride film, a boron-containing silicon nitride film, or a combination thereof.

6. The integrated circuit device according to claim 1, wherein, The upper support pattern and the upper spacer support pattern are made of the same material.

7. The integrated circuit device according to claim 1, wherein, The upper support pattern and the upper spacer support pattern are made of different materials.

8. The integrated circuit device according to claim 1, wherein, The upper support pattern and the upper spacer support pattern contain the same chemical elements, and The content of chemical elements in the upper support pattern and the upper spacer support pattern are different.

9. The integrated circuit device according to claim 1, wherein, The upper support pattern includes a silicon carbonitride film with a first carbon atom content. The upper spacer support pattern includes a silicon carbonitride film with a second carbon atom content.

10. The integrated circuit device according to claim 1, wherein, The upper support pattern has a first carbon atom content selected in the range of 3.5 at% to 4.5 at%, and The upper spacer support pattern has a second carbon atom content selected in the range of 4.5 at% to 5.5 at%.

11. The integrated circuit device according to claim 1, wherein, The upper support pattern has a first density, and The upper spacer support pattern has a second density, which is lower than the first density.

12. The integrated circuit device according to claim 1, wherein, The upper support pattern has: a top surface, including a surface that is convex and curved in a direction away from the substrate; and a bottom surface, including a surface that is convex and curved in a direction toward the substrate.

13. An integrated circuit device, the integrated circuit device comprising: Multiple lower electrodes are arranged on the substrate and spaced apart from each other; The upper support pattern extends in a lateral direction parallel to the substrate and has multiple holes through which the plurality of lower electrodes pass. as well as Multiple upper spacer support patterns are arranged in a one-to-one manner inside the multiple holes, and Each of the plurality of upper spacer support patterns includes an outer sidewall that contacts the upper support pattern and an inner sidewall that contacts a corresponding lower electrode among the plurality of lower electrodes, and has a width that decreases in the lateral direction toward the substrate. Wherein, each of the upper support pattern and the plurality of upper spacer support patterns comprises carbon atoms. In this configuration, the carbon atom content of each of the plurality of upper spacer support patterns is higher than that of the upper support pattern.

14. The integrated circuit device according to claim 13, wherein, The upper support pattern has: a top surface, including a surface that is convex and curved in a direction away from the substrate; And the bottom surface, including the surface that curves and protrudes in the direction toward the base. Each of the plurality of upper spacer support patterns has an annular shape arranged concentrically with and surrounding the corresponding lower electrode. At least one of the plurality of upper spacer support patterns has an open annular shape in which a portion of the closed annular ring has been removed.

15. The integrated circuit device according to claim 13, wherein, Each of the plurality of upper spacer support patterns includes a silicon carbonitride film, a boron-containing silicon nitride film, or a combination thereof.

16. The integrated circuit device according to claim 13, wherein, The density of each of the plurality of upper spacer support patterns is lower than the density of the upper support pattern.

17. The integrated circuit device of claim 13, further comprising a lower support pattern extending laterally between the substrate and the upper support pattern, the lower support pattern being in contact with the plurality of lower electrodes. in, The carbon atom content of each of the plurality of upper spacer support patterns is higher than that of the lower support pattern, and the density of each of the plurality of upper spacer support patterns is lower than that of the lower support pattern.

18. An integrated circuit device, the integrated circuit device comprising: Multiple lower electrodes are arranged on the substrate and spaced apart from each other; The upper support structure includes an upper support pattern and a plurality of upper spacer support patterns. The upper support pattern extends in a transverse direction parallel to the substrate and has a plurality of holes through which the plurality of lower electrodes pass. The plurality of upper spacer support patterns are arranged in a one-to-one manner inside the plurality of holes. The lower support pattern extends laterally between the substrate and the upper support structure and contacts the plurality of lower electrodes; The dielectric film is in contact with the plurality of lower electrodes, the upper support pattern, the plurality of upper spacer support patterns, and the lower support pattern; as well as The upper electrode is located opposite the plurality of lower electrodes, and the dielectric film is located between the upper electrode and the plurality of lower electrodes. Each of the plurality of upper spacer support patterns has an outer sidewall that contacts the interior of a corresponding hole among the plurality of holes and an inner sidewall that contacts a corresponding lower electrode among the plurality of lower electrodes, and has a width in the transverse direction, the width decreasing towards the substrate. The plurality of upper spacer support patterns and upper support patterns include carbon atoms. In this configuration, the carbon atom content of each of the plurality of upper spacer support patterns is higher than that of the upper support pattern.

19. The integrated circuit device according to claim 18, wherein, The lower support pattern and the upper support pattern both use the same material. The lower support pattern comprises carbon atoms, and the carbon atom content of each of the plurality of upper spacer support patterns is higher than that of the lower support pattern. The density of each of the plurality of upper spacer support patterns is lower than the density of each of the lower support patterns and the upper support patterns.

20. The integrated circuit device according to claim 18, wherein, Each of the lower and upper support patterns includes a silicon carbonitride film having a first carbon atom content selected in the range of 3.5 at% to 4.5 at%. Each of the plurality of upper spacer support patterns includes a silicon carbonitride film having a second carbon atom content selected in the range of 4.5 at% to 5.5 at%.

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