Storage device and operation method thereof

Abstract

An operating method for a storage device including one or more non-volatile memories, comprising: storing reference data in a first memory area of ​​the one or more non-volatile memories; when the access frequency of the reference data exceeds a first reference value, storing first copy data identical to the reference data in a second memory area of ​​the one or more non-volatile memories; after the first copy data is stored, when the access frequency of the reference data or the first copy data exceeds the first reference value, storing second copy data identical to the reference data in a third memory area of ​​the one or more non-volatile memories; and managing second and third physical addresses of the second and third memory areas so that the first physical address of the first memory area corresponds to the second and third physical addresses.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims the priority of Korean Patent Application No. 10-2019-0116814 filed in the Korean Intellectual Property Office on September 23, 2019, the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0003] Various example embodiments of the inventive concepts disclosed herein relate to a semiconductor device, and more particularly, to a memory device for managing data stored in a nonvolatile memory and an operating method thereof. Background Art

[0004] Storage devices refer to devices that store data under the control of a host device such as a computer, smart phone, smart tablet, etc. Storage devices include devices that store data on a disk (e.g., a hard disk drive (HDD)) or devices that store data in a semiconductor memory, especially a non-volatile memory (e.g., a solid state drive (SSD) or a memory card).

[0005] Non-volatile memory devices include read only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable and programmable ROM (EEPROM), flash memory, phase-change random access memory (PRAM), magnetic RAM (MRAM), resistive RAM (RRAM), ferroelectric RAM (FRAM), etc.

[0006] In order to store a large amount of data in a storage device with limited capacity, the storage device performs data deduplication. Through deduplication, the storage device can store only one or more of multiple data with the same value. In this way, the amount of data to be stored in the storage device can be reduced. However, in the case where one or more of the multiple data are stored in the storage device through deduplication, the stored data may be frequently accessed. In this case, the performance and reliability of the storage device may decrease. Therefore, it is necessary to ensure the reliability of the storage device while improving the performance of the storage device. Summary of the invention

[0007] Various example embodiments of the inventive concept provide a storage device capable of ensuring reliability of frequently accessed data even if deduplication is performed.

[0008] According to an exemplary embodiment, an operating method of a storage device including one or more non-volatile memories includes: storing reference data in a first memory area of ​​the one or more non-volatile memories; when an access frequency of the reference data exceeds a first reference value, storing first copy data identical to the reference data in a second memory area of ​​the one or more non-volatile memories; after the first copy data is stored, when an access frequency of the reference data or the first copy data exceeds the first reference value, storing second copy data identical to the reference data in a third memory area of ​​the one or more non-volatile memories; and, as the first copy data and the second copy data are stored in the one or more non-volatile memories, managing a second physical address of the second memory area and a third physical address of the third memory area so that the first physical address of the first memory area corresponds to the second physical address and the third physical address.

[0009] According to an exemplary embodiment, an operating method of a storage device including one or more non-volatile memories includes: storing reference data in a first memory area of ​​the one or more non-volatile memories; storing a deduplication ratio of the reference data; when the deduplication ratio of the reference data exceeds a reference ratio, storing first copy data identical to the reference data in a second memory area of ​​the one or more non-volatile memories; after the first copy data is stored, when an access frequency of one of the reference data and the first copy data exceeds a first reference value, storing second copy data identical to the reference data in a third memory area of ​​the one or more non-volatile memories; and, as the first copy data and the second copy data are stored in the one or more non-volatile memories, managing a second physical address of the second memory area and a third physical address of the third memory area so that the first physical address of the first memory area corresponds to the second physical address and the third physical address.

[0010] According to an exemplary embodiment, a storage device includes: one or more non-volatile memories, including a first memory area configured to store reference data, and a memory controller. The storage device is configured so that when the access frequency of the reference data exceeds a first reference value, the memory controller stores the first copy data identical to the reference data in a second memory area of ​​the one or more non-volatile memories. The storage device is configured so that after the first copy data is stored, when the access frequency of one of the reference data and the first copy data exceeds the first reference value, the memory controller stores the second copy data identical to the reference data in a third memory area of ​​the one or more non-volatile memories. The memory controller is configured to: as the first copy data is stored in the second memory area, store the second physical address of the second memory area in an address management table so as to correspond to the first physical address of the first memory area; and, as the second copy data is stored in the third memory area, store the third physical address of the third memory area in the address management table so as to correspond to the second physical address. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] The above and other objects and features of the present inventive concept will become apparent by describing in detail exemplary embodiments of the present inventive concept with reference to the attached drawings.

[0012] Figure 1 is a block diagram illustrating a memory system according to an example embodiment of the inventive concept.

[0013] Figure 2 is a diagram showing a method according to an example embodiment Figure 1 A block diagram of an exemplary configuration of a memory controller.

[0014] Figure 3 According to an example embodiment, Figure 1 An example of data removal performed by a storage device.

[0015] Figure 4 is a diagram showing a method according to an example embodiment Figure 1 A flowchart of exemplary operations of a storage device copying reference data.

[0016] Figure 5 is a diagram showing a method according to an example embodiment Figure 1 A flowchart of another exemplary operation of a storage device copying reference data.

[0017] Figure 6 is a diagram showing a method according to an example embodiment Figure 1 A flowchart of another exemplary operation of a storage device copying reference data.

[0018] Fig. 7A and 7BFIG. 1 shows an exemplary embodiment of the present invention. Figure 1 An example of generating replicated data for a storage device.

[0019] Figure 8 is a diagram showing a method according to an example embodiment Figure 1 A flowchart of a read operation of a storage device reading reference data.

[0020] Fig. 9 FIG. 1 shows an exemplary embodiment of the present invention. Figure 1 An example of performing a read operation on a storage device.

[0021] Fig.10 is a diagram showing a method according to an example embodiment Figure 1 A flowchart of example operations of a storage device to remove reference data or copy data.

[0022] Fig.11A and Fig. 11B FIG. 1 shows an exemplary embodiment of the present invention. Figure 1 An example of removing duplicate data from a storage device.

[0023] Fig. 12A and Fig. 12B FIG. 1 shows an exemplary embodiment of the present invention. Figure 1 An example of removing reference data from a storage device.

[0024] Fig.13 is a block diagram illustrating an SSD system according to an example embodiment of the inventive concept. DETAILED DESCRIPTION

[0025] Below, various exemplary embodiments of the inventive concept may be described in detail and clearly to such an extent that a person having ordinary skill in the art can easily implement the inventive concept.

[0026] Figure 1 1 is a block diagram illustrating a storage system according to an example embodiment of the present invention. The storage system 1000 may include a storage device 100 and a host device 200. In some embodiments, the storage system 1000 may be implemented with one electronic device. For example, the storage system 1000 may be one of various electronic devices such as a home appliance, a desktop computer, a laptop computer, a tablet computer, a smart phone, an electric vehicle, a wearable device, a video game console, etc. In an example embodiment, the storage system 1000 may be implemented with a plurality of electronic devices. For example, the storage device 100 and the host device 200 may be separate electronic devices and may be connected locally or remotely to implement the storage system 1000.

[0027] The host device 200 may control various operations of the storage device 100. To this end, the host device 200 may send a command CMD to the storage device 100. For example, in order to store data "DATA" in the storage device 100, the host device 200 may send a command CMD (e.g., a write command) indicating a write operation, an address ADDR, and data "DATA" to the storage device 100. The storage device 100 may store the data "DATA" in response to the write command CMD. For example, in order to output data "DATA" from the storage device 100, the host device 200 may send a command CMD (e.g., a read command) indicating a read operation and an address ADDR to the storage device 100. The storage device 100 may output the data "DATA" to the host device 200 in response to the read command CMD.

[0028] In an example embodiment, the host device 200 may be implemented to include one or more processor cores. For example, the host device 200 may include a general-purpose processor, a dedicated processor, or an application processor. The host device 200 may be the processor itself, or may be an electronic device or system including (multiple) processors.

[0029] The storage device 100 may include one or more non-volatile memories 110 and a memory controller 120. Figure 1 In the embodiment, the one or more nonvolatile memories 110 include first, second and third nonvolatile memories 111, 112 and 113. However, the inventive concept is not limited thereto. For example, the number of nonvolatile memories included in the storage device 100 may be variously changed or modified.

[0030] Each of the first, second and third nonvolatile memories 111, 112 and 113 can store data "DATA" provided by the host device 200. To this end, each of the first, second and third nonvolatile memories 111, 112 and 113 may include a memory area for storing the data "DATA". For example, when each of the first, second and third nonvolatile memories 111, 112 and 113 includes a NAND-type flash memory, each of the first, second and third nonvolatile memories 111, 112 and 113 may include a memory cell array of memory cells formed along a plurality of word lines and a plurality of bit lines. However, the inventive concept is not limited thereto. For example, each of the first, second and third nonvolatile memories 111, 112 and 113 may include one or more of various nonvolatile memories such as phase change random access memory (PRAM), magnetic random access memory (MRAM), resistive random access memory (RRAM or ReRAM) and ferroelectric random access memory (FRAM).

[0031] The memory controller 120 may control the overall operation of the storage device 100. For example, the memory controller 120 may schedule the operation of the nonvolatile memory 110, or may encode and decode data processed in the storage device 100. For example, under the control of the memory controller 120, an internal management operation (e.g., a read reclaim operation or a garbage collection operation) may be performed on the data stored in the nonvolatile memory 110. For example, under the control of the memory controller 120, data "DATA" provided from the host device 200 may be stored in the nonvolatile memory 110, or data "DATA" output from the nonvolatile memory 110 may be provided to the host device 200.

[0032] In an exemplary embodiment, the first, second, and third nonvolatile memories 111, 112, and 113 may be implemented with different semiconductor dies or semiconductor chips and may be mounted on a printed circuit board (PCB) included in the memory device 100. In this case, the memory controller 120 may control the first, second, and third nonvolatile memories 111, 112, and 113 in parallel. For example, the memory controller 120 may output data stored in the first nonvolatile memory 111, the second nonvolatile memory 112, and the third nonvolatile memory 113 in parallel from the first nonvolatile memory 111, the second nonvolatile memory 112, and the third nonvolatile memory 113, respectively.

[0033] In an exemplary embodiment, the memory controller 120 may perform deduplication so that data having the same value is not copied in a write operation and is not stored in the nonvolatile memory 110. For example, when a write request for data "DATA" is received from the host device 200, the memory controller 120 may compare the data "DATA" provided from the host device 200 with the data previously stored in the nonvolatile memory 110. When the same data as the data "DATA" provided from the host device 200 is previously stored in the nonvolatile memory 110, the write-requested data "DATA" may not be stored in the nonvolatile memory 110. For example, only one or more data among a plurality of data may be stored in the nonvolatile memory 110 through deduplication. Hereinafter, for the convenience of description, data stored in the nonvolatile memory 110 according to deduplication among a plurality of data having the same value is referred to as "reference data".

[0034] In an exemplary embodiment, the memory controller 120 may copy the reference data according to the information about the reference data, and may store the copied data in the nonvolatile memory 110. For example, the memory controller 120 may copy the reference data based on the access frequency of the reference data (i.e., the number of accesses per unit time). The reference data may be accessed for various reasons (e.g., when storing, reading, or modifying the reference data). When the access frequency of the reference data exceeds a first reference value, the memory controller 120 may copy the reference data. In the case of storing the reference data and the copied data in the nonvolatile memory 110, since the access to the reference data is distributed to the copied data, the number of direct accesses to the reference data or the direct access frequency of the reference data may be reduced.

[0035] In an exemplary embodiment, the memory controller 120 may remove the reference data or the duplicate data stored in the nonvolatile memory 110 (or invalidate the reference data or the duplicate data stored in the nonvolatile memory 110) according to the information associated with the reference data and the duplicate data. For example, when the access frequency of the reference data and the duplicate data is the second reference value or less, the memory controller 120 may remove the reference data or the duplicate data. In this way, among the multiple data having the same value, the remaining data except for only one or more data may be removed from the nonvolatile memory 110. Here, removing the data or invalidating the data may mean physically erasing the data of the storage unit, or may mean releasing the address mapping associated with the physical address of the stored data.

[0036] As described above, the memory controller 120 can copy frequently accessed reference data (i.e., hot data) while performing deduplication. In this way, errors caused by excessive access to reference data (e.g., errors caused by read interference) can be prevented, and thus the reliability of the storage device 100 can be improved. In addition, when the data is rarely accessed, the memory controller 120 can remove the reference data or copy the data (i.e., cold data). In this way, the memory controller 120 can ensure the available capacity of the non-volatile memory 110 while maintaining the reliability of the data.

[0037] In order to perform the operations described above and the operations to be described below, the memory controller 120 may include hardware components, software components, or a hybrid thereof. For example, the memory controller 120 may include a dedicated hardware circuit configured to perform a specific operation. Additionally or alternatively, the memory controller 120 may include one or more processor cores that run an instruction set of a program code configured to perform a specific operation.

[0038] Figure 2 is a diagram showing a method according to an example embodiment Figure 1For simplicity of description, Figure 2 Only some components of the memory controller 120 are shown in FIG. However, the inventive concept is not limited thereto. For example, the memory controller 120 may further include any other components such as an error correction code (ECC) circuit.

[0039] Reference Figure 2 , the memory controller 120 may include a system bus 121 , a processor 122 , a random access memory (RAM) 123 , a read only memory (ROM) 124 , a host interface 125 , a memory interface 126 , and a data deduplication device 127 .

[0040] The system bus 121 is configured to provide a channel between the components of the memory controller 120. The processor 122 may control the overall operation of the memory controller 120. The RAM 123 may be used as a buffer memory, a cache memory, or a working memory of the memory controller 120. The RAM 123 may store codes and commands executed by the processor 122. The RAM 123 may store data processed by the processor 122. The ROM 124 may store various information required for the memory controller 120 to operate in the form of firmware.

[0041] The memory controller 120 may communicate with the host device 200 through the host interface 125. The memory controller 120 may communicate with the nonvolatile memory 110 through the memory interface 126.

[0042] In an exemplary embodiment, a flash translation layer (FTL) 128 may be stored in the RAM 123. The FTL 128, which is a software layer for executing software operations of the memory controller 120, may be driven by the processor 122. The FTL 128 may perform various maintenance operations between the host device 200 and the nonvolatile memory 110 so that the nonvolatile memory 110 is efficiently used.

[0043] For example, the FTL 128 may perform a conversion operation between a logical address and a physical address. The logical address may be information managed by a file system of the host device 200, and an address ADDR sent from the host device 200 to the storage device 100 may correspond to the logical address. The physical address is information indicating a physical location of a memory area of ​​the nonvolatile memory 110 storing data. The FTL 128 may manage an address conversion operation through an address mapping table.

[0044] In an exemplary embodiment, the FTL 128 may manage metadata associated with the physical address. For example, the FTL 128 may manage read counts, write times, program / erase (P / E) cycles, etc. associated with data stored in an area corresponding to the physical address. In this case, the metadata corresponding to the physical address may be stored in the RAM 123.

[0045] The data deduplication device 127 may drive the FTL 128 and may perform data deduplication. In an exemplary embodiment, the data deduplication device 127 may perform deduplication on data having the same value according to a deduplication ratio. For example, in the case where the deduplication ratio is 20:1, the data deduplication device 127 may store one of 20 data having the same value in the nonvolatile memory 110 as reference data. For example, a deduplication ratio of 20:1 may mean that data twenty times more than the physical space required to store the data is protected. In an exemplary embodiment, the deduplication ratio of a memory area may be a ratio of an address space having deduplicated data to a total address space of a memory area corresponding to duplicate data. In other exemplary embodiments, the deduplication ratio of a memory area may be calculated by a ratio of the number of logical addresses having deduplicated data to the number of total logical addresses of a memory area corresponding to duplicate data. The deduplication ratio may vary according to a request of the host device 200 or an internal algorithm of the memory controller 120. The deduplication ratio may be managed differently for each data. For example, in the case where an image or image data is provided to storage device 100, a deduplication ratio associated with the image or image data may be increased. For example, the deduplication ratio may vary according to an operating condition (or status) of storage device 100. In some examples, the deduplication ratio may be stored in the storage device.

[0046] The data deduplicator 127 may duplicate the reference data according to information associated with the reference data (eg, access frequency), or may remove the reference data or the duplicate data according to information associated with the reference data or the duplicate data (eg, access frequency).

[0047] Example embodiments are Figure 2 128. In the figure, the data deduplication device 127 is shown to be independent of the processor 122 or the FTL 128, but the inventive concept is not limited thereto. For example, operations associated with data deduplication, data replication, and data removal of the data deduplication device 127 may be performed by the processor 122 or the FTL 128.

[0048] Figure 3 According to an example embodiment, Figure 1 Example embodiment of data deduplication performed by a storage device. Figure 3, the memory controller 120 may perform data deduplication based on an address mapping table AMT including mapping information of logical addresses and physical addresses. For example, the address mapping table AMT may be stored in Figure 2 The RAM 123 and may be managed by the FTL 128 .

[0049] The memory controller 120 may receive a command CMD indicating a write operation WR, an address ADDR, and data "DATA" from the host device 200. For example, the memory controller 120 may sequentially receive first to fourth logical addresses LA1 to LA4 as the address ADDR and data DATA1, DATA2, DATA1, and DATA1. In this case, the data DATA1, DATA2, DATA1, and DATA1 may correspond to the first to fourth logical addresses LA1 to LA4, respectively. The memory controller 120 may perform a write operation according to the order in which the address ADDR and the data "DATA" are received.

[0050] First, upon receiving the first logical address LA1 and the first data DATA1, the memory controller 120 may determine whether the same data as the first data DATA1 exists in the nonvolatile memory 110. For example, the controller 120 may store data stored in an area corresponding to a specific physical address of the nonvolatile memory 110 in an internal memory of the memory controller 120 (e.g., Figure 2 The memory controller 120 may compare the first data DATA1 with the data pre-stored in the internal memory. When it is determined that the data identical to the first data DATA1 does not exist in the internal memory, such as Figure 3 As shown, the memory controller 120 may store the first data DATA1 in the first nonvolatile memory 111. In this case, the first nonvolatile memory 111 may store the first data DATA1 in the first memory area MA1. The first memory area MA1 may correspond to the first physical address PA1. As the first data DATA1 is stored in the first memory area MA1, the memory controller 120 may store mapping information of the first logical address LA1 and the first physical address PA1 in the address mapping table AMT.

[0051] Next, in the case of receiving the second logical address LA2 and the second data DATA2, the memory controller 120 may determine whether the same data as the second data DATA2 exists in the nonvolatile memory 110. When it is determined that the same data as the second data DATA2 does not exist in the nonvolatile memory 110, as shown in FIG. Figure 3As shown, the memory controller 120 may store the second data DATA2 in the second nonvolatile memory 112. In this case, the second nonvolatile memory 112 may store the second data DATA2 in the second memory area MA2. The second memory area MA2 may correspond to the second physical address PA2. As the second data DATA2 is stored in the second memory area MA2, the memory controller 120 may store mapping information of the second logical address LA2 and the second physical address PA2 in the address mapping table AMT.

[0052] Third, in the case of receiving the third logical address LA3 and the first data DATA1, the memory controller 120 may determine whether the same data as the first data DATA1 exists in the nonvolatile memory 110. Figure 3 As shown, since the first data DATA1 is pre-stored in the first non-volatile memory 111, the memory controller 120 may determine that the same data as the first data DATA1 exists in the non-volatile memory 110. In this way, the memory controller 120 may not store the received first data DATA1 in the non-volatile memory 110 to remove duplication. Since the received first data DATA1 is pre-stored in the first memory area MA1 corresponding to the first physical address PA1, the memory controller 120 may store mapping information of the third logical address LA3 and the first physical address PA1 in the address mapping table AMT.

[0053] Fourth, in the case of receiving the fourth logical address LA4 and the first data DATA1, as described above, the memory controller 120 may not store the received first data DATA1 in the nonvolatile memory 110 for deduplication. Because the received first data DATA1 is pre-stored in the first memory area MA1 corresponding to the first physical address PA1, the memory controller 120 may store mapping information of the fourth logical address LA4 and the first physical address PA1 in the address mapping table AMT.

[0054] As described above, the first data DATA1 corresponding to the first logical address LA1, the third logical address LA3, and the fourth logical address LA4 may be stored only once in the first nonvolatile memory 111 according to the deduplication operation of the memory controller 120. In addition, the second data DATA2 corresponding to the second logical address LA2 may be stored only once in the second nonvolatile memory 112. For example, since the first data DATA1 and the second data DATA2 are stored in the nonvolatile memory 110 according to the deduplication, the first data DATA1 and the second data DATA2 may be reference data.

[0055] Example embodiments are Figure 3 1 and 11 are shown as being stored in the first nonvolatile memory 111 and the second nonvolatile memory 112 , but the inventive concept is not limited thereto. For example, the first data DATA1 and the second data DATA2 may be stored in any memory area of ​​the nonvolatile memory 110 .

[0056] Next, we will refer to Figures 4 to 6 , Fig. 7A and Figure 7B An operation of the storage device 100 to copy reference data stored according to deduplication is described in detail.

[0057] Figure 4 is a diagram showing a method according to an example embodiment Figure 1 Flow chart of an exemplary operation of copying reference data by a storage device. Figure 1 and Figure 4 In operation S101, the storage device 100 may store reference data in a nonvolatile memory. For example, the reference data may be data stored in the nonvolatile memory according to deduplication among a plurality of data having the same value.

[0058] In operation S102, the storage device 100 may determine whether the access frequency of the reference data exceeds a first reference value. For example, the storage device 100 may determine whether the read count associated with the reference data exceeds the first reference value within a specific time period. For example, assuming Figure 3 If the first data DATA1 is reference data, the read count associated with the reference data (e.g., DATA1) may be increased according to a read operation corresponding to one of the first logical address LA1, the third logical address LA3, and the fourth logical address LA4. In this way, the access frequency of the reference data (e.g., DATA1) may be increased.

[0059] When the access frequency of the reference data exceeds the first reference value, in operation S103, the storage device 100 may generate duplicate data associated with the reference data (e.g., DATA1), and may store the duplicate data in a nonvolatile memory. For example, the storage device 100 may store the duplicate data in a nonvolatile memory different from the nonvolatile memory storing the reference data (e.g., DATA1). In this way, the duplicate data having the same value as the reference data (e.g., DATA1) may be stored in the nonvolatile memory.

[0060] In operation S104, the storage device 100 may determine whether the access frequency of the reference data or the duplicate data exceeds the first reference value. When the access frequency of the reference data or the duplicate data exceeds the first reference value, in operation S103, the storage device 100 may generate duplicate data associated with the reference data, and may store the duplicate data in a non-volatile memory. In this way, a plurality of duplicated data may be generated. In this case, the storage device 100 may store the new duplicate data in a non-volatile memory different from the non-volatile memory storing the reference data and the existing duplicate data.

[0061] For example, even if access to the reference data is distributed to the duplicate data, when the reference data continues to be frequently accessed, the storage device 100 may continue to generate the duplicate data through operations S103 and S104.

[0062] As described above, even if the storage device 100 performs deduplication, the storage device 100 can generate duplicate data according to the access frequency of the data. In the case where the data continues to be frequently accessed even after the duplicate data is generated, the storage device 100 can generate duplicate data additionally. In this way, the access operation to the reference data can be distributed, and errors caused by frequent access to the reference data can be reduced. Therefore, the reliability of the storage device 100 can be improved. In addition, in the case where the duplicate data is stored in a non-volatile memory different from the non-volatile memory storing the reference data, the reference data and the duplicate data can be output in parallel. Therefore, the speed of reading the reference data can be increased.

[0063] Figure 5 is a diagram showing a method according to an example embodiment Figure 1 A flowchart of another exemplary operation of a storage device to copy reference data. Figure 1 and Figure 5 , in operation S111, the storage device 100 may store reference data in a nonvolatile memory.

[0064] In operation S112, the storage device 100 may determine whether a deduplication ratio associated with the reference data exceeds a reference ratio (eg, a preset threshold ratio). Figure 3 If the first data DATA1 is reference data, the storage device 100 may determine whether the deduplication ratio associated with the first data DATA1 exceeds the reference ratio. Figure 3 As shown), the deduplication ratio of the first data DATA1 is 3:1.

[0065] When the deduplication ratio associated with the first data DATA1 exceeds the reference ratio, in operation S113, the storage device 100 may generate duplicate data associated with the reference data and may store the duplicate data in a nonvolatile memory. For example, the storage device 100 may store the duplicate data in a nonvolatile memory different from the nonvolatile memory storing the reference data.

[0066] In operation S114, the storage device 100 may determine whether the access frequency of the reference data or the copy data exceeds the first reference value. When the access frequency of the reference data or the copy data exceeds the first reference value, in operation S113, the storage device 100 may generate copy data associated with the reference data, and may store the copy data in a non-volatile memory. In this way, a plurality of copied data may be generated. In this case, the storage device 100 may store the new copy data in a non-volatile memory different from the non-volatile memory storing the reference data and the existing copy data.

[0067] As described above, even if the storage device 100 performs deduplication, the storage device 100 may generate duplicate data according to a deduplication ratio associated with the data and an access frequency of the data.

[0068] Figure 6 is a diagram showing a method according to an example embodiment Figure 1 A flowchart of another exemplary operation of a storage device to copy reference data. Figure 1 and Figure 6 , in operation S121, the storage device 100 may store reference data in a nonvolatile memory.

[0069] In operation S122, the storage device 100 may determine whether the data retention time associated with the reference data exceeds the reference time. For example, the storage device 100 may calculate the data retention time based on the time when the reference data is written to the nonvolatile memory (hereinafter referred to as "write time"), and may determine whether the calculated data retention time exceeds the reference time. When the calculated data retention time exceeds the reference time, the reliability of the data may be reduced because the possibility of the value of the reference data changing increases.

[0070] When the data retention time associated with the reference data exceeds the reference time, in operation S123, the storage device 100 may generate duplicate data associated with the reference data and may store the duplicate data in a nonvolatile memory. For example, the storage device 100 may store the duplicate data in a nonvolatile memory different from the nonvolatile memory storing the reference data.

[0071] In operation S124, the storage device 100 may determine whether the data retention time associated with the latest duplicate data exceeds the reference time. When the data retention time exceeds the reference time, in operation S123, the storage device 100 may generate duplicate data and may store the duplicate data in a non-volatile memory. In this way, a plurality of duplicate data may be generated. In this case, the storage device 100 may store the new duplicate data in a non-volatile memory different from the non-volatile memory storing the reference data and the existing duplicate data.

[0072] As described above, even if the storage device 100 performs deduplication, the storage device 100 can generate duplicate data according to the data retention time. In the case where the data retention time associated with the duplicate data exceeds the reference time even after the duplicate data is generated, the storage device 100 can additionally generate duplicate data. In this way, errors caused by changes in the value of the reference data over time can be reduced. Therefore, the reliability of the storage device 100 can be improved.

[0073] Fig. 7A and Figure 7B FIG. 1 shows an exemplary embodiment of the present invention. Figure 1 For ease of description, assume that according to reference Figure 3 1. According to the deduplication operation described above, the reference data rDATA is stored in the first memory area MA1 corresponding to the first physical address PA1.

[0074] Reference Fig. 7A , the memory controller 120 may generate the duplicate data based on a physical address management table PAMT for managing metadata associated with the physical address. The physical address management table PAMT may include fields for the physical address to which the data is written, the read count of the data, the write time, and the duplicate data address. Here, the duplicate data address represents the physical address of the memory area where the duplicate data is stored when the duplicate data associated with the reference data is generated. For example, when the duplicate data associated with the reference data is not generated, the duplicate data address corresponding to the physical address of the reference data may be a null value. For example, the physical address management table PAMT may be stored in Figure 2 The RAM 123 and may be managed by the FTL 128 .

[0075] When the reference data rDATA is stored in the first memory area MA1, the memory controller 120 may add information about the first physical address PA1 to the physical address management table PAMT. For example, the memory controller 120 may store the first read count RC1 as the read count of the reference data rDATA in the physical address management table PAMT, and may store the first write time WT1 as the write time in the physical address management table PAMT. The memory controller 120 may monitor the access operation to the reference data rDATA, and may update the first read count RC1 according to the monitoring result. Fig. 7A Not shown in FIG. 1 , the memory controller 120 may manage a deduplication ratio associated with the reference data rDATA.

[0076] The memory controller 120 may generate the first duplicate data dDATA1 according to information associated with the reference data rDATA. Figure 4 ), the memory controller 120 may generate the first duplicate data dDATA1 associated with the reference data rDATA according to the first read count RC1 corresponding to the reference data rDATA. For example, the memory controller 120 may calculate the access frequency of the reference data rDATA according to the increment of the first read count RC1 within a specific time period. In the case where the access frequency of the reference data rDATA exceeds the first reference value, the memory controller 120 may generate the first duplicate data dDATA1 associated with the reference data rDATA.

[0077] In another exemplary embodiment (see Figure 5 ), the memory controller 120 may generate the first duplicate data dDATA1 associated with the reference data rDATA according to the deduplication ratio corresponding to the reference data rDATA. For example, when the deduplication ratio exceeds the reference ratio, the memory controller 120 may generate the first duplicate data dDATA1.

[0078] In another exemplary embodiment (see Figure 6 ), the memory controller 120 may generate the first duplicate data dDATA1 associated with the reference data rDATA according to the first write time WT1 corresponding to the reference data rDATA. For example, the memory controller 120 may calculate the data retention time based on the first write time WT1 and the current time. In the case where the data retention time associated with the reference data rDATA exceeds the reference time, the memory controller 120 may generate the first duplicate data dDATA1 associated with the reference data rDATA.

[0079] The memory controller 120 may store the first copy data dDATA1 in the second memory area MA2 of the second nonvolatile memory 112 different from the first memory area MA1 of the first nonvolatile memory 111 storing the reference data rDATA.

[0080] The memory controller 120 may store the second physical address PA2 of the second memory area MA2 storing the first duplicate data dDATA1 in the physical address management table PAMT so as to correspond to the first physical address PA1. As the first duplicate data dDATA1 is stored in the second memory area MA2, the memory controller 120 may add metadata corresponding to the second physical address PA2 to the physical address management table PAMT. For example, the memory controller 120 may store the second read count RC2 as the read count of the first duplicate data dDATA1 in the physical address management table PAMT, and may store the second write time WT2 as the write time in the physical address management table PAMT. The memory controller 120 may monitor the access operation to the first duplicate data dDATA1, and may update the second read count RC2 according to the monitoring result.

[0081] refer to Figure 7B ,exist Fig. 7A After storing the first duplicate data dDATA1 in the memory controller 120, the memory controller 120 may generate the second duplicate data dDATA2 according to the information associated with the reference data rDATA or the first duplicate data dDATA1. Figure 4 and Figure 5 ), the memory controller 120 may generate the second duplicate data dDATA2 associated with the reference data rDATA according to the first read count RC1 corresponding to the reference data rDATA or the second read count RC2 corresponding to the first duplicate data dDATA1. For example, the memory controller 120 may calculate the first access frequency of the reference data rDATA according to the increment of the first read count RC1 within a specific time period, and may calculate the second access frequency of the first duplicate data dDATA1 according to the increment of the second read count RC2 within a specific time period. In the case where the first access frequency or the second access frequency exceeds the first reference value, the memory controller 120 may generate the second duplicate data dDATA2 associated with the reference data rDATA.

[0082] In another exemplary embodiment (see Figure 6), the memory controller 120 may generate the second replicated data dDATA2 associated with the reference data rDATA according to the second write time WT2 corresponding to the first replicated data dDATA1. For example, the memory controller 120 may calculate the data retention time associated with the second replicated data dDATA2 based on the second write time WT2 and the current time. In the case where the data retention time associated with the second replicated data dDATA2 exceeds the reference time, the memory controller 120 may generate the second replicated data dDATA2 associated with the reference data rDATA. In this case, the memory controller 120 may generate the second replicated data dDATA2 based on the second write time WT2 corresponding to the first replicated data dDATA1.

[0083] The memory controller 120 may store the second duplicate data dDATA2 in a third memory area MA3 of the third nonvolatile memory 113 different from the first and second memory areas MA1 and MA2 of the first and second nonvolatile memories 111 and 112 storing the reference data rDATA and the first duplicate data dDATA1 , respectively.

[0084] The memory controller 120 may store the third physical address PA3 of the third memory area MA3 storing the second duplicate data dDATA2 in the physical address management table PAMT so as to correspond to the second physical address PA2. In this way, the first physical address PA1 corresponding to the reference data rDATA may indicate the second physical address PA2, and the second physical address PA2 may indicate the third physical address PA3. For example, the first to third physical addresses PA1 to PA3 corresponding to the reference data rDATA and the first and second duplicate data dDATA1 and dDATA2 may be managed in the form of a linked list in the physical address management table PAMT. In this way, the second and third physical addresses PA2 and PA3 may correspond to the first physical address PA1.

[0085] As the second duplicate data dDATA2 is stored in the third memory area MA3, the memory controller 120 may add metadata corresponding to the third physical address PA3 to the physical address management table PAMT. For example, the memory controller 120 may store the third read count RC3 as the read count of the second duplicate data dDATA2 in the physical address management table PAMT, and may store the third write time WT3 as the write time in the physical address management table PAMT. The memory controller 120 may monitor the access operation to the second duplicate data dDATA2, and may update the third read count RC3 according to the monitoring result.

[0086] As described above, the link relationship between the physical addresses of the reference data and the copy data can be managed by the physical address management table PAMT, but the present invention is not limited thereto. Figure 3 The address mapping table AMT is used to manage the link relationship between the physical addresses of written reference data and copied data.

[0087] refer to Fig. 7A and 7B The description is given as reference data and copy data are stored in different non-volatile memories, but the inventive concept is not limited thereto. For example, the reference data and copy data may be stored in the same non-volatile memory (e.g., the first non-volatile memory 111). In this case, in order to reduce read disturbance, the reference data and copy data may not be stored in adjacent memory areas.

[0088] As described above, the storage device 100 can generate the duplicate data according to the access frequency of the reference data rDATA. The access frequency of the reference data rDATA can be calculated based on the access frequency of the memory area storing the reference data rDATA, but the inventive concept is not limited thereto. For example, the access frequency of the reference data rDATA can be calculated based on the access frequency of the memory area storing the reference data rDATA and the access frequency of a specific memory area (e.g., a memory area adjacent to the memory area storing the reference data rDATA) (hereinafter, an example of an adjacent memory area is used as a specific memory area).

[0089] Next, we will refer to Figure 8 and Fig. 9 An operation of reading the reference data rDATA stored in the nonvolatile memory 110 is described in more detail.

[0090] Figure 8 is a diagram showing a method according to an example embodiment Figure 1 Flow chart of a read operation of a storage device reading reference data. Figures 4 to 6 , Fig. 7A and Figure 7B As described, the process may be performed after storing the replicated data associated with the reference data in the non-volatile memory. Figure 8 The operation shown.

[0091] Reference Figure 1 and Figure 8 In operation S131, the storage device 100 may receive a read request for reference data. For example, the storage device 100 may receive a read command associated with the reference data from the host device 200.

[0092] In operation S132, the storage device 100 may select one of the reference data and the copy data. Since the copy data has the same value as the reference data, the selected data may be the same as the reference data of the read request. In an exemplary embodiment, the storage device 100 may select data based on a read count of the reference data, the number of P / E cycles, and a read count of data stored in an adjacent memory area. For example, the storage device 100 may select data having a minimum read count from the reference data and the copy data.

[0093] For another example, the storage device 100 may select data according to a given order. For example, in the case where there is reference data and two replicated data, the storage device 100 may select the reference data in response to a first read command. The storage device 100 may select one replicated data in response to a second read command, and may select another replicated data in response to a third read command.

[0094] In operation S133 , the storage device 100 may output the selected data. For example, the storage device 100 may provide the selected data to the host device 200 .

[0095] As described above, in the case of receiving a read request for reference data, the storage device 100 can output the duplicate data, and thus can distribute access to the reference data. In this way, errors due to read disturbance can be reduced, and the reliability of data can be improved.

[0096] Reference Figure 8 The described read operation of the storage device 100 is an exemplary operation, and the inventive concept is not limited thereto. For example, in the case of receiving a read request for reference data from the host device 200, the storage device 100 may output a sector corresponding to a portion of the reference data and a sector corresponding to a portion of the copy data, and may provide data having the same value as the reference data to the host device 200 based on the output sectors.

[0097] Fig. 9 FIG. 1 shows an exemplary embodiment of the present invention. Figure 1 For ease of description, it is assumed that according to a deduplication operation of the storage device 100, the reference data rDATA is stored in the first memory area MA1 corresponding to the first physical address PA1, and the address mapping table AMT of the memory controller 120 stores the first physical address PA1 so as to correspond to the first to third logical addresses LA1 to LA3.

[0098] refer to Fig. 9, the nonvolatile memory 110 may store the reference data rDATA and the first and second copy data dDATA1 and dDATA2, as shown in FIG. Figures 4 to 6 , 7A and 7B. The reference data rDATA may be stored in the first memory area MA1 of the first nonvolatile memory 111, the first copy data dDATA1 may be stored in the second memory area MA2 of the second nonvolatile memory 112, and the second copy data dDATA2 may be stored in the third memory area MA3 of the third nonvolatile memory 113. In this way, metadata corresponding to the first to third physical addresses PA1 to PA3 may be stored in the physical address management table PAMT of the memory controller 120.

[0099] The memory controller 120 may receive a command CMD indicating a read operation RD for reading the reference data rDATA and an address ADDR from the host device 200. For example, the address ADDR may include one of the first logical address LA1, the second logical address LA2, or the third logical address LA3.

[0100] like Fig. 9 As shown, the memory controller 120 may output the reference data rDATA and the second duplicate data dDATA2 of the first and second duplicate data dDATA1 and dDATA2 in response to the command CMD. For example, the memory controller 120 may compare the first read count RC1 of the reference data rDATA, the second read count RC2 of the first duplicate data dDATA1, and the third read count RC3 of the second duplicate data dDATA2. The memory controller 120 may select the second duplicate data dDATA2 having the smallest third read count RC3 according to the comparison result. The memory controller 120 may output the selected second duplicate data dDATA2 from the third nonvolatile memory 113. In this way, the memory controller 120 may provide the second duplicate data dDATA2 to the host device 200 in response to the command CMD from the host device 200.

[0101] Next, we will refer to Fig.10 , Fig.11A , Fig. 11B , Fig. 12A and Fig. 12B The operation of the storage device 100 to remove reference data or duplicate data is described in detail.

[0102] Fig.10 is a diagram showing a method according to an example embodiment Figure 1 A flowchart of an example operation of removing reference data or copy data from a storage device. Figures 4 to 6 , Fig. 7A and Figure 7BAfter generating the replication data as described, execute Fig.10 The operation shown.

[0103] refer to Figure 1 and Fig.10 , in operation S141, the storage device 100 may determine whether the access frequency of at least one of the reference data and the copied data is less than a second reference value. For example, the storage device 100 may determine whether the access frequency calculated based on the read count of the reference data within a specific time period is less than the second reference value. For another example, the storage device 100 may determine whether the access frequency calculated based on the read count of the copied data within a specific time period is less than the second reference value. For example, the storage device 100 may determine whether the access frequency calculated based on the sum of the read counts of the reference data and the copied data within a specific time period is less than the second reference value. For example, the second reference value may be equal to the first reference value used to generate the copied data, or may be less than the first reference value.

[0104] When the access frequency of at least one of the reference data and the copy data is less than the second reference value, in operation S142, the storage device 100 may determine whether the total read count of the reference data and the copy data is less than the reference count. For example, in the storage device 100, the data stored therein may have a limited readable count. In this case, the total readable count of the reference data and the copy data may be fixed. In the case where the total read count of the reference data and the copy data is less than the reference count, the storage device 100 may determine that sufficient readable counts remain for the reference data and the copy data. For example, it may be determined that, although one of the reference data or the copy data is removed, the read operation is sufficiently performed based on the remaining data.

[0105] When the total read count of the reference data and the copied data is less than the reference count, in operation S143, the storage device 100 may select one of the reference data and the copied data. For example, the storage device 100 may select the oldest data (i.e., the data with the earliest write time). In this case, the reference data may be selected. For another example, the storage device 100 may select the data with the largest read count from the reference data and the copied data.

[0106] In operation S144, the storage device 100 may remove the selected data. For example, the storage device 100 may perform garbage collection to remove the selected data. As the selected data is removed, the memory space in which the selected data has been stored may be additionally secured as an available memory area.

[0107] As described above, after generating the duplicate data, the storage device 100 can remove the reference data and the duplicate data according to the access frequency of the data. In the case where it is determined that the data is rarely accessed after the duplicate data is generated and there is no problem with the read operation even if a part of the multiple data with the same value is removed, the storage device 100 can remove the reference data or the duplicate data. In this way, the available capacity of the storage device 100 can be additionally ensured.

[0108] Fig.11A and 11B FIG. 1 shows an exemplary embodiment of the present invention. Figure 1 For ease of description, assume that according to Fig. 7A and 7B After the duplicate data generating operation of FIG. 1 stores the first and second duplicate data dDATA1 and dDATA2 in the nonvolatile memory 110 , the first duplicate data dDATA1 is removed.

[0109] Reference Fig.11A , the memory controller 120 may calculate the access frequency of at least one of the reference data rDATA and the first and second replicated data dDATA1 and dDATA2. For example, the memory controller 120 may calculate the access frequency of the reference data rDATA according to the first read count RC1 of the reference data rDATA. For example, the memory controller 120 may calculate the access frequency (i.e., the total access frequency) to the reference data rDATA and the first and second replicated data dDATA1 and dDATA2 based on the first read count RC1 of the reference data rDATA, the second read count RC2 of the first replicated data dDATA1, and the third read count RC3 of the second replicated data dDATA2.

[0110] When the access frequency of at least one of the reference data rDATA and the first and second duplicate data dDATA1 and dDATA2 is less than the second reference value, the memory controller 120 may calculate a total read count of the reference data rDATA and the first and second duplicate data dDATA1 and dDATA2 .

[0111] When the total read count is less than the reference count, in order to remove redundant data, the memory controller 120 may select the first duplicate data dDATA1 from the reference data rDATA and the first and second duplicate data dDATA1 and dDATA2. For example, the memory controller 120 may determine that the second read count RC2 is the largest among the first to third read counts RC1 to RC3, and may select the first duplicate data dDATA1 corresponding to the second read count RC2. For another example, the memory controller 120 may determine that the second write time WT2 is the earliest among the first to third write times WT1 to WT3, and may select the first duplicate data dDATA1 corresponding to the second write time WT2.

[0112] like Fig.11A As shown, the memory controller 120 may remove the selected first duplicate data dDATA1. For example, the memory controller 120 may remove the data stored in the second memory area MA2 storing the first duplicate data dDATA1 through garbage collection.

[0113] Reference Fig. 11B As the first duplicate data dDATA1 is removed, the memory controller 120 may update the physical address management table PAMT. For example, the memory controller 120 may delete metadata corresponding to the second physical address PA2 and may store the third physical address PA3 as a duplicate data address corresponding to the first physical address PA1.

[0114] Fig. 12A and Fig. 12B FIG. 1 shows an exemplary embodiment of the present invention. Figure 1 For ease of description, assume that according to Fig. 7A and 7B After the copy data generation operation of FIG. 1 stores the first and second copy data dDATA1 and dDATA2 in the nonvolatile memory 110 , the reference data rDATA is removed.

[0115] Reference Fig. 12A , the memory controller 120 may calculate the access frequency of at least one of the reference data rDATA and the first and second duplicate data dDATA1 and dDATA2. When the access frequency of at least one of the reference data rDATA and the first and second duplicate data dDATA1 and dDATA2 is less than the second reference value, the memory controller 120 may calculate the total read count of the reference data rDATA and the first and second duplicate data dDATA1 and dDATA2.

[0116] When the total read count is less than the reference count, in order to remove redundant data, the memory controller 120 may select the reference data rDATA from the reference data rDATA and the first and second duplicate data dDATA1 and dDATA2. For example, the memory controller 120 may determine that the first read count RC1 among the first to third read counts RC1 to RC3 is the largest, and may select the reference data rDATA corresponding to the first read count RC1. For another example, the memory controller 120 may determine that the first write time WT1 among the first to third write times WT1 to WT3 is the earliest, and may select the reference data rDATA corresponding to the first write time WT1.

[0117] like Fig. 12A As shown, the memory controller 120 may remove the selected reference data rDATA. For example, the memory controller 120 may remove the data stored in the first memory area MA1 storing the reference data rDATA through garbage collection.

[0118] Reference Fig. 12B , as the reference data rDATA is removed, the memory controller 120 may update the physical address management table PAMT. For example, the memory controller 120 may delete the metadata corresponding to the first physical address PA1. In addition, as the reference data rDATA is removed, the memory controller 120 may update the address mapping table AMT storing the first physical address PA1. For example, the memory controller 120 may remap the physical addresses corresponding to the first to third logical addresses LA1 to LA3 to the second physical address PA2. In this way, the first duplicate data dDATA1 may be regarded as the reference data rDATA.

[0119] Fig.13 is a block diagram illustrating an SSD system according to an example embodiment of the inventive concept. Fig.13 , the SSD system 2000 includes a host 2100 and an SSD 2200 .

[0120] The SSD 2200 exchanges a signal SIG with the host 2100 through a signal connector 2201, and is supplied with power PWR through a power connector 2202. The SSD 2200 includes an SSD controller 2210, a plurality of flash memories (or nonvolatile memories) 2221 to 222n, an auxiliary power supply 2230, and a buffer memory 2240. Each of the flash memories 2221 to 222n may be implemented with a separate semiconductor die or a separate semiconductor chip. For example, each of the flash memories 2221 to 222n may correspond to a reference 2210. Figures 1 to 6, 7A, 7B, 8 to 10, 11A, 11B, 12A and 12B described in each of the first, second and third nonvolatile memories 111, 112 and 113.

[0121] The SSD controller 2210 may control the flash memories 2221 to 222n in response to a signal SIG received from the host 2100. The flash memories 2221 to 222n may operate under the control of the SSD controller 2210. The SSD controller 2210 may include a reference Figures 1 to 6 , 7A, 7B, 8 to 10, 11A, 11B, 12A and 12B. For example, the SSD controller 2210 can perform data deduplication. In this way, the reference data can be stored in the flash memories 2221 to 222n. When the reference data is frequently accessed, the SSD controller 2210 can generate duplicate data associated with the reference data. When at least one of the reference data and the duplicate data is rarely accessed, the SSD controller 2210 can remove the selected reference data or the selected duplicate data.

[0122] The auxiliary power supply 2230 is connected to the host 2100 through the power connector 2202. The auxiliary power supply 2230 may be charged by the power PWR supplied from the host 2100. When the host 2100 cannot smoothly supply the power PWR, the auxiliary power supply 2230 may supply power to the SSD 2200.

[0123] The buffer memory 2240 is used as a buffer memory of the SSD 2200. For example, the buffer memory 2240 may temporarily store data received from the host 2100 or may temporarily store metadata (e.g., an address mapping table AMT and a physical address management table PAMT) of the flash memories 2221 to 222n. Alternatively, the buffer memory 2240 may temporarily store various information required for the SSD controller 2210 to operate.

[0124] According to the present invention, a storage device can generate duplicate data associated with data stored in a non-volatile memory according to deduplication. In this way, the storage device can distribute access operations to the data stored in the non-volatile memory to the duplicate data after the deduplication operation. Therefore, the reliability of the storage device can be improved by preventing errors caused by frequent access to the deduplicated data.

[0125] Furthermore, according to the inventive concept, after generating duplicate data, the storage device may ensure the available capacity of the nonvolatile memory by removing rarely accessed duplicate data.

[0126] While the inventive concepts have been described with reference to exemplary embodiments thereof, it will be apparent to those skilled in the art that various changes and modifications can be made thereto without departing from the spirit and scope of the invention as set forth in the following claims.

Claims

1. A method for operating a storage device including one or more non-volatile memories, the method comprising: storing reference data in a first memory area of ​​the one or more non-volatile memories; When the access frequency of the reference data exceeds a first reference value, storing first duplicate data identical to the reference data in a second memory area of ​​the one or more non-volatile memories; After the first duplicate data is stored, when the access frequency of the reference data or the first duplicate data exceeds the first reference value, storing second duplicate data identical to the reference data in a third memory area of ​​the one or more non-volatile memories; as well as As the first duplicate data and the second duplicate data are stored in the one or more non-volatile memories, managing a second physical address of the second memory area and a third physical address of the third memory area so that a first physical address of the first memory area corresponds to the second physical address and the third physical address; In response to a read request for the reference data, selecting one of the reference data, the first copy data, and the second copy data; as well as outputting selected data from the one or more non-volatile memories; wherein the selected data is data corresponding to a minimum read count among a first read count of the reference data, a second read count of the first copy data, and a third read count of the second copy data; or The selected data is data corresponding to the earliest writing time among a first writing time of the reference data, a second writing time of the first copy data, and a third writing time of the second copy data.

2. The method according to claim 1, wherein: The management of the second physical address and the third physical address includes: storing the second physical address in a physical address management table so as to correspond to the first physical address; and The third physical address is stored in the physical address management table so as to correspond to the second physical address.

3. The method according to claim 1, further comprising: After the reference data is stored, in response to a write command for storing write data identical to the reference data and a first logical address, the first physical address is stored in an address mapping table so as to correspond to the first logical address.

4. The method according to claim 3, wherein: An access frequency of the reference data varies according to a read operation associated with the first logical address.

5. The method according to claim 1, wherein: The access frequency is an increment of a data read count within a specific period of time.

6. The method according to claim 1, wherein: The first to third memory areas are respectively included in first to third non-volatile memories of the one or more non-volatile memories, and The first to third non-volatile memories are implemented by different semiconductor dies or different semiconductor chips.

7. A method for operating a storage device including one or more non-volatile memories, the method comprising: storing reference data in a first memory area of ​​the one or more non-volatile memories; When the access frequency of the reference data exceeds a first reference value, storing first duplicate data identical to the reference data in a second memory area of ​​the one or more non-volatile memories; After the first duplicate data is stored, when the access frequency of the reference data or the first duplicate data exceeds the first reference value, storing second duplicate data identical to the reference data in a third memory area of ​​the one or more non-volatile memories; as well as As the first duplicate data and the second duplicate data are stored in the one or more non-volatile memories, managing a second physical address of the second memory area and a third physical address of the third memory area so that a first physical address of the first memory area corresponds to the second physical address and the third physical address; When an access frequency of at least one of the reference data, the first copied data, and the second copied data is less than a second reference value and a total read count of the reference data, the first copied data, and the second copied data is less than a reference count, selecting one of the reference data, the first copied data, and the second copied data; as well as Remove the selected data; wherein the selected data is data corresponding to a maximum read count among a first read count of the reference data, a second read count of the first copy data, and a third read count of the second copy data; or The selected data is data corresponding to the earliest writing time among a first writing time of the reference data, a second writing time of the first copy data, and a third writing time of the second copy data.

8. The method according to claim 7, wherein: The management of the second physical address and the third physical address includes: storing the second physical address in a physical address management table so as to correspond to the first physical address; and The third physical address is stored in the physical address management table so as to correspond to the second physical address.

9. The method according to claim 7, further comprising: After the reference data is stored, in response to a write command for storing write data identical to the reference data and a first logical address, the first physical address is stored in an address mapping table so as to correspond to the first logical address.

10. The method according to claim 9, wherein: An access frequency of the reference data varies according to a read operation associated with the first logical address.

11. The method according to claim 7, wherein: The access frequency is an increment of a data read count within a specific period of time.

12. The method according to claim 7, wherein: The first to third memory areas are respectively included in first to third non-volatile memories of the one or more non-volatile memories, and The first to third non-volatile memories are implemented by different semiconductor dies or different semiconductor chips.

13. A method for operating a storage device including one or more non-volatile memories, the method comprising: storing reference data in a first memory area of ​​the one or more non-volatile memories; storing a deduplication ratio of the reference data; When a deduplication ratio of the reference data exceeds a reference ratio, storing first duplicate data identical to the reference data in a second memory area of ​​the one or more non-volatile memories; After the first duplicate data is stored, when an access frequency of one of the reference data and the first duplicate data exceeds a first reference value, storing second duplicate data identical to the reference data in a third memory area of ​​the one or more nonvolatile memories; as well as As the first duplicate data and the second duplicate data are stored in the one or more non-volatile memories, managing a second physical address of the second memory area and a third physical address of the third memory area so that a first physical address of the first memory area corresponds to the second physical address and the third physical address; When an access frequency of at least one of the reference data, the first copied data, and the second copied data is less than a second reference value and a total read count of the reference data, the first copied data, and the second copied data is less than a reference count, selecting one of the reference data, the first copied data, and the second copied data; as well as Remove the selected data; wherein the selected data is data corresponding to a maximum read count among the first read count of the reference data, the second read count of the first copy data, and the third read count of the second copy data, or The selected data is data corresponding to the earliest writing time among a first writing time of the reference data, a second writing time of the first copy data, and a third writing time of the second copy data.

14. The method according to claim 13, wherein: The management of the second physical address and the third physical address includes: storing the second physical address in a physical address management table so as to correspond to the first physical address; and The third physical address is stored in the physical address management table so as to correspond to the second physical address.

15. A storage device comprising: one or more non-volatile memories including a first memory region configured to store reference data; and Memory controller, wherein the storage device is configured such that when the access frequency of the reference data exceeds a first reference value, the memory controller stores first duplicate data identical to the reference data in a second memory area of ​​the one or more non-volatile memories, wherein the storage device is configured such that after the first copy data is stored, when the access frequency of one of the reference data and the first copy data exceeds the first reference value, the memory controller stores the second copy data identical to the reference data in a third memory area of ​​the one or more non-volatile memories, and Wherein, the memory controller is configured as: As the first duplicate data is stored in the second memory area, storing a second physical address of the second memory area in the address management table so as to correspond to the first physical address of the first memory area; and As the second duplicate data is stored in the third memory area, storing a third physical address of the third memory area in the address management table so as to correspond to the second physical address; wherein the storage device is configured such that when an access frequency of at least one of the reference data, the first copy data, and the second copy data is less than a second reference value and a total read count of the reference data, the first copy data, and the second copy data is less than a reference count, the memory controller removes data selected from the reference data, the first copy data, and the second copy data; wherein the selected data is data corresponding to a maximum read count among a first read count of the reference data, a second read count of the first copy data, and a third read count of the second copy data; or The selected data is data corresponding to the earliest writing time among a first writing time of the reference data, a second writing time of the first copy data, and a third writing time of the second copy data.

16. The storage device according to claim 15, wherein: The storage device is configured such that when the selected data is the first copy data, the memory controller deletes the second physical address corresponding to the first physical address from the address management table and stores the third physical address in the address management table to correspond to the first physical address.

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