Integrated circuits and power circuits

Abstract

In a transformer having a main winding to which a rectified voltage obtained by rectifying an AC voltage is applied, and an auxiliary winding for generating a voltage having a polarity opposite to that of the voltage generated by the main winding, an integrated circuit of the present invention drives a transistor for controlling an inductor current flowing through the main winding, the integrated circuit comprising: a terminal for applying a voltage corresponding to the voltage of the auxiliary winding when the transistor is turned off; a first detection circuit for detecting that a current value of the inductor current is less than a first current value based on the voltage of the terminal when the transistor is turned off; a determination circuit for determining whether the AC voltage is a first AC voltage or a second AC voltage having an amplitude greater than the first AC voltage based on the voltage of the terminal when the transistor is turned off; and a drive circuit for driving the transistor based on a detection result of the first detection circuit, a determination result of the determination circuit, and an output voltage generated by the AC voltage.

Description

Technical Field

[0001] The invention relates to an integrated circuit and a power supply circuit. Background Art

[0002] In a general critical mode power factor correction circuit (PFC circuit), when the inductor current flowing through the inductor is almost zero, the transistor that controls the inductor current is turned on. After a predetermined time has passed since the transistor was turned on, the transistor is turned off. As a result, the peak waveform of the inductor current becomes similar to the waveform of the rectified voltage, and the power factor is improved.

[0003] Prior art literature

[0004] Patent Literature

[0005] Patent Document 1: Japanese Patent Application Publication No. 2014-82924 Summary of the invention

[0006] Technical problem to be solved by the invention

[0007] However, integrated circuits for power factor correction circuits generally control the on / off switching of transistors based on multiple currents and voltages such as inductor current, rectified voltage, and output voltage. As described above, if there are multiple currents and voltages to be detected, the number of terminals of the integrated circuit increases.

[0008] An object of the present invention is to provide an integrated circuit capable of suppressing an increase in the number of terminals even when there are a plurality of detection targets.

[0009] Technical solutions adopted to solve technical problems

[0010] In a first aspect of the present invention for solving the above-mentioned problem, in a transformer having a main winding to which a rectified voltage obtained by rectifying an AC voltage is applied, and an auxiliary winding for generating a voltage having a polarity opposite to that of the voltage generated by the main winding, the integrated circuit drives a transistor for controlling an inductor current flowing through the main winding, and the integrated circuit includes: a terminal for applying a voltage corresponding to the voltage of the auxiliary winding when the transistor is turned off; a first detection circuit for detecting that a current value of the inductor current is less than a first current value based on the voltage of the terminal when the transistor is turned off; a determination circuit for determining whether the AC voltage is a first AC voltage or a second AC voltage having an amplitude larger than the first AC voltage based on the voltage of the terminal when the transistor is turned off; and a drive circuit for driving the transistor based on a detection result of the first detection circuit, a determination result of the determination circuit, and an output voltage generated by the AC voltage.

[0011] Furthermore, in a second aspect of the present invention, a power supply circuit includes: a transformer having a main winding to which a rectified voltage obtained by rectifying an AC voltage is applied, and an auxiliary winding that generates a voltage of opposite polarity to the voltage generated by the main winding; a transistor that controls an inductor current flowing through the main winding; and an integrated circuit that drives the transistor, the integrated circuit including: a terminal to which a voltage corresponding to the voltage of the auxiliary winding is applied when the transistor is turned off; a first detection circuit that detects a situation in which a current value of the inductor current is less than a first current value based on the voltage of the terminal when the transistor is turned off; a determination circuit that determines whether the AC voltage is a first AC voltage or a second AC voltage having an amplitude greater than the first AC voltage based on the voltage of the terminal when the transistor is turned off; and a drive circuit that drives the transistor based on a detection result of the first detection circuit, a determination result of the determination circuit, and an output voltage generated by the AC voltage.

[0012] Effects of the Invention

[0013] According to the present invention, it is possible to provide an integrated circuit capable of suppressing an increase in the number of terminals even when there are a plurality of detection targets. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1 is a diagram showing an example of the structure of an AC-DC converter.

[0015] Figure 2 is a diagram showing an example of the waveform of the voltage Vzcd.

[0016] Figure 3 3 is a diagram showing the relationship among the rectified voltage Vrec, the voltage Vt at the terminal T, and the standard voltage Vrec3 for the AC voltage Vac having different amplitudes.

[0017] Figure 4 is a diagram showing an example of an input detection circuit.

[0018] Figure 5 : is a diagram showing main waveforms of an AC-DC converter.

[0019] Figure 6 This is an example of a waveform of the voltage Vt2 when the AC voltage Vac2 of the 200 V system is input.

[0020] Figure 7 This is a diagram for explaining the operation of the input detection circuit. DETAILED DESCRIPTION

[0021] This application claims priority based on Japanese Patent Application No. 2019-43576 filed on March 11, 2019, and cites the contents thereof.

[0022] Based on the description of the present application specification and the drawings, at least the following matters are clear.

[0023] =====Structure of Embodiment======

[0024] Figure 1 1 is a diagram showing an example of the structure of an AC-DC converter 1. The AC-DC converter 1 (power supply circuit) is a circuit that generates an output voltage Vout of a target level from an AC voltage Vac and outputs it to a terminal E. The AC-DC converter 1 includes a rectifier circuit 2 and a power factor improvement circuit 3.

[0025] The rectifier circuit 2 performs full-wave rectification on the applied AC voltage Vac, and outputs the resultant voltage as a rectified voltage Vrec to the power factor improvement circuit 3 .

[0026] The power factor improvement circuit 3 is a circuit for improving the power factor of the rectified voltage Vrec, and includes a chopper circuit 10 and a drive circuit 20 .

[0027] The chopper circuit 10 is a circuit for boosting a rectified voltage Vrec to generate an output voltage Vout. The chopper circuit 10 includes a transformer 11, a transistor 12, a current detection resistor 13, voltage dividing resistors 14a and 14b, diodes 15 and 16, a capacitor 17, and voltage dividing resistors 18a and 18b.

[0028] The transformer 11 has a main winding L1 and an auxiliary winding L2 magnetically coupled to the main winding L1. Here, the auxiliary winding L2 is wound so that the voltage generated by the auxiliary winding L2 has a polarity opposite to that of the voltage generated by the main winding L1. Therefore, in the auxiliary winding L2, an auxiliary winding voltage (hereinafter referred to as voltage Vzcd) having a polarity opposite to that of the main winding L1 is generated according to the turns ratio of the number of turns of the main winding L1 (hereinafter referred to as "primary turns Np") and the number of turns of the auxiliary winding L2 (hereinafter referred to as "secondary turns Ns") . In addition, one end L1a of the main winding L1 is connected to the rectifier circuit 2.

[0029] The transistor 12 is an NMOS transistor for controlling the power supplied to the load connected to the terminal E. The transistor 12 is turned on or off according to the drive signal Vdr output from the terminal OUT of the drive circuit 20. Thus, the transistor 12 changes the inductor current IL of the main winding L1. In addition, the transistor 12 is not limited to NMOS, and may be other semiconductor elements such as a bipolar transistor or an IGBT.

[0030] When the transistor 12 is turned on, the current detection resistor 13 performs current-voltage conversion on the inductor current I1 flowing through the main winding L1. The current detection resistor 13 is provided between the transistor 12 and the ground GND. In addition, the current detection resistor 13 has a predetermined resistance value that is sufficiently smaller than the voltage-dividing resistors 14a and 14b. In addition, the voltage generated in the current detection resistor 13 when the transistor 12 is turned on is set to the voltage Vs.

[0031] When the diode 15 is turned on, the voltage dividing resistors 14a and 14b divide the voltage output from the diode 15 and apply it to the terminal T. In addition, the voltage dividing resistors 14a and 14b are provided in series with each other on the current path between the auxiliary winding L2 and the ground GND. The node between the voltage dividing resistors 14a and 14b is connected to the terminal T.

[0032] The diode 15 is an element for applying the voltage Vzcd generated in the auxiliary winding L2 to the terminal T. In addition, the voltage Vzcd is the voltage of the node connecting the auxiliary winding L2 and the diode 15. The diode 15 is provided between the auxiliary winding L2 and the voltage dividing resistor 14a, and the anode of the diode 15 is connected to the auxiliary winding L2, and the cathode is connected to the voltage dividing resistor 14a.

[0033] Here, refer to Figure 2 The voltage Vzcd is described below. When the drive signal Vdr becomes high level (hereinafter referred to as "H level") and the transistor 12 becomes conductive, the rectified voltage Vrec is applied to one end L1a of the main winding L1, and the other end L1b becomes 0V (the voltage of the ground GND) when the voltage drop of the transistor 12 and the current detection resistor 13 is ignored. That is, the voltage on the side of the one end L1a of the main winding L1 becomes higher than the voltage on the side of the other end L1b.

[0034] At this time, the voltage Vzcd generated in the auxiliary winding L2 has a polarity opposite to that of the voltage across the main winding L1, so the voltage Vzcd becomes a negative voltage lower than the ground GND. That is, the voltage Vzcd becomes Vzcd=-(2) 1 / 2 ×Vrec×(Ns / Np).

[0035] On the other hand, when the drive signal Vdr becomes a low level and the transistor 12 is turned off, the rectified voltage Vrec is applied to one end L1 a of the main winding L1 , and the output voltage Vout is applied to the other end L1 b.

[0036] At this time, the voltage at the other end L1b of the main winding L1 becomes higher than the voltage at the one end L1a, so the voltage Vzcd of the auxiliary winding L2 generates Vzcd=(Vout-(2) 1 / 2 ×Vrec×(Ns / Np)).

[0037] Therefore, if Figure 2 As shown, when transistor 12 is turned on, the voltage Vzcd follows the equation Vzcd=-(2) 1 / 2 ×Vrec×(Ns / Np) changes as shown by the envelope E1. On the other hand, when the transistor 12 is turned off, the voltage Vzcd follows the curve Vzcd=Vout-(2) 1 / 2 ×Vrec×(Ns / Np) changes like the envelope E2.

[0038] In addition, as described above, when the transistor 12 is turned on, the voltage Vzcd becomes a negative voltage, and therefore the diode 15 is turned off. On the other hand, when the transistor 12 is turned off, the turns ratio "Ns / Np" is determined so that the voltage Vzcd becomes sufficiently higher than the forward voltage of the diode 15. Therefore, when the transistor 12 is turned off, the diode 15 is turned on. Therefore, in this embodiment, only when the transistor 12 is turned off, a voltage corresponding to the voltage Vzcd is applied to the terminal T.

[0039] The diode 16 is an element that releases the energy stored in the main winding L1 to the output side when the transistor 12 is turned off. The anode of the diode 16 is connected to the main winding L1 and the transistor 12, and the cathode is connected to the terminal E.

[0040] The capacitor 17 removes high-frequency components generated by the switching operation of the transistor 12 from the output voltage Vout. The capacitor 17 is provided between the cathode of the diode 16 and the ground GND.

[0041] The voltage-dividing resistors 18a and 18b divide the output voltage Vout and feed back the feedback voltage Vfb. The voltage-dividing resistors 18a and 18b are connected in series between the terminal E and the ground GND. The node between the voltage-dividing resistors 18a and 18b is connected to the terminal FB of the drive circuit 20 described later.

[0042] The drive circuit 20 drives the transistor 12 to improve the power factor of the AC-DC converter and make the level of the output voltage Vout a target level. The drive circuit 20 is, for example, an integrated circuit such as a power factor improvement IC, and has a terminal T, a terminal FB, a terminal COMP, and a terminal OUT. In addition, the drive circuit 20 is provided with terminals other than the above four terminals, which are omitted here for convenience.

[0043] When the transistor 12 is turned on and the diode 15 is turned off, a voltage Vs corresponding to the current flowing through the transistor 12 is applied to the terminal T. When the transistor 12 is turned off and the diode 15 is turned on, a voltage corresponding to the voltage Vzcd of the auxiliary winding L2 is applied to the terminal T.

[0044] Therefore, when the transistor 12 is turned on, the voltage Vt of the terminal T becomes Vt=Vs, and when the transistor 12 is turned off, the voltage Vt becomes Vt=(Vzcd-0.7)×R14b÷(R14a+R14b). Here, the forward voltage of the diode 15 is set to "0.7V", the resistance values ​​of the voltage-dividing resistors 14a and 14b are set to R14a and R14b, and since the resistance value of the current detection resistor 13 is sufficiently smaller than that of R14a and R14b, it is ignored for convenience.

[0045] A feedback voltage Vfb is applied to the terminal FB, and an error voltage Ve is applied to the terminal COMP. In addition, a drive signal Vdr for driving the transistor 12 is output from the terminal OUT.

[0046] The driving circuit 20 outputs a driving signal Vdr according to the voltage Vt and the feedback voltage Vfb, and drives the transistor 12. The driving circuit 20 has a negative voltage clamp circuit 21a, a positive voltage clamp circuit 21b, a zero current detection circuit 22, an input detection circuit 23, a delay circuit 24, a timing circuit 25, a ramp oscillator 26, an error amplifier circuit 27, comparison circuits 28, 29, OR gate circuits 30, 31 and an SR trigger 32.

[0047] The negative voltage clamp circuit 21a clamps the voltage Vt so that the voltage Vt of the terminal T does not fall below a predetermined negative voltage. The negative voltage clamp circuit 21a may be formed of a Zener diode (not shown) having an anode connected to the ground GND and a cathode connected to the terminal T, for example.

[0048] The positive voltage clamp circuit 21b clamps the voltage Vt so that the voltage Vt becomes equal to or lower than a predetermined positive voltage. The positive voltage clamp circuit 21b can be composed of, for example, a Zener diode (not shown) having an anode connected to the terminal T and a cathode connected to a predetermined voltage.

[0049] The zero current detection circuit 22 (first detection circuit) detects whether the inductor current IL has become zero based on the voltage Vt when the transistor 12 is turned off. Here, "zero" refers to, for example, a current value (for example, 1 mA) at which the inductor current IL is almost zero. Therefore, the zero current detection circuit 22 compares the voltage Vt2 with a threshold voltage Vth of several mV corresponding to a current of, for example, 1 mA, to detect that the inductor current IL is zero.

[0050] Furthermore, if the current value of the inductor current IL is detected to be less than 1 mA (first current value), the zero current detection circuit 22 outputs a high level signal Vz indicating that the inductor current IL is zero to the delay circuit 24 and the timing circuit 25 .

[0051] The input detection circuit 23 (determination circuit) outputs a determination result Vj indicating that the AC voltage Vac is a certain AC voltage Vac among the multiple AC voltages Vac, based on the voltage Vt of the terminal T when the transistor 12 is turned off. Specifically, if it is determined that the AC voltage Vac is an AC voltage Vac1 of the 100V system, the input detection circuit 23 outputs a "high level" signal Vj (first signal) as the determination result. On the other hand, if it is determined that the AC voltage Vac is an AC voltage Vac2 of the 200V system, the input detection circuit 23 outputs a "low level" signal Vj (second signal) as the determination result.

[0052] The AC voltage Vac1 (first AC voltage) is, for example, an AC voltage of 100 V used in Japan, and the AC voltage Vac2 (second AC voltage) is, for example, an AC voltage of 220 to 240 V used in Europe. The input detection circuit 23 will be described in detail later.

[0053] When a high-level signal Vz is input from the zero current detection circuit 22, the delay circuit 24 outputs a high-level signal Vd (first instruction signal) for switching on the transistor 12 to the OR gate circuit 30 after a time corresponding to the level of the signal Vj. Specifically, when a "high-level" signal Vj is input, the delay circuit 24 outputs the signal Vd to switch on the transistor 12 after a time td1 (first time) has passed since the inductor current IL was detected to be zero.

[0054] When the “low level” signal Vj is input, the delay circuit 24 outputs the high level signal Vd for turning on the transistor 12 after a time td2 (second time) has passed since the inductor current IL was detected to have become zero.

[0055] In addition, the delay time td in the delay circuit 24 is set so that the transistor 12 is turned on at the time when the drain-source voltage Vds of the transistor 12 becomes small (for example, almost zero). The reason is that when the drain-source voltage Vds of the transistor 12 is large, if the transistor 12 is turned on, the loss in the transistor 12 becomes large.

[0056] Generally speaking, the smaller the amplitude of the AC voltage Vac, the more gradual the change in the drain-source voltage Vds of the transistor 12. That is, the change in the voltage Vds when the voltage of the 100V system is input is more gradual than the change in the voltage Vds when the voltage of the 200V system is input. In order to reduce the switching loss of the transistor 12, in this embodiment, the delay circuit 24 sets the "time td2" to be shorter than the "time td1". Therefore, in this embodiment, the switching loss of the transistor 12 can be reduced.

[0057] The timing circuit 25 turns on the transistor 12 when the drive circuit 20 is started and the AC voltage Vac is disconnected. More specifically, when the high-level signal Vz is not input from the zero current detection circuit 22 within a predetermined time, that is, when the inductor current I1 is not detected to be zero within a predetermined time, the timing circuit 25 outputs a high-level signal to the OR gate circuit 30 in each predetermined cycle.

[0058] If a high-level signal Vset is input, the ramp oscillator 26 (oscillation circuit) outputs a ramp wave Vrp having a slope corresponding to the level of the signal Vj to the comparison circuit 28. Specifically, when a "high-level" signal Vj is input, the ramp oscillator 26 outputs a ramp wave Vrp having a slope S1 (first slope) according to the input of the signal Vset.

[0059] When the "low level" signal Vj is input, the ramp oscillator 26 outputs a ramp wave Vrp having a slope S2 (second slope) in accordance with the input of the signal Vset. The slope S2 of the present embodiment is steeper than the slope S1.

[0060] The error amplifier circuit 27 outputs an error voltage Ve corresponding to the error between the level of the output voltage Vout and the target level based on the feedback voltage Vfb and the standard voltage Vref1 which is the target level. In addition, a resistor R and capacitors C1 and C2 for phase compensation are connected between the output of the error amplifier circuit 27 and the ground GND via a terminal COMP.

[0061] The comparison circuit 28 (signal output circuit) compares the error voltage Ve input to the inverting input terminal from the error amplifier circuit 27 with the ramp wave Vrp input to the non-inverting input terminal from the ramp oscillator 26. If the ramp wave Vrp is higher than the error voltage Ve, the comparison circuit 28 outputs a high-level signal Vc (second instruction signal) for turning off the transistor 12 to the OR gate circuit 31.

[0062] The comparison circuit 29 (second detection circuit) detects whether the inductor current IL flowing through the transistor 12 is an overcurrent based on the voltage Vt of the terminal T when the transistor 12 is turned on and the standard voltage Vref2 corresponding to the overcurrent. In addition, in the present embodiment, when the inductor current IL is larger than a predetermined current value (second current value) such as several A, that is, when the voltage Vt when the transistor 12 is turned on is higher than the standard voltage Vref2, the inductor current IL is detected as an overcurrent and a high-level signal is output.

[0063] In addition, the comparison circuit 29 is designed to output a low-level signal when the transistor 12 is turned off, for example, according to the drive signal Vdr. Specifically, between the output inside the comparison circuit 29 and the ground GND, it can be set to be turned on and off according to the drive signal Vdr (switch SW (not shown)). Moreover, the switch SW is turned on, for example, according to the low-level drive signal Vdr, and the output of the comparison circuit 29 is connected to the ground GND. In addition, the switch SW is turned off between the output of the comparison circuit 29 and the ground GND according to the high-level drive signal Vdr. As a result, the comparison circuit 29 detects overcurrent only when the high-level drive signal Vdr is input.

[0064] In addition, although the details will be described later, the comparison circuit 29 detects overcurrent, and if the output of the comparison circuit 29 becomes high level, since the signal Vr of the OR gate circuit 31 becomes high level, the drive signal Vdr also becomes low level, and the transistor 12 is turned off. Therefore, the transistor 12 and the like are protected from the influence of overcurrent.

[0065] If either the delay circuit 24 or the timing circuit 25 outputs a high-level signal, the OR circuit 30 outputs a high-level signal Vset to the flip-flop 32 .

[0066] When either the comparison circuits 28 or 29 outputs a high-level signal, the OR circuit 31 outputs a high-level signal Vr to the flip-flop 32 .

[0067] If a high-level signal Vset is input to the S input, the flip-flop 32 outputs a high-level drive signal Vdr for turning on the transistor 12. On the other hand, if a high-level signal Vr is input to the R input, the flip-flop 32 outputs a low-level drive signal Vdr for turning off the transistor 12.

[0068] <<Relationship between AC voltage Vac and voltage Vt>>

[0069] Figure 3 1 is a diagram showing an example of waveforms of the rectified voltage Vrec when the AC voltage Vac of different amplitudes is input and the voltage Vt when the transistor 12 is turned off.

[0070] When the rectified voltage Vrec1 corresponding to the 100V AC voltage Vac1 is input to the power factor improvement circuit 3, the voltage output from the auxiliary winding L2 becomes

[0071] Vzcd1=Vout-(2) 1 / 2 ×Vrec1×(Ns / Np)…(1).

[0072] When the transistor 12 is turned off, the voltage at the terminal T becomes

[0073] Vt1=(Vzcd1-0.7)×R14b÷(R14a+R14b)…(2).

[0074] On the other hand, when the rectified voltage Vrec2 corresponding to the 200V AC voltage Vac2 is input to the power factor improvement circuit 3, the voltage output from the auxiliary winding L2 becomes

[0075] Vzcd2=Vout-(2) 1 / 2 ×Vrec2×(Ns / Np)…(3).

[0076] When the transistor 12 is turned off, the voltage at the terminal T becomes

[0077] Vt2=(Vzcd2-0.7)×R14b÷(R14a+R14b)…(4).

[0078] Therefore, the smaller the amplitude of the AC voltage Vac is, the higher the voltage Vt of the terminal T becomes when the transistor 12 is turned off. Figure 3 As is clear, in the half cycle of the AC voltage Vac (a period during which the phase angle changes from 0° to 180°), the voltages Vt1 and Vt2 are each lowest when the phase angle is 90°. The lowest value of the voltage Vt1 is higher than the lowest value of the voltage Vt2.

[0079] The input detection circuit 23 of the present embodiment determines whether the AC voltage Vac is of the 100 V system or the 200 V system by comparing the reference voltage Vref3 set between the minimum value of the voltage Vt1 and the minimum value of the voltage Vt2 with the voltage Vt.

[0080] Specifically, if the period during which the voltage Vt is lower than the standard voltage Vref3 continues for a predetermined period, the input detection circuit 23 determines that the 200V system AC voltage Vac2 is input. On the other hand, if there is no period during which the voltage Vt is lower than the standard voltage Vref3, the input detection circuit 23 determines that the 100V system AC voltage Vac1 is input. In addition, although the details will be described later, for example, if the voltage Vt is not lower than the standard voltage Vref3 during the half cycle of the AC voltage Vac, it can be determined that there is no period during which the voltage Vt is lower than the standard voltage Vref3.

[0081] <<One Example of Input Detection Circuit 23>>

[0082] Figure 4 2 is a diagram showing an example of the input detection circuit 23. Figure 4As shown, the input detection circuit 23 (determination circuit) includes a clock output circuit 40 , a standard voltage output circuit 41 , a comparison circuit 42 , an OR gate circuit 43 , a first timing circuit 44 , and a second timing circuit 45 .

[0083] The clock output circuit 40 outputs a clock signal q1 having a predetermined period to the first timer circuit 44. The clock signal q1 of the present embodiment is, for example, a signal having the same period as the drive signal Vdr, and may be the drive signal Vdr.

[0084] The standard voltage output circuit 41 outputs a standard voltage Vref3 of a level corresponding to the signal Vj to the comparison circuit 42. If a low-level signal Vj is output from the second timing circuit 45 described later, the standard voltage output circuit 41, for example, raises the level of the standard voltage Vref3. On the other hand, if a high-level signal Vj is output, the standard voltage output circuit 41 lowers the level of the standard voltage Vref3. The standard voltage Vref3 of this embodiment outputs a standard voltage Vref3 of a first level (e.g., 2.0V) according to the high-level signal Vj, and outputs a standard voltage Vref3 of a second level (e.g., 2.1V) higher than the first level according to the low-level signal Vj.

[0085] The comparison circuit 42 compares the voltage Vt of the terminal T with the standard voltage Vref3 when the transistor 12 is turned off. Specifically, the comparison circuit 42 has a non-inverting input terminal connected to the terminal T, compares the voltage Vt with the standard voltage Vref3, and outputs a control signal Vc0 as a comparison result.

[0086] As described above, in this embodiment, the voltage Vt when the transistor 12 is turned on is the voltage Vs, but the voltage when the transistor 12 is turned off is Vt = (Vzcd-0.7) × R14b ÷ (R14a + R14b). The standard voltage Vref3 is sufficiently higher than the voltage Vs when the transistor 12 is turned on, and has Figure 3 That is, the "standard voltage Vref3" is a voltage set between the lowest value of the voltage Vt1 and the lowest value of the voltage Vt2.

[0087] When the high-level control signal Vc0 and the high-level initialization signal ini1 are input from the comparison circuit 42, the OR circuit 43 outputs the high-level control signal Vc1 to the first timer circuit 44. The high-level control signal Vc1 is a signal for resetting the count value of the first timer circuit 44.

[0088] The first timing circuit 44 detects whether the period during which the voltage Vt of the terminal T is lower than the standard voltage Vref3 lasts for a period T1 (a first period). In addition, when the 200V system AC voltage Vac2 is input, since the period during which the voltage Vt is lower than the standard voltage Vref3 lasts for a period T1, the first timing circuit 44 detects that the 200V system AC voltage Vac2 is input.

[0089] The first timer circuit 44 includes D flip-flops F1 to F3 and an RS flip-flop F4 corresponding to a 3-bit counter. The D flip-flops F1 to F3 are three-stage, but the present invention is not limited to this.

[0090] A predetermined power supply voltage is applied to the D input of the D flip-flop F1, and the Q output of the D flip-flop F1 is input to the D input of the D flip-flop F2. The Q output of the D flip-flop F2 is input to the D input of the D flip-flop F3. The clock signal q1 is input to the D flip-flops F1 to F3. Therefore, the D flip-flops F1 to F3 are released from reset, and if the clock signal q1 changes only for 3 cycles, the Q output of the D flip-flop F3 becomes a high level. In this embodiment, the period during which the clock signal q1 changes for 3 cycles is set as "period T1".

[0091] The Q output of the D flip-flop F3 is input to the S input of the RS flip-flop F4. Therefore, when the Q output of the D flip-flop F3 becomes high level, the Q output of the RS flip-flop F4 also becomes high level. In addition, the Q output of the RS flip-flop F4 is input to the R input of the second timing circuit 45. Therefore, when the output of the first timing circuit 44 becomes high level and the period T1 is counted, that is, when the AC voltage Vac of the 200V system is input, the second timing circuit 45 is reset.

[0092] The second timing circuit 45 measures time, for example, a half-cycle period T2 (second period) of the AC voltage Vac according to a clock signal q2 from a clock output circuit (not shown). Specifically, the second timing circuit 45 increments the count value according to the clock signal q2, and outputs a high-level signal Vj when the count value reaches "count value X" representing the period T2.

[0093] Generally, the commercial frequency of the AC voltage Vac has a range of, for example, 50 to 60 Hz. Here, the "period T2" is determined based on the lowest frequency (for example, 50 Hz) in the 100 V AC voltage Vac1 and the 200 V AC voltage Vac2.

[0094] On the other hand, the second timing circuit 45 detects that the first timing circuit 44 is an AC voltage Vac2 of the 200V system, and if the count value is reset, it outputs a low-level signal Vj. In addition, if the initialization signal ini2 is input, the second timing circuit 45 sets, for example, "count value X" and outputs a high-level signal Vj.

[0095] Therefore, in this embodiment, unless the 200V AC voltage Vac2 is detected, the count value of the second timer circuit 45 is not reset. Therefore, the high-level signal Vj (first signal) output from the second timer circuit 45 indicates that the input AC voltage Vac is the 100V AC voltage Vac1.

[0096] On the other hand, the low-level signal Vj (second signal) output from the second timer circuit 45 indicates that the input AC voltage Vac is the 200 V system AC voltage Vac2.

[0097] =====Operation of AC-DC Converter 1 ======

[0098] Here, refer to Figure 5 The operation of the main circuit of the AC-DC converter 1 when the AC voltage Vac2 of the 200V system is input is described. First, at time t0, if the drive signal Vdr becomes low level and the transistor 12 is turned off, the voltage Vzcd2 of the auxiliary winding L2 increases to a positive voltage, that is, "Vout-(2) 1 / 2 ×Vrec2×(Ns / Np)”.

[0099] Then, as the transistor 12 is turned off, the inductance circuit IL is reduced and the voltage generated in the main winding L1 becomes smaller, so that the voltage Vzcd2 of the auxiliary winding L2 decreases. As a result, the voltage Vt2 of the terminal T also decreases.

[0100] At time t1 , when the voltage Vt2 of the terminal T is lower than the threshold voltage Vth, the zero current detection circuit 22 outputs a high-level signal Vz indicating that the inductor current IL has become zero.

[0101] After the high-level signal Vz is output at time t1, at time t2 after a predetermined time td2 set based on the level of the signal Vj has passed, the delay circuit 24 outputs the high-level signal Vd. Therefore, the high-level signal Vs is also output from the OR gate circuit 30, and the flip-flop 32 outputs the high-level drive signal Vdr, turning on the transistor 12.

[0102] As described above, the delay time td (td1, td2) in the delay circuit 24 is set so that the transistor 12 is turned on when the drain-source voltage Vds of the transistor 12 becomes small (eg, almost zero). This reduces the switching loss of the transistor 12.

[0103] When the transistor 12 is turned on at time t2, the inductor current IL increases. At this time, as described above, the voltage Vzcd2 becomes a negative voltage, so the diode 15 is turned off, and the voltage Vs generated by the current detection resistor 13 is applied to the terminal T. That is, at this time, the voltage Vt2 = Vs.

[0104] Furthermore, at time t2 , the ramp oscillator 26 outputs a ramp wave Vrp having a slope set based on the level of the signal Vj in response to the input of the high-level signal Vs.

[0105] At time t3, when the level of the ramp wave Vrp reaches the level of the error voltage Ve, the comparison circuit 28 outputs a high-level signal Vc, and thus the high-level signal Vr is output to the flip-flop 32. Furthermore, since the flip-flop 32 outputs a low-level drive signal Vdr, the transistor 12 is turned off. After time t3, the operation at time t0 to t3 is repeated.

[0106] Here, the AC-DC converter 1 generates an output voltage Vout of a target level, and when power is supplied to a specified load, the feedback voltage Vfb and the error voltage Ve become constant. Therefore, the conduction period of the transistor 12 (for example, time t2 to t3) also becomes constant. Moreover, when the transistor 12 is turned on, if the level of the rectified voltage Vrec2 becomes higher, the inductor current IL also becomes larger. Therefore, in this case, the peak waveform of the inductor current IL is similar to the waveform of the rectified voltage Vrec2, so the power factor of the AC-DC converter 1 is improved.

[0107] Here, the case where the 200 V AC voltage Vac2 is input is described. However, even when the 100 V AC voltage Vac1 is input, the same conditions apply except for the delay time td and the slope of the ramp wave Vrp.

[0108] <<Operation of Input Detection Circuit 23>>

[0109] Next, the operation of the input detection circuit 23 when the AC voltage Vac2 of the 200 V system is input will be described.

[0110] Figure 6 is an example of the voltage Vt2 when the AC voltage Vac2 changes, Figure 7 2 is a diagram showing main waveforms of the input detection circuit 23 .

[0111] Here, when the AC-DC converter 1 is activated at time t10 , the initialization signals ini 1 and ini 2 are input, and the input detection circuit 23 is set to reset the first timer circuit 44 and the second timer circuit 45 .

[0112] During the period from time t10 to time t11 , when the voltage Vt2 is higher than the reference voltage Vref3 , the comparison circuit 42 outputs a high-level signal Vc0 every time the transistor 12 is turned off.

[0113] As a result, since the first timer circuit 44 is continuously reset, the signal Vc2 outputted from the first timer circuit 44 does not become high level, and the second timer circuit 45 is not reset. Therefore, the second timer circuit 45 outputs a high level signal Vj.

[0114] After time t11, since voltage Vt2 is lower than reference voltage Vref3, signal Vc0 of comparison circuit 42 and signal Vc1 of OR circuit 43 become low level, and thus, reset of first timer circuit 44 is released.

[0115] If the clock signal q1 becomes high at time t12, the Q output of the D flip-flop F1 becomes high. In addition, if the clock signal q1 becomes high at time t13, the Q output of the D flip-flop F2 becomes high, and if the clock signal q1 becomes high at time t14, the Q output of the D flip-flop F3 becomes high. That is, from time t12 to t14, if the period T1 during which the clock signal q1 changes to high level has passed, the Q output of the RS flip-flop F4, that is, the signal Vc2, becomes high, and the second timing circuit 45 is reset.

[0116] As a result, at time t14, the signal Vj from the second timer circuit 45 changes from the high level to the low level. That is, the second timer circuit 45 determines that the AC voltage Vac is the 200V system AC voltage Vac2.

[0117] At time t15, since the voltage Vt2 is higher than the reference voltage Vref3, as in the period from time t10 to t11, whenever the transistor 12 is turned off, the OR circuit 43 outputs a high-level signal Vc1. Therefore, since the first timer circuit 44 is continuously reset, the signal Vc2 output from the first timer circuit 44 becomes a low level.

[0118] Then, after time t15, the count value of the second timer circuit 45 is incremented based on the clock signal q2.

[0119] Here, it is assumed that during the period T2 of the AC voltage Vac from time t15, if the count value of the second timer circuit 45 increases, the signal Vj from the second timer circuit 45 changes to a high level. Figure 6 As shown, at time t16 after time t15, the voltage Vt2 becomes lower than the standard voltage Vref3, and the action at time t11 is repeated. Therefore, in this embodiment, only during the period T2 from time t15, the count value of the second timing circuit 45 does not increase, and the low-level signal Vj indicating that the AC voltage Vac is the AC voltage Vac2 of the 200V system is continuously output from the second timing circuit 45.

[0120] Although not shown here, when the voltage input to the AC-DC converter 1 is the 100V AC voltage Vac1, the second timer circuit 45 is not reset. Therefore, in this case, the second timer circuit 45 continues to output a high-level signal Vj indicating that the AC voltage Vac is the 100V AC voltage Vac1.

[0121] ====Summary=====

[0122] The AC-DC converter 1 of the present embodiment has been described above. The drive circuit 20 of the present embodiment detects the amplitude of the inductor current IL and the input AC voltage Vac based on the voltage Vt of the terminal T. Therefore, in the drive circuit 20, when two objects are detected, two terminals are not provided. Therefore, in the present embodiment, even if there are multiple detection objects, the increase in the number of terminals can be suppressed.

[0123] In addition, the comparison circuit 29 detects an overcurrent based on the voltage Vt of the terminal T when the transistor 12 is turned on. Therefore, in the present embodiment, it is possible to suppress an increase in the number of terminals when detecting an overcurrent.

[0124] In addition, if Figure 3 As shown, the voltage Vt of the terminal T when the transistor 12 is turned off varies with the amplitude (level) of the input AC voltage Vac. Therefore, the input detection circuit 23 can determine whether the AC voltage Vac is a 100V system voltage or a 200V system voltage based on the standard voltage Vref3 set between the voltages Vt1 and Vt2.

[0125] In addition, for example, it can be determined that the AC voltage Vac input immediately after the voltage Vt is lower than the standard voltage Vref3 is a 200V system. However, if the above structure is used, the voltage Vt may become lower than the standard voltage Vref3 due to noise, etc., resulting in an erroneous determination. The input detection circuit 23 of this embodiment makes a determination after the period during which the voltage Vt is lower than the standard voltage Vref3 continues for a period T1, so a more accurate determination can be made.

[0126] In addition, when the AC voltage Vac2 of the 200V system is input, the standard voltage output circuit 41 raises the level of the standard voltage Vref3. Therefore, even when the voltage Vt varies due to noise, etc., the input detection circuit 23 can accurately determine the type of the input AC voltage Vac. In addition, in the present embodiment, although the standard voltage Vref3 is set to change, for example, even if the standard voltage Vref3 is constant and the comparison circuit 42 has hysteresis, the same effect can be obtained.

[0127] Furthermore, when a high-level signal Vz is input from the zero current detection circuit 22, the delay circuit 24 outputs a high-level signal Vd (first instruction signal) for switching on the transistor 12 to the OR gate circuit 30 after a time corresponding to the level of the signal Vj. Specifically, when a "high-level" signal Vj is input, the delay circuit 24 outputs the signal Vd for turning on the transistor 12 after a time td1 (first time) has passed since the inductor current IL was detected to be zero.

[0128] In addition, the change of the voltage Vds when the voltage of the 100 V system is input is gentler than the change of the voltage Vds when the voltage of the 200 V system is input. In order to reduce the switching loss of the transistor 12, the delay circuit 24 makes the delay time td2 when the voltage of the 200 V system is input shorter than the delay time td1 when the voltage of the 100 V system is input. Therefore, in this embodiment, the switching loss of the transistor 12 can be reduced.

[0129] In addition, if the amplitude of the AC voltage Vac increases, the inductor current IL when the transistor 12 is turned on increases. In the present embodiment, the slope S2 when the voltage of the 200V system is input is set to be steeper than the slope S1 when the voltage of the 100V system is input. Therefore, if the amplitude of the AC voltage Vac increases, the on time of the transistor 12 becomes shorter. Therefore, the inductor current IL does not depend on the AC voltage Vac, but becomes almost constant.

[0130] A diode 15 is provided between the terminal T and the auxiliary winding L2. When the transistor 12 is turned on, the diode 15 is turned off, and when the transistor 12 is turned off, the diode 15 is turned on. Therefore, based on the turning on and off of the transistor 12, the voltage Vs and the voltage Vzcd are applied to the voltage Vt of the terminal T.

[0131] The above embodiments are written to facilitate understanding of the present invention, but are not to be interpreted as limiting the present invention. In addition, the present invention can be changed or improved within the scope of its gist, and the present invention naturally includes its equivalents.

[0132] For example, when the input detection circuit 23 is initialized by the initialization signals ini1 and ini2, a low-level determination result Vj indicating a rated voltage of 200V is output, but a high-level determination result Vj indicating a rated voltage of 100V may be output.

[0133] Description of symbols

[0134] 1 AC-DC converter,

[0135] 2. Rectification circuit,

[0136] 3 Power factor improvement circuit,

[0137] 10 Chopper circuit,

[0138] 11 Transformer,

[0139] 12 transistors,

[0140] 13 Current sensing resistor,

[0141] 14a, 14b, 18a, 18b voltage divider resistors,

[0142] 15, 16 diode

[0143] 17 capacitors,

[0144] 20 driving circuit,

[0145] 21a Negative voltage clamp circuit,

[0146] 21b Positive voltage clamp circuit,

[0147] 22 Zero current detection circuit,

[0148] 23 Input detection circuit,

[0149] 24 Delay circuit,

[0150] 25 Timing circuit,

[0151] 26 Ramp Oscillator,

[0152] 27 Error amplifier circuit,

[0153] 28, 29, 42 comparison circuit,

[0154] 30, 31, 43 OR gate circuit,

[0155] 32 triggers,

[0156] 41 Standard voltage output circuit,

[0157] 44 a first timing circuit,

[0158] 45 Second timing circuit.

Claims

1. An integrated circuit used in a power circuit. The power supply circuit includes a transformer having a main winding to which a rectified voltage obtained by rectifying an AC voltage is applied, and an auxiliary winding that generates a voltage having a polarity opposite to that of the voltage generated by the main winding, and the integrated circuit drives a transistor that controls an inductor current flowing through the main winding in the transformer, and the integrated circuit is characterized in that it includes: a terminal to which a voltage corresponding to the voltage of the auxiliary winding is applied when the transistor is turned off; a first detection circuit for detecting, based on the voltage of the terminal when the transistor is turned off, that the current value of the inductor current is less than a first current value; a determination circuit that determines whether the AC voltage is a first AC voltage or a second AC voltage having a larger amplitude than the first AC voltage based on the voltage of the terminal when the transistor is turned off; as well as A drive circuit drives the transistor based on a detection result of the first detection circuit, a determination result of the determination circuit, and an output voltage generated by the AC voltage.

2. The integrated circuit according to claim 1, wherein: Also comprising a second detection circuit, When the transistor is turned on, a voltage corresponding to the current flowing through the transistor is applied to the terminal, and when the transistor is turned off, a voltage corresponding to the voltage of the auxiliary winding is applied to the terminal, The second detection circuit detects whether the current value of the inductor current is greater than a second current value based on the voltage of the terminal when the transistor is turned on. The drive circuit drives the transistor based on a detection result of the first detection circuit, a detection result of the second detection circuit, a determination result of the determination circuit, and the output voltage.

3. The integrated circuit according to claim 1 or 2, characterized in that: The determination circuit determines that the AC voltage is the first AC voltage based on a period during which the voltage of the terminal is higher than a standard voltage, and determines that the AC voltage is the second AC voltage based on a period during which the voltage of the terminal is lower than the standard voltage.

4. The integrated circuit according to claim 3, characterized in that The determination circuit comprises: a comparison circuit for comparing a voltage of the terminal when the transistor is turned off with the standard voltage; a first timing circuit for detecting whether a period during which the voltage of the terminal is lower than the standard voltage continues for a first period; and A second timing circuit, if the period during which the voltage at the terminal is higher than the standard voltage continues for a second period, the second timing circuit outputs a first signal indicating that the AC voltage is the first AC voltage as the judgment result; if the first timing circuit detects that the period during which the voltage at the terminal is lower than the standard voltage continues for the first period, the second timing circuit outputs a second signal indicating that the AC voltage is the second AC voltage as the judgment result.

5. The integrated circuit according to claim 4, characterized in that The device further includes a standard voltage output circuit that outputs the standard voltage at a first level based on the first signal and outputs the standard voltage at a second level higher than the first level based on the second signal.

6. The integrated circuit according to claim 4, characterized in that The driving circuit includes a delay circuit, When the first signal is input, after a first time has passed since it is detected that the current value of the inductor current is less than the first current value, the delay circuit outputs a first instruction signal for turning on the transistor. When the second signal is input, the delay circuit outputs the first indication signal after a second time shorter than the first time has passed after detecting that the current value of the inductor current is less than the first current value.

7. The integrated circuit according to claim 6, characterized in that The driving circuit comprises: an oscillator circuit, wherein when the first signal is input, the oscillator circuit outputs a ramp wave having a first slope after outputting the first indication signal, and when the second signal is input, the oscillator circuit outputs the ramp wave having a second slope steeper than the first slope after outputting the first indication signal; an error amplifying circuit that outputs an error voltage corresponding to an error between a level of the output voltage and a target level of the output voltage; and The signal output circuit outputs a second instruction signal for turning off the transistor if the ramp wave becomes higher than the error voltage.

8. The integrated circuit according to claim 1, wherein: A diode and a resistor are connected to the terminal. The diode is arranged between the terminal and the auxiliary winding. The resistor is used to detect a current flowing through the transistor.

9. A power supply circuit, characterized in that: include: A transformer having a main winding to which a rectified voltage obtained by rectifying an AC voltage is applied, and an auxiliary winding for generating a voltage having a polarity opposite to that of the voltage generated by the main winding; a transistor that controls an inductor current flowing through the main winding; and an integrated circuit driving the transistor, The integrated circuit comprises: a terminal to which a voltage corresponding to the voltage of the auxiliary winding is applied when the transistor is turned off; a first detection circuit for detecting, based on the voltage of the terminal when the transistor is turned off, that the current value of the inductor current is less than a first current value; a determination circuit that determines whether the AC voltage is a first AC voltage or a second AC voltage having a larger amplitude than the first AC voltage based on the voltage of the terminal when the transistor is turned off; as well as A drive circuit drives the transistor based on a detection result of the first detection circuit, a determination result of the determination circuit, and an output voltage generated by the AC voltage.

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