Linear Amplifier

Abstract

A linear amplifier is provided. The linear amplifier outputs a differential signal corresponding to a differential signal input to a first signal input terminal (11) and a second signal input terminal (12), and the linear amplifier has a first resistor (21), a second resistor (22), a third resistor (23), a fourth resistor (24), a first capacitor (25), a second capacitor (26), a third transistor (27), a fourth transistor (28), a differential amplifier (29), and a signal processing circuit (50). The signal processing circuit (50) includes a first transistor (51) and a second transistor (52), and includes a resistor (53) as a common voltage output unit that outputs a common voltage. The differential amplifier (29) inputs a common voltage and a reference voltage (VREF), and provides a voltage corresponding to the voltage difference between them to each control terminal of the transistors (27) and (28).

Description

Technical Field

[0001] The present invention relates to linear amplifiers. Background Art

[0002] The linear amplifier is provided for the purpose of extending the transmission distance of differential communication and is used for recovery from transmission loss, etc. Non-patent document 1 (MAXIM Corporation, Multirate Clock and Data Recovery with Limiting Amplifier MAX 3872 Data Sheet, Rev. 3, 2007) shows a circuit example of a linear amplifier on page 11.

[0003] Depending on the application, a linear amplifier may be required to have high linearity of the amplitude of an output differential signal with respect to the amplitude of an input differential signal, or may be required to have a constant gain over a wide frequency band. Summary of the invention

[0004] For example, linear amplifiers used in USB 3.1 Gen 2, USB 4, etc. are required to have high linearity and constant gain over a wide frequency band. However, existing linear amplifiers cannot meet these requirements.

[0005] The present disclosure has been made to solve the above-mentioned problems, and shows a linear amplifier having high linearity and a constant gain over the entire range of a wide frequency band.

[0006] The present invention discloses a linear amplifier, which outputs a differential signal corresponding to a differential signal input to a first signal input terminal and a second signal input terminal, wherein the linear amplifier comprises: (1) a signal processing circuit, the signal processing circuit comprising: a first transistor and a second transistor each having a first terminal, a second terminal, and a control terminal; and a common voltage output section, wherein when a differential signal is input to each control terminal of the first transistor and the second transistor, the common voltage output section outputs a common voltage of the differential signal at a later stage than the first terminal or the second terminal of each of the first transistor and the second transistor; (2) a first resistor provided between the first signal input terminal and a first reference potential terminal; (3) a second resistor provided between the second signal input terminal and the first reference potential terminal; (4) a first resistor provided between the first signal input terminal and the first transistor; (5) a third resistor arranged between the control terminals of the transistor; (6) a first capacitor arranged in parallel with the third resistor; (7) a second capacitor arranged in parallel with the fourth resistor; (8) a third transistor having a first terminal, a second terminal and a control terminal, and arranged between the control terminal of the first transistor and a second reference potential terminal via the first terminal and the second terminal; (9) a fourth transistor having a first terminal, a second terminal and a control terminal, and arranged between the control terminal of the second transistor and the second reference potential terminal via the first terminal and the second terminal; and (10) a differential amplifier, which inputs the common voltage and the reference voltage and provides a voltage corresponding to the voltage difference between them to the control terminals of the third transistor and the fourth transistor respectively.

[0007] The linear amplifier of the present invention has high linearity and can have a constant gain over the entire range of a wide frequency band. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] Figure 1 It is a diagram showing the structure of a linear amplifier 1 according to a first comparative example.

[0009] Figure 2 It is a diagram showing the structure of a linear amplifier 2 according to a second comparative example.

[0010] Figure 3 It is a diagram showing the configuration of the linear amplifier 3 according to the first embodiment.

[0011] Figure 4 It is a diagram showing the configuration of a linear amplifier 4 according to the second embodiment.

[0012] Figure 5 1 is a diagram showing a first configuration example of the signal processing circuit 50 .

[0013] Figure 6 It is a diagram showing a second configuration example of the signal processing circuit 50 .

[0014] Figure 7 It is a diagram showing a third configuration example of the signal processing circuit 50 .

[0015] Figure 8 It is a graph showing the frequency dependency of the gain of each of the Example and the Comparative Example. DETAILED DESCRIPTION

[0016] Hereinafter, the mode for implementing the present invention will be described in detail with reference to the accompanying drawings. In addition, in the description of the accompanying drawings, the same reference numerals are used to mark the same elements, and repeated descriptions are omitted. The present invention is not intended to be limited to these examples, but is represented by the claims, including all changes within the meaning and scope equivalent to the claims.

[0017] Hereinafter, the structure and problems of a linear amplifier according to a comparative example will be described first, and then the structure of a linear amplifier according to an embodiment will be described.

[0018] Figure 1 1 is a diagram showing the structure of a linear amplifier 1 of a first comparative example. The linear amplifier 1 shown in the figure is used in a differential signal transmission system. The linear amplifier 1 outputs an output differential signal corresponding to an input differential signal input to signal input terminals 11 and 12, and includes resistors 21 and 22 and a signal processing circuit 40.

[0019] The signal processing circuit 40 includes transistors 41 and 42 at the input stage. The transistors 41 and 42 are NPN bipolar transistors. The resistor 21 is provided between the signal input terminal 11 and the power supply potential terminal (VCC). The resistor 22 is provided between the signal input terminal 12 and the power supply potential terminal. The power supply potential terminal supplies the power supply potential VCC. The resistors 21 and 22 are provided as terminal resistors and have a resistance value of 50Ω, for example. The base of the transistor 41 is connected to the signal input terminal 11. The base of the transistor 42 is connected to the signal input terminal 12.

[0020] In the linear amplifier 1, base current is supplied from the power supply potential terminal to the base of the transistors 41 and 42 via the resistors 21 and 22, and the transistors 41 and 42 are operated. The emitters of the transistors 41 and 42 are at a voltage V between the base and the emitter which is lower than the base voltage. BE The collectors of transistors 41 and 42 are connected to a power supply potential terminal, for example. The differential signal input to the signal input terminals 11 and 12 is input to the bases of transistors 41 and 42 and output from the emitters of transistors 41 and 42.

[0021] As described below, the linear amplifier 1 has a limit in improving linearity, and there is a problem when it is used in differential signal transmission systems that require high linearity, such as USB3.1Gen2 and USB4. The emitter voltage of the transistors 41 and 42 changes in conjunction with the base voltage. In contrast, the collector voltage of the transistors 41 and 42 is fixed to the power supply potential VCC. Therefore, as the base voltage increases, the collector-emitter voltage V CE When a differential signal with a large amplitude (for example, 0.5V or more) is input to the base of transistors 41 and 42, V CE becomes below 0.3V and approaches the saturation region, so the current multiplication rate h FE Decreases sharply. FE The reduction in means a reduction in gain. Therefore, when the input differential signal has a large amplitude, the waveform of the output differential signal is distorted and loses linearity.

[0022] This is not a big problem in systems up to USB 3.0 Gen 1, but in systems with higher speeds and higher levels of sophistication after USB 3.1 Gen 2, a high degree of linearity in the communication waveform is required. For example, in the compliance test of USB 3.1 Gen 2, it is required to transmit the signal without changing the shape of the waveform (for example, without changing the weak amplitude of 1 Vpp and the overshoot waveform) for a specified test pattern. The linear amplifier 1 of the first comparative example cannot meet such a requirement.

[0023] Figure 2 FIG. 2 is a diagram showing the structure of a linear amplifier 2 according to a second comparative example. Figure 1 Compared with the structure of the linear amplifier 1 of the first comparative example shown in FIG. Figure 2 The linear amplifier 2 of the second comparative example shown is different in that it further includes capacitor elements 25 and 26 and resistors 31 and 32 .

[0024] The capacitor 25 is provided between the signal input terminal 11 and the base of the transistor 41. The capacitor 26 is provided between the signal input terminal 12 and the base of the transistor 42. The resistor 31 is provided between the base of the transistor 41 and the bias potential terminal. The resistor 32 is provided between the base of the transistor 42 and the bias potential terminal. The bias potential terminal provides a bias potential Vbias lower than the power supply potential VCC. The difference between the power supply potential VCC and the bias potential Vbias is, for example, about 0.8V.

[0025] In the linear amplifier 2, the resistors 21 and 22 are used as terminal resistors, and on the other hand, base currents are supplied from the bias potential terminal to the bases of the transistors 41 and 42 via the resistors 31 and 32, so that the transistors 41 and 42 operate. The differential signals input to the signal input terminals 11 and 12 are input to the bases of the transistors 41 and 42 via the capacitors 25 and 26, and are output from the emitters of the transistors 41 and 42.

[0026] The linear amplifier 2 of the second comparative example can solve the problem of low linearity of the linear amplifier 1 of the first comparative example by providing a bias potential Vbias lower than the power supply potential VCC to the bases of the transistors 41 and 42 .

[0027] However, in the linear amplifier 2 of the second comparative example, a high-frequency band filter is formed by capacitor elements 25, 26 and resistors 31, 32. Due to the high-frequency band filter, the low-frequency band component in the input differential signal is attenuated. Usually, as the tracking performance of the low-frequency band component, the signal loss is required to be less than 3dB at a frequency of 100kHz. As transistors 41, 42, if NPN bipolar transistors with relatively low impedance are used, in order to suppress the voltage drop caused by the base current, the resistance value of resistors 31, 32 must be a value below several kΩ, and the capacitance value of capacitor elements 25, 26 must be more than 1nF. Such a capacitor element with a large capacitance value is difficult to be accommodated in an IC chip. Therefore, it is actually difficult to adopt the linear amplifier 2 of the second comparative example.

[0028] The following uses Figure 3 as well as Figure 4 The linear amplifier of the embodiment described above can solve the above-mentioned problems of the linear amplifiers 1 and 2 of the comparative examples, has high linearity, and can have a constant gain over the entire wide frequency band.

[0029] The linear amplifier of this embodiment outputs an output differential signal corresponding to the input differential signal input to the first signal input terminal 11 and the second signal input terminal 12, and has a first resistor 21, a second resistor 22, a third resistor 23, a fourth resistor 24, a first capacitor element 25, a second capacitor element 26, a third transistor 27, a fourth transistor 28, a differential amplifier 29 and a signal processing circuit 50.

[0030] The signal processing circuit 50 includes a first transistor 51 and a second transistor 52, and also includes a resistor 53 as a common voltage output unit that outputs a common voltage. The transistors 51 and 52 have a first terminal, a second terminal, and a control terminal, respectively. A differential signal is input to each of the control terminals of the transistors 51 and 52. The resistor 53 used as the common voltage output unit outputs a common voltage of the differential signal that is at a later stage than the first terminal or the second terminal of each of the transistors 51 and 52. The resistor 53 is arranged between a pair of signal lines that transmit differential signals. For example, the voltage at the midpoint of the resistor 53 is used as a common voltage. An appropriate position between the two ends of the resistor 53 is set as a node for the common voltage.

[0031] The resistor 21 is provided between the signal input terminal 11 and the first reference potential terminal (e.g., potential VCC). The resistor 22 is provided between the signal input terminal 12 and the first reference potential terminal (e.g., potential VCC). The resistor 23 is provided between the signal input terminal 11 and the control terminal of the transistor 51. The resistor 24 is provided between the signal input terminal 12 and the control terminal of the transistor 52. The capacitor 25 is provided in parallel with the resistor 23. The capacitor 26 is provided in parallel with the resistor 24.

[0032] The transistors 27 and 28 have a first terminal, a second terminal, and a control terminal, respectively. The transistor 27 is provided between the control terminal of the transistor 51 and a second reference potential terminal (e.g., ground potential) via the first terminal and the second terminal. The transistor 28 is provided between the control terminal of the transistor 52 and a second reference potential terminal (e.g., ground potential) via the first terminal and the second terminal. The differential amplifier 29 inputs a common voltage and a reference voltage VREF, and provides a voltage corresponding to the voltage difference therebetween to each control terminal of the transistors 27 and 28. The reference voltage VREF may also be provided from the outside. In addition, the linear amplifier may also include a reference voltage generating unit that outputs the reference voltage VREF.

[0033] Of the first reference potential terminal and the second reference potential terminal, one is a power supply potential terminal and the other is a ground potential terminal. Transistors 51 and 52 are of the same type and may be any one of an NPN bipolar transistor, a PNP bipolar transistor, an NMOS transistor, and a PMOS transistor. Transistors 27 and 28 are of the same type and may be any one of an NPN bipolar transistor, a PNP bipolar transistor, an NMOS transistor, and a PMOS transistor. Transistors 51 and 52 and transistors 27 and 28 may be of the same type or of different types.

[0034] In the case of a bipolar transistor, one of the first terminal and the second terminal is a collector, and the other is an emitter, and the control terminal is a base. In the case of a MOS transistor (field effect transistor), one of the first terminal and the second terminal is a source, and the other is a drain, and the control terminal is a gate.

[0035] Resistors 21 and 22 have the same resistance value. Resistors 23 and 24 have the same resistance value. Capacitor elements 25 and 26 have the same capacitance value. The resistance value (R2) of each of resistors 23 and 24 is larger than the resistance value (R1) of each of resistors 21 and 22 (R1 < R2). For example, the resistance value of each of resistors 21 and 22 is 50 Ω, and the resistance value of each of resistors 23 and 24 is several kΩ.

[0036] Figure 3 It is a diagram showing the structure of the linear amplifier 3 of the first embodiment. In the structure of the first embodiment, the first reference potential terminal connecting resistors 21 and 22 is a power supply potential terminal (VCC), the second reference potential terminal connecting transistors 27 and 28 is a ground potential terminal, transistors 51 and 52 are NPN bipolar transistors, and transistors 27 and 28 are NMOS transistors.

[0037] In this linear amplifier 3, resistors 21 and 22 are used as termination resistors. Resistors 23 and 24 and capacitor elements 25 and 26 isolate signal input terminals 11 and 12 from the bases of transistors 51 and 52. The base voltage of each of transistors 51 and 52 depends on the magnitude of the current flowing from the power supply potential terminal through resistors 21 and 22, resistors 23 and 24, and transistors 27 and 28 to the ground potential terminal. The differential amplifier 29 inputs the common voltage output from the midpoint of resistor 53 and the reference voltage VREF, and supplies a voltage corresponding to the voltage difference therebetween to the control terminals of transistors 27 and 28, thereby controlling the current flowing through transistors 27 and 28.

[0038] Through such common-mode feedback, current flows through transistors 27 and 28 such that the common voltage at the midpoint of resistor 53 is equal to the reference voltage VREF. As a result, an appropriate voltage lower than the power supply potential VCC is supplied to the bases of transistors 51 and 52, so that high linearity can be achieved, and in addition, a constant gain can be obtained over the entire range of a wide frequency band.

[0039] The common-mode feedback acts on the in-phase signal and does not act on the differential signal. Therefore, transistors 27 and 28 become high impedance and do not cause loss. As a result, even when the capacitance values of capacitor elements 25 and 26 are about several pF, the low-frequency band component of the input differential signal can be transmitted without attenuation, so that capacitor elements 25 and 26 can be incorporated in an IC chip.

[0040] Figure 4 : is a diagram showing the structure of the linear amplifier 4 of the second embodiment. In the structure of the second embodiment, the first reference potential terminal connected to the resistors 21 and 22 is set as the ground potential terminal, the second reference potential terminal connected to the transistors 27 and 28 is set as the power supply potential terminal (VCC), the transistors 51 and 52 are set as NPN, and the transistors 27 and 28 are set as PMOS transistors. The linear amplifier 4 of the second embodiment operates in the same manner as the linear amplifier 3 of the first embodiment and has the same effect.

[0041] Next, use Figure 5 to Figure 7 The following describes configuration examples of the signal processing circuit 50 . The signal processing circuits 50A to 50C of these configuration examples can output output differential signals corresponding to input differential signals from the signal output terminals 13 and 14 .

[0042] Figure 5 1 is a diagram showing a first structural example of a signal processing circuit 50. The signal processing circuit 50A shown in the figure includes current sources 61 and 62 in addition to transistors 51 and 52 and a resistor 53. Transistors 51 and 52 are NPN bipolar transistors. Currents of the same magnitude flow through the current sources 61 and 62. The collector of the transistor 51 is connected to the signal output terminal 13. The collector of the transistor 52 is connected to the signal output terminal 14. The emitter of the transistor 51 is connected to the ground potential terminal via the current source 61. The emitter of the transistor 52 is connected to the ground potential terminal via the current source 62. The resistor 53 is provided between the emitters of the transistors 51 and 52.

[0043] Figure 6 : is a diagram showing a second configuration example of the signal processing circuit 50. The signal processing circuit 50B shown in the figure includes a capacitor 54, transistors 55, 56, and current sources 61 to 64 in addition to transistors 51, 52 and a resistor 53. Transistors 51, 52, 55, and 56 are NPN bipolar transistors. Currents of the same magnitude flow through the current sources 61 to 64. The collectors of the transistors 51 and 52 are connected to the power supply potential terminal. The collector of the transistor 55 is connected to the signal output terminal 13. The collector of the transistor 56 is connected to the signal output terminal 14. The emitter of the transistor 51 is connected to the ground potential terminal via the current source 61 and to the base of the transistor 55. The emitter of the transistor 52 is connected to the ground potential terminal via the current source 62 and to the base of the transistor 56. The emitter of the transistor 55 is connected to the ground potential terminal via the current source 63. The emitter of the transistor 56 is connected to the ground potential terminal via the current source 64. The resistor 53 and the capacitor 54 are provided between the emitters of the transistors 55 and 56 .

[0044] Figure 7: is a diagram showing a third structural example of the signal processing circuit 50. The signal processing circuit 50C shown in the figure includes resistors 65 to 68 in addition to transistors 51, 52 and resistor 53. Transistors 51 and 52 are NPN bipolar transistors. Resistors 65 and 66 have the same resistance value. Resistors 67 and 68 have the same resistance value. The emitter of transistor 51 is connected to the ground potential terminal via resistor 65. The emitter of transistor 52 is connected to the ground potential terminal via resistor 66. The collector of transistor 51 is connected to the power supply potential terminal (VCC) via resistor 67 and is connected to the signal output terminal 13. The collector of transistor 52 is connected to the power supply potential terminal (VCC) via resistor 68 and is connected to the signal output terminal 14. Resistor 53 is provided between the collectors of transistors 51 and 52.

[0045] Next, the simulation results are described.

[0046] Figure 8 Graphs showing the frequency dependence of gain of each embodiment and comparative example. Figure 3 ) using the signal processing circuit 50B ( Figure 6 ) is used as the structure of the signal processing circuit 50 as an example (EXAMPLE). In the case of a linear amplifier 2 ( Figure 2 ), the signal processing circuit 50B ( Figure 6 ) is used as the structure of the signal processing circuit 40 as a comparative example (COMPARATIVE EXAMPLE). Both the embodiment and the comparative example are designed to obtain gain in the frequency band up to the frequency of 20 Gbps. The horizontal axis of the figure represents the frequency (FREQUENCY) (unit: Hz), and the vertical axis represents the gain (GAIN) of the output differential signal relative to the input differential signal (unit: dB). As shown in the figure, in the comparative example, at 100 MHz (1×10 8 In contrast, in the embodiment, a constant gain is obtained in a wide frequency band. Thus, the linear amplifier of the present embodiment can have a constant gain in the entire wide frequency band.

[0047] In the linear amplifier of the embodiment, in the frequency range of the input signal (1×10 5 (Hz) to 3×10 9 (Hz)), an output signal having a substantially constant (reference value ±5%) gain (dB) can be obtained.

[0048] As mentioned above, Figure 5 and Figure 7The linear amplifier shown has: a first signal input terminal 11; a second signal input terminal 12; a first signal output terminal 13; a second signal output terminal 14; a first resistor 21 provided between the first signal input terminal 11 and a first reference potential terminal (e.g., VCC); a second resistor 22 provided between the second signal input terminal 12 and the first reference potential terminal (e.g., VCC); a first transistor 51 including a terminal connected to the first signal output terminal 13; a second transistor 52 including a terminal connected to the second signal output terminal 14; a third resistor 23 provided between the first signal input terminal 11 and a control terminal of the first transistor 51; a fourth resistor 24 provided between the second signal input terminal 12 and a control terminal of the second transistor 52; resistor 24; a first capacitor element 25 arranged in parallel with the third resistor 23; a second capacitor element 26 arranged in parallel with the fourth resistor 24; a third transistor 27 arranged between the control terminal of the first transistor 51 and the second reference potential terminal (for example: ground potential); a fourth transistor 28 arranged between the control terminal of the second transistor 52 and the second reference potential terminal (for example: ground potential); a common voltage output resistor 53 arranged between the first signal output terminal 13 and the second signal output terminal 14; and a differential amplifier 29 having a first input terminal connected to the common voltage output resistor 53, a second input terminal (for example: VREF), and an output terminal connected to the control terminal of the third transistor 27 and the control terminal of the fourth transistor 28.

[0049] exist Figure 5 In the linear amplifier shown, one end of the common voltage output resistor 53 is connected to the first signal output terminal 13 via the first transistor 51, and the same end is connected to the second reference potential terminal via the first current source 61. The other end of the common voltage output resistor 53 is connected to the second signal output terminal 14 via the second transistor 52, and the other end is connected to the second reference potential terminal via the second current source 62.

[0050] Figure 7 The linear amplifier shown further includes a fifth resistor 65 connected to a second reference potential terminal (e.g., ground potential), a sixth resistor 66 connected to the second reference potential terminal (e.g., ground potential), a seventh resistor 67 connected to a first reference potential terminal (e.g., power supply potential VCC), and an eighth resistor 68 connected to the first reference potential terminal (e.g., power supply potential VCC). Here, the fifth resistor 65 is connected to one end of the common voltage output resistor 53 via the first transistor 51, the sixth resistor 66 is connected to the other end of the common voltage output resistor 53 via the second transistor 52, the seventh resistor 67 is connected to one end of the common voltage output resistor 53, and the eighth resistor 68 is connected to the other end of the common voltage output resistor 53.

[0051] Above Figure 6 The linear amplifier shown includes a fifth transistor 55 and a sixth transistor 56 in addition to the first transistor 51 and the second transistor 52. The fifth transistor 55 includes a control terminal connected to one end of the first transistor 51 and a terminal connected to the first signal output terminal 13, and the sixth transistor 56 includes a control terminal connected to one end of the second transistor 52 and a terminal connected to the second signal output terminal 14.

[0052] Figure 6 The linear amplifier shown also has a capacitor element 54 arranged in parallel with the common voltage output resistor, one end of the common voltage output resistor 53 is connected to the first signal output terminal 13 via the fifth transistor 55, and the one end is connected to the second reference potential terminal (for example, ground potential) via the first current source 63, and the other end of the common voltage output resistor 53 is connected to the second signal output terminal 14 via the sixth transistor 56, and the other end is connected to the second reference potential terminal (for example, ground potential) via the second current source 64.

[0053] In the linear amplifier described above, Figure 3 In the example of , the power supply potential (VCC) is provided to the first reference potential terminal, and the ground potential is provided to the second reference potential terminal. Figure 4 In the example of , a ground potential is provided to the first reference potential terminal, and a power supply potential (VCC) is provided to the second reference potential terminal.

[0054] In addition, the common voltage may be a common mode voltage of the differential signal, or may be an average voltage between a ground potential and a pair of differential signal potentials.

Claims

1. A linear amplifier that outputs a differential signal corresponding to a differential signal input to a first signal input terminal and a second signal input terminal, wherein: The linear amplifier has: A signal processing circuit, the signal processing circuit comprising: a first transistor and a second transistor each having a first terminal, a second terminal, and a control terminal; and a common voltage output unit, which outputs a common voltage of the differential signal at a later stage than the first terminal or the second terminal of each of the first transistor and the second transistor when a differential signal is input to each of the control terminals of the first transistor and the second transistor; a first resistor provided between the first signal input terminal and the first reference potential terminal; a second resistor provided between the second signal input terminal and the first reference potential terminal; a third resistor provided between the first signal input terminal and the control terminal of the first transistor; a fourth resistor provided between the second signal input terminal and the control terminal of the second transistor; a first capacitor element arranged in parallel with the third resistor; a second capacitor element arranged in parallel with the fourth resistor; a third transistor having a first terminal, a second terminal, and a control terminal, and provided between the control terminal of the first transistor and the second reference potential terminal via the first terminal and the second terminal; a fourth transistor having a first terminal, a second terminal, and a control terminal, and provided between the control terminal of the second transistor and the second reference potential terminal via the first terminal and the second terminal; and The differential amplifier receives the common voltage and the reference voltage as inputs and supplies a voltage corresponding to a voltage difference between the common voltage and the reference voltage to each control terminal of the third transistor and the fourth transistor.

2. A linear amplifier having: 1st signal input terminal; The second signal input terminal; The first signal output terminal; The second signal output terminal; a first resistor provided between the first signal input terminal and the first reference potential terminal; a second resistor provided between the second signal input terminal and the first reference potential terminal; a first transistor including a terminal connected to the first signal output terminal; a second transistor including a terminal connected to the second signal output terminal; a third resistor provided between the first signal input terminal and the control terminal of the first transistor; a fourth resistor provided between the second signal input terminal and the control terminal of the second transistor; a first capacitor element arranged in parallel with the third resistor; a second capacitor element arranged in parallel with the fourth resistor; a third transistor provided between the control terminal of the first transistor and the second reference potential terminal; a fourth transistor provided between the control terminal of the second transistor and the second reference potential terminal; a common voltage output resistor provided between the first signal output terminal and the second signal output terminal; as well as A differential amplifier includes a first input terminal connected to the common voltage output resistor, a second input terminal, and an output terminal connected to the control terminal of the third transistor and the control terminal of the fourth transistor.

3. The linear amplifier according to claim 2, wherein: supplying a power supply potential to the first reference potential terminal, A ground potential is supplied to the second reference potential terminal.

4. The linear amplifier according to claim 2, wherein: providing a ground potential to the first reference potential terminal, A power supply potential is supplied to the second reference potential terminal.

5. The linear amplifier according to claim 2, wherein: One end of the common voltage output resistor is connected to the first signal output terminal via the first transistor, and the other end is connected to the second reference potential terminal via a first current source. The other end of the common voltage output resistor is connected to the second signal output terminal via the second transistor, and the other end is connected to the second reference potential terminal via a second current source.

6. The linear amplifier according to claim 2, wherein: The linear amplifier further comprises: a fifth resistor connected to the second reference potential terminal; a sixth resistor connected to the second reference potential terminal; a seventh resistor connected to the first reference potential terminal; an eighth resistor connected to the first reference potential terminal, The fifth resistor is connected to one end of the common voltage output resistor via the first transistor. The sixth resistor is connected to the other end of the common voltage output resistor via the second transistor. The seventh resistor is connected to one end of the common voltage output resistor, The eighth resistor is connected to the other end of the common voltage output resistor.

7. A linear amplifier, comprising: 1st signal input terminal; The second signal input terminal; The first signal output terminal; The second signal output terminal; a first resistor provided between the first signal input terminal and the first reference potential terminal; a second resistor provided between the second signal input terminal and the first reference potential terminal; 1st transistor; The second transistor; a third resistor provided between the first signal input terminal and the control terminal of the first transistor; a fourth resistor provided between the second signal input terminal and the control terminal of the second transistor; a first capacitor element arranged in parallel with the third resistor; a second capacitor element arranged in parallel with the fourth resistor; a third transistor provided between the control terminal of the first transistor and the second reference potential terminal; a fourth transistor provided between the control terminal of the second transistor and the second reference potential terminal; a common voltage output resistor provided between the first signal output terminal and the second signal output terminal; a differential amplifier having a first input terminal connected to the common voltage output resistor, a second input terminal, and an output terminal connected to a control terminal of the third transistor and a control terminal of the fourth transistor; a fifth transistor including a control terminal connected to one end of the first transistor and a terminal connected to the first signal output terminal; as well as A sixth transistor includes a control terminal connected to one end of the second transistor and a terminal connected to the second signal output terminal.

8. The linear amplifier according to claim 7, wherein: The linear amplifier also has a capacitive element arranged in parallel with the common voltage output resistor, One end of the common voltage output resistor is connected to the first signal output terminal via the fifth transistor, and the other end is connected to the second reference potential terminal via a first current source. The other end of the common voltage output resistor is connected to the second signal output terminal via the sixth transistor, and the other end is connected to the second reference potential terminal via a second current source.

9. The linear amplifier according to claim 7, wherein: supplying a power supply potential to the first reference potential terminal, A ground potential is supplied to the second reference potential terminal.

10. The linear amplifier according to claim 7, wherein: providing a ground potential to the first reference potential terminal, A power supply potential is supplied to the second reference potential terminal.

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