A tunneling magnetoresistance, a manufacturing method thereof, and a tunneling magnetic device
By using a superparamagnetic layer with a thickness smaller than the critical thickness and annealed tunnel magnetoresistance, the problem of small saturation field and poor linearity in the prior art is solved, and a higher saturation field and linearity are achieved, which is suitable for high-demand sensor applications.
Patent Information
- Application Number
- CN202011583511.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2020-12-28
- Publication Date
- 2025-08-05
- Estimated Expiration
- 2040-12-28
AI Technical Summary
The saturation field of existing tunnel magnetoresistance is relatively small and has poor linearity, which limits its application in sensors that require greater saturation field.
A superparamagnetic layer with a thickness less than or equal to the critical thickness is used as the free layer, and it becomes a superparamagnetic layer by annealing magnetization. At the same time, an interface layer is arranged between the top conductive structure and the free layer to prevent diffusion. The tunnel magnetoresistance formed includes a pinning layer, a free layer, a tunnel barrier layer and a conductive structure.
The saturation field and linearity of the tunnel magnetoresistance are improved, so that it can show better magnetic susceptibility and stability in high saturation field environments, and is suitable for sensors with greater requirements for saturation fields.
Smart Images

Figure CN112768602B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of magnetic sensors, and particularly relates to a tunneling magnetoresistance, a manufacturing method thereof, and a tunneling magnetic device. Background Art
[0002] Magnetic sensing technology is widely used in fields such as new energy, intelligent transportation, industrial control, intelligent household appliances, and intelligent networks. Currently, the TMR (Tunneling Magneto Resistance) technology, that is, tunneling magnetoresistance, is being widely promoted.
[0003] The mechanism of the tunneling magnetoresistance effect is the spin-related tunneling effect, and its core lies in the MTJ (Magnetic Tunnel Junction) device, that is, the magnetic tunnel junction device. The magnetic tunnel junction includes a pinned layer with a fixed magnetization orientation, a free layer whose magnetization orientation can be changed by a magnetic field or current, and a tunneling barrier layer located between the pinned layer and the free layer. An electrode is connected to each of the free layer and the pinned layer of the magnetic tunnel junction. The MTJ device has a tunneling magnetoresistance effect. When the magnetization orientation direction of the free layer is parallel to that of the pinned layer under the action of a magnetic field or current, the tunneling magnetoresistance presents a low-resistance state; when the magnetization orientation direction of the free layer is antiparallel to that of the pinned layer under the action of a magnetic field or current, the tunneling magnetoresistance presents a high-resistance state.
[0004] However, currently, the corresponding saturation field of the tunneling magnetoresistance is relatively small, and the absolute value of the saturation field is generally less than 200 Gs, and the linearity within the saturation field is relatively poor. Furthermore, it is restricted in some open-loop designs or in sensor applications that require a relatively large saturation field. Summary of the Invention
[0005] Therefore, the technical problem to be solved by the present invention is to overcome the problems of small saturation field and poor linearity of the tunneling magnetoresistance in the prior art. Thus, a tunneling magnetoresistance, a manufacturing method thereof, and a tunneling magnetic device are provided.
[0006] The present invention provides a tunneling magnetoresistance, including: a pinned layer; a free layer disposed opposite to the pinned layer, the free layer being a superparamagnetic layer, and the thickness of the free layer being less than or equal to the critical thickness; a tunneling barrier layer located between the pinned layer and the free layer.
[0007] Optionally, the material of the free layer includes CoFe 40 B 20 or CoFe 60 B 20 .
[0008] Optionally, the thickness of the free layer is 1.0 nm to 1.4 nm.
[0009] Optionally, it further includes: a top conductive structure and a bottom conductive structure which are oppositely arranged; the pinned layer, the free layer and the tunneling barrier layer are all located between the top conductive structure and the bottom conductive structure, the free layer is located between the top conductive structure and the tunneling barrier layer, and the pinned layer is located between the bottom conductive structure and the tunneling barrier layer.
[0010] Optionally, the top conductive structure includes a top conductive body and an interface layer, and the interface layer is located between the top conductive body and the free layer; the material of the interface layer includes Ta or Ru.
[0011] Optionally, the pinned layer includes: a first sub-pinned film, a second sub-pinned film, a third sub-pinned film and a fourth sub-pinned film. The first sub-pinned film, the second sub-pinned film, the third sub-pinned film and the fourth sub-pinned film are sequentially stacked in the direction from the free layer tunneling barrier layer to the tunneling barrier layer free layer; the material of the first sub-pinned film includes CoFe 40 B 20 , the thickness of the first sub-pinned film is 1.4 nm to 3 nm; the material of the second sub-pinned film includes Ru, and the thickness of the second sub-pinned film is 0.7 nm to 1.0 nm; the material of the third sub-pinned film includes CoFe 30 , the thickness of the third sub-pinned film is 1.5 nm to 2 nm; the material of the fourth sub-pinned film includes PtMn 62 , the thickness of the fourth sub-pinned film is 15 nm to 20 nm.
[0012] The present invention also provides a manufacturing method of a tunneling magnetoresistance for forming the tunneling magnetoresistance of the present invention, including the following steps: forming a pinned layer; forming a free layer, and the thickness of the free layer is less than or equal to the critical thickness; forming a tunneling barrier layer between the step of forming the pinned layer and the step of forming the free layer; performing annealing magnetization treatment on the free layer so that the free layer becomes a superparamagnetic layer.
[0013] Optionally, it further includes: providing a substrate; forming a bottom conductive structure on the substrate before forming the pinned layer, the tunneling barrier layer and the free layer; forming a top conductive structure on the side of the pinned layer, the tunneling barrier layer and the free layer as a whole facing away from the substrate.
[0014] Optionally, after forming the pinned layer, form the free layer; the method for forming the top conductive structure includes: forming an interface layer on the free layer of the substrate; forming a top conductive body on the side of the interface layer facing away from the free layer.
[0015] Optionally, the annealing temperature of the annealing magnetization treatment is 330°C to 400°C, and the annealing time of the annealing magnetization treatment is 2 hours to 6 hours; the magnetic field direction of the annealing magnetization treatment is parallel to the surface of the free layer opposite to the pinned layer, and the magnetic field strength of the annealing magnetization treatment is 4000 Gs to 20000 Gs.
[0016] The present invention also provides a tunneling magnetic device, including the tunneling magnetoresistance of the present invention.
[0017] Optionally, the number of the tunneling magnetoresistances is several, and the tunneling magnetoresistances are connected in series.
[0018] The technical solution of the present invention has the following beneficial effects:
[0019] 1. For the tunneling magnetoresistance provided by the technical solution of the present invention, a superparamagnetic layer with a thickness less than or equal to the critical thickness is selected for the free layer in the tunneling magnetoresistance. During the magnetization process, the magnetic moments of the single-domain particles constituting the superparamagnetism can be oriented in the same direction to reach magnetic saturation, and the magnetic susceptibility is relatively high. Therefore, the tunneling magnetoresistance provided by the present invention has a large saturation field and a large linearity.
[0020] 2. Further, the top conductive structure includes a top conductive body and an interface layer, and the interface layer is located between the top conductive body and the free layer; the material of the interface layer includes Ta or Ru. The interface layer effectively prevents the free layer from diffusing into the top conductive body, ensuring the thermal stability of the free layer.
[0021] 3. For the manufacturing method of the tunneling magnetoresistance provided by the technical solution of the present invention, the formed free layer has a thickness less than or equal to the critical thickness; the free layer is subjected to annealing magnetization treatment to make the free layer become a superparamagnetic layer. Because all the single-domain particles constituting the superparamagnetism can follow the direction of the external magnetic field to reach magnetic saturation, and the magnetic susceptibility is relatively high. Therefore, the tunneling magnetoresistance manufactured by this method has a large saturation field and a large linearity.
[0022] 5. The technical solution of the present invention provides a tunneling magnetic device. Connecting several tunneling magnetoresistances in series forms a tunneling magnetic device, which can be applied to the sensor field with a large requirement for the saturation field. BRIEF DESCRIPTION OF THE DRAWINGS
[0023] In order to more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the following will briefly introduce the drawings required for use in the description of the specific embodiments or the prior art. Obviously, the following drawings are some embodiments of the present invention. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.
[0024] Figures 1 to 7Schematic diagram of the structure of the tunneling magnetoresistance formation process provided by an embodiment of the present invention;
[0025] Figure 8 A condition for annealing magnetization treatment provided by an embodiment of the present invention;
[0026] Figure 9 TMR output curve of the tunneling magnetoresistance in the prior art;
[0027] Figure 10 TMR output curve of the tunneling magnetoresistance provided by an embodiment of the present invention;
[0028] Figure 11 Schematic diagram of the structure of the tunneling magnetic device provided by an embodiment of the present invention. Detailed implementation manners
[0029] The technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings. Apparently, the described embodiments are some but not all of the embodiments of the present invention. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the protection scope of the present invention.
[0030] In the description of the present invention, it should be noted that the orientation or positional relationship indicated by the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc. is based on the orientation or positional relationship shown in the drawings, and is only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus should not be construed as a limitation to the present invention. In addition, the terms "first", "second", "third" are only used for descriptive purposes and cannot be construed as indicating or implying relative importance. ;
[0031] In the description of the present invention, it should be noted that unless otherwise clearly defined and limited, the terms "installed", "connected", "connected" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be directly connected or indirectly connected through an intermediate medium, and can also be the internal connection of two elements. It can be a wireless connection or a wired connection. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to specific situations.
[0032] In addition, the technical features involved in different embodiments of the present invention described below can be combined with each other as long as they do not conflict with each other.
[0033] This embodiment provides a method for manufacturing a tunneling magnetoresistance, which includes the following steps: forming a pinned layer; forming a free layer, where the thickness of the free layer is less than or equal to the critical thickness; forming a tunneling barrier layer between the step of forming the pinned layer and the step of forming the free layer; annealing the free layer to make the free layer become a superparamagnetic layer.
[0034] Figures 1 to 6 It is a schematic structural diagram of the formation process of the tunneling magnetoresistance provided by an embodiment of the present invention.
[0035] Please refer to Figure 1 , and provide a substrate 1.
[0036] The substrate 1 can be a silicon substrate or a glass substrate.
[0037] Please refer to Figure 2 , and form a bottom conductive structure 2 on the surface of one side of the substrate 1.
[0038] The step of forming the bottom conductive structure 2 includes: forming a first bottom conductive film on the surface of one side of the substrate 1; forming a second bottom conductive film on the surface of the first bottom conductive film facing away from the substrate 1; forming a third bottom conductive film on the surface of the second bottom conductive film facing away from the first bottom conductive film; forming a fourth bottom conductive film on the surface of the third bottom conductive film facing away from the second bottom conductive film; forming a fifth bottom conductive film on the surface of the fourth bottom conductive film facing away from the third bottom conductive film; forming a sixth bottom conductive film on the surface of the fifth bottom conductive film facing away from the fourth bottom conductive film.
[0039] In one embodiment, the material of the first bottom conductive film is Ta, and the thickness of the first bottom conductive film is 4 nm to 6 nm, such as 5 nm.
[0040] In one embodiment, the material of the second bottom conductive film is Ru, and the thickness of the second bottom conductive film is 12 nm to 16 nm, such as 15 nm. In other embodiments, the material of the second bottom conductive film is CuN, and the thickness of the second bottom conductive film is 10 nm to 50 nm. For example, it can be 10 nm, 20 nm, 30 nm, 40 nm, 50 nm.
[0041] In one embodiment, the material of the third bottom conductive film is Ta, and the thickness of the third bottom conductive film is 4 nm to 6 nm, such as 5 nm.
[0042] In one embodiment, the material of the fourth bottom conductive film is Ru, and the thickness of the fourth bottom conductive film is 12 nm to 16 nm, such as 15 nm. In other embodiments, the material of the fourth bottom conductive film is CuN, and the thickness of the fourth bottom conductive film is 10 nm to 50 nm. For example, it can be 10 nm, 20 nm, 30 nm, 40 nm, or 50 nm.
[0043] In one embodiment, the material of the fifth bottom conductive film is Ta, and the thickness of the fifth bottom conductive film is 4 nm to 6 nm, such as 5 nm.
[0044] In one embodiment, the material of the sixth bottom conductive film is Ru, and the thickness of the sixth bottom conductive film is 8 nm to 12 nm, such as 10 nm.
[0045] Please refer to Figure 3 , and a pinning layer 3 is formed on the surface of the bottom conductive structure 2 on the side facing away from the substrate 1.
[0046] In this embodiment, the step of forming the pinning layer 3 includes: forming a fourth sub-pinning film 304 on the surface of the bottom conductive structure 2 on the side facing away from the substrate 1; forming a third sub-pinning film 303 on the surface of the fourth sub-pinning film 304 on the side facing away from the bottom conductive structure 2; forming a second sub-pinning film 302 on the surface of the third sub-pinning film 303 on the side facing away from the fourth sub-pinning film 304; and forming a first sub-pinning film 301 on the surface of the second sub-pinning film 302 on the side facing away from the third sub-pinning film 303.
[0047] In one embodiment, the material of the fourth sub-pinning film 304 includes PtMn 62 , and the thickness of the fourth sub-pinning film 304 is 15 nm to 20 nm. For example, it can be 15 nm, 16 nm, 18 nm, or 20 nm.
[0048] In one embodiment, the material of the third sub-pinning film 303 includes CoFe 30 , and the thickness of the third sub-pinning film 303 is 1.5 nm to 2 nm. For example, it can be 1.5 nm, 1.6 nm, 1.8 nm, or 2 nm.
[0049] In one embodiment, the material of the second sub-pinning film 302 includes Ru, and the thickness of the second sub-pinning film 302 is 0.7 nm to 1.0 nm. For example, it can be 0.7 nm, 0.85 nm, or 1 nm.
[0050] In one embodiment, the material of the first sub-pinning film 301 includes CoFe 40 B 20 , and the thickness of the first sub-pinning film 301 is 1.4 nm to 3 nm. For example, it can be 1.4 nm, 1.8 nm, 2 nm, 2.5 nm, or 3 nm.
[0051] In one embodiment, PtMn 62 serves as the ferromagnetic layer, and CoFe 40 B 20、 Ru and CoFe 30 form an antiferromagnetic composite layer.
[0052] Please refer to Figure 4 , and a tunneling barrier layer 4 is formed on the surface of the pinned layer 3 on the side facing away from the bottom conductive structure 2.
[0053] The material of the tunneling barrier layer 4 includes MgO.
[0054] The thickness of the tunneling barrier layer 4 is 0.5 nm to 1.5 nm. For example, it can be 0.5 nm, 1 nm, 1.2 nm, or 1.5 nm. The thickness of the tunneling barrier layer 4 can be adjusted according to the actual resistance requirements of the tunneling magnetoresistance.
[0055] Please refer to Figure 5 , and a free layer 5 is formed on the side of the tunneling barrier layer 4 facing away from the pinned layer 3.
[0056] The free layer 5 in this embodiment is a single-layer structure.
[0057] In one embodiment, the material of the free layer 5 includes CoFe 40 B 20 , and in other embodiments, the material of the free layer 5 can also be CoFe 60 B 20 .
[0058] The thickness of the free layer 5 is less than or equal to the critical thickness. The thickness of the free layer 5 is 1.0 nm to 1.4 nm. For example, it can be 1.0 nm, 1.2 nm, 1.3 nm, or 1.4 nm.
[0059] The process of forming the free layer 5 includes a magnetron sputtering process. A dedicated magnetron sputtering device is used, and the coating accuracy is within 0.01 nm to ensure that the free layer 5 achieves the required film thickness and accuracy.
[0060] Please refer to Figure 6 , and a top conductive structure 6 is formed on the side of the pinned layer 3, the tunneling barrier layer 4, and the free layer 5 as a whole facing away from the substrate 1.
[0061] Specifically, the top conductive structure 6 is formed on the surface of the free layer 5 on the side facing away from the tunneling barrier layer 4.
[0062] The steps of forming the top conductive structure 6 include: forming an interface layer 602 on the surface of the free layer 5 on the side facing away from the tunneling barrier layer 4; forming a top conductive body 601 on the surface of the interface layer 602 on the side facing away from the free layer 5.
[0063] The material of the interface layer 602 includes Ta or Ru.
[0064] During subsequent annealing magnetization treatment, the interface layer effectively prevents the free layer 5 from diffusing into the top conductive body 601, ensuring the thermal stability of the free layer 5.
[0065] Please refer to Figure 7 , and perform annealing magnetization treatment on the free layer 5 to make the free layer 5 become a superparamagnetic layer.
[0066] Figure 8 An annealing condition for performing annealing magnetization treatment on the free layer 5 is provided. Figure 8 In, the horizontal axis is time, with the unit of hour; Figure 8 In, the longitudinal main axis is the temperature adopted for annealing magnetization treatment, with the unit of °C. Figure 8 In, the longitudinal secondary axis is the magnetic field applied for annealing magnetization treatment, with the unit of Gs.
[0067] In one embodiment, during annealing magnetization treatment, the annealing temperature is 330°C to 400°C. For example, it can be 330°C, 350°C, 380°C or 400°C. The annealing temperature is reasonably selected according to the material of the pinning layer 3. Generally, the annealing temperature needs to be higher than the Curie temperature of the material of the pinning layer 3. Increasing the annealing temperature can promote the lattice formation of the free layer 5, making the superparamagnetic effect of the free layer 5 more obvious, so that the saturation field of the tunneling magnetoresistance is larger and the linearity within the saturation field is better; too high annealing temperature will affect the thermal stability of the magnetic material.
[0068] In one embodiment, during annealing magnetization treatment, the annealing time is 2 hours to 6 hours. For example, it can be 2 hours, 3 hours, 4 hours or 6 hours. If the annealing time is too short, the lattice formation process of the pinning layer 3 and the free layer 5 cannot reach a stable state. After the pinning layer 3 and the free layer 5 reach a stable state, too long annealing time is unnecessary. Prolonging the annealing time can promote the lattice formation of the free layer 5, making the superparamagnetic effect of the free layer 5 more obvious, so that the saturation field of the tunneling magnetoresistance is larger and the linearity within the saturation field is better. Too long time will reduce the process efficiency and increase the cost.
[0069] In this embodiment, during annealing magnetization treatment, the magnetization direction is parallel to the surface of the free layer 5 opposite to the pinning layer 3. When the annealing magnetization treatment is completed, the pinning layer 3 forms a fixed magnetic moment, and the direction of the magnetic moment in the pinning layer 3 is parallel to the magnetization direction.
[0070] In one embodiment, during the annealing magnetization process, the applied magnetic field strength is 4000 Gs to 20000 Gs. For example, it can be 4000 Gs, 10000 Gs, 15000 Gs, or 20000 Gs. An excessively high magnetic field strength is unnecessary, and a too low magnetic field strength cannot effectively magnetize the pinning layer 3. The magnetic field strength is reasonably selected according to the material and thickness of the pinning layer 3.
[0071] During the annealing magnetization process, the linearity of the tunneling magnetic device can be increased by raising the annealing temperature or prolonging the annealing duration.
[0072] In this embodiment, since the interface layer 602 is located between the top conductive body 601 and the free layer 5, the interface layer 602 can effectively prevent the diffusion of the free layer 5 during the annealing magnetization process, ensuring the thermal stability of the free layer 5.
[0073] The annealing magnetization process latticeizes the free layer 5, and the free layer 5 in the tunneling magnetoresistance forms superparamagnetism.
[0074] The free layer 5 in the tunneling magnetoresistance is a superparamagnetic layer with a thickness less than or equal to the critical thickness. During the annealing magnetization process, the magnetic moments of the single-domain particles constituting the superparamagnetism can be oriented in the same direction to reach magnetic saturation, and the magnetic susceptibility is relatively high. Therefore, the tunneling magnetoresistance provided in this embodiment has a large saturation field and a large linearity.
[0075] This example provides a tunneling magnetoresistance, refer to Figure 7 , including: a pinning layer 3; a free layer 5 disposed opposite to the pinning layer 3, the free layer 5 being a superparamagnetic layer with a thickness less than or equal to the critical thickness; a tunneling barrier layer 4 located between the pinning layer 3 and the free layer 5.
[0076] The tunneling magnetoresistance further includes a substrate 1, and the substrate 1 is located on the side of the pinning layer 3 opposite to the tunneling barrier layer 4.
[0077] The substrate 1 can be a silicon substrate or a glass substrate.
[0078] In this embodiment, the tunneling magnetoresistance further has a top conductive structure 6 and a bottom conductive structure 2 disposed opposite to each other. The pinning layer 3, the free layer 5, and the tunneling barrier layer 4 are all located between the top conductive structure 6 and the bottom conductive structure 2. The free layer 5 is located between the top conductive structure 6 and the tunneling barrier layer 4, and the pinning layer 3 is located between the bottom conductive structure 2 and the tunneling barrier layer 4.
[0079] The bottom conductive structure 2 includes a first bottom conductive film, a second bottom conductive film, a third bottom conductive film, a fourth bottom conductive film, a fifth bottom conductive film, and a sixth bottom conductive film stacked in sequence from bottom to top.
[0080] In one embodiment, the material of the first bottom conductive film is Ta, and the thickness of the first bottom conductive film is 4 nm to 6 nm, such as 5 nm.
[0081] In one embodiment, the material of the second bottom conductive film is Ru, and the thickness of the second bottom conductive film is 12 nm to 16 nm, such as 15 nm. In other embodiments, the material of the second bottom conductive film is CuN, and the thickness of the second bottom conductive film is 10 nm to 50 nm. For example, it can be 10 nm, 20 nm, 30 nm, 40 nm or 50 nm.
[0082] In one embodiment, the material of the third bottom conductive film is Ta, and the thickness of the third bottom conductive film is 4 nm to 6 nm, such as 5 nm.
[0083] In one embodiment, the material of the fourth bottom conductive film is Ru, and the thickness of the fourth bottom conductive film is 12 nm to 16 nm, such as 15 nm. In other embodiments, the material of the fourth bottom conductive film is CuN, and the thickness of the fourth bottom conductive film is 10 nm to 50 nm. For example, it can be 10 nm, 20 nm, 30 nm, 40 nm or 50 nm.
[0084] In one embodiment, the material of the fifth bottom conductive film is Ta, and the thickness of the fifth bottom conductive film is 4 nm to 6 nm, such as 5 nm.
[0085] In one embodiment, the material of the sixth bottom conductive film is Ru, and the thickness of the sixth bottom conductive film is 8 nm to 12 nm, such as 10 nm.
[0086] The pinning layer 3 includes: a first sub-pinning film 301, a second sub-pinning film 302, a third sub-pinning film 303 and a fourth sub-pinning film 304. The first sub-pinning film 301, the second sub-pinning film 302, the third sub-pinning film 303 and the fourth sub-pinning film 304 are stacked in sequence in the direction from the free layer 5 to the tunneling barrier layer 4.
[0087] In one embodiment, the material of the fourth sub-pinning film 304 includes PtMn 62 , and the thickness of the fourth sub-pinning film 304 is 15 nm to 20 nm. For example, it can be 15 nm, 16 nm, 18 nm or 20 nm.
[0088] In one embodiment, the material of the third sub-pinning film 303 includes CoFe 30 , and the thickness of the third sub-pinning film 303 is 1.5 nm to 2 nm. For example, it can be 1.5 nm, 1.6 nm, 1.8 nm or 2 nm.
[0089] In one embodiment, the material of the second sub-pinning layer 302 includes Ru, and the thickness of the second sub-pinning layer 302 is 0.7 nm to 1.0 nm. For example, it can be 0.7 nm, 0.85 nm, or 1 nm.
[0090] In one embodiment, the material of the first sub-pinning layer 301 includes CoFe 40 B 20 , and the thickness of the first sub-pinning layer 301 is 1.4 nm to 3 nm. For example, it can be 1.4 nm, 1.8 nm, 2 nm, 2.5 nm, or 3 nm.
[0091] In one embodiment, PtMn 62 is used as the ferromagnetic layer, and CoFe 40 B 20、 Ru and CoFe 30 form an antiferromagnetic composite layer.
[0092] The material of the tunneling barrier layer 4 includes MgO.
[0093] The thickness of the tunneling barrier layer 4 is 0.5 nm to 1.5 nm. For example, it can be 0.5 nm, 1 nm, 1.2 nm, or 1.5 nm. The thickness of the tunneling barrier layer 4 can be adjusted according to the actual resistance requirements of the tunneling magnetoresistance.
[0094] The free layer 5 in this embodiment is a single-layer structure.
[0095] The material of the free layer 5 includes CoFe 40 B 20 , and in other embodiments, the material of the free layer 5 can also be CoFe 60 B 20 .
[0096] The free layer 5 is a superparamagnetic layer, and the thickness of the free layer 5 is less than or equal to the critical thickness. The thickness of the free layer 5 is 1.0 nm to 1.4 nm. For example, it can be 1.0 nm, 1.2 nm, 1.3 nm, or 1.4 nm.
[0097] The top conductive structure 6 includes a top conductive body 601 and an interface layer 602, and the interface layer 602 is located between the top conductive body 601 and the free layer 5.
[0098] The material of the interface layer 602 includes Ta or Ru.
[0099] In the tunneling magnetoresistance, the free layer 5 is selected as a superparamagnetic layer with a thickness less than or equal to the critical thickness, so that the tunneling magnetoresistance has a large saturation field and a large linearity.
[0100] Please refer to Figure 9 , Figure 9It is the TMR output curve of tunneling magnetoresistance in the prior art. Figure 9 In [it], the horizontal axis is the applied magnetic field strength, with the unit of Gs. Figure 9 In [it], the vertical axis is the TMR ratio, with the unit of %. Figure 9 The saturation field of the tunneling magnetoresistance in [it] is relatively small, with an absolute value less than 300 Gs, and the linearity of the change of the TMR ratio with the applied magnetic field is small.
[0101] Please refer to Figure 10 , Figure 10 It is the TMR output curve of the tunneling magnetoresistance provided by this embodiment. Figure 10 In [it], the horizontal axis is the magnetic field strength, with the unit of Gs. Figure 10 In [it], the vertical axis is the TMR ratio, with the unit of %. Figure 10 Due to the adoption of the free layer 5 of the superparamagnetic layer in the tunneling magnetoresistance in [it], the saturation field of the tunneling magnetoresistance is relatively large, with an absolute value less than 2000 Gs, and the linearity of the change of the TMR ratio with the applied magnetic field is large.
[0102] Another embodiment of the present invention further provides a tunneling magnetic device, including the above-mentioned tunneling magnetoresistance. Please refer to Figure 11 , the number of the tunneling magnetoresistances in the tunneling magnetic device is several, and the tunneling magnetoresistances are connected in series with each other.
[0103] In this embodiment, the substrate 1 in each tunneling magnetoresistance is a whole surface, and adjacent tunneling magnetoresistances are electrically connected through the bottom conductive structure 2 or the top conductive structure 6; the series connection can be electrically connected through the wire 7.
[0104] Connecting several tunneling magnetoresistances in series to form a tunneling magnetic device can be applied to the sensor field with a relatively large requirement for the saturation field.
[0105] Obviously, the above embodiments are only examples given for clear illustration, rather than limitations on the implementation manners. For those of ordinary skill in the art, other different forms of changes or modifications can be made based on the above description. It is not necessary and impossible to list all the implementation manners here. And the obvious changes or modifications derived therefrom are still within the protection scope of the present invention.
Claims
1. A tunnel magnetoresistance, characterized in that include: pinning layer; A free layer disposed opposite the pinned layer, the free layer being a superparamagnetic layer, the thickness of the free layer being less than or equal to a critical thickness, the thickness of the free layer being 1.2 nm to 1.4 nm, the free layer being subjected to an annealing magnetization treatment to form a superparamagnetic layer, the annealing temperature of the annealing magnetization treatment being 330° C. to 400° C., the annealing time of the annealing magnetization treatment being 2 hours to 6 hours, the magnetic field direction of the annealing magnetization treatment being parallel to the surface of the free layer opposite to the pinned layer, and the magnetic field strength of the annealing magnetization treatment being 4000 Gs to 20000 Gs; a tunneling barrier layer located between the pinned layer and the free layer; The pinning layer includes a first sub-pinning film, a second sub-pinning film, a third sub-pinning film and a fourth sub-pinning film, and the first sub-pinning film, the second sub-pinning film, the third sub-pinning film and the fourth sub-pinning film are sequentially stacked in a direction from the free layer to the tunnel barrier layer; The material of the first sub-pinning film includes CoFe 40 B 20 , the thickness of the first sub-pinning film is 1.4nm~3nm; The material of the second sub-pinning film includes Ru, and the thickness of the second sub-pinning film is 0.7 nm to 1.0 nm; The material of the third sub-pinning film includes CoFe 30 , the thickness of the third sub-pinning film is 1.5nm~2nm; The material of the fourth sub-pinning film includes PtMn 62 The thickness of the fourth sub-pinning film is 15 nm to 20 nm.
2. The tunnel magnetoresistance according to claim 1, wherein The material of the free layer includes CoFe 40 B 20 or CoFe 60 B 20 .
3. The tunnel magnetoresistance according to claim 1, wherein Also includes: A top conductive structure and a bottom conductive structure are arranged opposite to each other; the pinned layer, the free layer and the tunneling barrier layer are all located between the top conductive structure and the bottom conductive structure, the free layer is located between the top conductive structure and the tunneling barrier layer, and the pinned layer is located between the bottom conductive structure and the tunneling barrier layer.
4. The tunnel magnetoresistance according to claim 3, characterized in that The top conductive structure includes a top conductive body and an interface layer, wherein the interface layer is located between the top conductive body and the free layer; The material of the interface layer includes Ta or Ru.
5. A method for manufacturing a tunnel magnetoresistance, for forming the tunnel magnetoresistance according to any one of claims 1 to 4, characterized in that: The steps include: Forming a pinning layer, the forming of the pinning layer includes: forming a fourth sub-pinning film, the material of the fourth sub-pinning film includes PtMn 62 The thickness of the fourth pinning film is 15nm to 20nm; a third pinning film is formed on one side surface of the fourth pinning film, and the material of the third pinning film includes CoFe 30 , the thickness of the third sub-pinning film is 1.5nm~2nm; a second sub-pinning film is formed on the surface of the third sub-pinning film on the side facing away from the fourth sub-pinning film, the material of the second sub-pinning film includes Ru, and the thickness of the second sub-pinning film is 0.7nm~1.0nm; a first sub-pinning film is formed on the surface of the second sub-pinning film on the side facing away from the third sub-pinning film, and the material of the first sub-pinning film includes CoFe 40 B 20 , the thickness of the first sub-pinning film is 1.4nm~3nm; forming a free layer, wherein the thickness of the free layer is less than or equal to the critical thickness, and the thickness of the free layer is 1.2 nm to 1.4 nm; forming a tunneling barrier layer between the step of forming the pinned layer and the step of forming the free layer; The free layer is subjected to annealing and magnetization treatment so that the free layer becomes a superparamagnetic layer. The annealing temperature of the annealing and magnetization treatment is 330° C. to 400° C., and the annealing time of the annealing and magnetization treatment is 2 hours to 6 hours. The magnetic field direction of the annealing and magnetization treatment is parallel to the surface opposite to the free layer and the pinned layer, and the magnetic field intensity of the annealing and magnetization treatment is 4000 Gs to 20000 Gs.
6. The method for manufacturing a tunnel magnetoresistance according to claim 5, wherein: Also includes: providing a substrate; Before forming the pinned layer, the tunnel barrier layer and the free layer, forming an underlying conductive structure on the substrate; A top conductive structure is formed on the side of the pinned layer, the tunnel barrier layer and the free layer facing away from the substrate.
7. The method for manufacturing a tunnel magnetoresistance according to claim 6, wherein: After forming the pinned layer, forming the free layer; The method for forming the top conductive structure includes: forming an interface layer on a side of the free layer facing away from the substrate; A top conductive body is formed on a side of the interface layer facing away from the free layer.
8. A tunnel magnetic device, characterized in that: include: A tunnel magnetoresistance according to any one of claims 1 to 4.
9. The tunnel magnetic device according to claim 8, characterized in that: There are multiple tunnel magnetoresistors, and the tunnel magnetoresistors are connected in series.
Citation Information
Patent Citations
Tunnel magnetoresistor and tunnel magnetic device
CN213816194U