Display device
By using multi-frequency driving and signal amplitude adjustment, the impact of noise on the input sensor in the display device is resolved, achieving more efficient touch sensing and improving the overall performance of the display device.
Patent Information
- Application Number
- CN202010965848.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2019-11-04
- Filing Date
- 2020-09-15
- Publication Date
- 2026-01-02
- Estimated Expiration
- 2040-09-15
AI Technical Summary
In existing display devices, noise caused by signal frequency changes during the driving process has a significant impact on the input sensor, affecting the accuracy and efficiency of touch sensing.
By introducing a multi-frequency driving mechanism into the display device, adjusting the amplitude of the vertical and horizontal synchronization signals, and ensuring that the touch driving signal period does not overlap with other signal periods, the signal transmission is optimized using a vertical synchronization signal voltage regulator and frequency information line. Combined with the design of mesh touch driving electrodes and sensing electrodes, noise interference is reduced.
It effectively reduces the impact of noise on the input sensor, improves the accuracy and efficiency of touch sensing, reduces power consumption, and enhances the overall performance of the display device.
Smart Images

Figure CN112783358B_ABST
Abstract
Description
[0001] Cross-references to related applications
[0002] This application claims priority to Korean Patent Application No. 10-2019-0139715, filed with the Korean Intellectual Property Office on November 4, 2019, the entire disclosure of which is incorporated herein by reference. Technical Field
[0003] This disclosure relates generally to display devices, and more specifically to display devices that include input sensors. Background Technology
[0004] With the development of the information society, the demand for display devices, including those that input sensors to display images, is increasing in various forms. Recently, various display devices such as liquid crystal displays, plasma displays, and organic light-emitting diode displays have been used.
[0005] The input sensor identifies whether a touch has occurred or calculates touch coordinates by sequentially sensing multiple touch sensing electrodes used for touch sensing and checking the sensing results.
[0006] However, the signal used to drive the display device is coupled to the signal used for touch sensing, and therefore can act as noise for the input sensor.
[0007] Recently, display devices have been driven at frequencies that vary for each time period or zone, depending on the type of image displayed, in order to reduce power consumption. Research has been conducted on reducing the aforementioned noise by corresponding changes in the frequency of the signal used to drive the display device. Summary of the Invention
[0008] The embodiments provide a display device including an input sensor that is driven at several frequencies and reduces the impact of noise on the input sensor.
[0009] According to an aspect of this disclosure, a display device is provided, comprising a display including a plurality of pixels and an input sensor for sensing user input. The display device includes a drive controller, an input controller, a horizontal synchronization signal information line, and a vertical synchronization signal information line. The drive controller is configured to provide a scan signal and a data signal to the display according to a drive frequency. The input controller is configured to provide a touch drive signal to the input sensor. The horizontal synchronization signal information line connects the drive controller and the input controller, and the horizontal synchronization signal is transmitted through the horizontal synchronization signal information line. The vertical synchronization signal information line connects the drive controller and the input controller, and the vertical synchronization signal is transmitted through the vertical synchronization signal information line. The amplitude of the vertical synchronization signal or the amplitude of the horizontal synchronization signal varies according to the drive frequency.
[0010] The period in which the touch driving signal is provided can not overlap with the period in which the pulse of the horizontal synchronization signal is provided and the period in which the pulse of the vertical synchronization signal is provided.
[0011] The period in which the touch driving signal is provided can not overlap with the period in which the scan signal is provided and the period in which the data signal is provided.
[0012] The driving frequency can have a plurality of values. The amplitude of the vertical synchronization signal or the amplitude of the horizontal synchronization signal, which varies according to the plurality of values of the driving frequency, can have a predetermined value.
[0013] The plurality of values of the driving frequency can be in a range of 1 Hz to 120 Hz.
[0014] The driving controller can include a vertical synchronization signal voltage regulator that changes the amplitude of the vertical synchronization signal, the vertical synchronization signal voltage regulator being electrically connected to one end of the vertical synchronization signal information line.
[0015] The vertical synchronization signal voltage regulator can include a plurality of resistors and a plurality of switching elements connected in series, wherein each of the plurality of switching elements is electrically connected between one end of the vertical synchronization signal information line and a node arranged between adjacent resistors.
[0016] The input sensor can include a touch driving electrode to which the touch driving signal is provided and a touch sensing electrode from which the touch sensing signal is received. The touch driving electrode and the touch sensing electrode can intersect each other while being insulated from each other.
[0017] Before the touch driving signal is provided to the touch driving electrode and before the provision of the touch driving signal ends, an initialization voltage signal for allowing the touch driving electrode to be initialized to a predetermined voltage level can be provided.
[0018] The touch driving electrode and the touch sensing electrode can be arranged on the same layer.
[0019] Any one of the touch driving electrode and the touch sensing electrode can be electrically connected to the other one of the touch driving electrode and the touch sensing electrode at a position at which the touch driving electrode and the touch sensing electrode intersect each other through a bridge pattern arranged on another layer.
[0020] When the driving frequency is a first frequency, the amplitude of the vertical synchronization signal can have a first amplitude, and when the driving frequency is a second frequency less than the first frequency, the amplitude of the vertical synchronization signal has a second amplitude less than the first amplitude.
[0021] Both the amplitude of the vertical synchronization signal and the amplitude of the horizontal synchronization signal can vary according to the driving frequency.
[0022] The sum of the amplitude of the vertical synchronization signal and the amplitude of the horizontal synchronization signal can have a first amplitude when the driving frequency is a first frequency, and the sum of the amplitude of the vertical synchronization signal and the amplitude of the horizontal synchronization signal has a second amplitude less than the first amplitude when the driving frequency is a second frequency less than the first frequency.
[0023] The display apparatus can further include a frequency information line, wherein the frequency information line connects the driving controller and the input controller, and the binary signal is transmitted through the frequency information line. The frequency information line can transmit a signal of "0" when the driving frequency is a first frequency, and transmit a signal of "1" when the driving frequency is a second frequency different from the first frequency.
[0024] According to another aspect of the disclosure, a display apparatus is provided, the display apparatus including a base substrate, a display panel, a light emitting device layer, an input sensing layer, and a window substrate, wherein the display panel includes a TFT circuit layer disposed on the base substrate, the TFT circuit layer including a plurality of transistors, the light emitting device layer is disposed on the TFT circuit layer, the light emitting device layer including light emitting diodes electrically connected to at least some of the plurality of transistors and an encapsulation layer disposed on the light emitting device layer, the input sensing layer includes a first touch conductive layer, a first touch insulating layer, and a second touch conductive layer sequentially stacked on the encapsulation layer, and the window substrate is disposed on the input sensing layer, wherein a period in which a touch driving signal is provided to the input sensing layer does not overlap with a period in which a pulse of a horizontal synchronization signal or a pulse of a vertical synchronization signal is provided to the display panel.
[0025] The voltage signal provided to the plurality of transistors can include a scan signal and a data signal.
[0026] The input sensing layer can include a touch driving electrode and a touch sensing electrode, wherein the touch driving signal is provided to the touch driving electrode and a touch sensing signal is received from the touch sensing electrode. The touch driving electrode and the touch sensing electrode can be disposed in the second touch conductive layer.
[0027] The touch driving electrode and the touch sensing electrode can be a mesh pattern and include an opaque conductive material.
[0028] The input sensing layer can be directly patterned on the encapsulation layer to form a table-embedded type input sensing layer. BRIEF DESCRIPTION OF DRAWINGS
[0029] The exemplary embodiments will now be described in greater detail below with reference to the accompanying drawings; however, the present application can be embodied in different forms and should not be construed as being limited to the embodiments set forth herein. Rather, these embodiments are provided so that the disclosure will be thorough and complete, and will fully convey the scope of the exemplary embodiments to those skilled in the art.
[0030] In the drawings, the size of some of the elements can be exaggerated and not to scale for illustrative purposes. It will be understood that when an element is referred to as being "between" two elements, it can be the only element between the two elements or one or more intervening elements can also be present. Like reference numerals refer to like elements throughout.
[0031] Figure 1 is a plan view of a display device according to an embodiment of the present disclosure.
[0032] Figure 2 is a schematic partial cross-sectional view taken along line I-I' in the display device shown in Figure 1
[0033] Figure 3 is a layout view schematically showing each member of an input sensing layer in a display device according to an embodiment of the present disclosure.
[0034] Figure 4 is a cross-sectional view of a portion corresponding to line II-II' in the display device shown in Figure 3
[0035] Figure 5 is a layout view schematically showing a portion of an input sensing layer as an improvement of the input sensing layer shown in Figure 3
[0036] Figure 6 is a schematic block diagram of a display device according to an embodiment of the present disclosure.
[0037] Figure 7 is a block diagram showing the relationship between a drive controller and an input controller in the display device shown in Figure 6
[0038] Figure 8 is a circuit diagram showing the concept of a vertical synchronization signal voltage regulator in the drive controller shown in Figure 7
[0039] Figure 9 is a timing chart showing a driving method of an input controller in a display device according to the present disclosure.
[0040] Figure 10 is a circuit diagram showing the concept of a vertical synchronization signal voltage regulator and a horizontal synchronization signal voltage regulator in a drive controller in a display device according to another embodiment of the present disclosure.
[0041] Figure 11 is a block diagram showing the relationship between a drive controller and an input controller in a display device according to still another embodiment of the present disclosure. DETAILED DESCRIPTION
[0042] The effects and features of the present disclosure, and methods of achieving the effects and features, will be clearly understood from the following detailed description taken in conjunction with the accompanying drawings. However, the present disclosure is not limited to the embodiments disclosed herein, but can be implemented in various forms. The embodiments are provided by way of example only, so that one of ordinary skill in the art can fully understand the features and scope of the present disclosure. Therefore, the present disclosure can be defined by the scope of the claims and equivalents thereof.
[0043] The term "on" used for designating an element or a layer on another element or layer includes both a case where the element or layer is directly on the other element or layer and a case where the element or layer is on the other element or layer via yet another element or layer. In the entire description of the present disclosure, the same reference numerals are used for the same elements in various drawings.
[0044] Although the terms "first", "second", and the like are used to describe various components, the components are not limited to these terms. The terms are used only to distinguish one component from another component. Therefore, a first component according to the technical concept of the present disclosure can be a second component, or vice versa.
[0045] In the present specification, a display device is a device for displaying a moving image or a still image, or a device for displaying a stereoscopic image, and can be used not only as a display screen of a portable electronic device such as a mobile terminal, a smart phone, a tablet, a smart watch, and a navigation system, but also as a display screen of various products such as a television, a notebook computer, a monitor, an advertisement board, and the Internet of Things.
[0046] Hereinafter, exemplary embodiments will be described with reference to the accompanying drawings. In the entire drawings, the same reference numerals are assigned to the same elements.
[0047] Figure 1 is a plan view of a display device 1 according to an embodiment of the present disclosure. Figure 2 is a plan view of a display device 1 according to an embodiment of the present disclosure. Figure 1 is a schematic partial cross-sectional view taken along line I-I' in the display device 1 shown in FIG. 1A.
[0048] Referring to Figure 1 The display device 1 can include an active area AA and a non-active area NAA.
[0049] The active area AA is defined as an area for displaying an image. Also, the active area AA can be used as a detection area for detecting an external environment. That is, the active area AA can be used as an area for displaying an image or recognizing an input of a user. The input of the user can include a touch input, a fingerprint input, and the like. Hereinafter, the touch input is described as an example. In an embodiment, the active area AA can have a flat shape. However, the present disclosure is not limited thereto, and at least a partial area of the active area AA can be bent.
[0050] The non-active area NAA is defined as an area disposed outside the active area AA, and no image is displayed through the non-active area NAA. Although not separately shown in the drawings, in an embodiment, a speaker module, a camera module, a sensor module, and the like can be disposed in the non-active area NAA. In an embodiment, the sensor module can include at least one of an illuminance sensor, a proximity sensor, an infrared sensor, and an ultrasonic sensor. In an embodiment, as with the active area AA, the non-active area NAA can have a flat shape. However, the disclosure is not limited thereto, and at least a partial area of the non-active area NAA can be bent.
[0051] In an exemplary embodiment, the active area AA can have a rectangular shape in the drawings, and in the rectangular shape, a length in a lateral direction is shorter than a length in a longitudinal direction. The lateral direction and the longitudinal direction are not limited to their terms, but can be understood as associated directions intersecting each other. As described above, the non-active area NAA can be provided to have a rectangular shape with rounded corners at the outside of the active area AA. The shapes of the active area AA and the non-active area NAA can be defined with respect to each other. The shapes of the active area AA and the non-active area NAA are not limited to the above-described shapes. For example, in another embodiment, the active area AA and the non-active area NAA can have various shapes such as a completely square shape, other polygonal shapes, a circular shape, and an elliptical shape.
[0052] Referring to Figure 2 , the display device 1 can include a first substrate 11, a TFT circuit layer 12 disposed on the first substrate 11, a light emitting device layer 13 disposed on the TFT circuit layer 12, an encapsulation layer 14 disposed on the light emitting device layer 13, an input sensing layer 15 disposed on the encapsulation layer 14, and a second substrate 16 disposed on the input sensing layer 15. Figure 2 The stack structure of the display device 1 shown in
[0053] The arrangement structure of the input sensing layer 15 and the stack structure of the display device 1 will be described with reference to Figure 3 and Figure 4
[0054] Figure 3 is a layout view schematically showing each member of the input sensing layer 15 in the display device 1 according to an embodiment of the disclosure. Figure 4 is a cross-sectional view of a portion corresponding to line II-II' shown in Figure 3 Figure 3 and Figure 4 In the drawings, for the sake of convenience of description, the input controller 200 is shown as a block, and the width of the non-active area NAA or the ratio of the non-active area NAA to the active area AA is slightly exaggerated. In addition, reference will be made to Figure 6 The input controller 200 will be described in detail.
[0055] Referring to Figure 3 and Figure 4 The display device 1 includes at least one base substrate 301. The display device 1 can further include a window substrate 302 arranged to face the base substrate 301. However, the present disclosure is not limited thereto, and the window substrate 302 can be omitted or replaced with another structure such as a film or a layer.
[0056] The base substrate 301 can be a flexible substrate. For example, the base substrate 301 can be one of a film substrate and a plastic substrate, and the film substrate and the plastic substrate include a polymeric organic material. For example, the base substrate 301 can include at least one of polystyrene, polyvinyl alcohol, polymethyl methacrylate, polyether sulfone, polyacrylate, polyetherimide, polyethylene naphthalate, polyethylene terephthalate, polyphenylene sulfide, polyarylate, polyimide, polycarbonate, cellulose triacetate, and cellulose acetate propionate. Also, the base substrate 301 can include a fiber reinforced plastic (FRP). However, the present disclosure is not limited thereto, and the base substrate 301 can be a rigid substrate. The base substrate 301 can be one of a glass substrate, a quartz substrate, a glass-ceramic substrate, and a crystallized glass substrate.
[0057] A plurality of light emitting devices, sensing electrodes, and signal lines connected thereto can be arranged on the base substrate 301. The active area AA and the non-active area NAA can be distinguished from each other by the presence of the plurality of light emitting devices on the base substrate 301. For example, the plurality of light emitting devices and the sensing electrodes are arranged on the base substrate 301 in the active area AA, and the signal lines are arranged on the base substrate 301 in the non-active area NAA.
[0058] The base substrate 301 can correspond to Figure 2 the first substrate 11 shown in FIG. 1A.
[0059] A buffer layer 311 is arranged on the base substrate 301. The buffer layer 311 functions to planarize the surface of the base substrate 301 and to prevent moisture or external air from penetrating into the display device 1 (e.g., into the TFT circuit layer 12 and / or the light emitting device layer 13). The buffer layer 311 can be an inorganic insulating layer. The buffer layer 311 can be a single layer or a plurality of layers.
[0060] A plurality of transistors TR1, TR2, and TR3 is arranged over the buffer layer 311. The plurality of transistors TR1, TR2, and TR3 can be driver transistors. At least one of the plurality of transistors TR1, TR2, and TR3 can be provided for one pixel. The plurality of transistors TR1, TR2, and TR3 can be provided in the form of thin film transistors. The plurality of transistors TR1, TR2, and TR3 can each include a plurality of semiconductor layers ACT1, ACT2, and ACT3, a plurality of gate electrodes GE1, GE2, and GE3, a plurality of source electrodes SE1, SE2, and SE3, and a plurality of drain electrodes DE1, DE2, and DE3, respectively.
[0061] In detail, the plurality of semiconductor layers ACT1, ACT2, and ACT3 is arranged over the buffer layer 311. The plurality of semiconductor layers ACT1, ACT2, and ACT3 can include amorphous silicon, polycrystal silicon, or an organic semiconductor. In another embodiment, the plurality of semiconductor layers ACT1, ACT2, and ACT3 can include an oxide semiconductor. Although not illustrated in the drawings, each of the plurality of semiconductor layers ACT1, ACT2, and ACT3 can include a channel region and source and drain regions arranged at both sides of the channel region and doped with impurities.
[0062] A first conductive layer including a plurality of gate electrodes GE1, GE2, and GE3 is arranged over the gate insulating layer 312. The plurality of gate electrodes GE1, GE2, and GE3 can be formed of a metal material having conductivity. For example, the plurality of gate electrodes GE1, GE2, and GE3 can include molybdenum (Mo), aluminum (Al), copper (Cu), and / or titanium (Ti). Each of the plurality of gate electrodes GE1, GE2, and GE3 can be a single layer or a plurality of layers.
[0063] A first interlayer insulating layer 313 is arranged over the first conductive layer. The first interlayer insulating layer 313 can be an inorganic layer. The first interlayer insulating layer 313 can be a single layer or a plurality of layers.
[0064] A second conductive layer is arranged over the first interlayer insulating layer 313. The second conductive layer can include a plurality of source electrodes SE1, SE2, and SE3 and a plurality of drain electrodes DE1, DE2, and DE3. The plurality of source electrodes SE1, SE2, and SE3 and the plurality of drain electrodes DE1, DE2, and DE3 are formed of a metal material having conductivity.
[0065] The plurality of source electrodes SE1, SE2, and SE3 and the plurality of drain electrodes DE1, DE2, and DE3 can be electrically connected to source and drain regions of the plurality of semiconductor layers ACT1, ACT2, and ACT3, respectively, through contact holes that penetrate the first interlayer insulating layer 313 and the gate insulating layer 312.
[0066] Although not shown in the drawings, the display device 1 can further include a storage capacitor and a switching transistor arranged on the buffer layer 311.
[0067] A second interlayer insulating layer 314 is arranged on the second conductive layer. The second interlayer insulating layer 314 can be an inorganic layer. The second interlayer insulating layer 314 can be a single layer or multiple layers.
[0068] A third conductive layer is arranged on the second interlayer insulating layer 314. The third conductive layer can include a connection electrode 319 connecting the second conductive layer and a first pixel electrode 321 which will be described later. The connection electrode 319 can be electrically connected to one of the plurality of drain electrodes DE1, DE2, and DE3 (or the plurality of source electrodes SE1, SE2, and SE3) through a via hole penetrating the second interlayer insulating layer 314. The third conductive layer can be formed of the same material as that of the second conductive layer, or formed of one of the materials listed with respect to the second conductive layer or a combination thereof.
[0069] In another embodiment, the third conductive layer and the second interlayer insulating layer 314 can be omitted. In this case, the second conductive layer and the first pixel electrode 321 can be directly electrically connected to each other.
[0070] A protective layer 315 is arranged on the third conductive layer. The protective layer 315 is arranged to cover a pixel circuit including the plurality of transistors TR1, TR2, and TR3. The protective layer 315 can be a passivation layer or a planarization layer. The passivation layer can include SiO2, SiN x and the like, and the planarization layer can include a material such as acryl or polyimide. The protective layer 315 can include both the passivation layer and the planarization layer. The passivation layer can be arranged on the third conductive layer, and the planarization layer can be arranged on the passivation layer.
[0071] The buffer layer 311 to the protective layer 315 can correspond to the TFT circuit layer 12 shown in FIG. 1B. Figure 2
[0072] A plurality of first pixel electrodes 321 is arranged on the protective layer 315. The first pixel electrode 321 can be an anode of a light emitting diode arranged in a pixel. The light emitting diode can include an organic light emitting diode, a quantum dot light emitting diode, or the like. Hereinafter, the organic light emitting diode is described as an example.
[0073] The first pixel electrode 321 can be electrically connected to the connection electrode 319 through a via hole penetrating the protective layer 315. That is, the first pixel electrode 321 can be electrically connected to one of the plurality of drain electrodes DE1, DE2, and DE3 (or the plurality of source electrodes SE1, SE2, and SE3) of the plurality of transistors TR1, TR2, and TR3.
[0074] The first pixel electrode 321 can include a material having a high work function. The first pixel electrode 321 can include Indium Tin Oxide (ITO), Indium Zinc Oxide (IZO), Zinc Oxide (ZnO), Indium Oxide (In2O3), or the like. The exemplified conductive material has a transparent property while having a relatively high work function. When the display device 1 is a top emission display device, the first pixel electrode 321 can include a reflective material, such as silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), lithium (Li), calcium (Ca), or any mixture thereof, in addition to the exemplified conductive material. Accordingly, the first pixel electrode 321 can have a single layer structure made of the exemplified conductive material or the exemplified reflective material, or a multi-layer structure in which the exemplified conductive material and the reflective material are stacked.
[0075] A pixel definition layer 325 is disposed above the first pixel electrode 321. The pixel definition layer 325 includes an opening that exposes at least a portion of the first pixel electrode 321 (e.g., at least a central portion of the first pixel electrode 321). The pixel definition layer 325 can include an organic material or an inorganic material. In an embodiment, the pixel definition layer 325 can be formed of a material including a photoresist, a polyimide-based resin, an acrylic-based resin, a silicon compound, or the like.
[0076] The organic emission layer 322 is disposed on the first pixel electrode 321 exposed by the pixel definition layer 325.
[0077] A second pixel electrode 323 is disposed on the organic emission layer 322. The second pixel electrode 323 can be a common electrode disposed throughout the display device 1 (e.g., at least in the entire active area). Also, the second pixel electrode 323 can be a cathode of the organic light emitting diode.
[0078] The second pixel electrode 323 can include a material having a low work function. The second pixel electrode 323 can include Li, Ca, LiF / Ca, LiF / Al, Al, Mg, Ag, Pt, Pd, Ni, Au, Nd, Ir, Cr, BaF, Ba, or any compound or mixture thereof (e.g., a mixture of Ag and Mg). The second pixel electrode 323 can further include an auxiliary electrode. The auxiliary electrode can include a layer formed by depositing a low work function material and a transparent metal oxide (e.g., Indium Tin Oxide (ITO), Indium Zinc Oxide (IZO), Zinc Oxide (ZnO), Indium Tin Zinc Oxide (ITZO), or the like) on the low work function material.
[0079] When the display device 1 is a top emission display device, the conductive layer having a low work function as the conductive layer of the second pixel electrode 323 can be formed as a thin film, and a transparent conductive layer (for example, an indium tin oxide (ITO) layer, an indium zinc oxide (IZO) layer, a zinc oxide (ZnO) layer, an indium oxide (In2O3) layer, or the like) can be stacked on the conductive layer.
[0080] The first pixel electrode 321, the organic emission layer 322, and the second pixel electrode 323 as described above can constitute an organic light emitting diode.
[0081] The first pixel electrode 321 to the second pixel electrode 323 can correspond to Figure 2 the light emitting device layer 13 shown in FIG. 1.
[0082] A packaging layer is disposed above the second pixel electrode 323. The packaging layer can include a first inorganic layer 331, an organic layer 332, and a second inorganic layer 333 disposed sequentially on the second pixel electrode 323. The first inorganic layer 331 and the second inorganic layer 333 can include at least one selected from a cluster consisting of silicon oxide (SiO x ), silicon nitride (SiN x ), and silicon oxynitride (SiON x ), and the organic layer 332 can include any one selected from a cluster consisting of an epoxy resin, an acrylate, and a urethane acrylate.
[0083] The packaging layer as described above can correspond to Figure 2 the packaging layer 14 shown in FIG. 1.
[0084] An input sensing layer 15 is disposed on the packaging layer. The input sensing layer 15 can include an input sensor for sensing a touch input of a user. Hereinafter, the input sensor will be described in detail.
[0085] The input sensor can include a plurality of touch sensing electrodes TE and RE. The plurality of touch sensing electrodes TE and RE can sense a touch, a hovering, a gesture, a proximity of a user, or the like. The plurality of touch sensing electrodes TE and RE can be configured in different shapes according to various types such as a resistive type, a capacitive type, an electro-magnetic (EM) type, and an optical type. For example, when the plurality of touch sensing electrodes TE and RE are configured as capacitive type touch sensing electrodes, the plurality of touch sensing electrodes TE and RE can be configured as self-capacitive type touch sensing electrodes, mutual-capacitive type touch sensing electrodes, or the like.
[0086] The plurality of touch sensing electrodes TE and RE can include a transparent conductive material such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), or indium tin zinc oxide (ITZO), or include at least one opaque conductive material selected from a cluster consisting of molybdenum (Mo), aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), calcium (Ca), titanium (Ti), tantalum (Ta), tungsten (W), and copper (Cu).
[0087] The input sensor includes a plurality of first touch sensing electrodes RE, a plurality of second touch sensing electrodes TE, and a plurality of touch lines RX and TX connected to the plurality of first touch sensing electrodes RE and the plurality of second touch sensing electrodes TE, respectively. The input sensor can be directly patterned on the encapsulation layer to form a surface-embedded type input sensor.
[0088] The first touch sensing electrodes RE can be any one of a touch sensing electrode and a touch driving electrode, and the second touch sensing electrodes TE can be the other of the touch sensing electrode and the touch driving electrode. In the present embodiment, a case where the first touch sensing electrodes RE are the touch sensing electrodes and the second touch sensing electrodes TE are the touch driving electrodes is described as an example.
[0089] Although a case where the plurality of first touch sensing electrodes RE includes nine touch sensing electrodes RE1 to RE9 and the plurality of second touch sensing electrodes TE includes four touch driving electrodes TE1 to TE4 is shown in Figure 3 , the number of the first touch sensing electrodes RE and the second touch sensing electrodes TE is not limited to the number shown in Figure 3 .
[0090] The first touch sensing electrodes RE can extend in a row direction, and the second touch sensing electrodes TE can extend in a column direction intersecting the row direction. The row direction and the column direction are not limited to their terms, but can be understood as opposite directions intersecting each other.
[0091] In the embodiment, generally, the length of the second touch sensing electrodes TE in the column direction can be longer than the length of the first touch sensing electrodes RE in the row direction. The display device 1 can have a shape having a length in the column direction longer than a length in the row direction. The plurality of first touch sensing electrodes RE can be arranged in the column direction, and the plurality of second touch sensing electrodes TE can be arranged in the row direction. In the embodiment, the first touch sensing electrodes RE and the second touch sensing electrodes TE can be provided in a form in which a plurality of diamond-shaped patterned electrodes are connected.
[0092] The first touch sensing electrode RE and the second touch sensing electrode TE can be formed on the same layer. The first touch sensing electrode RE and the second touch sensing electrode TE can be insulated from each other at portions where the first touch sensing electrode RE and the second touch sensing electrode TE intersect each other. To prevent a short circuit of the first touch sensing electrode RE and the second touch sensing electrode TE disposed on the same layer, one of the first touch sensing electrode RE and the second touch sensing electrode TE can be connected by using a bridge pattern BE formed of a conductive material different from a material forming the first touch sensing electrode RE and the second touch sensing electrode TE.
[0093] When the second touch sensing electrode TE receives a detection signal (or a transmission signal) for detecting an external input, the first touch sensing electrode RE can be capacitively coupled to the second touch sensing electrode TE. When an input means is applied to a specific second touch sensing electrode TE among the plurality of capacitively coupled second touch sensing electrodes TE, a capacitance between the first touch sensing electrode RE and the second touch sensing electrode TE can be changed. The input sensor can calculate coordinate information of the input means by detecting the changed capacitance from the specific second touch sensing electrode TE.
[0094] The first touch sensing electrode RE can be electrically connected to the input controller 200 through the first touch line RX, and the second touch sensing electrode TE can be electrically connected to the input controller 200 through the second touch line TX. The input controller 200 can transmit a touch driving signal having a predetermined voltage level to the second touch sensing electrode TE and receive a touch sensing signal from the first touch sensing electrode RE, and can calculate coordinate information of an input means by detecting a changed capacitance.
[0095] The input sensing layer 15 can include a first touch conductive layer, a first touch insulating layer 341 disposed on the first touch conductive layer, a second touch conductive layer disposed on the first touch insulating layer 341, and a second touch insulating layer 342 disposed on the second touch conductive layer.
[0096] In one embodiment, the first touch conductive layer may be disposed directly on the encapsulation layer, but this disclosure is not limited thereto. In another embodiment, a base element may be included between the encapsulation layer and the first touch conductive layer. The base element may be made of a plastic such as polyethylene terephthalate (PET), polyimide (PI), polycarbonate (PC), polyethylene (PE), polypropylene (PP), polysulfone (PSF), polymethyl methacrylate (PMMA), triacetylcellulose (TAC), or cycloolefin polymer (COP).
[0097] In one embodiment, the bridging pattern BE described above may be formed of the same material as the first touch conductive layer and may be disposed on the same layer as the first touch conductive layer. The first touch conductive layer may include a transparent conductive material or an opaque conductive material as described above.
[0098] The first touch insulating layer 341 may include silicon compounds, metal oxides, and the like. The first touch insulating layer 341 may include contact holes that expose portions of the first touch conductive layer.
[0099] The second touch conductive layer may include a first touch sensing electrode RE and a second touch sensing electrode TE. Each of the plurality of first touch sensing electrodes RE may be electrically connected to the bridging pattern BE through a contact hole penetrating the first touch insulating layer 341.
[0100] The second touch insulating layer 342 may comprise the same material as the first touch insulating layer 341. In another embodiment, the second touch insulating layer 342 may be omitted.
[0101] In one embodiment, multiple touch lines TX and RX can be formed simultaneously with either a first touch conductive layer or a second touch conductive layer. In another embodiment, the multiple touch lines TX and RX can have a dual-line structure, wherein the layer containing the multiple touch lines TX and RX includes both the first touch conductive layer and the second touch conductive layer.
[0102] The input sensor can detect the user's touch input within the valid area AA.
[0103] The first touch conductive layer to the second touch insulating layer 342 can correspond to Figure 2 The input sensing layer 15 is shown. That is, Figure 2 The input sensing layer 15 shown can be directly patterned onFigure 2 The encapsulation layer 14 shown in FIG. 1A is formed on the input sensing layer 15 to form a top embedded type input sensing layer.
[0104] The window substrate 302 can be disposed on the input sensing layer 15. The window substrate 302 can include a transparent substrate including glass, plastic, and the like. The window substrate 302 can be a sealing substrate or a protective substrate.
[0105] The window substrate 302 can correspond to Figure 2 The second substrate 16 shown in FIG. 1A.
[0106] Although not shown in the drawings, an adhesive layer can be included between the input sensing layer 15 and the window substrate 302. The adhesive layer is interposed between the input sensing layer 15 and the second substrate 16 to couple the input sensing layer 15 and the second substrate 16 to each other. In an example, the adhesive layer can include a film having adhesiveness (e.g., an Optically Clear Adhesive (OCA)). In another example, the adhesive layer can include an Optically Clear Resin (OCR).
[0107] Figure 5 is a layout view of a portion of the input sensing layer 15_1 which is a modification of the input sensing layer 15 shown in FIG. 1A. Figure 3 is a layout view of a portion of the input sensing layer 15_1 which is a modification of the input sensing layer 15 shown in FIG. 1A.
[0108] Referring to Figure 5 The first touch sensing electrode RE and the second touch sensing electrode TE in the input sensing layer 15_1 can be a mesh pattern. The mesh pattern can overlap the pixel definition layer 325. In some embodiments, the mesh pattern can not overlap the first pixel electrode 321.
[0109] The mesh pattern can include at least one opaque conductive material selected from a cluster consisting of molybdenum (Mo), aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), calcium (Ca), titanium (Ti), tantalum (Ta), tungsten (W), and copper (Cu).
[0110] Hereinafter, a correlation between members directly related to the display of an image and members related to external input from a user will be described. The members directly related to the display of an image can be disposed in the TFT circuit layer 12 and the light emitting device layer 13, and the members related to external input from a user can be disposed in the input sensing layer 15.
[0111] Figure 6 is a schematic block diagram of a display device according to an embodiment of the disclosure. Figure 7 is a layout view of a portion of the input sensing layer 15_1 which is a modification of the input sensing layer 15 shown in FIG. 1A. Figure 6a block diagram showing the relationship between the drive controller 100 and the input controller 200 shown in FIG. 1. Figure 8 is a conceptual diagram showing Figure 7 is a circuit diagram showing the vertical synchronization signal voltage regulator 110 in the drive controller 100 shown in FIG. 1.
[0112] Referring to Figure 6 , the display device includes a display panel 10 including a plurality of pixels PX, a scan driver 20, a data driver 30, a timing controller 40, and an input controller 200.
[0113] The display panel 10 includes a plurality of pixels PX at intersections of a plurality of scan lines SL1 to SLn and a plurality of data lines DL1 to DLm, to be arranged in a matrix form. Here, m and n are natural numbers. The plurality of pixels PX emit light, thereby displaying an image in an active area AA.
[0114] The plurality of scan lines SL1 to SLn can extend in a row direction, and the plurality of data lines DL1 to DLm can extend in a column direction. The row direction and the column direction can be opposite.
[0115] The scan driver 20 generates a scan signal, and transmits the scan signal to each pixel PX through a corresponding scan line among the plurality of scan lines SL1 to SLn.
[0116] The data driver 30 transmits a data signal to each pixel PX through a corresponding data line among the plurality of data lines DL1 to DLm. The data signal is supplied to the pixel PX selected by the scan signal each time the scan signal is supplied to a corresponding scan line among the plurality of scan lines SL1 to SLn.
[0117] The timing controller 40 converts a plurality of image signals R, G, and B transmitted from the outside into a plurality of image data signals DR, DG, and DB, and transmits the plurality of image data signals DR, DG, and DB to the data driver 30. Also, the timing controller 40 receives a vertical synchronization signal Vsync, a horizontal synchronization signal Hsync, and a clock signal MCLK from the outside, to generate control signals for controlling driving of the scan driver 20 and the data driver 30 and transmit the control signals to the scan driver 20 and the data driver 30, respectively. The outside can be an application processor.
[0118] That is, the timing controller 40 can generate a scan driving control signal SCS for controlling the scan driver 20 and a data driving control signal DCS for controlling the data driver 30, and transmit the scan driving control signal SCS and the data driving control signal DCS to the scan driver 20 and the data driver 30, respectively.
[0119] Although not shown in the drawing, each of the plurality of pixels PX is supplied with a first power supply voltage (not shown) and a second power supply voltage (not shown). The first power supply voltage can be a predetermined high-level voltage, and the second power supply voltage can be a voltage lower than the first power supply voltage.
[0120] Each of the plurality of pixels PX emits light having a predetermined brightness according to a driving current flowing through the light emitting diode in response to a data signal transmitted through a corresponding data line among the plurality of data lines DL1 to DLm.
[0121] The first power supply voltage, the second power supply voltage, and the like can be supplied from an external voltage source.
[0122] The scan driver 20, the data driver 30, and the timing controller 40 can be included in a driving controller 100 for controlling the operation of the display panel 10. The driving controller 100 can be, for example, a driver IC. At least some of the elements included in the display panel 10 can be directly electrically connected to the driver IC.
[0123] The driving frequency of the driving controller 100 can vary. In an embodiment, the driving frequency of the driving controller 100 can vary in the range of 1 Hz to 120 Hz. In an embodiment, the driving controller 100 can control the display panel 10 to be driven at three or more frequencies in the above range. For example, according to the type of an image or the position of an image, the display panel 10 can be selectively driven among 1 Hz, 15 Hz, 30 Hz, 60 Hz, 90 Hz, and 120 Hz as exemplary frequencies.
[0124] The driving frequency can vary in several forms. In an example, the driving controller 100 can control the display panel 10 to be driven at 1 Hz in a partial area of the active area AA, to be driven at 60 Hz in another partial area of the active area AA, and to be driven at 120 Hz in other areas of the active area AA. In another example, the driving controller 100 can control the display panel 10 to be driven at 1 Hz during one period, to be driven at 60 Hz during another period, and to be driven at 120 Hz during other periods.
[0125] The driving controller 100 can control the display panel 10 to be driven at a variable frequency by the rule of the vertical synchronization signal Vsync and the horizontal synchronization signal Hsync in the timing controller 40.
[0126] The input controller 200 can receive a vertical synchronization signal Vsync and a horizontal synchronization signal Hsync from the drive controller 100 (e.g., from the timing controller 40), and provide a touch driving signal to the input sensor and receive a touch sensing signal from the input sensor. The input controller 200 can be, for example, a touch IC.
[0127] In an embodiment, the input controller 200 can provide the touch driving signal to the input sensor and receive the touch sensing signal from the input sensor when the scan signal and the data signal are not transmitted to the display panel 10.
[0128] When the input sensor is formed as a table-embedded input sensor, the scan signal and the data signal can act as noise for the touch driving signal and the touch sensing signal. Accordingly, the input controller 200 can control the touch driving signal and the touch sensing signal for the input sensor so that a period in which the touch driving signal and / or the touch sensing signal are transmitted does not overlap with a period in which the scan signal and the data signal are transmitted to the display panel 10.
[0129] Referring to Figure 7 , the input controller 200 can receive a vertical synchronization signal Vsync and a horizontal synchronization signal Hsync from the drive controller 100 (e.g., from the timing controller 40) to determine a period in which the scan signal and the data signal are transmitted to the display panel 10.
[0130] In an embodiment, the input controller 200 and the drive controller 100 can communicate with each other through a plurality of signal lines to exchange signals. The plurality of signal lines can include a vertical synchronization signal information line Vsyncl and a horizontal synchronization signal information line Hsyncl. In an embodiment, the plurality of signal lines can be connected to a plurality of sets of input / output pins GPIO1 and GPIO2, which are respectively arranged at both end portions of the input controller 200 and the drive controller 100 and are respectively coupled to the input controller 200 and the drive controller 100. For example, an input pin GPIO1a of the vertical synchronization signal information line Vsyncl can be connected to the drive controller 100, and an output pin GPIO1b of the vertical synchronization signal information line Vsyncl can be connected to the input controller 200. Also, an input pin GPIO2a of the horizontal synchronization signal information line Hsyncl can be connected to the drive controller 100, and an output pin GPIO2b of the horizontal synchronization signal information line Hsyncl can be connected to the input controller 200. Each of the vertical synchronization signal Vsync and the horizontal synchronization signal Hsync provided from the drive controller 100 to the input controller 200 can be a pulse width modulation signal having a predetermined amplitude.
[0131] In an embodiment, an amplitude of the vertical synchronization signal Vsync supplied from the driving controller 100 to the input controller 200 can vary. Similarly, an amplitude of the horizontal synchronization signal Hsync supplied from the driving controller 100 to the input controller 200 can vary.
[0132] In an embodiment, the driving controller 100 can include a vertical synchronization signal voltage regulator 110 and a horizontal synchronization signal voltage regulator 120 to vary the amplitude of the vertical synchronization signal Vsync and the amplitude of the horizontal synchronization signal Hsync. The vertical synchronization signal voltage regulator 110 can be electrically connected to the input pin GPIO1a connected with the vertical synchronization signal information line Vsyncl. The horizontal synchronization signal voltage regulator 120 can be electrically connected to the input pin GPIO2a connected with the horizontal synchronization signal information line Hsyncl.
[0133] Reference will be made to Figure 8 A circuit diagram of the vertical synchronization signal voltage regulator 110 and a method of regulating the amplitude of the vertical synchronization signal Vsync will be described. A circuit diagram of the horizontal synchronization signal voltage regulator 120 and a method of regulating the amplitude of the horizontal synchronization signal Hsync are substantially the same as the circuit diagram of the vertical synchronization signal voltage regulator 110 and the method of regulating the amplitude of the vertical synchronization signal Vsync, and thus a repeated description will be omitted.
[0134] The vertical synchronization signal voltage regulator 110 can include a plurality of switching elements SW11 to SW16 and a plurality of resistors R11 to R16 to vary the amplitude of the vertical synchronization signal Vsync. The amplitude of the vertical synchronization signal Vsync input to the vertical synchronization signal voltage regulator 110 can be regulated by at least some of the plurality of switching elements SW11 to SW16 and at least some of the plurality of resistors R11 to R16, and the vertical synchronization signal having the regulated amplitude can be supplied to the input pin GPIO1a connected to the vertical synchronization signal information line Vsyncl.
[0135] In an embodiment, in the vertical synchronization signal voltage regulator 110, the plurality of resistors R11 to R16 having specific resistance values can be connected in series, and each of the plurality of switching elements SW11 to SW16 can be connected between a node connecting adjacent resistors among the plurality of resistors R11 to R16 and the input pin GPIO1a of the vertical synchronization signal information line Vsyncl. Each of the plurality of switching elements SW11 to SW16 can be provided in the form of a thin film transistor, but the present disclosure is not limited thereto.
[0136] For example, in the vertical synchronization signal voltage regulator 110, the first resistor R11 can be connected between the first node N11 and the second node N12, the second resistor R12 can be connected between the second node N12 and the third node N13, the third resistor R13 can be connected between the third node N13 and the fourth node N14, the fourth resistor R14 can be connected between the fourth node N14 and the fifth node N15, the fifth resistor R15 can be connected between the fifth node N15 and the sixth node N16, and the sixth resistor R16 can be connected between the sixth node N16 and the seventh node N17. The first node N11 can be a node electrically connected to an input terminal of the vertical synchronization signal Vsync input, and the seventh node N17 can be a node electrically connected to the ground.
[0137] The first switch element SW11 can be connected between the first node N11 and the input pin GPIO1a of the vertical synchronization signal information line Vsyncl, the second switch element SW12 can be connected between the second node N12 and the input pin GPIO1a of the vertical synchronization signal information line Vsyncl, the third switch element SW13 can be connected between the third node N13 and the input pin GPIO1a of the vertical synchronization signal information line Vsyncl, the fourth switch element SW14 can be connected between the fourth node N14 and the input pin GPIO1a of the vertical synchronization signal information line Vsyncl, the fifth switch element SW15 can be connected between the fifth node N15 and the input pin GPIO1a of the vertical synchronization signal information line Vsyncl, and the sixth switch element SW16 can be connected between the sixth node N16 and the input pin GPIO1a of the vertical synchronization signal information line Vsyncl.
[0138] In an embodiment, each amplitude of the vertical synchronization signal Vsync and / or the horizontal synchronization signal Hsync corresponding to each driving frequency can be adjusted to have a predetermined amplitude. For example, each amplitude of the corresponding vertical synchronization signal Vsync and / or the corresponding horizontal synchronization signal Hsync can be set to become smaller as the driving frequency becomes smaller, but the present disclosure is not limited thereto.
[0139] In an exemplary embodiment, when the driving controller 100 controls the display panel 10 to be driven at 120 Hz, the first switch element SW11 can be turned on, and the other switch elements SW12 to SW16 can be turned off. Accordingly, the amplitude of the vertical synchronization signal Vsync provided to the input pin GPIO1a of the vertical synchronization signal information line Vsyncl can be adjusted to 1.8 V.
[0140] In addition, when the driving controller 100 controls the display panel 10 to be driven at 90 Hz, the second switching element SW12 can be turned on, and the other switching elements SW11 and SW13 to SW16 can be turned off. Accordingly, the amplitude of the vertical synchronization signal Vsync provided to the input pin GPIO1a of the vertical synchronization signal information line Vsyncl can be adjusted to 1.6 V.
[0141] In addition, when the driving controller 100 controls the display panel 10 to be driven at 60 Hz, the third switching element SW13 can be turned on, and the other switching elements SW11, SW12, and SW14 to SW16 can be turned off. Accordingly, the amplitude of the vertical synchronization signal Vsync provided to the input pin GPIO1a of the vertical synchronization signal information line Vsyncl can be adjusted to 1.4 V.
[0142] In addition, when the driving controller 100 controls the display panel 10 to be driven at 30 Hz, the fourth switching element SW14 can be turned on, and the other switching elements SW11 to SW13, SW15, and SW16 can be turned off. Accordingly, the amplitude of the vertical synchronization signal Vsync provided to the input pin GPIO1a of the vertical synchronization signal information line Vsyncl can be adjusted to 1.2 V.
[0143] In addition, when the driving controller 100 controls the display panel 10 to be driven at 15 Hz, the fifth switching element SW15 can be turned on, and the other switching elements SW11 to SW14 and SW16 can be turned off. Accordingly, the amplitude of the vertical synchronization signal Vsync provided to the input pin GPIO1a of the vertical synchronization signal information line Vsyncl can be adjusted to 1.0 V.
[0144] In addition, when the driving controller 100 controls the display panel 10 to be driven at 1 Hz, the sixth switching element SW16 can be turned on, and the other switching elements SW11 to SW15 can be turned off. Accordingly, the amplitude of the vertical synchronization signal Vsync provided to the input pin GPIO1a of the vertical synchronization signal information line Vsyncl can be adjusted to 0.8 V.
[0145] The driving frequency and the adjusted amplitude of the vertical synchronization signal Vsync are merely exemplary, and can be set to various frequency levels and amplitudes as needed.
[0146] Figure 9 is a timing diagram showing a driving method of the input controller 200 in the display apparatus according to the disclosure.
[0147] Referring to Figure 9As described above, the input controller 200 can receive the vertical synchronization signal having various amplitudes from the driving controller 100. The input controller 200 can determine at what frequency the driving controller 100 controls the display panel 10 through the amplitude of the vertical synchronization signal Vsync provided from the driving controller 100.
[0148] For example, when the amplitude of the vertical synchronization signal Vsync provided to the input controller 200 is 1.8V, the input controller 200 can recognize that the driving controller 100 controls the display panel 10 to be driven at 120Hz. Also, when the amplitude of the vertical synchronization signal Vsync provided to the input controller 200 is 1.6V, the input controller 200 can recognize that the driving controller 100 controls the display panel 10 to be driven at 90Hz. Also, when the amplitude of the vertical synchronization signal Vsync provided to the input controller 200 is 1.4V, the input controller 200 can recognize that the driving controller 100 controls the display panel 10 to be driven at 60Hz. Also, when the amplitude of the vertical synchronization signal Vsync provided to the input controller 200 is 1.2V, the input controller 200 can recognize that the driving controller 100 controls the display panel 10 to be driven at 30Hz. Also, when the amplitude of the vertical synchronization signal Vsync provided to the input controller 200 is 1.0V, the input controller 200 can recognize that the driving controller 100 controls the display panel 10 to be driven at 15Hz. Also, when the amplitude of the vertical synchronization signal Vsync provided to the input controller 200 is 0.8V, the input controller 200 can recognize that the driving controller 100 controls the display panel 10 to be driven at 1Hz.
[0149] In an embodiment, the input controller 200 can receive the vertical synchronization signal Vsync at least once per frame. The input controller 200 can receive the horizontal synchronization signal Hsync at least as many times as the number of scan lines per frame, or more.
[0150] In an embodiment, the input controller 200 provides the touch driving signal to the input sensor for a period (see Figure 9The period Tb) of the signal Tx shown in FIG. 10 can not overlap with the period in which the drive controller 100 supplies a pulse of the vertical synchronization signal Vsync (a portion of the vertical synchronization signal Vsync having a lower value) to the input controller 200 and the display panel 10 and / or the period in which the drive controller 100 supplies a pulse of the horizontal synchronization signal Hsync (a portion of the horizontal synchronization signal Hsync having a lower value) to the input controller 200 and the display panel 10. For example, the phase (or rising / falling transition time) of the touch drive signal can be different from the phase (or rising / falling transition time) of the scan signal or the data signal. In another example, the period in which the input controller 200 supplies the touch drive signal to the input sensor can not overlap with the period in which the drive controller 100 supplies the scan signal to the display panel 10 and / or the period in which the drive controller 100 supplies the data signal to the display panel 10. That is, the period in which the input controller 200 supplies the touch drive signal to the input sensor can not overlap with the period in which the drive controller 100 supplies the voltage signal to the plurality of transistors TR1, TR2, and TR3 of the pixel PX in the display panel 10. The period Tb) in which the input controller 200 supplies the touch drive signal to the input sensor can not overlap with the period in which the light emitting state of the organic light emitting diode of the pixel PX is changed so that display noise occurs (see FIG. 10B). In the drawing, the display noise is exemplified as noise that occurs when the full white data signal and the full black data signal are alternately supplied to the pixel rows arranged in the column direction, and the display noise degrades the touch drive signal from the display panel 10. The touch drive signal is greatly affected by noise when the full white data signal and the full black data signal are alternately supplied to the pixel rows arranged in the column direction. Figure 9 The display noise shown in FIG. 10B and the signal Tx) can not overlap with the period in which the drive controller 100 supplies a pulse of the vertical synchronization signal Vsync (a portion of the vertical synchronization signal Vsync having a lower value) to the input controller 200 and the display panel 10 and / or the period in which the drive controller 100 supplies a pulse of the horizontal synchronization signal Hsync (a portion of the horizontal synchronization signal Hsync having a lower value) to the input controller 200 and the display panel 10. For example, the phase (or rising / falling transition time) of the touch drive signal can be different from the phase (or rising / falling transition time) of the scan signal or the data signal. In another example, the period in which the input controller 200 supplies the touch drive signal to the input sensor can not overlap with the period in which the drive controller 100 supplies the scan signal to the display panel 10 and / or the period in which the drive controller 100 supplies the data signal to the display panel 10. That is, the period in which the input controller 200 supplies the touch drive signal to the input sensor can not overlap with the period in which the drive controller 100 supplies the voltage signal to the plurality of transistors TR1, TR2, and TR3 of the pixel PX in the display panel 10. The period Tb) in which the input controller 200 supplies the touch drive signal to the input sensor can not overlap with the period in which the light emitting state of the organic light emitting diode of the pixel PX is changed so that display noise occurs (see
[0151] Since the driving frequency of the display panel 10 is changed, the influence of noise that degrades the touch drive signal from the display panel 10 can be minimized.
[0152] Meanwhile, the input controller 200 can initialize the voltage levels of the plurality of touch sensing electrodes TE and RE. The input controller 200 can provide an initialization voltage signal CA_RST to each of the plurality of touch sensing electrodes TE and RE before the touch driving signal is provided to the plurality of touch sensing electrodes TE and after the provision of the touch driving signal is ended. Accordingly, each of the plurality of touch sensing electrodes TE and RE can be initialized to a predetermined voltage level before the touch driving signal is provided to the plurality of touch sensing electrodes TE and after the provision of the touch driving signal is ended. In an embodiment, a period in which the initialization voltage signal CA_RST is provided can not overlap with a period in which the driving controller 100 provides a pulse of the vertical synchronization signal Vsync and / or a period in which the driving controller 100 provides a pulse of the horizontal synchronization signal Hsync. At least a portion of the period in which the initialization voltage signal CA_RST is provided can overlap with a period in which the touch driving signal is provided.
[0153] Accordingly, the input sensor can accurately recognize the touch input of the user.
[0154] Although the case where the driving controller 100 changes the amplitude of the vertical synchronization signal Vsync and provides the vertical synchronization signal Vsync having the changed amplitude to the input controller 200 is described in the present embodiment, the person skilled in the art will achieve the same purpose by changing the amplitude of the horizontal synchronization signal Hsync and providing the horizontal synchronization signal Hsync having the changed amplitude to the input controller 200.
[0155] Next, a display apparatus according to another embodiment will be described. Hereinafter, components identical or similar to those shown in Figures 1 to 9 will be omitted.
[0156] Figure 10 is a circuit diagram showing the concept of the vertical synchronization signal voltage regulator 110 and the horizontal synchronization signal voltage regulator 120 in the driving controller 100 in the display apparatus according to another embodiment of the present disclosure.
[0157] Referring to Figure 10 , the display apparatus according to the present embodiment is different from the embodiment shown in Figure 8 in that the input controller 200 determines the driving frequency by collecting the amplitude of the vertical synchronization signal Vsync and the amplitude of the horizontal synchronization signal Hsync.
[0158] In an embodiment, the input controller 200 can determine the driving frequency of the display panel 10 by using both the amplitude of the vertical synchronization signal Vsync and the amplitude of the horizontal synchronization signal Hsync. For example, the input controller 200 can determine the driving frequency by the sum of the amplitude of the vertical synchronization signal Vsync and the amplitude of the horizontal synchronization signal Hsync.
[0159] In an embodiment, in the horizontal synchronization signal voltage regulator 120, a plurality of resistors R21 to R26 having specific resistance values can be connected in series, and each of a plurality of switching elements SW21 to SW26 can be connected between a node connecting adjacent resistors among the plurality of resistors R21 to R26 and the input pin GPIO2a of the horizontal synchronization signal information line Hsyncl. Each of the plurality of switching elements SW21 to SW26 can be provided in the form of a thin film transistor, but the present disclosure is not limited thereto.
[0160] For example, in the horizontal synchronization signal voltage regulator 120, the first resistor R21 can be connected between a first node N21 and a second node N22, the second resistor R22 can be connected between the second node N22 and a third node N23, the third resistor R23 can be connected between the third node N23 and a fourth node N24, the fourth resistor R24 can be connected between the fourth node N24 and a fifth node N25, the fifth resistor R25 can be connected between the fifth node N25 and a sixth node N26, and the sixth resistor R26 can be connected between the sixth node N26 and a seventh node N27. The first node N21 can be a node to which an input terminal of the horizontal synchronization signal Hsync is electrically connected, and the seventh node N27 can be a node electrically connected to the ground.
[0161] The first switching element SW21 can be connected between the first node N21 and the input pin GPIO2a of the horizontal synchronization signal information line Hsyncl, the second switching element SW22 can be connected between the second node N22 and the input pin GPIO2a of the horizontal synchronization signal information line Hsyncl, the third switching element SW23 can be connected between the third node N23 and the input pin GPIO2a of the horizontal synchronization signal information line Hsyncl, the fourth switching element SW24 can be connected between the fourth node N24 and the input pin GPIO2a of the horizontal synchronization signal information line Hsyncl, the fifth switching element SW25 can be connected between the fifth node N25 and the input pin GPIO2a of the horizontal synchronization signal information line Hsyncl, and the sixth switching element SW26 can be between the sixth node N26 and the input pin GPIO2a of the horizontal synchronization signal information line Hsyncl.
[0162] In an exemplary embodiment, the driving controller 100 can adjust the amplitude of the vertical synchronization signal Vsync to 1.2V through the third switching element SW13 in the vertical synchronization signal voltage regulator 110, and adjust the amplitude of the horizontal synchronization signal Hsync to 0.6V through the fifth switching element SW25 in the horizontal synchronization signal voltage regulator 120. The driving controller 100 can receive the vertical synchronization signal Vsync whose amplitude is adjusted to 1.2V and the horizontal synchronization signal Hsync whose amplitude is adjusted to 0.6V from the input controller 200, and identify the driving frequency corresponding to the voltage of 1.8V as the sum of the amplitude of the vertical synchronization signal Vsync and the amplitude of the horizontal synchronization signal Hsync.
[0163] Figure 11 FIG. 9 is a block diagram illustrating a relationship between a driving controller 100 and an input controller 200 in a display apparatus according to still another embodiment of the present disclosure.
[0164] Referring to Figure 11 , the display apparatus according to this embodiment is different from the embodiment shown in Figure 7 in that a signal line connecting the driving controller 100 and the input controller 200 further includes a frequency information line FQ1.
[0165] The frequency information line FQ1 can be connected to an input pin GPIO3a and an output pin GPIO3b, and the input pin GPIO3a and the output pin GPIO3b are respectively arranged at both ends of the input controller 200 and the driving controller 100 and are respectively coupled to the driving controller 100 and the input controller 200.
[0166] The frequency information line FQ1 can transmit a binary signal according to the driving frequency of the driving controller 100. For example, when the driving frequency is a first frequency, a signal of "0" can be transmitted through the frequency information line FQ1. When the driving frequency is a second frequency different from the first frequency, a signal of "1" can be transmitted through the frequency information line FQ1.
[0167] The frequency information line regulator 130 can adjust whether "0" or "1" is to be transmitted through the frequency information line FQ1.
[0168] Accordingly, the input controller 200 can easily identify two specific frequencies at which the driving controller 100 drives the display.
[0169] According to the present disclosure, the accuracy of identifying whether a touch occurs or calculating touch coordinates can be increased.
[0170] Exemplary embodiments have been disclosed herein and, although specific terms are employed, they are used in a generic and descriptive sense only and not for purposes of limitation, unless otherwise specifically indicated. In some instances, as will be apparent to those of ordinary skill in the art upon reading this application, the features, characteristics, and / or elements described in connection with a particular embodiment can be used singly or in any combination with the features, characteristics, and / or elements described in connection with other embodiments. Accordingly, it will be understood that various changes in form and details can be made without departing from the spirit and scope of the disclosure as set forth in the following claims.
Claims
1. A display apparatus comprising a display panel including a plurality of pixels and an input sensor for sensing an input of a user, the display apparatus comprising: a drive controller configured to provide a scan signal and a data signal to the display panel according to a drive frequency; an input controller configured to provide a touch drive signal to the input sensor; a horizontal synchronization signal information line connecting the drive controller and the input controller through which a horizontal synchronization signal is transmitted; and a vertical synchronization signal information line connecting the drive controller and the input controller through which a vertical synchronization signal is transmitted, wherein an amplitude of the vertical synchronization signal or an amplitude of the horizontal synchronization signal varies according to the drive frequency.
2. The display device of claim 1, wherein, a period in which the touch drive signal is provided does not overlap with a period of a pulse in which the horizontal synchronization signal is provided and a period of a pulse in which the vertical synchronization signal is provided.
3. The display device of claim 1, wherein, a period in which the touch drive signal is provided does not overlap with a period in which the scan signal is provided and a period in which the data signal is provided.
4. The display device of claim 1, wherein, the drive frequency has a plurality of values, and wherein the amplitude of the vertical synchronization signal or the amplitude of the horizontal synchronization signal which varies according to the plurality of values of the drive frequency has a predetermined value.
5. The display device of claim 4, wherein, the plurality of values of the drive frequency is in a range of 1 Hz to 120 Hz.
6. The display device of claim 1, wherein, the drive controller comprises: a vertical synchronization signal voltage regulator which changes the amplitude of the vertical synchronization signal, the vertical synchronization signal voltage regulator being electrically connected to one end of the vertical synchronization signal information line.
7. The display device of claim 6, wherein, the vertical synchronization signal voltage regulator comprises: a plurality of resistors connected in series; and a plurality of switching elements, each of which is electrically connected between the one end of the vertical synchronization signal information line and a node arranged between adjacent ones of the resistors.
8. The display device of claim 1, wherein, the input sensor comprises: a touch drive electrode to which the touch drive signal is provided; and a touch sense electrode from which a touch sense signal is received, and wherein the touch drive electrode and the touch sense electrode intersect each other while being insulated from each other.
9. The display device of claim 8, wherein, an initialization voltage signal for allowing the touch drive electrode to be initialized to a predetermined voltage level is provided before the touch drive signal is provided to the touch drive electrode and before the provision of the touch drive signal is ended.
10. The display device of claim 8, wherein, the touch drive electrode and the touch sense electrode are arranged on the same layer.
11. The display device of claim 10, wherein, any one of the touch drive electrode and the touch sense electrode is electrically connected to the other one of the touch drive electrode and the touch sense electrode at a position at which the touch drive electrode and the touch sense electrode intersect each other through a bridge pattern arranged on another layer.
12. The display device of claim 1, wherein, The amplitude of the vertical synchronization signal has a first amplitude when the drive frequency is a first frequency and a second amplitude less than the first amplitude when the drive frequency is a second frequency less than the first frequency.
13. The display device of claim 1, wherein, Both the amplitude of the vertical synchronization signal and the amplitude of the horizontal synchronization signal vary as a function of the drive frequency.
14. The display device of claim 13, wherein, The sum of the amplitude of the vertical synchronization signal and the amplitude of the horizontal synchronization signal has a first amplitude when the drive frequency is a first frequency and a second amplitude less than the first amplitude when the drive frequency is a second frequency less than the first frequency.
15. The display device of claim 1, further comprising: a frequency information line connecting the drive controller and the input controller through which a binary signal is transmitted, wherein the frequency information line transmits a signal of "0" when the drive frequency is a first frequency and transmits a signal of "1" when the drive frequency is a second frequency different from the first frequency.
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