A high-efficiency silicon heterojunction solar cell and a method for preparing the same

Abstract

The present invention discloses an efficient silicon heterojunction solar cell and a preparation method thereof, belonging to the technical field of solar cells. On the front side of the N-type crystalline silicon wafer of the battery of the present invention, a thin SiO2 layer, a hydrogenated amorphous carbon silicon oxide thin film layer, a C-doped SiO2 layer, an amorphous silicon doped N-type layer, a TCO conductive layer and an electrode are sequentially arranged; on the back side, a thin SiO2 layer, a hydrogenated amorphous carbon silicon oxide thin film layer, a C-doped SiO2 layer, an amorphous silicon doped P-type layer, a TCO conductive layer and an electrode are sequentially arranged. The amorphous silicon doped P-type layer includes a lightly doped B amorphous silicon layer and a heavily doped B amorphous silicon layer. The heterojunction solar cell of the present invention using a hydrogenated amorphous carbon silicon oxide thin film as an intrinsic passivation layer realizes excellent passivation effect on the surface of crystalline silicon and reduces interface carrier recombination; at the same time, an improved double diffusion B process is adopted to prevent the reduction of the band gap and unnecessary passivation film doping caused by the diffusion of B atoms to the intrinsic amorphous silicon layer during B2H6 doping, and improves the conversion efficiency of the silicon heterojunction battery.

Description

Technical Field

[0001] The present invention relates to the technical field of solar cells, and more specifically to a high-efficiency silicon heterojunction solar cell and a preparation method thereof. Background Art

[0002] At present, the mainstream battery products in the market are P-type monocrystalline PERC batteries, and the efficiency of P-type PERC batteries has reached its upper limit. However, with the market demand and the continuous development of industry technology, N-type crystalline silicon solar cell technology has received more and more attention in recent years, mainly including passivated emitter back surface fully diffused cells (n-PERT), tunnel oxide passivated contact cells (TOPCon) and heterojunction cells (HJT). N-type crystalline silicon solar cells have made further breakthroughs in the conversion efficiency of crystalline silicon solar cells.

[0003] The structure of the existing HJT cell is to make an amorphous silicon intrinsic layer and a doped layer on both sides of N-type monocrystalline silicon. The amorphous silicon intrinsic layer mainly passivates the surface defects of crystalline silicon, reduces the surface defect states, and thus reduces carrier recombination; the amorphous silicon doped layer mainly forms a PIN junction and a field effect passivation layer with crystalline silicon. Silicon oxide (SiO2) has very excellent surface passivation properties and can effectively reduce the interface state density, but the bandgap width of silicon oxide is wider than that of amorphous silicon.

[0004] A silicon heterojunction cell is a solar cell with an added layer of intrinsic hydrogenated amorphous silicon layer between the N-type amorphous silicon layer and the crystalline silicon substrate. The intrinsic amorphous silicon layer is used to passivate the doped silicon substrate. However, the intrinsic amorphous silicon layer deposited on the crystalline silicon substrate has microscopic defects caused by H plasma bombardment due to hydrogen doping, which leads to epitaxial growth when hydrogenated amorphous silicon is formed, affecting the passivation effect and causing a low open circuit voltage. In addition, since the epitaxial layer formed on the side of the silicon substrate facing the P-type amorphous silicon layer is within the built-in electric field, the epitaxial layer has a greater impact on the silicon heterojunction solar cell.

[0005] The main method to inhibit the epitaxial growth of hydrogenated amorphous silicon on the surface of crystalline silicon is to not dope the amorphous silicon layer close to the outermost layer of crystalline silicon with H, that is, the thin layer of intrinsic amorphous silicon is in direct contact with the silicon substrate. In addition, an ultra-thin intrinsic silicon oxide layer can be first deposited at the interface of the crystalline silicon substrate on the side of the P-type amorphous silicon layer, and then a layer of intrinsic amorphous silicon layer can be deposited. The oxygen doping in the intrinsic silicon oxide layer is used to inhibit the epitaxial growth of the intrinsic amorphous silicon film, reduce the number of defects at the interface, and achieve a better passivation effect. However, the diffusion of doped atoms in the doping layer toward the intrinsic layer also affects the passivation effect.

[0006] On the other hand, the prior art uses B2H6 gas doping to complete the amorphous silicon doping layer P layer. The p-type layer of the amorphous silicon doping layer formed by B2H6 gas doping has poor thermal stability, and B atoms easily diffuse into the amorphous silicon intrinsic layer, affecting the passivation effect of the intrinsic layer, resulting in low open circuit voltage and low conversion efficiency of the solar cell. In addition, the amorphous silicon doping layer formed by B2H6 gas doping has a low bandgap width, which will absorb more sunlight and increase optical losses, resulting in low short circuit current and low conversion efficiency of the solar cell.

[0007] After searching, the Chinese patent number is ZL 201811472120.6, and the patent name is: Emitter structure of crystalline silicon heterojunction solar cell and its preparation method; the application includes N-type crystalline silicon wafer, amorphous silicon intrinsic layer is provided on the front and back of the N-type crystalline silicon wafer, TCO conductive film is provided on the outside of the amorphous silicon intrinsic layer, several Ag electrodes are provided on the outside of the TCO conductive film, an amorphous silicon doping layer N layer is provided between the amorphous silicon intrinsic layer and the TCO conductive film on one side of the N-type crystalline silicon wafer, and a TMB doping layer and a B2H6 doping layer are provided between the amorphous silicon intrinsic layer and the TCO conductive film on the other side. The application adopts TMB gas for doping, which prevents the doping atom B from diffusing into the amorphous silicon intrinsic layer and improves the open circuit voltage; TMB gas has a large bandgap, light can pass through the doping layer more effectively, and the short circuit current is improved; B2H6 gas is used for doping on the side close to the TCO, and the conductivity of the doping layer is better; the photoelectric conversion efficiency of the HJT solar cell is improved. Although this application uses a lightly doped B layer close to the amorphous silicon intrinsic layer, some B atoms will still diffuse into the amorphous silicon intrinsic layer, which will affect the film quality of the amorphous silicon intrinsic layer and still have a certain degree of reduction effect on the open circuit voltage. Summary of the invention

[0008] 1. Technical problem to be solved by the invention

[0009] In order to overcome the deficiencies of the above-mentioned prior art, the present invention provides a high-efficiency silicon heterojunction solar cell and a preparation method thereof; the present invention uses a hydrogenated amorphous silicon carbon oxide film as a heterojunction solar cell of an intrinsic passivation layer to achieve an excellent passivation effect on the crystalline silicon surface and reduce interface carrier recombination; at the same time, an improved double-expansion B process is adopted to prevent the reduction of the bandgap width and unnecessary passivation film doping caused by the diffusion of B atoms into the intrinsic amorphous silicon layer during B2H6 doping, thereby improving the conversion efficiency of the silicon heterojunction cell.

[0010] 2. Technical solution

[0011] In order to achieve the above object, the technical solution provided by the present invention is:

[0012] A high-efficiency silicon heterojunction solar cell of the present invention comprises an N-type crystalline silicon wafer, wherein a second thin SiO2 layer, a second hydrogenated amorphous carbon oxide silicon thin film layer, a second C-doped SiO2 layer, an amorphous silicon doped N-type layer, a second TCO conductive layer and a second electrode are sequentially arranged on the front side of the N-type crystalline silicon wafer;

[0013] The back side of the N-type crystalline silicon wafer is sequentially provided with a first thin SiO2 layer, a first hydrogenated amorphous carbon oxide silicon thin film layer, a first C-doped SiO2 layer, an amorphous silicon doped P-type layer, a first TCO conductive layer and a first electrode.

[0014] Furthermore, the thin SiO2 layer has a thickness of 1-3 nm and passivates the surface of the silicon substrate.

[0015] Furthermore, the hydrogenated amorphous silicon carbon oxide film layer has a thickness of 2-10 nm and a bandgap of 1.7-2.3 eV.

[0016] Furthermore, the hydrogenated amorphous silicon oxycarbon film is non-stoichiometric, and its chemical formula is a-SiOxCy:H, the non-stoichiometric ratio x varies in the range of 0.05-0.95, and the non-stoichiometric ratio y varies in the range of 0.05-0.95.

[0017] Furthermore, the thickness of the C-doped SiO2 layer is 1-5 nm, and a small amount of lightly doped B or lightly doped P atoms are accommodated in the form of a homologous doped SiO2 layer to avoid unnecessary doping of the intrinsic hydrogenated amorphous silicon carbon oxide film (a-SiOxCy:H), which affects the passivation effect.

[0018] Furthermore, the thickness of the amorphous silicon doped P-type layer is 10-30nm; the amorphous silicon doped P-type layer includes a lightly B-doped amorphous silicon layer and a heavily B-doped amorphous silicon layer, the lightly B-doped amorphous silicon layer is close to the first C-doped SiO2 layer, and the heavily B-doped amorphous silicon layer is close to the first TCO conductive layer.

[0019] Furthermore, the lightly B-doped amorphous silicon layer is formed by TMB gas doping, has a thickness of 2-20 nm, and a bandgap of 1.7-1.8 eV.

[0020] Furthermore, the heavily B-doped amorphous silicon layer is formed by B2H6 gas doping, has a thickness of 2-20 nm, and a bandgap width of 1.4-1.6 eV.

[0021] Furthermore, the thickness of the amorphous silicon doped N-type layer is 10-30nm; the amorphous silicon doped N-type layer includes a lightly P-doped amorphous silicon layer and a heavily P-doped amorphous silicon layer, the lightly P-doped amorphous silicon layer is close to the second C-doped SiO2 layer, and the heavily P-doped amorphous silicon layer is close to the second TCO conductive layer; the thickness of the lightly P-doped amorphous silicon layer is 2-20nm, and the thickness of the heavily P-doped amorphous silicon layer is 2-20nm. The heavily P-doped amorphous silicon layer can be prepared by plasma chemical vapor deposition, or it can be formed by coating a liquid phosphorus source on the lightly P-doped amorphous silicon layer and curing by laser heating.

[0022] A method for preparing a high-efficiency silicon heterojunction solar cell of the present invention comprises the following steps:

[0023] Step 1: texturing and cleaning the N-type crystalline silicon wafer;

[0024] Step 2: forming a thin SiO2 layer on both sides of the N-type crystalline silicon wafer by thermal oxidation;

[0025] Step 3: Using plasma enhanced chemical vapor deposition, a layer of hydrogenated amorphous silicon carbon oxide thin film is grown on the front surface and the back surface of the N-type crystalline silicon wafer having a thin SiO2 layer formed thereon;

[0026] Step 4: Prepare a C-doped SiO2 layer by plasma enhanced chemical vapor deposition, wherein the C source is CO;

[0027] Step 5: Use plasma enhanced chemical vapor deposition to prepare an amorphous silicon doped N-type layer and an amorphous silicon doped P-type layer; the amorphous silicon doped N-type layer includes a lightly P-doped amorphous silicon layer (i.e., an N-type amorphous silicon layer lightly doped with P atoms) and a heavily P-doped amorphous silicon layer (i.e., an N-type amorphous silicon layer heavily doped with P atoms), and the amorphous silicon doped P-type layer includes a P-type amorphous silicon layer lightly doped with B atoms formed by TMB gas doping and a P-type amorphous silicon layer heavily doped with B atoms formed by B2H6 gas doping.

[0028] Step 6: Depositing a TCO conductive layer using reactive ion deposition or sputtering;

[0029] Step 7: Form the front and back Ag electrodes by screen printing, and solidify the front and back Ag electrodes to form good ohmic contact with the TCO conductive film.

[0030] Furthermore, in step 3, the vacuum is evacuated to 5×10 -4 Pa below, with H2 and S i H4 is the reaction gas, CO is the carbon source, and an oxygen source is provided. Under the conditions of N-type single crystal silicon wafer temperature of 150-300℃ and deposition pressure of 10-100Pa, a hydrogenated amorphous silicon carbon oxide film is grown, in which the volume of carbon monoxide accounts for 1 / 2 of the volume of carbon monoxide and S iThe percentage of the sum of the H4 volumes is between 5-30%.

[0031] Furthermore, in step 5, the deposition process of the doping layer is: when the background vacuum of the vacuum chamber reaches 5×10 -4 Pa later, under the condition of silicon wafer substrate temperature of 100-300℃, with H2, SiH4, and doped TMB, B2H6, PH3 as reaction gases and deposition pressure of 10-300Pa, an amorphous silicon doped N-type layer and an amorphous silicon doped P-type layer are grown on the hydrogenated amorphous carbon oxide silicon film on the back.

[0032] Furthermore, in step six, the process of depositing the TCO conductive layer is: depositing a transparent conductive ITO film on the front and back sides by magnetron sputtering, the thickness of the film is 70-110nm, the transmittance is more than 98%, and the square resistance is 50-100Ω / □.

[0033] Furthermore, in step seven, a layer of low-temperature conductive silver paste is printed on the front and back TCO conductive layers respectively by screen printing, and then sintered at a low temperature of 150-300°C to form a good ohmic contact; the thickness of the Ag gate line is 5-50μm, the gate line width is 20-60μm, and the spacing is 1-5mm.

[0034] 3. Beneficial effects

[0035] Compared with the existing known technologies, the technical solution provided by the present invention has the following significant effects:

[0036] (1) A high-efficiency silicon heterojunction solar cell of the present invention has a silicon substrate surface layer formed by a high-quality thin layer S i The O2 layer is passivated to passivate the broken bonds on the surface of the crystalline silicon. The intrinsic hydrogenated amorphous silicon carbon oxide film (a-SiOxCy:H) layer can modulate the bandgap to provide excellent passivation performance and provide a hydrogen passivation interface.

[0037] (2) A high-efficiency silicon heterojunction solar cell of the present invention is doped with S i The O2 layer is used to accommodate a small amount of lightly doped B or lightly doped P atoms that diffuse into the intrinsic hydrogenated amorphous silicon oxycarbon film (a-SiOxCy:H) layer, thereby avoiding unnecessary doping of the intrinsic hydrogenated amorphous silicon oxycarbon film (a-SiOxCy:H) layer and ensuring the passivation effect.

[0038] (3) In the high-efficiency silicon heterojunction solar cell of the present invention, the P-type and N-type heavily doped amorphous silicon layer and the TCO layer can form good electrical contact; the backlight side amorphous silicon doped layer P layer adopts a double-layer stacked structure, and the C-doped S iThe O2 layer is doped with TMB gas to prevent the doped atoms B (boron) from diffusing into the amorphous silicon intrinsic layer, thereby ensuring the passivation effect of the intrinsic amorphous silicon and improving the open circuit voltage Voc; the doped amorphous silicon layer close to the crystalline silicon is doped with TMB gas, and the band gap is large, so that light can pass through the doped layer at a higher proportion, thereby increasing the absorption of light by the crystalline silicon and improving the short-circuit current Isc; the doped amorphous silicon layer close to the TCO side is heavily doped with B2H6 gas, and the conductivity of the doped layer is better, and the series resistance Rs of the solar cell is lower, thereby making the fill factor FF higher; ultimately improving the photoelectric conversion efficiency of the HJT solar cell. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] Figure 1 This is a structural diagram of a high-efficiency silicon heterojunction solar cell of the present invention.

[0040] 1. N-type crystalline silicon wafer; 201. first thin SiO2 layer; 202. first hydrogenated amorphous silicon carbon oxide thin film layer; 203. first C-doped SiO2 layer; 301. second thin SiO2 layer; 302. second hydrogenated amorphous silicon carbon oxide thin film layer; 303. second C-doped SiO2 layer; 401. lightly B-doped amorphous silicon layer; 402. heavily B-doped amorphous silicon layer; 501. lightly P-doped amorphous silicon layer; 502. heavily P-doped amorphous silicon layer; 6. first TCO conductive layer; 7. second TCO conductive layer; 8. first electrode; 9. second electrode. DETAILED DESCRIPTION

[0041] In order to further understand the content of the present invention, the present invention is described in detail in conjunction with the accompanying drawings and embodiments.

[0042] Example 1

[0043] Combination Figure 1 , a high-efficiency silicon heterojunction solar cell of this embodiment comprises an N-type crystalline silicon wafer 1, wherein the front side of the N-type crystalline silicon wafer 1 is sequentially provided with a second thin SiO2 layer 301, a second hydrogenated amorphous carbon oxide silicon thin film layer 302, a second C-doped SiO2 layer 303, an amorphous silicon doped N-type layer, a second TCO conductive layer 7, and a second electrode 9; the back side of the N-type crystalline silicon wafer 1 is sequentially provided with a first thin SiO2 layer 201, a first hydrogenated amorphous carbon oxide silicon thin film layer 202, a first C-doped SiO2 layer 203, an amorphous silicon doped P-type layer, a first TCO conductive layer 6, and a first electrode 8. Among them,

[0044] The high-quality thin SiO2 layer has a thickness of 1 nm and passivates the surface of the silicon substrate.

[0045] The thickness of the hydrogenated amorphous silicon carbon oxide film layer is 2 nm. In this embodiment, the hydrogenated amorphous silicon carbon oxide film is non-stoichiometric, and its chemical formula is a-SiOxCy:H. The non-stoichiometric ratio x varies in the range of 0.05-0.95, and the non-stoichiometric ratio y varies in the range of 0.05-0.95. By changing the non-stoichiometric ratios x and y, the band gap can be adjusted in the range of 1.7-2.3 eV.

[0046] Silicon carbide is an important anti-reflection layer and passivation layer for crystalline silicon cells. By combining the advantages of silicon oxide, silicon carbide and intrinsic amorphous silicon, hydrogenated amorphous silicon oxycarbon film (a-SiOxCy:H) can be obtained by adjusting the composition. By changing the non-stoichiometric ratios x and y, the optical band gap and other properties of hydrogenated amorphous silicon oxycarbon film can be adjusted, and excellent passivation performance and thicker film thickness can be achieved.

[0047] Specifically in this embodiment, the non-stoichiometric ratio x of the hydrogenated amorphous silicon oxycarbon film is 0.05, the non-stoichiometric ratio y is 0.95, and the bandgap can be modulated to 2.3 eV.

[0048] The thickness of the C-doped SiO2 layer is 1 nm.

[0049] The thickness of the amorphous silicon doped P-type layer is 10 nm, the thickness of the amorphous silicon doped N-type layer is 10 nm; the thickness of the TCO conductive layer is 70 nm.

[0050] In this embodiment, the surface of the silicon substrate is treated with a high-quality thin layer S i The O2 layer is passivated to passivate the broken bonds on the surface of the crystalline silicon. The intrinsic hydrogenated amorphous silicon carbon oxide film (a-SiOxCy:H) layer can modulate the bandgap to provide excellent passivation performance and provide a hydrogen passivation interface.

[0051] Example 2

[0052] The high-efficiency silicon heterojunction solar cell of this embodiment is basically the same as that of embodiment 1, except that: the thickness of the high-quality thin layer SiO2 layer is 3nm. The thickness of the hydrogenated amorphous carbon silicon oxide film layer is 10nm, the non-stoichiometric ratio x of the hydrogenated amorphous carbon silicon oxide film is 0.95, the non-stoichiometric ratio y is 0.05, and the bandgap is 1.7eV. The thickness of the C-doped SiO2 layer is 5nm. The thickness of the amorphous silicon doped P-type layer is 30nm, and the thickness of the amorphous silicon doped N-type layer is 30nm; the thickness of the TCO conductive layer is 110nm.

[0053] Example 3

[0054] Combination Figure 1, a high-efficiency silicon heterojunction solar cell of this embodiment comprises an N-type crystalline silicon wafer 1, wherein the front side of the N-type crystalline silicon wafer 1 is sequentially provided with a second thin SiO2 layer 301, a second hydrogenated amorphous carbon oxide silicon thin film layer 302, a second C-doped SiO2 layer 303, an amorphous silicon doped N-type layer, a second TCO conductive layer 7, and a second electrode 9; the back side of the N-type crystalline silicon wafer 1 is sequentially provided with a first thin SiO2 layer 201, a first hydrogenated amorphous carbon oxide silicon thin film layer 202, a first C-doped SiO2 layer 203, an amorphous silicon doped P-type layer, a first TCO conductive layer 6, and a first electrode 8. Among them,

[0055] The high-quality thin SiO2 layer has a thickness of 2 nm and passivates the surface of the silicon substrate.

[0056] The thickness of the hydrogenated amorphous silicon oxycarbon film layer is 5 nm. In this embodiment, the non-stoichiometric ratio x of the hydrogenated amorphous silicon oxycarbon film is 0.55, the non-stoichiometric ratio y is 0.45, and the bandgap is 1.95 eV.

[0057] The thickness of the C-doped SiO2 layer is 3 nm, and a small amount of lightly doped B or lightly doped P atoms are accommodated in the form of a homologous doped SiO2 layer to avoid unnecessary doping of the intrinsic hydrogenated amorphous silicon carbon oxide film (a-SiOxCy:H) layer, which affects the passivation quality.

[0058] The thickness of the amorphous silicon doped P-type layer is 20nm, and the amorphous silicon doped P-type layer includes a lightly B-doped amorphous silicon layer 401 and a heavily B-doped amorphous silicon layer 402, wherein the lightly B-doped amorphous silicon layer 401 is close to the first C-doped SiO2 layer 203, and the heavily B-doped amorphous silicon layer 402 is close to the first TCO conductive layer 6. The bandgap width of the doped layer can be modulated by changing the doping source and the doping concentration, and a large bandgap width doped layer with high thermal stability is formed on the light-receiving surface, which is conducive to more incident light passing through the doped layer of the light-receiving surface, and more light waves are effectively absorbed to generate photogenerated carriers. Specifically in this embodiment, the lightly B-doped amorphous silicon layer 401 is formed by TMB gas doping, with a thickness of 2nm and a bandgap width of 1.7eV. The heavily B-doped amorphous silicon layer 402 is formed by B2H6 gas doping, with a thickness of 18nm and a bandgap width of 1.4eV.

[0059] The thickness of the amorphous silicon doped N-type layer is 20nm; the amorphous silicon doped N-type layer includes a lightly P-doped amorphous silicon layer 501 and a heavily P-doped amorphous silicon layer 502, the lightly P-doped amorphous silicon layer 501 is close to the second C-doped SiO2 layer 303, and the heavily P-doped amorphous silicon layer 502 is close to the second TCO conductive layer 7; the thickness of the lightly P-doped amorphous silicon layer 501 is 2nm, and the thickness of the heavily P-doped amorphous silicon layer 502 is 18nm.

[0060] The thickness of the TCO conductive layer is 70 nm.

[0061] In this embodiment, the same group of doping S i The O2 layer can accommodate a small amount of lightly doped B or lightly doped P atoms diffused into the intrinsic hydrogenated amorphous carbon oxide silicon film (a-SiOxCy:H) layer, avoiding unnecessary doping of the intrinsic hydrogenated amorphous carbon oxide silicon film (a-SiOxCy:H) layer and ensuring the passivation effect. At the same time, the P-type and N-type heavily doped amorphous silicon layer can form a good electrical contact with the TCO layer; the backlight side amorphous silicon doped layer P layer adopts a double-layer stacked structure, close to the C doped S i The O2 layer is doped with TMB gas to prevent the doped atoms B (boron) from diffusing into the amorphous silicon intrinsic layer, thereby ensuring the passivation effect of the intrinsic amorphous silicon and improving the open circuit voltage Voc; the doped amorphous silicon layer close to the crystalline silicon is doped with TMB gas, and the band gap is large, so that light can pass through the doped layer at a higher proportion, thereby increasing the absorption of light by the crystalline silicon and improving the short-circuit current Isc; the doped amorphous silicon layer close to the TCO side is heavily doped with B2H6 gas, and the conductivity of the doped layer is better, and the series resistance Rs of the solar cell is lower, thereby making the fill factor FF higher; ultimately improving the photoelectric conversion efficiency of the HJT solar cell.

[0062] The preparation process of the high-efficiency silicon heterojunction solar cell in this embodiment is as follows:

[0063] Step 1: texturing and cleaning the N-type crystalline silicon wafer 1;

[0064] Step 2: forming a thin SiO2 layer on both sides of the N-type crystalline silicon wafer 1 by thermal oxidation;

[0065] Step 3: Using plasma enhanced chemical vapor deposition (PECVD), a layer of hydrogenated amorphous silicon carbide thin film is grown on the front and back surfaces of the N-type crystalline silicon wafer 1 on which a thin SiO2 layer is formed; specifically, vacuuming to 5×10 -4 Pa below, with H2 and S i H4 is the reaction gas, CO is the carbon source, and an oxygen source is provided. Under the conditions of 150°C for the N-type single crystal silicon wafer 1 and a deposition pressure of 10Pa, a hydrogenated amorphous silicon oxide carbon film is grown, wherein the volume of carbon monoxide accounts for 1 / 2 of the volume of carbon monoxide and S i The percentage of the sum of H4 volumes is between 5%.

[0066] Step 4: Prepare a C-doped SiO2 layer by plasma enhanced chemical vapor deposition, wherein the C source is CO;

[0067] Step 5: Use plasma enhanced chemical vapor deposition to prepare an amorphous silicon doped N-type layer and an amorphous silicon doped P-type layer; the amorphous silicon doped N-type layer includes a lightly P-doped amorphous silicon layer (i.e., an N-type amorphous silicon layer lightly doped with P atoms) and a heavily P-doped amorphous silicon layer (i.e., an N-type amorphous silicon layer heavily doped with P atoms), and the amorphous silicon doped P-type layer includes a P-type amorphous silicon layer lightly doped with B atoms formed by TMB gas doping and a P-type amorphous silicon layer heavily doped with B atoms formed by B2H6 gas doping.

[0068] The deposition process of the doping layer is as follows: when the background vacuum in the vacuum chamber reaches 5×10 -4 Pa later, under the condition of silicon wafer substrate temperature of 100℃, using H2, SiH4, and doped TMB, B2H6, PH3 as reaction gases and deposition pressure of 10Pa, an amorphous silicon-doped N-type layer and an amorphous silicon-doped P-type layer are grown on the hydrogenated amorphous carbon oxide silicon film on the back.

[0069] Step 6: Deposit a transparent conductive ITO film on the front and back sides by magnetron sputtering. The transmittance of the film is above 98% and the sheet resistance is 50Ω / □.

[0070] Step 7: Use screen printing to print a layer of low-temperature conductive silver paste on the front and back TCO conductive layers respectively, and then sinter at a low temperature of 150°C to form a good ohmic contact; the thickness of the Ag gate line is 5μm, the width of the gate line is 20μm, and the spacing is 1mm.

[0071] The heterojunction solar cell obtained through the above steps, which has a non-stoichiometric hydrogenated amorphous silicon oxide film as an intrinsic passivation layer and a double diffused B-doped P-type layer, has a photoelectric conversion efficiency of more than 24.2%, and significantly improves the short-circuit current and open-circuit voltage.

[0072] Example 4

[0073] The high-efficiency silicon heterojunction solar cell of this embodiment is basically the same as that of Embodiment 3, except that:

[0074] The thickness of the amorphous silicon doped P-type layer is 10 nm, the thickness of the lightly B-doped amorphous silicon layer 401 is 8 nm, and the bandgap is 1.8 eV. The thickness of the heavily B-doped amorphous silicon layer 402 is 2 nm, and the bandgap is 1.6 eV.

[0075] The thickness of the amorphous silicon doped N-type layer is 10 nm, the thickness of the lightly P-doped amorphous silicon layer 501 is 8 nm, and the thickness of the heavily P-doped amorphous silicon layer 502 is 2 nm.

[0076] The preparation process of the high-efficiency silicon heterojunction solar cell in this embodiment is as follows:

[0077] Step 1: texturing and cleaning the N-type crystalline silicon wafer 1;

[0078] Step 2: forming a thin SiO2 layer on both sides of the N-type crystalline silicon wafer 1 by thermal oxidation;

[0079] Step 3: Using plasma enhanced chemical vapor deposition (PECVD), a layer of hydrogenated amorphous silicon carbide thin film is grown on the front and back surfaces of the N-type crystalline silicon wafer 1 on which a thin SiO2 layer is formed; specifically, vacuuming to 5×10 -4 Pa below, with H2 and S i H4 is the reaction gas, CO is the carbon source, and an oxygen source is provided. Under the conditions of 180°C for the N-type single crystal silicon wafer 1 and 30Pa for the deposition gas pressure, a hydrogenated amorphous silicon oxide carbon film is grown, wherein the volume of carbon monoxide accounts for 1 / 2 of the volume of carbon monoxide and S i The percentage of the sum of H4 volumes is between 5%.

[0080] Step 4: Prepare a C-doped SiO2 layer by plasma enhanced chemical vapor deposition, wherein the C source is CO;

[0081] Step 5: Use plasma enhanced chemical vapor deposition to prepare an amorphous silicon doped N-type layer and an amorphous silicon doped P-type layer; the deposition process of the impurity layer is: when the background vacuum of the vacuum chamber reaches 5×10 -4 Pa later, under the condition of silicon wafer substrate temperature of 150℃, using H2, SiH4, and doped TMB, B2H6, PH3 as reaction gases and deposition pressure of 50Pa, an amorphous silicon-doped N-type layer and an amorphous silicon-doped P-type layer were grown on the hydrogenated amorphous carbon oxide silicon film on the back.

[0082] Step 6: Deposit a transparent conductive ITO film on the front and back sides by magnetron sputtering. The thickness of the film is 80nm, the transmittance is more than 98%, and the sheet resistance is 50Ω / □.

[0083] Step 7: Use screen printing to print a layer of low-temperature conductive silver paste on the front and back TCO conductive layers respectively, and then sinter at a low temperature of 150°C to form a good ohmic contact; the thickness of the Ag gate line is 15μm, the width of the gate line is 30μm, and the spacing is 3mm.

[0084] Example 5

[0085] The high-efficiency silicon heterojunction solar cell of this embodiment is basically the same as that of Embodiment 3, except that:

[0086] The thickness of the amorphous silicon doped P-type layer is 30 nm, the thickness of the lightly B-doped amorphous silicon layer 401 is 18 nm, and the bandgap is 1.75 eV. The thickness of the heavily B-doped amorphous silicon layer 402 is 12 nm, and the bandgap is 1.5 eV.

[0087] The thickness of the amorphous silicon doped N-type layer is 30 nm, the thickness of the lightly P-doped amorphous silicon layer 501 is 18 nm, and the thickness of the heavily P-doped amorphous silicon layer 502 is 12 nm.

[0088] The preparation process of the high-efficiency silicon heterojunction solar cell in this embodiment is as follows:

[0089] Step 1: texturing and cleaning the N-type crystalline silicon wafer 1;

[0090] Step 2: forming a thin SiO2 layer on both sides of the N-type crystalline silicon wafer 1 by thermal oxidation;

[0091] Step 3: Using plasma enhanced chemical vapor deposition (PECVD), a layer of hydrogenated amorphous silicon carbide thin film is grown on the front and back surfaces of the N-type crystalline silicon wafer 1 on which a thin SiO2 layer is formed; specifically, vacuuming to 5×10 -4 Pa below, with H2 and S i H4 is the reaction gas, CO is the carbon source, and an oxygen source is provided. Under the conditions of 300°C for the N-type single crystal silicon wafer 1 and 100 Pa for the deposition gas pressure, a hydrogenated amorphous silicon carbon oxide film is grown, wherein the volume of carbon monoxide accounts for 1 / 2 of the volume of carbon monoxide and S i The percentage of the sum of H4 volumes is between 30%.

[0092] Step 4: Prepare a C-doped SiO2 layer by plasma enhanced chemical vapor deposition, wherein the C source is CO;

[0093] Step 5: Use plasma enhanced chemical vapor deposition to prepare an amorphous silicon doped N-type layer and an amorphous silicon doped P-type layer; the deposition process of the impurity layer is: when the background vacuum of the vacuum chamber reaches 5×10 -4 Pa later, under the condition of silicon wafer substrate temperature of 300℃, using H2, SiH4, and doped TMB, B2H6, PH3 as reaction gases and deposition pressure of 300Pa, an amorphous silicon-doped N-type layer and an amorphous silicon-doped P-type layer were grown on the hydrogenated amorphous carbon oxide silicon film on the back.

[0094] Step 6: Deposit a transparent conductive ITO film on the front and back sides by reactive ion deposition. The thickness of the film is 110 nm, the transmittance is above 98%, and the sheet resistance is 100Ω / □.

[0095] Step 7: Use screen printing to print a layer of low-temperature conductive silver paste on the front and back TCO conductive layers respectively, and then sinter at a low temperature of 190°C to form a good ohmic contact; the thickness of the Ag gate line is 50μm, the width of the gate line is 60μm, and the spacing is 5mm.

[0096] The present invention and its embodiments are described schematically above, and the description is not restrictive. The drawings show only one embodiment of the present invention, and the actual structure is not limited thereto. Therefore, if a person skilled in the art is inspired by it and designs a structural method and an embodiment similar to the technical solution without creativity without departing from the purpose of the invention, they shall all fall within the protection scope of the present invention.

Claims

1. A high-efficiency silicon heterojunction solar cell, comprising an N-type crystalline silicon wafer (1), characterized in that: A second thin SiO2 layer (301), a second hydrogenated amorphous carbon oxide silicon thin film layer (302), a second C-doped SiO2 layer (303), an amorphous silicon-doped N-type layer, a second TCO conductive layer (7) and a second electrode (9) are sequentially arranged on the front side of the N-type crystalline silicon wafer (1); A first thin SiO2 layer (201), a first hydrogenated amorphous carbon oxide silicon thin film layer (202), a first C-doped SiO2 layer (203), an amorphous silicon doped P-type layer, a first TCO conductive layer (6) and a first electrode (8) are sequentially arranged on the back side of the N-type crystalline silicon wafer (1); The thickness of the thin SiO2 layer is 1-3nm; The thickness of the hydrogenated amorphous silicon carbon oxide film layer is 2-10 nm, and the band gap width is 1.7-2.3 eV.

2. A high-efficiency silicon heterojunction solar cell according to claim 1, characterized in that: The hydrogenated amorphous silicon carbide film is non-stoichiometric, and its chemical formula is a-SiOxCy:H. The non-stoichiometric ratio x varies in the range of 0.05-0.95, and the non-stoichiometric ratio y varies in the range of 0.05-0.

95.

3. A high-efficiency silicon heterojunction solar cell according to claim 2, characterized in that: The thickness of the C-doped SiO2 layer is 1-5 nm.

4. A high-efficiency silicon heterojunction solar cell according to any one of claims 1 to 3, characterized in that: The thickness of the amorphous silicon doped P-type layer is 10-30 nm; the amorphous silicon doped P-type layer comprises a lightly B-doped amorphous silicon layer (401) and a heavily B-doped amorphous silicon layer (402), the lightly B-doped amorphous silicon layer (401) is close to the first C-doped SiO2 layer (203), and the heavily B-doped amorphous silicon layer (402) is close to the first TCO conductive layer (6).

5. A high-efficiency silicon heterojunction solar cell according to claim 4, characterized in that: The lightly B-doped amorphous silicon layer (401) is formed by TMB gas doping, has a thickness of 2-20 nm, and a bandgap width of 1.7-1.8 eV.

6. A high-efficiency silicon heterojunction solar cell according to claim 5, characterized in that: The heavily B-doped amorphous silicon layer (402) is formed by B2H6 gas doping, has a thickness of 2-20 nm, and a bandgap width of 1.4-1.6 eV.

7. A high-efficiency silicon heterojunction solar cell according to any one of claims 1 to 3, characterized in that: The thickness of the amorphous silicon doped N-type layer is 10-30 nm; the amorphous silicon doped N-type layer comprises a lightly P-doped amorphous silicon layer (501) and a heavily P-doped amorphous silicon layer (502); the lightly P-doped amorphous silicon layer (501) is close to the second C-doped SiO2 layer (303), and the heavily P-doped amorphous silicon layer (502) is close to the second TCO conductive layer (7); the thickness of the lightly P-doped amorphous silicon layer (501) is 2-20 nm, and the thickness of the heavily P-doped amorphous silicon layer (502) is 2-20 nm.

8. The high-efficiency silicon heterojunction solar cell according to claim 6, characterized in that: The thickness of the amorphous silicon doped N-type layer is 10-30 nm; the amorphous silicon doped N-type layer comprises a lightly P-doped amorphous silicon layer (501) and a heavily P-doped amorphous silicon layer (502); the lightly P-doped amorphous silicon layer (501) is close to the second C-doped SiO2 layer (303), and the heavily P-doped amorphous silicon layer (502) is close to the second TCO conductive layer (7); the thickness of the lightly P-doped amorphous silicon layer (501) is 2-20 nm, and the thickness of the heavily P-doped amorphous silicon layer (502) is 2-20 nm.

9. A method for preparing a high-efficiency silicon heterojunction solar cell according to any one of claims 1 to 8, characterized in that: The following steps are involved: Step 1: texturing and cleaning the N-type crystalline silicon wafer (1); Step 2: forming a thin SiO2 layer on both sides of the N-type crystalline silicon wafer (1) by thermal oxidation; Step 3: using plasma enhanced chemical vapor deposition to grow a layer of hydrogenated amorphous silicon carbon oxide thin film on the front surface and the back surface of the N-type crystalline silicon wafer (1) on which a thin SiO2 layer is formed; Step 4: Prepare a C-doped SiO2 layer using plasma enhanced chemical vapor deposition; Step 5: using plasma enhanced chemical vapor deposition to prepare an amorphous silicon doped N-type layer and an amorphous silicon doped P-type layer; Step 6: Depositing a TCO conductive layer using reactive ion deposition or sputtering; Step 7: Form the front and back electrodes by screen printing.

10. The method for preparing a high-efficiency silicon heterojunction solar cell according to claim 9, characterized in that: In step 3, vacuum is applied to 5×10 -4 Pa below, with H2 and S i H4 is used as the reaction gas, CO is used as the carbon source, and an oxygen source is provided. Under the conditions that the temperature of the N-type crystalline silicon wafer (1) is 150-300°C and the deposition pressure is 10-100 Pa, a hydrogenated amorphous silicon carbon oxide film is grown, wherein the volume of carbon monoxide accounts for 1:1 of the volume of carbon monoxide and S i The percentage of the sum of the H4 volumes is between 5-30%.

11. The method for preparing a high-efficiency silicon heterojunction solar cell according to claim 10, characterized in that: In step 5, the deposition process of the doping layer is as follows: when the background vacuum in the vacuum chamber reaches 5×10 -4 Pa later, under the condition of silicon wafer substrate temperature of 100-300℃, with H2, SiH4, and doped TMB, B2H6, PH3 as reaction gases and deposition pressure of 10-300Pa, an amorphous silicon doped N-type layer and an amorphous silicon doped P-type layer are grown on the hydrogenated amorphous carbon oxide silicon film on the back.

12. The method for preparing a high-efficiency silicon heterojunction solar cell according to claim 11, characterized in that: In step six, the process of depositing the TCO conductive layer is as follows: a transparent conductive ITO film is deposited on the front and back sides by magnetron sputtering, the thickness of the film is 70-110nm, the transmittance is more than 98%, and the sheet resistance is 50-100Ω / mouth.

13. The method for preparing a high-efficiency silicon heterojunction solar cell according to claim 12, characterized in that: In step seven, a layer of low-temperature conductive silver paste is printed on the front and back TCO conductive layers respectively by screen printing, and then sintered at a low temperature of 150-300°C to form a good ohmic contact; the thickness of the Ag gate line is 5-50μm, the width of the gate line is 20-60μm, and the spacing is 1-5mm.

Images