Gate driving device and power conversion device

Abstract

Provided is a gate driving device, comprising: a driving circuit that drives the gate of a switching element according to an input signal for instructing conduction and cutoff of the switching element connected between a high power potential portion and a low power potential portion; a time storage circuit that stores the time from when the input signal is switched to a conduction instruction until a recovery surge voltage generated by a diode opposite to the switching element is detected; a switching determination circuit that determines whether to switch the gate driving condition of the switching element according to a detected value of the power supply voltage between the high power potential portion and the low power potential portion; and a driving condition change circuit that changes the gate driving condition at the same time as the time during the previous conduction period stored in the time storage circuit during the current conduction period according to the determination result of the switching determination circuit.

Description

Technical Field

[0001] The invention relates to a gate driving device and a power conversion device. Background Art

[0002] Conventionally, an active gate drive method is known, which changes the switching speed at an appropriate timing according to the drain current or collector current (hereinafter also referred to as the main current) flowing through the switching element in order to suppress the recovery surge voltage and reduce the switching loss. For example, Patent Document 1 discloses a gate drive circuit that stores the surge period from the timing of the on-command to the timing of the recovery surge voltage generation, and determines the timing of changing the effective gate resistance value of the switching element based on the surge period in the last stored on-period during the current on-period.

[0003] According to the description of Patent Document 1, during the surge period, the recovery surge voltage is reduced by increasing the effective gate resistance value, and after the surge period, the switching speed is increased by reducing the effective gate resistance value, thereby reducing the switching loss. In addition, according to the description of Patent Document 1, since the effective gate resistance value during the current on-time is changed using the information during the previous on-time, the time required for feedback control can be sufficient.

[0004] <Prior Art Literature>

[0005] <Patent Documents>

[0006] Patent Document 1: Japanese Patent No. 4935266 Summary of the invention

[0007] <Problems to be Solved by the Invention>

[0008] Figure 1 An example of an input signal for instructing the on / off of a switching element connected between a high power supply potential portion and a low power supply potential portion, a voltage / current waveform of the switching element, and a voltage / current waveform of a return element opposite to the switching element is shown. Id represents the drain current flowing through the switching element, VDS represents the voltage between the drain and source of the switching element, IF represents the forward current flowing through the return element opposite to the switching element, and VAK represents the voltage between the anode and cathode of the return element opposite to the switching element.

[0009] Due to certain reasons such as fluctuations in the input voltage of a DC power supply, a certain degree of fluctuation will occur in the power supply voltage (the power supply voltage between the high power potential part and the low power potential part) supplied by the DC power supply. Therefore, when driving the gate of a switching element connected between the high power potential part and the low power potential part, it is required to be designed such that even when conducting with the maximum power supply voltage, the recovery surge voltage does not exceed the withstand voltage of the switching element connected in parallel with the freewheeling element.

[0010] Therefore, for example, as Figure 1 shown, it is considered that when the power supply voltage drops to the minimum value Ed(min), even if the gate drive condition is not switched to increase the gate resistance value, the peak value Vp of the recovery surge voltage does not exceed the withstand voltage (element withstand voltage) of the switching element (see circle a).

[0011] However, in the conventional technique of increasing the gate resistance value during each conduction period (reverse recovery period) to suppress the recovery surge voltage, as Figure 2 shown, the time rate of change dI / dt of the main current Id often becomes gentle during each conduction period (see circle b). Therefore, when the power supply voltage drops relative to the maximum value, compared with the case where the gate drive condition is not switched, Figure 1 the switching loss during the conduction period increases. Therefore, for example, it may cause a reduction in power conversion efficiency and an increase in the size of the cooling body for cooling the switching element.

[0012] The present disclosure provides a gate drive device and a power conversion device that can balance the suppression of the recovery surge voltage and the reduction of the switching loss even when the power supply voltage fluctuates.

[0013] <Means for Solving the Problem>

[0014] The present disclosure provides a gate drive device, including: a drive circuit that drives the gate of the switching element according to an input signal indicating the conduction and cutoff of the switching element connected between the high power potential part and the low power potential part; a time storage circuit that stores the time from when the input signal is switched to a conduction command until a recovery surge voltage generated by a diode opposite to the switching element is detected; a switching determination circuit that determines whether to switch the gate drive condition of the switching element according to a detected value of the power supply voltage between the high power potential part and the low power potential part; and a drive condition change circuit that changes the gate drive condition at the same time within the current conduction period as the time during the previous conduction period stored in the time storage circuit according to the determination result of the switching determination circuit.

[0015] In addition, the present disclosure provides a power conversion device, including: a plurality of switching elements connected in series between a high power potential portion and a low power potential portion; a plurality of gate driving devices respectively provided for the plurality of switching elements and driving the gates of corresponding ones of the plurality of switching elements; and a power supply voltage detection circuit detecting the power supply voltage between the high power potential portion and the low power potential portion, wherein each of the plurality of gate driving devices includes: a driving circuit driving the gate of the corresponding one of the switching elements according to an input signal indicating conduction and turn-off of the corresponding one of the switching elements; a time storage circuit storing the time from when the input signal switches to a conduction instruction until a recovery surge voltage generated by a diode opposite to the corresponding one of the switching elements is detected; a switching determination circuit determining whether to switch the gate driving condition of the corresponding one of the switching elements according to the power supply voltage detected by the power supply voltage detection circuit; and a driving condition changing circuit changing the gate driving condition at the same time within the current conduction period as the time within the previous conduction period stored in the time storage circuit according to the determination result of the switching determination circuit.

[0016] <Effects of the Invention>

[0017] According to the technology of the present disclosure, it is possible to provide a gate driving device and a power conversion device that can take into account both suppression of recovery surge voltage and reduction of switching loss even when the power supply voltage fluctuates. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 is a timing diagram in the case where surge suppression technology is not applied.

[0019] Figure 2 is a timing diagram in the case where surge suppression technology is applied.

[0020] Figure 3 is a diagram showing a structural example of the power conversion device.

[0021] Figure 4 is a diagram showing a structural example of the gate driving device.

[0022] Figure 5 is a timing diagram showing an operation example of the gate driving device when the power supply voltage is high.

[0023] Figure 6 is a timing diagram showing an operation example of the gate driving device when the power supply voltage is low. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0024] Hereinafter, embodiments according to the present disclosure will be described with reference to the drawings.

[0025] Figure 3 This is a diagram showing an example of the structure of a power conversion device. Figure 3 The illustrated power conversion device 100 is a device that converts DC input power into a desired DC or AC output power using a high-side switching element Q1 and a low-side switching element Q2. A load (not shown) is connected to the connection point M between the switching element Q1 and the switching element Q2. The power conversion device 100 includes a high power potential section 31, a low power potential section 32, a capacitor 30, switching elements Q1 and Q2, a power supply voltage detection circuit 40, and gate drive devices 11 and 12.

[0026] The high power potential section 31 and the low power potential section 32 are conductive parts connected to a DC power supply (not shown) and supplied with DC power from the DC power supply. The high power potential section 31 is connected to the positive electrode P side of the DC power supply, and the low power potential section 32 is connected to the negative electrode N side of the DC power supply. Specific examples of the DC power supply include a rectifier circuit, a converter, a regulator, etc. The low power potential section 32 is a part with a potential lower than that of the high power potential section 31. A DC power supply voltage Ed is generated between the high power potential section 31 and the low power potential section 32.

[0027] The capacitor 30 is a capacitive element for smoothing the power supply voltage Ed, and specific examples thereof include electrolytic capacitors. The capacitor 30 has one end connected to the high power potential section 31 and the other end connected to the low power potential section 32.

[0028] The switching elements Q1 and Q2 are voltage-driven semiconductor elements and have a control electrode (gate), a first main electrode (collector or drain), and a second main electrode (emitter or source). Specific examples of the switching elements Q1 and Q2 include MOSFET (Metal Oxide Semiconductor Field Effect Transistor) and IGBT (Insulated Gate Bipolar Transistor). Figure 3 Exemplarily, the case where the switching elements Q1 and Q2 are N-channel MOSFETs having a gate G, a drain D, and a source S is shown.

[0029] The switching elements Q1 and Q2 are connected in series with each other. The switching element Q1 is connected between the high power potential section 31 and the low power potential section 32, and is connected to the low power potential section 32 via the switching element Q2. The switching element Q2 is connected between the high power potential section 31 and the low power potential section 32, and is connected to the high power potential section 31 via the switching element Q1. The switching element Q1 has a gate G connected to the gate drive device 11, a drain D connected to the high power potential section 31, and a source S connected to the drain D of the switching element Q2. The switching element Q2 has a gate G connected to the gate drive device 12, a source S connected to the low power potential section 32, and a drain D connected to the source S of the switching element Q1. In the switching element Q1, a diode D1 is connected in anti-parallel between the drain D and the source S. In the switching element Q2, a diode D2 is connected in anti-parallel between the drain D and the source S.

[0030] The switching elements Q1 and Q2 can be elements (wide bandgap devices) including wide bandgap semiconductors such as SiC (silicon carbide), GaN (gallium nitride), Ga 2 O 3 (gallium oxide), or diamond. By applying the wide bandgap devices to the switching elements Q1 and Q2, the effect of reducing the losses of the switching elements Q1 and Q2 is improved. It should be noted that the switching elements Q1 and Q2 can be switching elements including semiconductors such as Si (silicon). Similarly, by applying the wide bandgap devices to the diodes D1 and D2, the effect of reducing the losses of the diodes D1 and D2 is improved. It should be noted that the diodes D1 and D2 can be elements including semiconductors such as Si (silicon).

[0031] The power supply voltage detection circuit 40 detects the power supply voltage Ed between the high power potential section 31 and the low power potential section 32, and outputs the detected value Edd of the power supply voltage Ed to the gate drive devices 11 and 12 respectively.

[0032] The power supply voltage detection circuit 40 has, for example, a voltage dividing circuit composed of resistors 41 and 42, and isolation amplifiers 43 and 44 to which the voltage divided by the voltage dividing circuit is input. The voltage dividing circuit divides the power supply voltage Ed using resistors 41 and 42, and supplies the voltages obtained by the voltage division to the isolation amplifiers 43 and 44 respectively. The isolation amplifiers 43 and 44 amplify the voltage signals supplied from the voltage dividing circuit respectively, and output signals corresponding to the voltage values of the voltage signals as the detection value Edd of the power supply voltage Ed. The isolation amplifier 43 converts the power supply voltage Ed based on the low power potential portion 32 into the detection value Edd based on the source S of the switching element Q1, and the isolation amplifier 44 converts the power supply voltage Ed based on the low power potential portion 32 into the detection value Edd based on the source S of the switching element Q2. Since the input and output of each of the isolation amplifiers 43 and 44 are insulated from each other, common mode noise can be reduced.

[0033] The gate drive device 11 is provided for the switching element Q1, and drives the gate of the corresponding one of the plurality of switching elements Q1 and Q2, which is the switching element Q1. The gate drive device 12 is provided for the switching element Q2, and drives the gate of the corresponding one of the plurality of switching elements Q1 and Q2, which is the switching element Q2.

[0034] The gate drive device 11 is a drive circuit that supplies a positive or negative voltage to the gate of the switching element Q1 to turn on or off the gate of the switching element Q1. The gate drive device 12 is a drive circuit that supplies a positive or negative voltage to the gate of the switching element Q2 to turn on or off the gate of the switching element Q2. The high-side gate drive device 11 drives the gate of the switching element Q1 by an active gate drive method that adjusts the switching speed of the switching element Q1 during the conduction period of the switching element Q1. The low-side gate drive device 12 drives the gate of the switching element Q2 by an active gate drive method that adjusts the switching speed of the switching element Q2 during the conduction period of the switching element Q2. The gate drive device 11 operates with the source S of the switching element Q1 as the ground reference, and the gate drive device 12 operates with the source S of the switching element Q2 as the ground reference.

[0035] The gate drive devices 11 and 12 have the same structure as each other. Next, with reference to Figure 4 each structural example of the gate drive devices 11 and 12 will be described.

[0036] Figure 4 is a diagram showing a structural example of the gate drive device. The gate drive device 11 for the upper arm is a drive circuit that turns on or off the gate of the switching element Q1 as the upper arm. The gate drive device 12 for the lower arm is a drive circuit that turns on or off the gate of the switching element Q2 as the lower arm.

[0037] The gate drive device 12 includes a drive circuit 50b, a surge detection circuit 90b, a time storage circuit 70b, a switching determination circuit 80b, and a drive condition change circuit 60b. Although Figure 4 not clearly shown in the figure, the gate drive device 11 is the same as the gate drive device 12 and includes a drive circuit 50a, a surge detection circuit 90a, a time storage circuit 70a, a switching determination circuit 80a, and a drive condition change circuit 60a.

[0038] The drive circuit 50b is a circuit unit that drives the gate of the switching element Q2 according to an input signal B from outside the gate drive device 12. The input signal B is a signal that indicates the switching (turn-on (ON) / turn-off (OFF)) of the switching element Q2, and is, for example, a pulse width modulated signal (PWM signal). When the input signal B is a PWM signal, when the input signal B is an active level (for example, a high level), it represents a turn-on command for the switching element Q2, and when the input signal B is a non-active level (for example, a low level), it represents a turn-off command for the switching element Q2. The drive circuit 50b operates with the source S of the switching element Q2 as the ground reference.

[0039] The drive circuit 50a is a circuit unit that drives the gate of the switching element Q1 according to an input signal A from outside the gate drive device 11. The input signal A is a signal that indicates the switching (turn-on (ON) / turn-off (OFF)) of the switching element Q1, and is, for example, a pulse width modulated signal (PWM signal). When the input signal A is a PWM signal, when the input signal A is an active level (for example, a high level), it represents a turn-on command for the switching element Q1, and when the input signal A is a non-active level (for example, a low level), it represents a turn-off command for the switching element Q1. The drive circuit 50a operates with the source S of the switching element Q1 as the ground reference.

[0040] The input signal A is a signal complementary to the input signal B. During the period when the input signal A is at an active level, the input signal B is at a non-active level, and during the period when the input signal B is at an active level, the input signal A is at a non-active level.

[0041] The surge detection circuit 90b detects the recovery surge voltage generated between the anode and cathode of the diode D2 during the conduction period of the switching element Q1 opposite to the switching element Q2. A voltage higher than the power supply voltage Ed generated between the drain D and source S of the switching element Q2 (between the anode and cathode of the diode D2) during the conduction period of the switching element Q1 is referred to as the recovery surge voltage generated by the diode D2 opposite to the switching element Q1. When the recovery surge voltage generated by the diode D2 is detected, the surge detection circuit 90b outputs a detection signal S2, which indicates that the recovery surge voltage generated by the diode D2 with the conduction of the switching element Q1 is detected.

[0042] The surge detection circuit 90a detects the recovery surge voltage generated between the anode and cathode of the diode D1 during the conduction period of the switching element Q2 opposite to the switching element Q1. A voltage higher than the power supply voltage Ed generated between the drain D and source S of the switching element Q1 (between the anode and cathode of the diode D1) during the conduction period of the switching element Q2 is referred to as the recovery surge voltage generated by the diode D1 opposite to the switching element Q2. When the recovery surge voltage generated by the diode D1 is detected, the surge detection circuit 90a outputs a detection signal S1, which indicates that the recovery surge voltage generated by the diode D1 with the conduction of the switching element Q2 is detected.

[0043] The surge detection circuit 90b observes, for example, the voltage VDS between the drain D and source S of the switching element Q2. When the observed voltage VDS exceeds the set voltage value Va, the surge detection circuit 90b outputs a detection signal S2 to the gate drive device 11, indicating that the recovery surge voltage generated by the diode D2 with the conduction of the switching element Q1 is detected. The surge detection circuit 90a observes, for example, the voltage VDS between the drain D and source S of the switching element Q1. When the observed voltage VDS exceeds the set voltage value Va, the surge detection circuit 90a outputs a detection signal S1 to the gate drive device 12, indicating that the recovery surge voltage generated by the diode D1 with the conduction of the switching element Q2 is detected.

[0044] The set voltage value Va is previously set to a value greater than the power supply voltage Ed and less than the maximum value (peak value Vp) of the recovery surge voltage that can be generated in design. The peak value Vp of the recovery surge voltage is, for example, the voltage value of the voltage VDS generated across the two ends of the switching element opposite to the switching element when the switching element is turned on with the maximum value Ed(max) of the power supply voltage Ed. By detecting whether the voltage VDS exceeds the set voltage value Va, the surge detection circuits 90a and 90b can detect the generation of the recovery surge voltage at an intermediate stage before the recovery surge voltage reaches the peak value Vp.

[0045] The surge detection circuit 90b determines, for example, whether the voltage VDS exceeding the set voltage value Va in the switching element Q2 is a recovery surge voltage generated by the diode D2 as the switching element Q1 is turned on, taking advantage of the fact that the input signal B is complementary to the input signal A. Since the input signal B is complementary to the input signal A, the input signal A becomes a turn-on command after the input signal B is switched to an off command. Therefore, the surge detection circuit 90b can detect the voltage VDS exceeding the set voltage value Va after the input signal B is switched to an off command as a recovery surge voltage generated by the diode D2 as the switching element Q1 is turned on.

[0046] Alternatively, the surge detection circuit 90b can acquire the input signal A and detect the voltage VDS exceeding the set voltage value Va after the input signal A is switched to a turn-on command as a recovery surge voltage generated by the diode D2 as the switching element Q1 is turned on. The surge detection circuit 90b can acquire the gate drive signal of the switching element Q1 instead of acquiring the input signal A. In this case, the surge detection circuit 90b detects the voltage VDS exceeding the set voltage value Va after the acquired gate drive signal is switched to a turn-on drive as a recovery surge voltage generated by the diode D2 as the switching element Q1 is turned on.

[0047] Similarly, the surge detection circuit 90a determines, for example, whether the voltage VDS exceeding the set voltage value Va in the switching element Q1 is a recovery surge voltage generated by the diode D1 as the switching element Q2 is turned on, taking advantage of the fact that the input signal A is complementary to the input signal B. Since the input signal A is complementary to the input signal B, the input signal B becomes a turn-on command after the input signal A is switched to an off command. Therefore, the surge detection circuit 90a can detect the voltage VDS exceeding the set voltage value Va after the input signal A is switched to an off command as a recovery surge voltage generated by the diode D1 as the switching element Q2 is turned on.

[0048] Alternatively, the surge detection circuit 90a can acquire the input signal B and detect the voltage VDS exceeding the set voltage value Va after the input signal B is switched to a turn-on command as a recovery surge voltage generated by the diode D1 as the switching element Q2 is turned on. The surge detection circuit 90a can acquire the gate drive signal of the switching element Q2 instead of acquiring the input signal B. In this case, the surge detection circuit 90a detects the voltage VDS exceeding the set voltage value Va after the acquired gate drive signal is switched to a turn-on drive as a recovery surge voltage generated by the diode D1 as the switching element Q2 is turned on.

[0049] The surge detection circuit 90b has, for example, a voltage dividing circuit that divides the voltage VDS using resistors 92 and 93, and a transmission circuit 91 that outputs a detection signal S2 to the gate drive device 11 when a voltage value VDS exceeding a set voltage value Va is observed based on the voltage value obtained by the voltage division. The transmission circuit 91 outputs the detection signal S2 to the gate drive device 11 via an insulation circuit composed of, for example, a magnetic circuit such as a coil. Similarly to the surge detection circuit 90b, the surge detection circuit 90a also has a transmission circuit 91 that outputs a detection signal S1 to the gate drive device 12.

[0050] It should be noted that the surge detection circuits 90a and 90b can also detect the recovery surge voltage by a method different from the method of observing that the voltage VDS exceeds the set voltage value Va.

[0051] For example, when the time change rate dV / dt of the voltage VAK of the diode D1 changes from positive to negative, the surge detection circuit 90a outputs a detection signal S1 to the gate drive device 12 indicating that the recovery surge voltage generated by the diode D1 with the conduction of the switching element Q2 is detected. The voltage VAK of the diode D1 represents the forward voltage of the diode D1 or the voltage VDS of the switching element Q1. Similarly, when the time change rate dV / dt of the voltage VAK of the diode D2 changes from positive to negative, the surge detection circuit 90b outputs a detection signal S2 to the gate drive device 11 indicating that the recovery surge voltage generated by the diode D2 with the conduction of the switching element Q1 is detected. The voltage VAK of the diode D2 represents the forward voltage of the diode D2 or the voltage VDS of the switching element Q2. When observing the time change rate of the voltage VAK of the diode, similar to the above case of observing the voltage VDS, since the surge detection circuits 90a and 90b determine whether the observed value is the recovery surge voltage caused by the conduction of the relative arm, the input signal or the gate signal can be used.

[0052] The surge detection circuit 90b has a transmission circuit 91 that outputs a detection signal S2 to the time storage circuit 70a of the gate drive device 11. Similarly, the surge detection circuit 90a has a transmission circuit 91 that outputs a detection signal S1 to the time storage circuit 70b of the gate drive device 12.

[0053] The time storage circuit 70b stores the time Δtb from when the input signal B is switched to the conduction instruction until the recovery surge voltage generated by the diode D1 opposite to the switching element Q2 is detected. For example, the time storage circuit 70b uses a counter or a filter to store the time Δtb from the edge timing when the input signal B is switched from the conduction instruction to the turn-off instruction until the timing when the detection signal S1 supplied by the surge detection circuit 90a of the gate drive device 11 is input. The time storage circuit 70b updates the time Δtb during each conduction period of the switching element Q2 (i.e., each time the input signal B is switched to the conduction instruction).

[0054] The time storage circuit 70a stores the time Δta from when the input signal A is switched to the conduction instruction until the recovery surge voltage generated by the diode D2 opposite to the switching element Q1 is detected. For example, the time storage circuit 70a uses a counter or a filter to store the time Δta from the edge timing when the input signal A is switched from the conduction instruction to the turn-off instruction until the timing when the detection signal S2 supplied by the surge detection circuit 90b of the gate drive device 12 is input. The time storage circuit 70a updates the time Δta during each conduction period of the switching element Q1 (i.e., each time the input signal A is switched to the conduction instruction).

[0055] The switching determination circuit 80b determines whether to switch the gate drive condition of the switching element Q2 based on the detected value Edd of the power supply voltage Ed. For example, when the detected value Edd is equal to or greater than the predetermined determination value Ed(ref), the switching determination circuit 80 determines to switch the gate drive condition, and when the detected value Edd is less than the determination value Ed(ref), the switching determination circuit 80 determines not to switch the gate drive condition. The determination value Ed(ref) is set to a voltage value between the maximum value Ed(max) and the minimum value Ed(min) of the fluctuation range that the power supply voltage Ed can withstand (=Ed(max)-α). α is a non-negative value. Similarly to the switching determination circuit 80b, the switching determination circuit 80a also determines whether to switch the gate drive condition of the switching element Q1 based on the detected value Edd of the power supply voltage Ed.

[0056] The switching determination circuit 80b designates the period (the time Δtb stored in the time storage circuit 70b) for causing the drive condition change circuit 60b to change the gate drive condition of the switching element Q2 based on the determination result of whether the gate drive condition of the switching element Q2 is switched. The switching determination circuit 80a designates the period (the time Δta stored in the time storage circuit 70a) for causing the drive condition change circuit 60a to change the gate drive condition of the switching element Q1 based on the determination result of whether the gate drive condition of the switching element Q1 is switched.

[0057] Based on the determination result of the switching determination circuit 80b, the drive condition change circuit 60b changes the gate drive condition of the switching element Q2 at the same time as the time Δtb during the previous conduction period stored in the time storage circuit 70b within the current conduction period of the switching element Q2. Based on the determination result of the switching determination circuit 80b, the drive condition change circuit 60a changes the gate drive condition of the switching element Q1 at the same time as the time Δta during the previous conduction period stored in the time storage circuit 70a within the current conduction period of the switching element Q1.

[0058] The drive condition change circuit 60b changes the gate drive condition of the switching element Q2 during the period specified by the switching determination circuit 80b (the time Δtb stored in the time storage circuit 70b). The drive condition change circuit 60a changes the gate drive condition of the switching element Q1 during the period specified by the switching determination circuit 80a (the time Δta stored in the time storage circuit 70a). As the gate drive conditions, although drive conditions a1 and a2 with different condition contents are exemplarily shown in Figure 4 , three or more drive conditions with different condition contents can also be set.

[0059] The drive condition change circuit 60b selects any one of the drive conditions a1 and a2 based on the specification of the time Δtb. For example, the drive condition change circuit 60b selects the drive condition a2 at the time Δtb specified by the switching determination circuit 80b and selects the drive condition a1 at times other than the time Δtb specified by the switching determination circuit 80. Similarly to the drive condition change circuit 60b, the drive condition change circuit 60a also selects any one of the drive conditions a1 and a2.

[0060] Within the current conduction period, at the same time as the time Δtb during the previous conduction period stored in the time storage circuit 70b, the drive condition change circuit 60b changes the gate drive condition to a condition that slows down the conduction speed of the switching element Q2.

[0061] The drive condition change circuit 60b, for example, has two gate resistors with different resistance values and a switch circuit for switching whether to connect each gate resistor to the gate of the switching element Q2. Regarding the resistance value of the gate resistor connected to the gate of the switching element Q2, the value in the case of selecting the drive condition a1 is smaller than the value in the case of selecting the drive condition a2.

[0062] Therefore, during the period when the switching element Q2 is turned on by the drive circuit 50b, by selecting the drive condition a2 that increases the resistance value of the gate resistor, the switching speed (turn-on speed) of the switching element Q2 is slowed down. Thereby, the time change rate (dI / dt) of the drain current flowing through the switching element Q2 can be reduced, and the recovery surge voltage generated by the diode D1 as the switching element Q2 is turned on can be suppressed. On the other hand, during the period when the switching element Q2 is turned on by the drive circuit 50b, by selecting the drive condition a1 that decreases the resistance value of the gate resistor, the switching speed (turn-on speed) of the switching element Q2 is increased. Thereby, the switching loss during the on period can be reduced.

[0063] In addition, the drive condition change circuit 60b may have a structure including two gate current sources with different current values and a switching circuit for switching whether to connect each gate current source to the gate of the switching element Q2. Regarding the current value of the gate current source connected to the gate of the switching element Q2, the value in the case of selecting the drive condition a1 is greater than the value in the case of selecting the drive condition a2. Alternatively, the drive condition change circuit 60b may have a structure including two gate voltage sources with different voltage values and a switching circuit for switching whether to connect each gate voltage source to the gate of the switching element Q2. Regarding the voltage value of the gate voltage source connected to the gate of the switching element Q2, the value in the case of selecting the drive condition a1 is greater than the value in the case of selecting the drive condition a2.

[0064] Therefore, during the period when the switching element Q2 is turned on by the drive circuit 50b, by selecting the drive condition a2 that decreases the current value of the gate current, the switching speed (turn-on speed) of the switching element Q2 is slowed down. Thereby, during the period when the switching element Q2 is turned on by the drive circuit 50b, by selecting the drive condition a2 that decreases the current value of the gate current source or the voltage value of the gate voltage source, the time change rate (dI / dt) of the drain current flowing through the switching element Q2 can be reduced. Therefore, the recovery surge voltage generated by the diode D1 as the switching element Q2 is turned on can be suppressed. On the other hand, during the period when the switching element Q2 is turned on by the drive circuit 50b, by selecting the drive condition a1 that increases the current value of the gate current, the switching speed (turn-on speed) of the switching element Q2 is increased. Thereby, during the period when the switching element Q2 is turned on by the drive circuit 50b, by selecting the drive condition a1 that increases the current value of the gate current source or the voltage value of the gate voltage source, the switching loss during the on period can be reduced.

[0065] In addition, the switching determination circuit 80b determines whether to switch the gate driving condition of the switching element Q2 based on the detected value Edd of the power supply voltage Ed. The driving condition changing circuit 60b changes the gate driving condition at the same time as the time Δtb during the last conduction period stored in the time storage circuit 70b within the current conduction period according to the determination result of the switching determination circuit 80b. Thereby, it is possible to switch whether to change the gate driving condition according to the magnitude of the power supply voltage Ed. Therefore, even when the power supply voltage Ed fluctuates, it is possible to balance the suppression of the recovery surge voltage and the reduction of the switching loss.

[0066] For example, when the recovery surge voltage generated with the conduction of the switching element becomes lower due to the decrease in the power supply voltage Ed, it is possible to prohibit switching to the gate driving condition that slows down the conduction speed of the switching element. Thereby, when the recovery surge voltage is reduced due to the decrease in the power supply voltage Ed, it is possible to suppress the increase in the conduction loss caused by the flattening of the time change rate dI / dt of the drain current during the conduction period.

[0067] Similarly, during the period when the switching element Q1 is turned on by the driving circuit 50a, the driving condition changing circuit 60a reduces the time change rate (dI / dt) of the drain current flowing through the switching element Q1 by selecting the driving condition a2. Therefore, it is possible to suppress the recovery surge voltage generated by the diode D2 with the conduction of the switching element Q1. On the other hand, during the period when the switching element Q1 is turned on by the driving circuit 50a, the driving condition changing circuit 60a can reduce the switching loss during the conduction period by selecting the driving condition a1. In addition, the switching determination circuit 80a determines whether to switch the gate driving condition of the switching element Q1 based on the detected value Edd of the power supply voltage Ed. The driving condition changing circuit 60a changes the gate driving condition of the switching element Q1 at the same time as the time Δta during the last conduction period stored in the time storage circuit 70a within the current conduction period according to the determination result of the switching determination circuit 80a. Thereby, it is possible to switch whether to change the gate driving condition according to the magnitude of the power supply voltage Ed. Therefore, even when the power supply voltage Ed fluctuates, it is possible to balance the suppression of the recovery surge voltage and the reduction of the switching loss.

[0068] Next, with reference to Figure 4 、 Figure 5 、 Figure 6 , the operation differences of the gate driving device 10 caused by the magnitude of the power supply voltage Ed will be described.

[0069] Figure 5It is a timing diagram showing an operation example of the gate drive device 12 when the detected value Edd of the power supply voltage Ed is greater than or equal to the determination value Ed(ref) (specifically, when the power supply voltage Ed is the maximum value Ed(max)). The description of the operation example of the gate drive device 11 is omitted because it refers to the description of the operation example of the gate drive device 12.

[0070] The drive circuit 50b supplies a control signal (gate drive signal) to the control terminal (gate) of the switching element Q2 via the drive condition change circuit 60b according to the input signal B for switching the switching element Q2. In this example, a high-level input signal B represents a conduction instruction for the switching element Q2, and a low-level input signal B represents a turn-off instruction for the switching element Q2.

[0071] When the input signal B changes from a turn-off instruction to a conduction instruction, the switching element Q2 starts to conduct according to the control signal input to its control terminal (time point t1). The voltage VDS between the drain and source of the switching element Q2 decreases, and at the same time, the drain current Id starts to increase.

[0072] Then, at the same time as the input signal B becomes a conduction instruction, the time storage circuit 70b starts to measure the time Δtb. For example, after the input signal B becomes a conduction instruction, the time storage circuit 70b starts counting from a preset counting start value as a starting point and numerically or voltage-values the time Δtb.

[0073] When the conduction of the switching element Q2 starts and the recovery surge voltage generated in the diode D1 is detected by the surge detection circuit 90a of the gate drive device 11, a detection signal S1 indicating the detection of the recovery surge voltage is output to the time storage circuit 70b of the gate drive device 12.

[0074] The time storage circuit 70b stops counting while being input with the detection signal S1 provided from the surge detection circuit 90a, stores the measured value Δt1 of the time Δtb during the nth conduction, and outputs a signal indicating the measured value Δt1 to the switching determination circuit 80b. Each time the switching element Q2 conducts, the time storage circuit 70b stores the time Δtb during this conduction and outputs a signal indicating the measured value of the time Δtb to the switching determination circuit 80b.

[0075] Since the current detected value Edd of the power supply voltage Ed is greater than the determination value Ed(ref), the switching determination circuit 80b determines to switch the gate drive condition. The switching determination circuit 80b designates the drive condition a2 from the time point t1 when the input signal B changes from the turn-off instruction to the turn-on instruction until the time point t2 of the measured value Δt0 after the elapse of the time Δtb. The measured value Δt0 corresponds to the measured value of the time Δtb during the (n - 1)-th conduction period obtained by the time storage circuit 70b.

[0076] In other words, from the time point t1 when the conduction operation starts until the time point t2, the gate drive condition is switched to the drive condition a2. Since the drive condition a2 is a condition that slows down the conduction speed compared to the drive condition a1, the switching speed in the first half of the conduction period is reduced, and the recovery surge voltage generated by the diode D1 is suppressed (see the circle c).

[0077] However, after the measured value Δt0 of the time Δtb has elapsed, the drive condition change circuit 60b returns the gate drive condition to the original drive condition a1 before the change. As a result, the switching speed in the second half of the conduction period is increased, and the switching loss is reduced.

[0078] At the timing t3 when the input signal B is switched from the turn-on instruction to the turn-off instruction, the drive circuit 50b starts to turn off the switching element Q2.

[0079] The timings t5 to t7 in the (n + 1)-th switch correspond to the timings t1 to t3 in the above-mentioned n-th switch. In other words, the switching determination circuit 80b designates the drive condition a2 from the time point t5 when the input signal B changes from the turn-off instruction to the turn-on instruction until the time point t6 of the measured value Δt1 after the elapse of the time Δtb. The measured value Δt1 corresponds to the measured value of the time Δtb during the n-th conduction period obtained by the time storage circuit 70b. The time t7 corresponds to the timing when the input signal B changes from the turn-on instruction to the turn-off instruction.

[0080] On the other hand, Figure 6 is a timing chart showing an operation example of the gate drive device 12 when the detected value Edd of the power supply voltage Ed is less than the determination value Ed(ref) (specifically, when the power supply voltage Ed is the minimum value Ed(min)). The description of the operation example of the gate drive device 11 is omitted because it refers to the description of the operation example of the gate drive device 12.

[0081] In this case, since the currently detected value Edd of the power supply voltage Ed is less than the determination value Ed(ref), the switching determination circuit 80b determines not to switch the gate drive condition. The switching determination circuit 80b does not specify the drive condition a2 at the timing t1. Thus, the gate drive condition during the conduction period is not switched to the drive condition a2 but is maintained at the drive condition a1. Therefore, an increase in conduction loss caused by a decrease in the switching speed can be prevented. In addition, even if the recovery surge voltage caused by the decrease in the switching speed is not actively suppressed (see the circle d), the recovery surge voltage generated by the diode D1 due to the decrease in the power supply voltage Ed is not too high. Thus, the recovery surge voltage generated by the diode D1 does not exceed the breakdown voltage of the switching element Q1.

[0082] In other words, when the recovery surge voltage generated by the diode D1 is low due to the decrease in the power supply voltage Ed, switching to the gate drive condition that slows down the conduction speed of the switching element Q2 can be prohibited. Thus, when the recovery surge voltage decreases due to the decrease in the power supply voltage Ed, an increase in conduction loss caused by the flattening of the time change rate dI / dt of the drain current during the conduction period can be suppressed. In this way, according to the technology of the present disclosure, even when the power supply voltage Ed fluctuates, suppression of the recovery surge voltage and reduction of the switching loss can be achieved simultaneously.

[0083] Here, since the magnitude of the recovery surge voltage changes correspondingly with the temperature of the diode, the switching determination circuit 80b can change the determination value Ed(ref) according to the temperature of the diode D1 (which may include the ambient temperature around the diode D1). Thus, since it is determined whether to change the gate drive condition according to the temperature of the diode D1, even if the temperature of the diode D1 changes, the balance between suppression of the recovery surge voltage and reduction of the switching loss can be maintained. When the determination value Ed(ref) is defined as "Ed(max) - α", the switching determination circuit 80b changes the determination value Ed(ref) by changing α. Similarly to the switching determination circuit 80b, the switching determination circuit 80a can also change the determination value Ed(ref) according to the temperature of the diode D2 (which may include the ambient temperature around the diode D2).

[0084] For example, as Figure 4As shown, the gate drive device 12 includes a temperature detection circuit 20b for detecting the temperature of the diode D2, and the gate drive device 11 includes a temperature detection circuit 20a (not shown) for detecting the temperature of the diode D1. The temperature detection circuit 20a detects the temperature of the diode D1 by passing a constant current through a diode provided near the diode D1 and measuring the forward voltage of the diode. The temperature detection circuit 20a can also detect the temperature of the diode D1 by other detection methods. Similarly to the temperature detection circuit 20a, the temperature detection circuit 20b also detects the temperature of the diode D2. The switching determination circuit 80b changes the determination value Ed(ref) according to the temperature detected by the temperature detection circuit 20a. The switching determination circuit 80a changes the determination value Ed(ref) according to the temperature detected by the temperature detection circuit 20b.

[0085] The diode has the characteristic that the lower the temperature of the diode, the lower the reverse recovery surge voltage. Based on this characteristic, the switching determination circuit 80b can make the determination value Ed(ref) when the temperature of the diode D1 detected by the temperature detection circuit 20a is lower higher than the determination value Ed(ref) when the temperature of the diode D1 is higher. Thus, for example, when the reverse recovery surge voltage generated by the diode D1 is lowered due to the decrease in the temperature of the diode D1, it is possible to prohibit switching to the gate drive condition that slows down the turn-on speed of the switching element Q2. Thus, when the reverse recovery surge voltage is lowered due to the decrease in the temperature of the diode D1, it is possible to suppress an increase in conduction loss caused by the time change rate dI / dt of the drain current during conduction becoming gentle. When the determination value Ed(ref) is defined as "Ed(max) - α", the switching determination circuit 80b can increase the determination value Ed(ref) by reducing α. Similarly to the switching determination circuit 80b, the switching determination circuit 80a can also make the determination value Ed(ref) when the temperature of the diode D2 detected by the temperature detection circuit 20b is lower higher than the determination value Ed(ref) when the temperature of the diode D2 is higher.

[0086] The gate drive device and the power conversion device have been described above by way of embodiments, but the present invention is not limited to the above embodiments. Various modifications and improvements such as combinations or replacements of a part or all with other embodiments can be made within the scope of the present invention.

[0087] For example, a power conversion device including at least one gate drive device is not limited to a DC-DC converter that converts DC to DC. Specific examples thereof include an inverter that converts DC to AC, a boost converter that boosts and outputs an input voltage, a buck converter that steps down and outputs an input voltage, a buck-boost converter that boosts or steps down and outputs an input voltage, and the like.

[0088] In addition, the surge detection circuits 90a and 90b can detect the recovery surge voltage in a manner different from the manner of observing the voltage VDS or the voltage VAK.

[0089] For example, when the time change rate dI / dt of the drain current Id of the switching element Q2 changes from positive to negative, the surge detection circuit 90b can output a detection signal S1 to the time storage circuit 70b for indicating that the recovery surge voltage generated by the diode D1 with the conduction of the switching element Q2 is detected. Similarly, when the time change rate dI / dt of the drain current Id of the switching element Q1 changes from positive to negative, the surge detection circuit 90a can output a detection signal S2 to the time storage circuit 70a for indicating that the recovery surge voltage generated by the diode D2 with the conduction of the switching element Q1 is detected.

[0090] Symbol Explanation

[0091] 11, 12 Gate drive device

[0092] 20b Temperature detection circuit

[0093] 30 Capacitor

[0094] 31 High power supply potential section

[0095] 32 Low power supply potential section

[0096] 40 Power supply voltage detection circuit

[0097] 50b Drive circuit

[0098] 60b Drive condition change circuit

[0099] 70b Time storage circuit

[0100] 80b Switching determination circuit

[0101] 90b Surge detection circuit

[0102] 100 Power conversion device

[0103] Q1, Q2 Switching elements

Claims

1. A gate driving device, comprising: a driving circuit that drives the gate of the switching element according to an input signal indicating conduction and cutoff of the switching element connected between the high power potential portion and the low power potential portion; a time storage circuit that stores the time from when the input signal switches to a conduction instruction until a recovery surge voltage generated by a diode opposite to the switching element is detected; a switching determination circuit that determines whether to switch the gate driving condition of the switching element according to a detected value of the power supply voltage between the high power potential portion and the low power potential portion; and a driving condition change circuit that changes the gate driving condition at the same time as the time during the previous conduction period stored in the time storage circuit during the current conduction period according to the determination result of the switching determination circuit.

2. The gate driving device according to claim 1, wherein when the detected value of the power supply voltage is greater than the determination value, the switching determination circuit determines to switch the gate driving condition, and when the detected value of the power supply voltage is less than the determination value, the switching determination circuit determines not to switch the gate driving condition.

3. The gate driving device according to claim 2, wherein the switching determination circuit changes the determination value according to the temperature of the diode.

4. The gate driving device according to claim 3, wherein the switching determination circuit makes the determination value in the case of lower temperature higher than the determination value in the case of higher temperature.

5. The gate driving device according to any one of claims 1 to 4, wherein during the current conduction period, at the same time as the time during the previous conduction period stored in the time storage circuit, the driving condition change circuit changes the gate driving condition to a condition that slows down the conduction speed of the switching element.

6. The gate driving device according to claim 5, wherein the driving condition change circuit slows down the conduction speed by increasing the resistance value of the gate resistor connected to the gate of the switching element.

7. The gate driving device according to claim 5, wherein the driving condition change circuit slows down the conduction speed by reducing the current value of the gate current flowing through the gate of the switching element.

8. The gate driving device according to any one of claims 5 to 7, wherein after the driving condition change circuit changes the gate driving condition to a condition that slows down the conduction speed, after the same time, the gate driving condition returns to the original driving condition before the change.

9. A power conversion device, comprising: a plurality of switching elements connected in series between a high power potential portion and a low power potential portion; a plurality of gate driving devices respectively provided for the plurality of switching elements and driving the gate of a corresponding one of the plurality of switching elements; and A power supply voltage detection circuit for detecting the power supply voltage between the high power potential part and the low power potential part. Among them, each of the plurality of gate driving devices includes: A driving circuit for driving the gate of the corresponding one switching element according to an input signal indicating conduction and cutoff of the corresponding one switching element. A time storage circuit for storing the time from when the input signal is switched to a conduction command until a recovery surge voltage generated by a diode opposite to the corresponding one switching element is detected. A switching determination circuit for determining whether to switch the gate driving condition of the corresponding one switching element according to the power supply voltage detected by the power supply voltage detection circuit; and A driving condition change circuit for changing the gate driving condition at the same time as the time during the previous conduction period stored in the time storage circuit during the current conduction period according to the determination result of the switching determination circuit.

10. The power conversion device according to claim 9, wherein, the power supply voltage detection circuit includes: a voltage dividing circuit for dividing the power supply voltage; and an isolation amplifier which is input with the voltage divided by the voltage dividing circuit and outputs a detection value of the power supply voltage.

11. The power conversion device according to claim 9 or 10, wherein, the plurality of switching elements are wide bandgap devices.

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