Image sensor and image processing device including the same

By designing pixel arrays, time calculators, timing generators and analog-to-digital converters in the image sensor, calculating row processing time and generating control signals, the problems of noise and power consumption during digital zoom are solved, and image quality improvement and energy efficiency are achieved optimization.

CN112887640BActive Publication Date: 2025-02-18SAMSUNG ELECTRONICS CO LTD
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Patent Information

Application Number
CN202110042195.6
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Priority Date
2017-04-10
Filing Date
2018-03-21
Publication Date
2025-02-18
Estimated Expiration
2038-03-21

AI Technical Summary

Technical Problem

Existing image sensors are prone to noise during digital zooming, resulting in image degradation and high power consumption.

Method used

An image sensor is designed, including a pixel array, a time calculator, a timing generator and an analog-to-digital converter (ADC), by calculating the row processing time suitable for processing signals from multiple pixels and generating a control signal according to the time, To reduce noise and power consumption.

Benefits of technology

Effectively reduces noise during digital zoom, prevents image degradation, and reduces power consumption of image sensors.

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Abstract

The present application provides an image sensor and an image processing device including the image sensor. The image sensor includes: a pixel array including a plurality of pixels arranged in rows and columns and configured to generate pixel signals from the plurality of pixels; a time calculator configured to receive zoom information corresponding to digital zoom and configured to calculate a row processing time suitable for processing pixel signals from a plurality of pixels included in a single row based on the zoom information; a timing generator configured to generate at least one control signal based on the row processing time; and an analog-to-digital converter configured to generate pixel data by sampling the pixel signal according to the at least one control signal.
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Description

[0001] This application is a divisional application based on the Chinese patent application with the application date of March 21, 2018, application number 201810234412.X, and invention name “Image sensor and image processing device including an image sensor”.

[0002] CROSS-REFERENCE TO RELATED APPLICATIONS

[0003] This application claims the priority benefit of Korean Patent Application No. 10-2017-0046298 filed on April 10, 2017, in the Korean Intellectual Property Office, the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0004] The inventive concept relates to an image sensor, and more particularly, to an image sensor that can reduce noise during digital zoom and can reduce power consumption. Background Art

[0005] An image sensor can convert an optical signal including image information of an object into an electrical signal. Widely used image sensors include charge coupled device (CCD) image sensors and complementary metal oxide semiconductor (CMOS) image sensors. With the development of the computer industry and the telecommunication industry, the demand for image sensors with improved performance in various electronic devices such as digital cameras, camcorders, personal communication systems (PCS), game consoles, surveillance cameras, medical micro cameras, and / or mobile phones has increased.

[0006] In order to magnify the image of the image sensor, optical zoom that magnifies the image by adjusting the distance between lenses and digital zoom that magnifies the image by cutting off a portion of the image during shooting can be used. In digital zoom, new pixel values ​​are interpolated using existing image values ​​when performing the zoom function, and due to these characteristics, digital zoom shows a less exquisite image than the image shown by the optical zoom. Therefore, various studies are being conducted to reduce the degradation of the image during digital zoom. Summary of the invention

[0007] The inventive concept provides an image sensor and an image processing apparatus including the image sensor, which can reduce noise during digital zoom and prevent image degradation.

[0008] The inventive concept provides an image sensor and an image processing apparatus including the image sensor, which can reduce power consumption during digital zooming.

[0009] According to an exemplary embodiment of the present invention, there is provided an image sensor, comprising: a pixel array including a plurality of pixels arranged in rows and columns and configured to generate pixel signals from the plurality of pixels; a time calculator configured to receive zoom information corresponding to digital zoom and configured to calculate a row processing time suitable for processing pixel signals from a plurality of pixels included in a single row based on the zoom information; a timing generator configured to generate at least one control signal based on the row processing time; and an analog-to-digital converter (ADC) configured to generate pixel data by sampling the pixel signal according to the at least one control signal.

[0010] According to an exemplary embodiment of the present invention, there is provided an image processing device, comprising: an image processor configured to calculate a row processing time suitable for processing pixel signals from a plurality of pixels included in a single row based on zoom information corresponding to digital zoom; and an image sensor comprising a timing generator and an ADC, wherein the timing generator is configured to generate at least one control signal based on the row processing time, and the ADC is configured to generate pixel data by sampling the pixel signal according to the at least one control signal.

[0011] According to an exemplary embodiment of the inventive concept, there is provided a computer system including: an image processor configured to adaptively adjust a line processing time in response to receiving a digital zoom command; and an image sensor configured to sample an image according to the adjusted line processing time. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] Exemplary embodiments of the present inventive concept will be more clearly understood through the following detailed description in conjunction with the accompanying drawings, in which:

[0013] Figure 1 is a block diagram of an image processing apparatus according to an exemplary embodiment of the inventive concept.

[0014] Figure 2 is a flowchart of a method of operating a time calculator according to an exemplary embodiment of the inventive concept.

[0015] Figure 3 is a block diagram of an image sensor according to an exemplary embodiment of the inventive concept.

[0016] Figure 4 is a block diagram of an image sensor according to an exemplary embodiment of the inventive concept.

[0017] Figure 5 1 is a view of an original image according to an exemplary embodiment of the inventive concept and a digital zoom image obtained by performing digital zoom on the original image.

[0018] Figure 6 is a graph of row processing time for digital zoom magnification according to an exemplary embodiment of the inventive concept.

[0019] Figure 7 is a block diagram of an image sensor according to an exemplary embodiment of the inventive concept.

[0020] Figure 8 is a flowchart of a method of operating an image sensor according to an exemplary embodiment of the inventive concept.

[0021] Fig.9A is a timing diagram of a multi-sampling operation according to an exemplary embodiment of the inventive concept.

[0022] Fig. 9B is a timing diagram of a multi-sampling operation according to an exemplary embodiment of the inventive concept.

[0023] Fig. 10A and Fig. 10B is a diagram of a method of determining a sampling number according to an exemplary embodiment of the inventive concept.

[0024] Fig.11 is a block diagram of an image sensor according to an exemplary embodiment of the inventive concept.

[0025] Fig.12 is a flowchart of a method of operating a capacitance adjusting unit according to an exemplary embodiment of the inventive concept.

[0026] Fig.13 is a block diagram of an image sensor according to an exemplary embodiment of the inventive concept.

[0027] Fig.14 is a block diagram of an image sensor according to an exemplary embodiment of the inventive concept.

[0028] Fig.15 is a block diagram of an image sensor according to an exemplary embodiment of the inventive concept.

[0029] Fig.16 is a block diagram of an image processing apparatus according to an exemplary embodiment of the inventive concept.

[0030] Fig.17 is a block diagram of a computing system including an image sensor according to an exemplary embodiment of the inventive concept. DETAILED DESCRIPTION

[0031] Figure 1 is a block diagram of an image processing apparatus 10 according to an exemplary embodiment of the inventive concept.

[0032] Reference Figure 1, the image processing device 10 may include an image processor 100 and an image sensor 200 .

[0033] The image processor 100 may process the image data sensed and output by the image sensor 200, and output the processed image data to the display device. The image processor 100 may process the image data to be suitable for human eyes. The display device may include a device capable of outputting an image (e.g., a computer, a mobile phone, or an electronic device having a camera). For example, the image processor 100 may be implemented as a digital signal processor (DSP), an image signal processor (ISP), and / or an application processor (AP).

[0034] The image processor 100 may receive a digital zoom command CMD_DZ from a user or a host. The digital zoom command CMD_DZ may include zoom information ZI according to digital zoom. The image processor 100 may extract the zoom information ZI from the received digital zoom command CMD_DZ and output the extracted zoom information ZI to the time calculator 210.

[0035] In an exemplary embodiment, the zoom information ZI may include at least one of information about an image size corresponding to an image to be output to a display device, information about pixel addresses at which the image to be output is formed, and information about a digital zoom magnification, wherein the information about the image size may include the number of rows of a plurality of pixels to which data of the image to be output is input. Figure 5 Describe it.

[0036] The image sensor 200 may sense the intensity of light of an object captured through a lens and may convert the sensed intensity of light into digital image data under the control of the image processor 100. The image sensor 200 may output the digital image data to the image processor 100. The image sensor 200 may include a time calculator 210, a timing generator 220, and an analog-to-digital converter (ADC) 230.

[0037] The time calculator 210 may calculate the row processing time RPT based on the zoom information ZI received from the image processor 100, and output the calculated row processing time PRT to the timing generator 220. The row processing time RPT may be the time taken by the image sensor to process a single row, and RPT=1 / (FPS×RN) (wherein RPT is the row processing time, FPS is the frame rate per second, and RN is the number of rows, hereinafter referred to as the row processing time calculation formula). The row processing time RPT may also be referred to as one horizontal time (1H-time). According to an exemplary embodiment of the inventive concept, the time calculator 210 may use the number of rows RN that changes according to the digital zoom when calculating the row processing time RPT.

[0038] According to an exemplary embodiment of the inventive concept, when the time calculator 210 calculates the row processing time RPT, a reference row processing time may be used. The reference row processing time may represent or may correspond to the row processing time RPT when digital zoom is not performed (for example, when the magnification is 1x). In an example, the time calculator 210 may calculate a value obtained by multiplying the reference row processing time by the magnification as the row processing time RPT.

[0039] The timing generator 220 may output a sampling control signal Cont_SP to the ADC 230 based on the received row processing time RPT. The ADC 230 may perform sampling on a pixel signal including image data of an object to be observed based on the received sampling control signal Cont_SP. Figure 1 It is illustrated that the time calculator 210 is separated from the timing generator 220 , but the inventive concept is not limited thereto. According to an exemplary embodiment, the timing generator 220 may serve as the time calculator 210 .

[0040] Figure 2 is a flowchart of a method of operating the time calculator 210 according to an exemplary embodiment of the inventive concept.

[0041] Reference Figure 2 In operation S110, the time calculator 210 may receive zoom information ZI from the image processor 100. The received zoom information ZI may include at least one of information about an image size corresponding to an image to be output to the display device, information about a pixel address to which data of the image to be output is input, and / or information about a digital zoom magnification, wherein the information about the image size may include the number of rows of a plurality of pixels to which data of the image to be output is input.

[0042] In operation S120, the time calculator 210 may calculate the row processing time RPT based on the received zoom information ZI. In an example, when the received zoom information ZI includes information about the number of rows that have been changed according to the digital zoom, the time calculator 210 may replace the changed number of rows into the row processing time calculation formula to calculate the row processing time RPT. In an example, when the received zoom information ZI includes information about the pixel address, the time calculator 210 may calculate the changed number of rows by the received pixel address, and calculate the row processing time RPT by replacing the changed number of rows into the row processing time calculation formula. In an example, when the received zoom information ZI includes information about the magnification, the time calculator 210 may calculate a value obtained by multiplying the reference row processing time by the magnification as the row processing time RPT.

[0043] In operation S130, the time calculator 210 may output the calculated row processing time RPT to the timing generator 220. The timing generator 220 may adjust the operation timing of the ADC 230 and / or the like based on the received row processing time RPT.

[0044] Figure 3 2 is a block diagram of an image sensor 200 according to an exemplary embodiment of the inventive concept. Figure 3 In, with Figure 1 The same reference numerals in the drawings denote the same elements, and thus, repeated descriptions thereof will not be given herein.

[0045] Reference Figure 3 , the image sensor 200 may include a time calculator 210 , a timing generator 220 , an ADC 230 , a pixel array 240 , a row driver 250 , a ramp generator 260 , and a readout circuit 280 .

[0046] The time calculator 210 may receive the zoom information ZI and output the row processing time RPT to the timing generator 220. Based on the received row processing time RPT, the timing generator 220 may output the row driver control signal Cont_RD to the row driver 250, may output the sampling control signal Cont_SP to the ADC 230 and the readout circuit 280, and may output the ramp control signal Cont_RP to the ramp generator 260. Therefore, the timing generator 220 may adjust the operation timing of the row driver 250, the ADC 230, the readout circuit 280, and the ramp generator 260 based on the row processing time RPT.

[0047] The row driver 250 may drive the pixel array 240 in units of rows. For example, the row driver 250 may generate a transfer control signal for controlling a transfer transistor of each unit pixel constituting the pixel array 240, a reset control signal for controlling a reset transistor, a selection control signal for controlling a selection transistor, etc. According to an exemplary embodiment of the inventive concept, the row driver 250 may drive at least some rows of the pixel array 240 in response to the row driver control signal Cont_RD of the timing generator 220 during digital zooming.

[0048] The pixel array 240 may include a plurality of photoelectric conversion elements, such as photodiodes and / or pinned photodiodes, and may also include a plurality of pixels arranged in rows and columns. The pixel array 240 may sense light using a plurality of photoelectric conversion elements, and convert the light into an electrical signal to generate a pixel signal VPixel. The pixel array 240 may output a pixel signal VPixel including a reset signal and a video signal from a row line selected by a row selection signal provided by the row driver 250 to the ADC 230.

[0049] The ADC 230 may convert a pixel signal VPixel in an analog domain received from the pixel array 240 into pixel data PD in a digital domain. To this end, the ADC 230 may include a comparator 231 and a counter 232 .

[0050] The comparator 231 may receive the ramp signal RP from the ramp generator 260, and compare the received ramp signal RP with the pixel signal VPixel and output the comparison result signal to the counter 232. The counter 232 may count the time from when the sampling control signal Cont_SP is received from the timing generator 220 to when the comparison result signal is received from the comparator 231, and generate pixel data PD corresponding thereto. The counter 232 may output the generated pixel data PD to the readout circuit 280. The readout circuit 280 may generate image data ID based on the received pixel data PD, and output the image data ID to ( Figure 1 ) image processor 100.

[0051] The ramp generator 260 may receive the ramp control signal Cont_RP from the timing generator 220 and generate the ramp signal RP based on the received ramp control signal Cont_RP. In addition, the ramp generator 260 may output the generated ramp signal RP to the comparator 231.

[0052] According to the present invention, during digital zoom, the time calculator 210 can adaptively adjust the row processing time RPT by calculating the row processing time RPT based on the zoom information ZI, and the timing generator 220 can adjust the operation timing of the ADC 230, the row driver 250, the ramp generator 260, the readout circuit 280, etc. according to the adjusted row processing time RPT, so that the row processing time RPT for processing a single row can be extended.

[0053] Figure 4 is a block diagram of an image sensor 200 according to an exemplary embodiment of the inventive concept. More specifically, Figure 4 FIG. 2 is a block diagram of ADC 230, pixel array 240, row driver 250, ramp generator 260, and readout circuit 280 in image sensor 200. Figure 4 In, with Figure 3 The same reference numerals in the drawings denote the same elements, and thus, repeated descriptions thereof will not be given herein.

[0054] The pixel array 240 may include a plurality of unit pixels PX in a matrix form, and the plurality of unit pixels PX are respectively connected to a plurality of row lines ROW1 to ROWm and a plurality of column lines COL1 to COLn. The pixel array may be formed by stacking (e.g., vertically stacking) a semiconductor substrate, an interlayer insulating layer, a color filter layer, and a microlens. For example, the semiconductor substrate may be or may include a semiconductor substrate on which a p-type epitaxial layer is formed on a p-type bulk silicon substrate, and a photodiode may be formed by injecting (e.g., implanting) n-type ions into the p-type epitaxial layer. In addition, an interlayer insulating layer may be stacked on the semiconductor substrate. The interlayer insulating layer may include a gate of a transistor included in a unit pixel and a plurality of layers of wires. According to an exemplary embodiment, a protective layer for protecting an element may be stacked on the interlayer insulating layer. A color filter layer may be stacked on an interlayer insulating layer (or a protective layer), and the color filter layer may include a plurality of color filters. In an exemplary embodiment, a Bell pattern technique may be applied to the color filter layer. For example, the color filter may include at least one red color filter, at least one green color filter, and at least one blue color filter, or may include at least one magenta color filter, at least one cyan color filter, and at least one yellow color filter. According to an exemplary embodiment, a flat layer referred to as an overcoat layer may be stacked on the color filter layer. The microlens is stacked on the color filter layer (or flat layer) and may guide the incident light so that the incident light is effectively incident on the photodiode of the unit pixel.

[0055] Each or at least some of the plurality of unit pixels PX may include at least one of a red pixel for converting light in a red spectral region into an electrical signal, a green pixel for converting light in a green spectral region into an electrical signal, a blue pixel for converting light in a blue spectral region into an electrical signal, and a depth pixel for converting depth information into an electrical signal using a time-of-flight (TOF) method. For example, each of the plurality of unit pixels PX may output a pixel signal having a different voltage level according to the intensity of incident light.

[0056] The row driver 250 may decode the row driver control signal Cont_RD generated in the timing generator 220, and may select at least one row line included in the pixel array 240 in response to the decoded row driver control signal Cont_RD. For example, the row driver 250 may select and drive the first row line ROW1 to the m-th row line ROWm in response to the row driver control signal Cont_RD. According to an exemplary embodiment of the inventive concept, during digital zooming, the row driver 250 may select and drive only a portion of the row lines corresponding to the row driver control signal Cont_RD among the first row line ROW1 to the m-th row line ROWm. Therefore, the image sensor 200 according to the inventive concept may set the row processing time RPT to be longer than the reference row processing time because during digital zooming, the row driver 250 drives only some rows while maintaining a constant frame rate per second (fps) relative to constant driving of a single frame.

[0057] Each or at least some of the comparators 231 may be connected to any one of the first to n-th column lines COL1 to COLn and the ramp generator 260. Any one of the first to n-th column lines COL1 to COLn may be connected to a first input terminal of the comparator 231, and the ramp generator 260 may be connected to a second input terminal of the comparator 231. Each comparator 231 may receive a pixel signal received from one of the first to n-th column lines COL1 to COLn and a ramp signal value generated from the ramp generator 260, compare them with each other, and output a comparison result signal to an output terminal of each comparator 231. According to the slope of the ramp signal, a difference between a signal sample and a reset sample in the comparison result signal output from the comparator 231 may be picked up and output. The ramp generator 260 may operate based on a ramp control signal Cont_RP generated in the timing generator 220. Reference will be made later Fig.9A and Fig. 9B to describe it.

[0058] Each counter 232 may be connected to an output terminal of each comparator 231. The counter 232 may include an up counter / down counter and a bitwise inversion counter. As described above, each counter 232 may count the time from when the sampling control signal Cont_SP is received from the timing generator 220 to when the comparison result signal is received from the comparator 231, and generate pixel data PD in a digital domain corresponding thereto.

[0059] The readout circuit 280 may include a plurality of memories 281. Each of the plurality of memories 281 may store pixel data received from the ADC 230 based on the sampling control signal Cont_SP generated by the timing generator 220. Each of the plurality of memories 281 may correspond to a static random access memory (SRAM), but the inventive concept is not limited thereto. The memory 281 may output image data in a digital domain to the image processor 100.

[0060] Figure 5 is a view of an original image according to an exemplary embodiment of the inventive concept and a digital zoom image obtained by performing digital zoom on the original image. More specifically, Figure 5 is a view of an original image and a digitally zoomed image produced by performing digital zoom on the original image.

[0061] Reference Figure 5 , a user or a host may output a command to the image processing device to perform digital zoom to enlarge a first area (area 1) of the original image. Data of the first area may be formed in some pixels of the plurality of pixels PX included in the pixel array 240.

[0062] When processing the original image without digital zoom, the image processing device may acquire data from a plurality of pixels PX connected to N column lines and M row lines, and output the image data to a display device. Alternatively, when processing the original image with digital zoom, the image processing device may acquire data from a plurality of pixels PX connected to N / a column lines and M / a row lines corresponding to the first region (region 1), and output the image data to a display device using the acquired data. Therefore, even when performing digital zoom, when using the same row processing time RPT, the image processing device outputs a digital zoom image to a display device using limited data compared to the original image. Therefore, image quality degradation due to various noises may occur during interpolation processing.

[0063] According to the inventive concept, since the original image and the digital zoom image are the same in the frame rate per second (fps) for processing a single frame, the total frame processing time of the original image and the total frame processing time of the digital zoom image can be the same. Therefore, if the original image has a smaller number of rows to be processed, the row processing time RPT of the digital zoom image can be set to be longer than the row processing time (RPT) of the original image. Accordingly, the total frame processing time can be set to be the same as the total frame processing time of the original image. According to an exemplary embodiment of the inventive concept, noise that causes image degradation can be reduced by making the row processing time RPT longer, thereby reducing image degradation of the digital zoom image.

[0064] Figure 6is a graph of a row processing time RPT with respect to a digital zoom magnification according to an exemplary embodiment of the inventive concept.

[0065] Figure 6 The horizontal axis in may be the digital zoom magnification, and the vertical axis may be the row processing time RPT. Figure 6 , when digital zoom is not performed corresponding to when the magnification is n1x, the row processing time RPT may be a first time RPT1. In addition, the row processing time RPT when the magnification is n2x may be a second time RPT2, and the row processing time RPT when the magnification is n3x may be a third time RPT3. According to an exemplary embodiment of the inventive concept, the row processing time RPT may be proportional to the magnification. Although Figure 6 It is shown that the row processing time RPT is proportional to the magnification of the linear function, but the inventive concept is not limited thereto.

[0066] Figure 7 2 is a block diagram of an image sensor 200a according to an exemplary embodiment of the inventive concept. Figure 7 In, with Figure 3 The same reference numerals in the drawings denote the same elements, and thus, repeated descriptions thereof will not be given herein.

[0067] Reference Figure 7 , the image sensor 200a may include a time calculator 210a, a timing generator 220a, an ADC 230a, a ramp generator 260a, and a multi-sampling unit 291a.

[0068] The time calculator 210a may output the row processing time RPT calculated based on the received zoom information ZI to the multi-sampling unit 291a. The multi-sampling unit 291a may determine the number of samplings based on the received row processing time RPT. The multi-sampling unit 291a may output the multi-sampling enable signal En_MS including information about the determined number of samplings to the timing generator 220a. The timing generator 220a may output the ramp control signal Cont_RP to the ramp generator 260a based on the number of samplings included in the received multi-sampling enable signal En_MS, and output the multi-sampling control signal Cont_MS to the ADC 230a. The ADC 230a may perform multi-sampling based on the pixel signal VPixel it receives, and output the generated pixel data PD to ( Figure 3 ) readout circuit 280. Fig.9A and Fig. 9B To describe multisampling.

[0069] The image sensor according to the inventive concept may improve the noise of a digital zoom image by determining the number of sampling times based on the row processing time RPT and performing multi-sampling on the pixel signal VPixel.

[0070] Figure 8 is a flowchart of a method of operating an image sensor according to an exemplary embodiment of the inventive concept. Figure 8 In, with Figure 7 The same reference numerals in the drawings denote the same elements, and thus, repeated descriptions thereof will not be given herein.

[0071] Reference Figure 7 and Figure 8 In operation S210, the multi-sampling unit 291a may receive the row processing time RPT calculated based on the zoom information ZI from the time calculator 210a. In operation S220, the multi-sampling unit 291a may determine the number of samplings based on the received row processing time RPT. In an example, the multi-sampling unit 291a may determine the number of samplings based on a table stored in advance. In an example, the multi-sampling unit 291a may determine the number of samplings based on a specific formula (or alternatively, based on a predetermined formula). Fig. 10A and Fig. 10B to describe it.

[0072] In operation S230, the multi-sampling unit 291a may output a multi-sampling enable signal En_MS including information about the determined number of sampling times to the timing generator 220a. In operation S240, the timing generator 220a may output a multi-sampling control signal Cont_MS for multi-sampling to the ADC 230a based on the determined number of sampling times. The multi-sampling control signal Cont_MS may include a timing control signal for multi-reset sampling and multi-signal sampling. In operation S250, the ADC 230a may perform multi-sampling on the pixel signal VPixel based on the multi-sampling control signal Cont_MS.

[0073] Fig.9A is a timing diagram of a multi-sampling operation according to an exemplary embodiment of the inventive concept. More specifically, Fig.9A yes Figure 7 2 is a timing diagram of an image sensor 200a performing a multi-sampling operation in which two samplings are performed during a row processing time RPT to obtain the Figure 4 ( Figure 3 ) pixel data PD.

[0074] Reference Figure 7 and Fig.9AThe multi-sampling process of the image sensor 200a may include an auto-zero section AZ, a reset sampling section RESET and / or a signal sampling section SIGNAL. During the auto-zero section AZ, the image sensor 200a may match the level of the pixel signal VPixel with the level of the ramp signal RP. During the reset sampling section RESET, the image sensor 200a may measure the residual voltage value in the pixel as a signal for obtaining ( Figure 3 The residual voltage value measured during the reset sampling part RESET may vary from pixel to pixel. During the signal sampling part SIGNAL, the image sensor 200a may obtain the ( Figure 3 The image sensor 200a according to an exemplary embodiment of the inventive concept may perform multiple sampling by performing reset sampling twice or more during the reset sampling part RESET and performing signal sampling twice or more during the signal sampling part SIGNAL. Fig.9A A timing diagram showing multi-sampling in which two samplings are performed. After the auto-zero portion AZ ends, the ramp signal RP may transition to a first voltage level.

[0075] At time point T1, the timing generator 220a may enter the reset sampling part RESET by turning the multiple sampling control signal Cont_MS for the ADC 230a and the ramp control signal Cont_RP for the ramp generator 260a into logic high based on the row processing time RPT received from the time calculator 210a. The ramp generator 260a may reduce the voltage level of the ramp signal RP at a constant slope in response to the ramp control signal Cont_RP turned into logic high. In addition, the counter 232a may start counting CNT in response to the rising edge of the multiple sampling control signal Cont_MS.

[0076] The time point T2 may indicate a time point when the voltage level of the ramp signal RP is consistent with the voltage level of the pixel signal VPixel. At the time point T2, the comparator 231a may output the comparison result signal CR to the counter 232a, and the counter 232a may complete the count CNT accordingly. The counter 232a may count the time from the rising edge of the multi-sampling control signal Cont_MS to the comparison result signal CR of the comparator 231a and generate a count value as the first reset sample R1.

[0077] At time point T3, timing generator 220a may transition the multi-sampling control signal Cont_MS for ADC 230a and the ramp control signal Cont_RP for ramp generator 260a to a logic low value (“logic low”). Ramp generator 260a may maintain the voltage level of ramp signal RP constant in response to ramp control signal Cont_RP transitioning to logic low.

[0078] At time point T4, the timing generator 220a may transition the multi-sampling control signal Cont_MS for the ADC 230a and the ramp control signal Cont_RP for the ramp generator 260a to a logic high value (“logic high”). The ramp generator 260a may increase the voltage level of the ramp signal RP at a constant slope in response to the ramp control signal Cont_RP transitioning to logic high. In addition, the counter 232a may start counting CNT in response to the rising edge of the multi-sampling control signal Cont_MS.

[0079] At the time point T5 when the pixel signal VPixel is consistent with the ramp signal RP, the comparator 231a can output the comparison result signal CR to the counter 232a, and the counter 232a can complete the count CNT accordingly. The counter 232a can count the time from the rising edge of the multi-sampling control signal Cont_MS to the comparison result signal CR of the comparator 231a and generate the count value as the second reset sample R2.

[0080] At time point T6, timing generator 220a may complete the reset sampling part RESET by turning the multi-sampling control signal Cont_MS for ADC 230a and the ramp control signal Cont_RP for ramp generator 260a into logic low. Ramp generator 260a may maintain the voltage level of ramp signal RP constant in response to ramp control signal Cont_RP turning into logic low.

[0081] ADC 230a can perform synthesis on the first reset sample R1 and the second reset sample R2 generated during the reset sampling part RESET. The reset sample may include a reset information item having substantial information and an unnecessary noise item. Since the reset information item has the same phase, the reset information item included in each sample of the first reset sample R1 and the second reset sample R2 is synthesized by a simple operation, while the noise item has a different phase and is synthesized by an orthogonal operation. The signal quality increased by the simple operation of the reset information item can be greater than the signal quality increased by the orthogonal operation of the noise item. As a result, the signal-to-noise ratio (SNR) of the reset sample synthesized by multiple sampling can be less than the signal-to-noise ratio of the reset sample synthesized by a single sampling example.

[0082] After the reset sampling part RESET is completed and before entering the signal sampling part SIGNAL, according to ( Figure 3 ) control of the row driver 250, ( Figure 3 The pixel array 240 may convert the light signal received from the object into an electric signal. Therefore, the voltage level of the pixel signal VPixel may be changed.

[0083] At time point T7, the timing generator 220a may enter the signal sampling part SIGNAL by turning the multi-sampling control signal Cont_MS for the ADC 230a and the ramp control signal Cont_RP for the ramp generator 260a into logic high based on the row processing time RPT received from the time calculator 210a. The ramp generator 260a may reduce the voltage level of the ramp signal RP at a constant slope in response to the ramp control signal Cont_RP turned into logic high. In addition, the counter 232a may start counting CNT in response to the rising edge of the multi-sampling control signal Cont_MS.

[0084] At the time point T8 when the pixel signal VPixel is consistent with the ramp signal RP, the comparator 231a can output the comparison result signal CR to the counter 232a, and the counter 232a can complete the count CNT accordingly. The counter 232a can count the time from the rising edge of the multi-sampling control signal Cont_MS to the comparison result signal CR of the comparator 231a, and can generate the count value as the first signal sample S1.

[0085] At time point T9, the timing generator 220a may transition the multi-sampling control signal Cont_MS for the ADC 230a and the ramp control signal Cont_RP for the ramp generator 260a to logic low. The ramp generator 260a may maintain the voltage level of the ramp signal RP constant in response to the ramp control signal Cont_RP transitioning to logic low.

[0086] At time point T10, the timing generator 220a may turn the multi-sampling control signal Cont_MS for the ADC 230a and the ramp control signal Cont_RP for the ramp generator 260a into logic high. The ramp generator 260a may increase the voltage level of the ramp signal RP at a constant slope in response to the ramp control signal Cont_RP turned into logic high. In addition, the counter 232a may start counting CNT in response to the rising edge of the multi-sampling control signal Cont_MS.

[0087] At the time point T11 when the voltage level of the ramp signal RP becomes equal to the voltage level of the pixel signal VPixel, the comparator 231a can output the comparison result signal CR to the counter 232a, and the counter 232a can complete the count CNT accordingly. The counter 232a can count the time from the rising edge of the multi-sampling control signal Cont_MS to the comparison result signal CR of the comparator 231a, and generate the count value as the second signal sample S2.

[0088] At time point T12, timing generator 220a may complete the signal sampling portion SIGNAL by turning the multi-sampling control signal Cont_MS for ADC 230a and the ramp control signal Cont_RP for ramp generator 260a into logic low. Ramp generator 260a may maintain the voltage level of ramp signal RP constant in response to ramp control signal Cont_RP turning into logic low.

[0089] ADC 230a may perform synthesis on the first signal sample S1 and the second signal sample S2 generated during the signal sampling portion SIGNAL. Like the reset sample, the signal sample may include a signal information item having substantial information and an unnecessary noise item, and the signal quality increased by a simple operation of the signal information item may be greater than the signal quality increased by an orthogonal operation of the noise item. Therefore, the SNR of the signal sample synthesized by multiple sampling may be less than that of the signal sample synthesized by a single sampling example.

[0090] The ADC 230a can generate a signal sample synthesized using the synthesized reset sample through a series of the above operations, and can output the difference between the synthesized signal sample and the synthesized reset sample to ( Figure 3 ) readout circuit 280 as pixel data in the digital domain.

[0091] Fig.9A An exemplary embodiment is shown in which the ramp control signal Cont_RP turns to logic high when the ramp signal RP starts to rise or fall, and the multi-sampling control signal Cont_MS turns to logic high when the count CNT starts. For example, when the ramp signal RP starts to rise or fall, the ramp control signal Cont_RP may turn to logic low, and when the count CNT starts, the multi-sampling control signal Cont_MS may turn to logic low. Accordingly, the ramp control signal Cont_RP and the multi-sampling control signal Cont_MS may be turned to logic low according to Fig.9A In addition, although Fig.9AThe case where reset sampling and signal sampling for multi-sampling are performed twice is illustrated, but the inventive concept is not limited thereto. It should be understood that the inventive concept can also be applied to the case where sampling is performed three or more times.

[0092] Fig. 9B is a timing diagram of a multi-sampling operation according to an exemplary embodiment of the inventive concept. More specifically, Fig. 9B yes Figure 7 Another timing diagram of the image sensor 200a performing a multi-sampling operation, in which two samplings are performed during the row processing time RPT to obtain ( Figure 4 ( Figure 3 ) pixel data PD. Fig. 9B In, with Fig.9A The same reference numerals in the drawings denote the same elements, and thus, repeated descriptions thereof will not be given herein.

[0093] Reference Figure 7 as well as Fig.9A and Fig. 9B ,exist Fig. 9B In the embodiment, at time points T3 and T9, the ramp signal RP may be transferred to the first voltage level at the end of the auto-zero section AZ. Since the ramp signal RP is transferred to the same first voltage level as at the end of the auto-zero section AZ at time points T3 and T9, the voltage level of the ramp signal RP may also be reduced at time points T4 and T10 when the rising edge of the ramp control signal Cont_RP appears except for time points T1 and T7. Fig. 9B Method and basis for operating an image sensor Fig.9A The method of operating the image sensor is similar or identical to that of FIG. 1 , and thus a detailed description thereof will not be given herein.

[0094] Fig. 10A and Fig. 10B is a view of a method for determining the number of sampling times according to an exemplary embodiment of the inventive concept. More specifically, Fig. 10A is a view of the method for determining the number of sampling times based on formulas and / or graphs, while Fig. 10B It is a view of the method for determining the number of sampling times based on the table.

[0095] Reference Figure 7 and Fig. 10A When the multi-sampling unit 291a receives the row processing time RPT from the time calculator 210a, it can calculate the row processing time RPT according to Fig. 10AThe chart or formula is used to determine the number of samplings corresponding to the received row processing time RPT. In the example, the chart and formula can be dynamically specified (or alternatively, dynamically predetermined). When the received row processing time RPT is between the first time RPT1 and the second time RPT2, the multi-sampling unit 291a can determine the number of samplings to be m1, when the received row processing time RPT is between the second time RPT2 and the third time RPT3, the multi-sampling unit 291a can determine the number of samplings to be m2, when the received row processing time RPT is between the third time RPT3 and the fourth time RPT4, the multi-sampling unit 291a can determine the number of samplings to be m3, and when the received row processing time RPT is greater than the fourth time RPT4, the multi-sampling unit 291a can determine the number of samplings to be m4.

[0096] Reference Figure 7 and Fig. 10B , when the multi-sampling unit 291a receives the row processing time RPT from the time calculator 210a, the number of samplings corresponds to the row processing time table. The row processing time table may be stored in a memory inside the image sensor 200a, or may be stored in a storage device outside the image sensor 200a. In an example, when the received row processing time RPT is greater than or equal to the first time RPT1 and less than or equal to the second time RPT2, the multi-sampling unit 291a may determine the number of samplings to be m1, when the received row processing time RPT is greater than the second time RPT2 and less than or equal to the third time RPT3, the multi-sampling unit 291a may determine the number of samplings to be m2, when the received row processing time RPT is greater than the third time RPT3 and less than or equal to the fourth time RPT4, the multi-sampling unit 291a may determine the number of samplings to be m3, and when the received row processing time RPT is greater than the fourth time RPT4, the multi-sampling unit 291a may determine the number of samplings to be m4.

[0097] Fig.11 2 is a block diagram of an image sensor 200b according to an exemplary embodiment of the inventive concept. Fig.11 In, with Figure 3 The same reference numerals in the drawings denote the same elements, and thus, repeated descriptions thereof will not be given herein.

[0098] Reference Figure 3 and Fig.11 , the image sensor 200b may include a time calculator 210b, an ADC 230b, and a capacitance adjustment unit 292b. In addition, the ADC 230b may include a comparator 231b and a noise reduction capacitor 233b. The comparator 231b may be connected to Figure 3 The comparator 231 is the same or similar to that of FIG. 1 , and thus a description thereof will not be given herein.

[0099] The noise reduction capacitor 233b can be connected to the comparator 231b to perform charge sharing, thereby reducing noise in the sampled signal. In addition, the noise reduction capacitor 233b can perform charge sharing during the row processing time RPT. Therefore, if the row processing time RPT is longer, the noise reduction capacitor 233b can perform charge sharing with a larger amount of charge. The image sensor 200b according to an exemplary embodiment of the inventive concept can adaptively adjust the variable capacitance of the noise reduction capacitor 233b based on the row processing time RPT, thereby reducing the noise caused by charge sharing to a larger value (e.g., a maximum value).

[0100] The time calculator 210b can be obtained from ( Figure 1 The image processor 100 receives the zoom information ZI and can calculate the row processing time RPT based on the received zoom information ZI. The time calculator 210b can output the calculated row processing time RPT to the capacitance adjustment unit 292b. The capacitance adjustment unit 292b can determine the capacitance value of the noise reduction capacitor 233b based on the row processing time RPT.

[0101] In an example of the present inventive concept, the capacitance adjustment unit 292b can determine the capacitance value of the noise reduction capacitor 233b based on the stored capacitance table T_Cap. In addition, the capacitance adjustment unit 292b can determine the capacitance value proportional to the row processing time RPT. As described above, the amount of charge shared by the noise reduction capacitor 233b is proportional to the row processing time RPT, and the charge amount and the capacitance value are also proportional to each other. Therefore, the capacitance adjustment unit 292b can maximize the amount of charge shared by the charge by determining the capacitance value proportional to the row processing time RPT.

[0102] The capacitance adjustment unit 292b may adjust the variable capacitance of the noise reduction capacitor 233b to a determined capacitance value through the capacitance control signal S_Cap. In an example, the capacitance adjustment unit 292b may adjust the capacitance value by adjusting the spacing between electrodes of the noise reduction capacitor 233b.

[0103] Fig.12 is a flowchart of a method of operating the capacitance adjusting unit 292 b according to an exemplary embodiment of the inventive concept.

[0104] Reference Fig.11 and Fig.12In operation S310, the capacitance adjustment unit 292b may receive the row processing time RPT calculated based on the zoom information ZI from the time calculator 210. In operation S320, the capacitance adjustment unit 292b may determine the capacitance value of the variable capacitance of the noise reduction capacitor 233b based on the row processing time RPT. In an example, the capacitance adjustment unit 292b may determine the capacitance value based on the stored capacitance table T_Cap. In operation S330, the capacitance adjustment unit 292b may set the variable capacitance of the noise reduction capacitor 233b with the determined capacitance value.

[0105] Fig.13 2 is a block diagram of an image sensor 200c according to an exemplary embodiment of the inventive concept. Fig.13 In, with Fig.11 The same reference numerals in the drawings denote the same elements, and thus, repeated descriptions thereof will not be given herein.

[0106] Reference Fig.13 , the image sensor 200c may include a time calculator 210c, an ADC 230c, and a capacitance adjustment unit 292c. In addition, the ADC 230c may include a comparator 231c, a noise reduction capacitor switch 234c, and a noise reduction capacitor circuit 235c. The time calculator 210c, the capacitance adjustment unit 292c, and the comparator 231c may be respectively connected to Fig.11 The time calculator 210b, the capacitance adjustment unit 292b, and the comparator 231b are identical or similar, and thus a description thereof will not be given herein.

[0107] The capacitance adjustment unit 292c may output a capacitance control signal S_Cap corresponding to a determined capacitance value to the noise reduction capacitor switch 234c. The noise reduction capacitor switch 234c may connect a noise reduction capacitor having a determined capacitance value to the comparator 231c in response to the capacitance control signal S_Cap. To this end, the noise reduction capacitor circuit 235c may include a plurality of noise reduction capacitors having different capacitances C1 to C4.

[0108] In an example, the capacitance adjustment unit 292c may determine the first capacitance C1 as the variable capacitance of the noise reduction capacitor based on the row processing time RPT and the capacitance table T_Cap received from the time calculator 210c. The capacitance adjustment unit 292c may output a capacitance control signal S_Cap to the noise reduction capacitor switch 234c to set the noise reduction capacitor to the first capacitance C1. Accordingly, the noise reduction capacitor switch 234c may connect the noise reduction capacitor having the first capacitance C1 to the comparator 231.

[0109] Fig.14 2 is a block diagram of an image sensor 200d according to an exemplary embodiment of the inventive concept. Fig.14 In, with Figure 3 The same reference numerals in the drawings denote the same elements, and thus, repeated descriptions thereof will not be given herein.

[0110] Reference Fig.14 The image sensor 200d may include a time calculator 210d, an ADC 230d, and a current adjustment unit 293d, wherein the ADC 230d may include a current manager 236d. The time calculator 210d may be connected to Figure 3 The time calculator 210 is substantially the same as or similar to that of FIG. 1 , and a description thereof will not be given hereinafter.

[0111] The time calculator 210d can be obtained from ( Figure 1 The image processor 100 receives the zoom information ZI and may calculate the line processing time RPT based on the received zoom information ZI. The time calculator 210d may output the calculated line processing time RPT to the current adjustment unit 293d.

[0112] The current manager 236d can control the current consumed in the ADC 230d. Fig.14 The current manager 236 d is illustrated in the ADC 230 d , but the inventive concept is not limited thereto, and the current manager 236 d may be outside the ADC 230 d to control the current consumption of the ADC 230 d .

[0113] The current regulating unit 293d may output a current regulating signal S_Cur to the current manager 236d based on the row processing time RPT and the current table T_Cur received from the time calculator 210d. The current manager 236d may adjust the current of the ADC 230d based on the received current regulating signal S_Cur. For example, the current regulating unit 293d may adjust the current consumption of the ADC 230d based on the row processing time RPT. According to an exemplary embodiment of the inventive concept, the current regulating unit 293d may be set so that the current consumption of the ADC 230d is inversely proportional to the row processing time RPT. More specifically, the current regulating unit 293d may output the current regulating signal S_Cur set so that the current consumption of the ADC 230d is inversely proportional to the row processing time RPT to the current manager 236d. The image sensor 200d according to the inventive concept saves current consumption in a region where current is not actually required or needed, thereby reducing power consumption of the image sensor 200d by adaptively adjusting current consumption of the ADC 230d based on the row processing time RPT according to digital zoom.

[0114] Fig.15 is a block diagram of an image sensor 200 e according to an exemplary embodiment of the inventive concept.

[0115] Reference Fig.15 The image sensor 200e may include a time calculator 210e, a mode selector 215e, a timing generator 220e, a multi-sampling unit 291e, a capacitance adjustment unit 292e, and a current adjustment unit 293e. The time calculator 210e, the timing generator 220e, the multi-sampling unit 291e, the capacitance adjustment unit 292e, and the current adjustment unit 293e may be respectively connected to Figures 1 to 14 The time calculator 210, the timing generator 220, the multi-sampling unit 291a, the capacitance adjusting units 292b and 292c, and the current adjusting unit 293d are the same or similar, and thus a description thereof will not be given herein.

[0116] The mode selector 215e can be externally (e.g., Figure 1 The image processor 100, the host or the user) receives the mode selection signal S_MS and may receive the row processing time RPT from the time calculator 210e. The mode selection unit 215e may output the row processing time RPT to at least one of the timing generator 220e, the multi-sampling unit 291e, the capacitance adjustment unit 292e and the current adjustment unit 293e based on the received mode selection signal S_MS. In response, the timing generator 220e may output various timing control signals Cont_T to the ( Figure 1 ADC 230 and ( Figure 3 The ramp generator 260 of FIG. 290 and the multi-sampling unit 291e may output the multi-sampling enable signal En_MS to the timing generator 220e based on the received row processing time RPT. In addition, the capacitance adjustment unit 292e may output the capacitance adjustment signal S_Cap to the timing generator 220e based on the received row processing time RPT. Fig.11 The noise reduction capacitor 233b and the current regulating unit 293e can output the current regulating signal S_Cur to ( Fig.14 ) current manager 236d.

[0117] Fig.16 is a block diagram of an image processing apparatus 10 f according to an exemplary embodiment of the inventive concept.

[0118] Reference Fig.16 The image processing device 10f may include an image processor 100f and an image sensor 200f. The image processor 100f may include a time calculator 110f, and the image sensor 200f may include a timing generator 220f, a multi-sampling unit 291f, a capacitance adjustment unit 292f, and a current adjustment unit 293f. Fig.16In addition to the time calculator 110f being included in the image processor 100f, the image processing device 10f or the image sensor 200f included therein may be respectively connected to the reference Figures 1 to 15 The image processing device 10 or the image sensors 200 to 200 e included therein are substantially the same or similar.

[0119] The time calculator 110f may receive the digital zoom command CMD_DZ and calculate the row processing time RPT based thereon. The time calculator 110f may output the calculated row processing time RPT to the image sensor 200f. More specifically, the time calculator 110f may output the calculated row processing time RPT to at least one of the timing generator 220f, the multi-sampling unit 291f, the capacitance adjustment unit 292f, and the current adjustment unit 293f. In response, the timing generator 220f may adjust the row processing time RPT based on the received row processing time RPT. Figure 1 ADC230 and ( Figure 3 The timing of the ramp generator 260 is controlled by the multi-sampling unit 291f, and the multi-sampling unit 291f can output the multi-sampling enable signal to the timing generator 220f based on the received row processing time RPT. In addition, the capacitance adjustment unit 292f can output the capacitance adjustment signal to the ( Fig.11 The noise reduction capacitor 233b is configured to receive the received row processing time RPT, and the current regulating unit 293f can output a current regulating signal to the current manager 236d.

[0120] Fig.17 is a block diagram of a computing system 2000 including an image sensor 2600 according to an exemplary embodiment of the inventive concept.

[0121] Reference Fig.17 , the computing system 2000 may include an image processor 2100, a memory device 2200, a storage device 2300, an input / output device 2400, a power supply 2500, and an image sensor 2600. The image sensor 2600 may include the above reference Figures 1 to 16 The image sensor according to the exemplary embodiment of the present invention is described. Fig.17 Although not shown, computing system 2000 may also include ports that enable communication with a video card, a sound card, a memory card, a USB device, or other electronic devices.

[0122] The image processor 2100 may perform certain calculations or tasks. The image processor 2100 may include the above-referenced Figures 1 to 16An image processor according to an exemplary embodiment of the present inventive concept is described. For example, the image processor 2100 may be or may include a microprocessor or a central processing unit (CPU). The image processor 2100 may communicate with a memory device 2200, a storage device 2300, and an input / output device 2400 via an address bus, a control bus, and a data bus. For example, the image processor 2100 may be connected to an expansion bus, such as a peripheral component interconnect (PCI) bus. Upon receiving a digital zoom command from a host or the like, the image processor 2100 may output zoom information and / or a line processing time RPT to the image sensor 2600 via the bus according to the digital zoom command.

[0123] The memory device 2200 may store data required (eg, necessary) for the operation of the computing system 2000. For example, the memory device 2200 may be a dynamic random access memory (DRAM), a mobile DRAM, an SRAM, or a nonvolatile memory device.

[0124] The chips of the memory may be implemented individually or together using various types of packages in the memory device 2200. For example, the chip may be packaged as a package such as a package on package (PoP), a ball grid array (BGA), a chip scale package (CSP), a plastic lead chip carrier (PLCC), a plastic dual in-line package (PDIP), a waffle assembly chip, a waffle form chip, a chip on board (COB), a ceramic dual in-line package (CERDIP), or a plastic metric quad flat package (MQFP).

[0125] The storage device 2300 may include a solid state disk (SSD), a hard disk drive (HDD), a compact disk read only memory (CD-ROM), etc. The input / output device 2400 may include an input device such as a keyboard, a keypad, a mouse, etc. and an output unit such as a printer or a display. The power supply 2500 may apply an operating voltage required (e.g., required) for the operation of the computing system 2000.

[0126] The image sensor 2600 may be connected to the image processor 2100 via a bus or other communication link to perform communication. According to an exemplary embodiment of the present invention, when zoom information corresponding to a digital zoom command is received from the image processor 2100, the image sensor 2600 may adjust the row processing time RPT based on the zoom information. Therefore, the image sensor 2600 according to the present invention can reduce the noise caused by digital zoom and reduce the power consumption of the image sensor 2600. The image sensor 2600 and the image processor 2100 may be integrated on one chip or may be integrated on different chips respectively. The computing system 2000 should be understood as any computing system using an image sensor. For example, the computing system 2000 may include a digital camera, a mobile phone, a personal digital assistant (PDA), a portable multimedia player (PMP), a smart phone, a tablet computer, etc.

[0127] While the inventive concept has been shown and described with reference to exemplary embodiments thereof, it will be understood that various changes in form and details may be made therein without departing from the spirit and scope of the following claims.

Claims

1. An image sensor, comprising: a pixel array including a plurality of pixels arranged in rows and columns and configured to generate a first pixel signal having a first zoom magnification or a second pixel signal having a second zoom magnification from the plurality of pixels; as well as an analog-to-digital converter configured to generate first pixel data by performing single sampling on the first pixel signal and generate second pixel data by performing multiple sampling on the second pixel signal based on zoom information, The total frame processing time on a first frame corresponding to the first pixel signal by performing the single sampling is the same as the total frame processing time on a second frame corresponding to the second pixel signal by performing the multiple samplings.

2. The image sensor according to claim 1, wherein: The analog-to-digital converter is configured to generate the second pixel data by performing two samplings on the second pixel signal based on the zoom information.

3. The image sensor according to claim 1, wherein: A single row processing time of the second frame is longer than a single row processing time of the first frame.

4. The image sensor according to claim 3, wherein: The first frame includes N lines, and the second frame includes M lines, and Wherein, N and M are integers, and N is greater than M. 5 . The image sensor according to claim 3 , further comprising a time calculator configured to calculate a single line processing time of the second frame based on the zoom information.

6. The image sensor according to claim 5, wherein: The time calculator is configured to adaptively adjust a single row processing time based on the zoom information.

7. The image sensor according to claim 6, wherein: The zoom information includes information on pixel addresses at which an image to be output is formed.

8. An image processing device, comprising: an image signal processor configured to receive a digital zoom command, extract zoom information, and send the zoom information to an image sensor; and The image sensor comprises: a time calculator configured to calculate a row processing time based on the zoom information; a pixel array including a plurality of pixels arranged in rows and columns and configured to generate a first pixel signal having a first zoom magnification or a second pixel signal having a second zoom magnification from the plurality of pixels; and an analog-to-digital converter configured to generate first pixel data by performing single sampling on the first pixel signal and to generate second pixel data by performing multiple sampling on the second pixel signal based on the line processing time, The total frame processing time on a first frame corresponding to the first pixel signal by performing the single sampling is the same as the total frame processing time on a second frame corresponding to the second pixel signal by performing the multiple samplings.

9. The image processing apparatus according to claim 8, wherein: The analog-to-digital converter is configured to generate the second pixel data by performing two samplings on the second pixel signal based on the zoom information.

10. The image processing device according to claim 8, wherein: A single row processing time of the second frame is longer than a single row processing time of the first frame.

11. The image processing device according to claim 10, wherein: The first frame includes N lines, and the second frame includes M lines, and Wherein, N and M are integers, and N is greater than M.

12. The image processing apparatus according to claim 10, wherein: The time calculator is configured to adaptively adjust a single row processing time based on the zoom information.

13. The image processing apparatus according to claim 12, wherein: The zoom information includes a digital zoom magnification.

14. An image sensor, comprising: a pixel array including a plurality of pixels arranged in rows and columns and configured to generate a first pixel signal or a second pixel signal; as well as an analog-to-digital converter configured to generate first pixel data by performing signal sampling N times on the first pixel signal in a first mode, and to generate second pixel data by performing signal sampling M times on the second pixel signal in a second mode different from the first mode, Where N and M are integers, and M is greater than N, and The total frame processing time on a first frame corresponding to the first pixel signal by performing the N signal samplings is the same as the total frame processing time on a second frame corresponding to the second pixel signal by performing the M signal samplings.

15. The image sensor according to claim 14, wherein: The analog-to-digital converter comprises: a comparator configured to receive a ramp signal and output time information by comparing the ramp signal with the first pixel signal or the second pixel signal; and A capacitor is connected to the comparator.

16. The image sensor according to claim 15, wherein: The capacitor is configured to perform charge sharing on the second pixel signal.

17. The image sensor according to claim 16, wherein: M is greater than 3.

18. The image sensor according to claim 17, wherein: M is 4.

19. An image sensor, comprising: a pixel array including a plurality of pixels arranged in rows and columns and configured to generate a first pixel signal or a second pixel signal; as well as an analog-to-digital converter configured to generate first pixel data by performing a single signal sampling on the first pixel signal, and to generate second pixel data by performing M signal sampling on the second pixel signal, wherein the analog-to-digital converter is configured to perform charge sharing on the first pixel signal and the second pixel signal by using a capacitor, Where M is an integer greater than 1, and The total frame processing time on the first frame corresponding to the first pixel signal by performing the single sampling is the same as the total frame processing time on the second frame corresponding to the second pixel signal by performing the M signal samplings.

20. The image sensor according to claim 19, wherein: M is 4.

21. The image sensor according to claim 19, wherein: The pixel array is configured to generate the first pixel signal having a first zoom magnification or the second pixel signal having a second zoom magnification from the plurality of pixels.

22. The image sensor according to claim 19, wherein: The pixel array is configured to generate the first pixel signals from the plurality of pixels in a first mode, or to generate the second pixel signals from the plurality of pixels in a second mode different from the first mode.

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