Microstep motor counting sequence circuit

Abstract

This application discloses a microstepping motor counting sequence circuit, including an interpolation circuit and a counting sequence output circuit connected to each other. The interpolation circuit includes a subdivision value calculation circuit and a counting decrement module connected to each other, with the counting decrement module connected to the counting sequence output circuit. The subdivision value calculation circuit is used to obtain the interpolated subdivision value based on the step signal, clock signal, and microstep subdivision signal. The counting decrement module is used to output the interpolated counting pulse signal using the interpolated subdivision value and the microstep subdivision signal. The counting sequence output circuit is used to count based on the counting pulse signal and output the counting sequence. This application uses the step signal, clock signal, and microstep subdivision signal to interpolate the step signal and divide a step signal into equal parts, making the counting sequence smoother. This makes the subsequent sine waveform generated based on the counting sequence smoother and less steep, resulting in smoother operation of the stepper motor.

Description

Technical Field

[0001] The invention relates to the field of automation control, and in particular to a micro-step motor counting sequence circuit. Background Art

[0002] The driving current of the stepper is usually a sine-cosine curve. The closer this curve is to a sine motor, the better the noise effect and stability when the motor is running. In traditional applications, the higher the subdivision of the stepper motor, the smoother its operation. Therefore, when the stepper motor works in full step, half step, 1 / 4 step or 1 / 8 step, compared with the stepper motor working in 1 / 16 step, 1 / 32, 1 / 64 or 1 / 128 step, its current presents a step shape, resulting in more obvious vibration and noise during operation.

[0003] This is because the existing subdividable digital sine wave has a steep output current waveform when performing low subdivision, and the meter reading counter changes quickly, which increases the noise of the motor or makes the application unstable and easily causes wear and tear on the device.

[0004] In order to make the stepper motor work in full step, half step, 1 / 4 step, 1 / 8 step and other low subdivision conditions, the stepper motor can also work stably.

[0005] Therefore, a counting sequence circuit is needed which can work smoothly even when the stepping motor has low subdivision. Summary of the invention

[0006] In view of this, the purpose of the present invention is to provide a micro-step motor counting sequence circuit to reduce the instability of the stepping motor under low subdivision conditions. The specific scheme is as follows:

[0007] A micro-step motor counting sequence circuit comprises an interpolation circuit and a counting sequence output circuit connected to each other;

[0008] The interpolation circuit comprises a subdivision value calculation circuit and a count decrement module connected to each other, and the count decrement module is connected to the count sequence output circuit;

[0009] The subdivision value calculation circuit is used to obtain the interpolation subdivision value according to the step signal, the clock signal and the micro-step subdivision signal;

[0010] The counting down module is used to output an interpolated counting pulse signal by using the interpolated subdivision value and the micro-step subdivision signal;

[0011] The counting sequence output circuit is used to count according to the counting pulse signal and output a counting sequence.

[0012] Optionally, the subdivision value calculation circuit includes a connected measurement module and a division module;

[0013] The measuring module is used to calculate how many clock signals there are during one step signal period according to the step signal and the clock signal, and output the calculation result unit step cycle to the dividing module;

[0014] The division module is used to calculate the interpolation subdivision value according to the unit step cycle and the micro-step subdivision signal, and output it to the counting decrement module.

[0015] Optionally, the division module is specifically used to calculate the interpolation subdivision value according to the unit step cycle and the micro-step subdivision signal using an interpolation subdivision value calculation formula, and output it to the counting decrement module;

[0016] The interpolation subdivision value calculation formula is: MICRO = MSTEP / 2^ (MRES);

[0017] Wherein, MICRO represents the interpolation subdivision value, MSTEP represents the unit step period, and MRES represents the micro-step subdivision signal.

[0018] Optionally, it also includes a non-interpolation circuit and a data selector;

[0019] The non-interpolation circuit and the interpolation circuit are respectively connected to the data selector, and the data selector is connected to the counting sequence output circuit;

[0020] The non-interpolation circuit is used to generate a subdivided jump count according to the step signal and the micro-step subdivision signal, and output the jump count to the data selector when the counting sequence output circuit is not equal to the jump count;

[0021] The data selector is used to select and output the jump count of the non-interpolation circuit or the count pulse signal of the interpolation circuit to the count sequence output circuit according to the interpolation control signal.

[0022] Optionally, the non-interpolation circuit comprises a first counter and a comparator connected to each other, and a comparison terminal of the comparator is connected to an output terminal of the counting sequence output circuit;

[0023] The first counter is used to output the subdivided jump count to the comparator according to the step signal and the micro-step subdivision signal;

[0024] The comparator is used to compare whether the counting sequence output by the counting sequence output circuit is equal to the transition count. If they are not equal, the transition count is output to the data selector; if they are equal, the transition count is not output to the data selector.

[0025] Optionally, the first counter is also used to select forward counting or reverse counting according to the forward and reverse control signals to control the stepper motor to rotate forward or reverse.

[0026] In the present invention, a micro-step motor counting sequence circuit comprises an interpolation circuit and a counting sequence output circuit which are connected to each other; the interpolation circuit comprises a subdivision value calculation circuit and a counting decrement module which are connected to each other, and the counting decrement module is connected to the counting sequence output circuit; the subdivision value calculation circuit is used to obtain an interpolation subdivision value according to a stepping signal, a clock signal and a micro-step subdivision signal; the counting decrement module is used to output an interpolated counting pulse signal using the interpolation subdivision value and the micro-step subdivision signal; and the counting sequence output circuit is used to count according to the counting pulse signal and output a counting sequence.

[0027] The present invention utilizes a stepping signal, a clock signal and a micro-step subdivision signal to interpolate the stepping signal and evenly divide a stepping signal, so that the counting sequence is smoother, and the subsequent sinusoidal waveform generated according to the counting sequence is smoother and no longer steep, so that the stepping motor runs more stably. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without paying creative work.

[0029] Figure 1 A schematic diagram of a micro-step motor counting sequence circuit structure disclosed in an embodiment of the present invention;

[0030] Figure 2 A schematic diagram of another micro-step motor counting sequence circuit structure disclosed in an embodiment of the present invention;

[0031] Figure 3 A schematic diagram of an interpolation mode counting sequence waveform disclosed in an embodiment of the present invention;

[0032] Figure 4 The embodiment disclosed in the present invention Figure 3 A magnified view of the local counting cycle;

[0033] Figure 5 The embodiment disclosed in the present invention Figure 4 A magnified view of the local counting cycle;

[0034] Figure 6 A schematic diagram of a counting sequence waveform of a first counter in a non-interpolation mode disclosed in an embodiment of the present invention;

[0035] Figure 7 A schematic diagram of a non-interpolation mode counting sequence waveform disclosed in an embodiment of the present invention;

[0036] Figure 8 The embodiment disclosed in the present invention Figure 7 A magnified view of the local counting cycle;

[0037] Fig. 9 The embodiment disclosed in the present invention Figure 8 A magnified view of the local counting cycle. DETAILED DESCRIPTION

[0038] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0039] The embodiment of the present invention discloses a micro-step motor counting sequence circuit, see Figure 1 As shown, the circuit comprises an interpolation circuit 1 and a counting sequence output circuit 2 connected to each other;

[0040] The interpolation circuit 1 comprises a subdivision value calculation circuit 11 and a count decrement module 12 which are connected to each other, and the count decrement module 12 is connected to the count sequence output circuit 2;

[0041] A subdivision value calculation circuit 11 is used to obtain an interpolation subdivision value (MICRO) according to a step signal (STEP), a clock signal (CLK) and a micro-step subdivision signal (MRES);

[0042] The counting down module 12 is used to output an interpolated counting pulse signal (FSTEP) by using the interpolated subdivision value and the micro-step subdivision signal;

[0043] The counting sequence output circuit 2 is used for counting according to the counting pulse signal and outputting the counting sequence.

[0044] Specifically, in order to make the stepper motor run smoothly, it is necessary to decompose a large step into multiple small steps so that the stepper motor can work quickly and smoothly. To this end, the original step signal is interpolated and divided into multiple fast and continuous signals so that the stepper motor can operate according to a smoother sinusoidal wave signal; to this end, first the subdivision value calculation circuit 11 determines how many clock signals there are during a step signal according to the step signal and the clock signal, and then determines whether the step of the stepper motor is a full step, 1 / 2 step, 1 / 4 step, etc. according to the micro-step subdivision signal. According to the stepping mode of the stepper motor, the clock signal during a step signal is equally divided to determine how many clock signals are equal to one step of the micro-step motor, that is, the interpolated subdivision value. The count decrement module 12 then outputs the interpolated count pulse signal according to the interpolated subdivision value and the micro-step subdivision signal, so that the count sequence output circuit 2 counts according to the frequency of the count pulse signal, thereby outputting a smoother sinusoidal wave current output by the subsequent control circuit according to the count sequence.

[0045] Specifically, due to the effect of the count decreasing module 12 setting the number decreasing, the count sequence output circuit 2 will perform the corresponding average count within one step, that is, the count sequence output circuit 2 can just count smoothly to one jump. For example, the full quota is 256 subdivisions, when 64 subdivisions are selected, each step signal in the non-interpolation mode will cause the count sequence output circuit 2 to jump 4. In the count sequence output circuit 2 of the embodiment of the present invention, the length of 4 clock signals is equal to the length of one step signal, so that the count sequence output circuit 2 completes one jump in 4 times and outputs a smooth sine wave current.

[0046] It should be noted that the counting sequence output circuit 2 is equivalent to a counter.

[0047] It can be seen that the embodiment of the present invention utilizes the stepping signal, the clock signal and the micro-step subdivision signal to interpolate the stepping signal and evenly divide a stepping signal, so that the counting sequence is smoother, and the subsequent sinusoidal waveform generated according to the counting sequence is smoother and no longer steep, so that the stepping motor runs more smoothly.

[0048] It can be understood that the counting sequence output by the micro-step motor counting sequence circuit of the embodiment of the present invention can be used as the input of the sine wave meter reading, and can also be used as other circuits that require different subdivisions but stable counting.

[0049] Furthermore, the subdivision value calculation circuit 11 may include a connected measurement module 111 and a division module 112;

[0050] The measuring module 111 is used to calculate the number of clock signals during a stepping signal according to the stepping signal and the clock signal, and output the calculation result unit stepping cycle to the dividing module 112;

[0051] The division module 112 is used to calculate the interpolation subdivision value according to the unit step cycle and the micro-step subdivision signal, and output it to the count decrement module 12.

[0052] Specifically, the division module 112 is specifically used to calculate the interpolation subdivision value according to the unit step cycle and the micro-step subdivision signal using the interpolation subdivision value calculation formula, and output it to the count decrement module 12;

[0053] The calculation formula of interpolation subdivision value is: MICRO = MSTEP / 2^(MRES);

[0054] Where MICRO represents the interpolation subdivision value, MSTEP represents the unit step period, and MRES represents the microstep subdivision signal.

[0055] Specifically, the subdivision value calculation circuit 11 is equivalent to measuring the number of clocks of the input step and right-shifting the subdivision value, that is, dividing the measured number of clocks by 2^(subdivision value).

[0056] Among them, for the step signal, because the interpolation subdivision value is equal to the number of clocks in a step signal, MCRO=MICRO=FSTEP / 2^(MRES), and the maximum subdivision value is MRES=1000=8. Therefore, the minimum interpolation subdivision value is 2^(MRES)=2^8=256. Therefore, the minimum cycle of the step signal STEP is 256 clock cycles.

[0057] Furthermore, the embodiment of the present invention also discloses a specific embodiment of the interpolation mode. For example, assuming 2 subdivisions, one counting cycle requires 8 steps, each step increases by 128, and one step cycle is equal to 12800 clock cycles. Among them, the measurement module 111 is used to calculate how many clock cycles a step cycle is equal to. We assume that a step cycle is equal to 12800 clock cycles, then the output of the measurement module 111 is 12800, and the division module 112 is to take the result of the measurement module 111 and divide it by 2^(subdivision value). Assuming that the current subdivision is 2, the result of the division module 112 is 100, that is, the count decrement module 12 will count down by 100, and each time it counts to 0, it will send a signal, that is, a count pulse signal to the data selector 4. The count pulse signal will pass through the data selector 4 and be input to the count sequence output circuit 2 and the count decrement module 12. After the count pulse signal is input to the count decrement module 12, the count decrement module 12 restarts to count from 100 to 0 and then sends a new count pulse signal, and repeats this process. The count pulse signal input to the count sequence output circuit 2 will make the count sequence output circuit 2 add 1. As a result, the count sequence output circuit 2 adds 1 every 100 clock cycles in the 2-subdivision interpolation mode, and adds 128 after 12800 clock cycles, which is exactly equal to the value that needs to be increased by one step in the 2-subdivision case. However, at this time, the count sequence output circuit 2 adds 1 every 100 clock cycles, instead of adding 1 every 1 clock cycle. In this way, the 128 values ​​are evenly distributed on the time axis, and the result is as follows Figure 3 The smooth waveform shown is from Figure 3 Take two of the counting cycles and amplify them as follows Figure 4 As shown in the figure, it can be seen that the counting sequence output circuit 2 evenly distributes the changing values ​​on the time axis, and then takes Figure 4 The two counting cycles in the amplification result is Figure 5 , you can see Figure 5 The counting sequence output circuit 2 evenly distributes the changing values ​​on the time axis, making the output waveform of the counting sequence output circuit 2 smoother.

[0058] The embodiment of the present invention discloses a specific micro-step motor counting sequence circuit. Compared with the previous embodiment, this embodiment further explains and optimizes the technical solution. Figure 2 As shown, specifically, it also includes a non-interpolation circuit 1 and a data selector 4;

[0059] The non-interpolation circuit 3 and the interpolation circuit 1 are respectively connected to the data selector 4, and the data selector 4 is connected to the counting sequence output circuit 2;

[0060] The non-interpolation circuit 3 is used to generate a subdivided jump count according to the step signal and the micro-step subdivision signal, and output the jump count to the data selector 4 when the counting sequence output circuit 2 is not equal to the jump count;

[0061] The data selector 4 is used for selecting to output the jump count of the non-interpolation circuit 3 or the count pulse signal of the interpolation circuit 1 to the count sequence output circuit 2 according to the interpolation control signal (INTPOL).

[0062] Specifically, in order to increase the adaptation scenarios of the circuit, a non-interpolation circuit 3 and a data selector 4 are provided, and the data selector 4 can be used to implement mode switching of the micro-step motor counting sequence circuit between the interpolation mode and the non-interpolation mode.

[0063] Specifically, the data selector 4 selects to output the signal of the non-interpolation circuit 3 or the signal of the interpolation circuit 1 to the calculation sequence output circuit according to the interpolation control signal, so that the counting sequence circuit switches the mode. When the data selector 4 outputs the signal of the non-interpolation circuit 3, the micro-step motor counting sequence circuit works in the non-interpolation mode. When the data selector 4 outputs the signal of the interpolation circuit 1, the micro-step motor counting sequence circuit works in the interpolation mode.

[0064] It should be noted that after the data selector 4 selects any mode, the other circuit is not affected and can continue to work and output, but the output will only stay in the data selector 4 and will not reach the counting sequence output circuit 2. For example, when the data selector 4 selects the interpolation mode, the signal output by the interpolation circuit 1 is output to the counting sequence output circuit 2 via the data selector 4, and the non-interpolation circuit 3 can still continue to work and output the jump count to the data selector 4, but the jump count will not reach the counting sequence output circuit 2 through the data selector 4. Similarly, in the non-interpolation mode, the interpolation circuit 1 can continue to work, and the counting pulse signal will not reach the counting sequence output circuit 2. Of course, it can also be set so that after the data selector 4 selects a mode, the circuit corresponding to the other mode does not work.

[0065] Specifically, the non-interpolation circuit 3 comprises a first counter 31 and a comparator 32 connected to each other, and a comparison terminal of the comparator 32 is connected to an output terminal of the counting sequence output circuit 2;

[0066] The first counter 31 is used for outputting the subdivided jump count to the comparator 32 according to the step signal and the micro-step subdivision signal;

[0067] The comparator 32 is used to compare whether the count sequence output by the count sequence output circuit 2 is equal to the transition count. If they are not equal, the transition count is output to the data selector 4. If they are equal, the transition count is not output to the data selector 4.

[0068] Specifically, in the non-interpolation mode, the count sequence output circuit 2 is controlled by the result of the comparator 32. The comparator 32 outputs a control signal during the counting period to control the count sequence output circuit 2 to count by addition or subtraction at the frequency of the clock until it is equal to the first counter 31. Then the counter outputs a control signal to keep the value of the count sequence output circuit 2 unchanged until a new step signal STEP comes in, so that the first counter 31 changes, the result of the comparator 32 changes, and the output control signal controls the count sequence output circuit 2 to count at the clock frequency until it is equal to the first counter 31, and then waits for the next STEP. The cycle is like this.

[0069] For example, when the subdivision is 64, the first counter 31 jumps to 4 per step, and the counting sequence output circuit 2 quickly counts to be equal to the first counter 31 within a few clock cycles, and then maintains it until the next count comes.

[0070] The result shows that in the non-interpolation mode, the counting sequence output circuit 2 is not a real jump counting, but after the first counter 31 jumps, it counts to the same as the first counter 31 in a very short time with the clock cycle, and then waits for the next jump. So it looks like a jump, but it is actually a very fast count plus a holding time.

[0071] In addition, the first counter 31 is also used to select forward counting or reverse counting according to the forward and reverse control signal (DIR) to control the stepping motor to rotate forward or reverse.

[0072] Furthermore, the embodiment of the present invention also discloses a specific non-interpolation mode example, taking 2 subdivision as an example: one step of the motor requires two step signals, one rotation of the stepper motor is 4 steps, and 8 step signals are required, and it is assumed that the period of a step signal is equal to 12800 clock signal periods. Figure 6 As shown, the output of the first counter 31 is the graph corresponding to Z1. The first counter 31 counts one round from 0 to 1024, which represents one rotation of the motor. In the case of 2 subdivisions, the first counter 31 will add 128 when each step signal arrives. After 8 steps, the count reaches 1024. We convert it into decimal and make a line graph with time as the horizontal axis, forming Figure 6 A medium-step counting sequence.

[0073] Specifically, at the beginning of counting, the values ​​of the two counters are both 0. When the first counter 31 has a step, the first counter 31 will directly add 128 and keep it, waiting for the next step to come and then add 128. At this time, the count sequence output circuit 2 is still 0, and the values ​​of the two counters are not equal. The comparator will output a signal, that is, a jump count, to allow the count sequence output circuit 2 to start counting. At this time, the count sequence output circuit 2 will not directly add 128, but will add 1 every clock cycle (CLK). After 128 clock cycles, it will become equal to the value of the first counter 31. At this time, the values ​​of the two counters are equal, and the comparator will output a jump count to make the count sequence output circuit 2 pause counting. Because the step cycle is much longer than the clock CLK cycle, when the count sequence output circuit 2 becomes the same as the value of the first counter 31, the first counter 31 is still far away from the next step, and no jump will occur. When the second step comes, the first counter 31 adds 128 to become 256. The two counters are not equal. The comparator 32 allows the counting sequence output circuit 2 to start counting until it is equal to the first counter 31, then pauses counting and waits for the next step again. This is repeated to obtain the following result: Figure 7 The two counter waveforms shown are Figure 7 After amplifying one cycle in Figure 8 As shown in the figure, it can be seen that the count change of the counting sequence output circuit 2 has a little slope, not the vertical change of adding 128 directly. Figure 8 When the two steps change, zoom in, such as Fig. 9 As shown in the figure, it can be seen that when the step arrives, the first counter 31 will jump directly, and the count sequence output circuit 2 will become equal to the value of the first counter 31 after a certain change process, and then wait for the arrival of the next step and repeat again. Although the count sequence output circuit 2 has a certain change process at this time, because the clock cycle is too short, it actually looks like a direct jump, so the non-interpolation mode waveform is steeper than the interpolation mode.

[0074] The waveform of the first counter 31 is Z1, and the waveform of the counting sequence output circuit 2 is Z2.

[0075] Finally, it should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the presence of other identical elements in the process, method, article or device including the elements.

[0076] Professionals may further appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the composition and steps of each example have been generally described in the above description according to function. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professionals and technicians may use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of the present invention.

[0077] The technical content provided by the present invention is introduced in detail above. Specific examples are used in this article to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only used to help understand the method of the present invention and its core idea. At the same time, for general technical personnel in the field, according to the idea of ​​the present invention, there will be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as a limitation on the present invention.

Claims

1. A micro-step motor counting sequence circuit, characterized in that: including an interpolation circuit and a counting sequence output circuit connected to each other; The interpolation circuit comprises a subdivision value calculation circuit and a count decrement module connected to each other, and the count decrement module is connected to the count sequence output circuit; The subdivision value calculation circuit is used to determine how many clock signals there are during a stepping signal according to the stepping signal and the clock signal, and then determine the stepping mode of the stepping motor according to the micro-step subdivision signal, and then divide the clock signal during a stepping signal into equal parts according to the stepping mode of the stepping motor, and determine how many clock signals are equal to one step of the micro-stepping motor, and use the number of clock signals corresponding to one step as the interpolation subdivision value; The counting down module is used to count down with the interpolation subdivision value as the starting value, and send a counting pulse signal every time the count reaches 0; The counting sequence output circuit is used to count according to the counting pulse signal and output a counting sequence.

2. The micro-step motor counting sequence circuit according to claim 1, characterized in that: The subdivision value calculation circuit includes a connected measurement module and a division module; The measuring module is used to calculate how many clock signals there are during one step signal period according to the step signal and the clock signal, and output the calculation result unit step cycle to the dividing module; The division module is used to calculate the interpolation subdivision value according to the unit step cycle and the micro-step subdivision signal, and output it to the counting decrement module.

3. The micro-step motor counting sequence circuit according to claim 2, characterized in that: The division module is specifically used to calculate the interpolation subdivision value according to the unit step cycle and the micro-step subdivision signal using an interpolation subdivision value calculation formula, and output it to the counting decrement module; The interpolation subdivision value calculation formula is: MICRO = MSTEP / 2^ (MRES); Wherein, MICRO represents the interpolation subdivision value, MSTEP represents the unit step period, and MRES represents the micro-step subdivision signal.

4. The micro-step motor counting sequence circuit according to any one of claims 1 to 3, characterized in that: Also included are non-interpolation circuits and data selectors; The non-interpolation circuit and the interpolation circuit are respectively connected to the data selector, and the data selector is connected to the counting sequence output circuit; The non-interpolation circuit is used to generate a subdivided jump count according to the step signal and the micro-step subdivision signal, and output the jump count to the data selector when the counting sequence output circuit is not equal to the jump count; The data selector is used to select and output the jump count of the non-interpolation circuit or the count pulse signal of the interpolation circuit to the count sequence output circuit according to the interpolation control signal.

5. The micro-step motor counting sequence circuit according to claim 4, characterized in that: The non-interpolation circuit comprises a first counter and a comparator connected to each other, wherein a comparison terminal of the comparator is connected to an output terminal of the counting sequence output circuit; The first counter is used to output the subdivided jump count to the comparator according to the step signal and the micro-step subdivision signal; The comparator is used to compare whether the counting sequence output by the counting sequence output circuit is equal to the transition count. If they are not equal, the transition count is output to the data selector; if they are equal, the transition count is not output to the data selector.

6. The micro-step motor counting sequence circuit according to claim 5, characterized in that: The first counter is also used to select forward counting or reverse counting according to the forward and reverse control signals to control the stepper motor to rotate forward or reverse.

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