Devices for regulating the bias voltage of switching power supplies

Abstract

The present invention discloses a device for regulating the bias voltage of a switching power supply. The device includes a cascade amplifier, a feedback circuit and a bias regulator circuit. The cascade amplifier includes a common gate transistor and a common source transistor, wherein the source of the common gate transistor communicates with the drain of the common source transistor. The feedback circuit communicates with the source of the common gate transistor and the drain of the common source transistor, and the bias regulator circuit communicates with the gate of the common source transistor, the gate of the common gate transistor and the feedback circuit. The feedback circuit receives a drain voltage from the drain of the common source transistor and generates a feedback voltage, and the bias regulator circuit is configured to receive the feedback voltage and generate and regulate the bias voltage. A gate voltage is generated by the bias voltage, and the gate voltage is injected into the gate of the common gate transistor.

Description

[0001] Related Applications

[0002] This application claims the benefit of U.S. Non-Provisional Patent Application No. 16 / 178,426, filed on November 1, 2018, entitled “DEVICE FOR REGULATING BIAS VOLTAGE OF A SWITCHING POWERED SUPPLY,” which is incorporated herein by reference for all purposes. Background Art

[0003] Currently, the existence and use of electric electronic devices have become commonplace. Modern power supplies are used to power or charge many of these electric electronic devices. In charging applications, it may be necessary to adjust the power output of these power supplies. For example, USB-PD power supplies typically have an adjustable power output that varies from about 3 to 21 volts ("V"). Many of these types of power supplies are offline switching power supplies.

[0004] Conventional off-line power supplies have operating requirements that rely on bias voltages for proper operation, including startup and steady state. Specifically, conventional off-line power supplies require one or more bias voltages to properly power up and operate. In addition, these off-line power supplies typically include multiple circuits, components, and devices within the off-line power supply that also require separate bias voltages to properly operate. To complicate matters, some of these circuits, components, and devices operate in a manner in which the bias voltage of one circuit, component, or device may directly affect the need for a bias voltage of another circuit, component, or device within the off-line power supply. In addition, in the case of an off-line power supply that generates a bias voltage using a voltage from a winding of a switching transformer, the voltage of the winding tracks the main output of the power supply. As an example, for a power supply with an adjustable output voltage of 3 to 21V (7:1 variation), if a bias voltage of 12V is required, the voltage of the winding will have a range of 12V to 84V. Unfortunately, in this example, the overvoltage of the winding will need to be dropped across the entire circuit to generate the bias voltage, such as, for example, using a low dropout ("LDO") regulator, and power will be lost (e.g., as heat). In general, the power loss will be equal to the voltage drop multiplied by the current across the circuit. Thus, there is a need for a system and method for generating a bias voltage for a switching power supply with low losses. Summary of the invention

[0005] The present invention discloses a device for regulating the bias voltage of a switching power supply. The device includes a cascade amplifier, a feedback circuit and a bias regulator circuit. The cascade amplifier includes a common gate transistor and a common source transistor, wherein the source of the common gate transistor communicates with the drain of the common source transistor. The feedback circuit communicates with the source of the common gate transistor and the drain of the common source transistor, and the bias regulator circuit communicates with the gate of the common source transistor, the gate of the common gate transistor and the feedback circuit. The feedback circuit is configured to receive a drain voltage from the drain of the common source transistor and generate a feedback voltage, and the bias regulator circuit is configured to receive the feedback voltage and generate and regulate the bias voltage. A gate voltage is generated by the bias voltage, and the gate voltage is injected into the gate of the common gate transistor.

[0006] In an example of operation, a device performs a method, the method comprising receiving a drain voltage from the drain of the common-source transistor of the cascade amplifier, generating the bias voltage from the drain voltage with the bias regulator circuit, and injecting the gate voltage at the gate of the common-gate transistor. The gate voltage is related to the bias voltage, and generating the bias voltage includes regulating the bias voltage.

[0007] Other devices, apparatus, systems, methods, features and advantages will be or will become apparent to those skilled in the art upon studying the following drawings and detailed description. It is expected that all such additional devices, apparatus, systems, methods, features and advantages should be included in this description, within the scope of the invention and protected by the appended claims. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] The present disclosure may be better understood by referring to the following drawings. The components in the drawings are not necessarily to scale, but emphasis is placed on illustrating the principles of the present invention. In the drawings, like reference numerals designate corresponding parts in different views.

[0009] Figure 1 is a system diagram of an example of an implementation of an apparatus for adjusting a bias voltage of a switching power supply according to the present disclosure.

[0010] Figure 2 According to the present disclosure Figure 1 A circuit diagram of an example of an implementation of a feedback circuit is shown.

[0011] Figure 3 According to the present disclosure Figure 1 A circuit diagram of an example of an implementation of a bias regulator circuit is shown.

[0012] Figure 4 According to the present disclosure Figure 1 A circuit diagram of an example of an implementation of an optional driver circuit is shown.

[0013] Figure 5 According to the present disclosure Figure 1 A circuit diagram of an example of an implementation of a device for adjusting a bias voltage of a switching power supply is shown.

[0014] Figure 6 is a change over time according to the present disclosure Figures 1 to 3 and Figure 5 The drain-supply voltage (“V DD ”), the gate voltage and the first reference voltage (“V Ref ”) is a graph of example voltage values.

[0015] Figure 7 According to the present disclosure Figure 1 A circuit diagram of an example of another implementation of a device for adjusting a bias voltage of a switching power supply is shown.

[0016] Figure 8 is a change over time according to the present disclosure Figures 1 to 3 and Figure 7 The supply voltage shown in (often referred to as the "voltage at the common collector", abbreviated as V CC ), gate voltage and V Ref Three graphs of example voltage values.

[0017] Fig. 9 is a flow chart of an exemplary implementation of a method for adjusting a bias voltage of a switching power supply according to the present disclosure. DETAILED DESCRIPTION

[0018] In the following description, the same reference numerals are used to identify the same elements. In addition, the accompanying drawings are intended to illustrate the main features of the exemplary embodiments in a diagrammatic manner. The accompanying drawings are not intended to depict every feature of the actual embodiments, nor are they intended to depict the relative sizes of the depicted elements, and are not drawn to scale.

[0019] The present invention discloses a device for regulating the bias voltage of a switching power supply. The device includes a cascade amplifier, a feedback circuit and a bias regulator circuit. The cascade amplifier includes a common gate transistor and a common source transistor, wherein the source of the common gate transistor communicates with the drain of the common source transistor. The feedback circuit communicates with the source of the common gate transistor and the drain of the common source transistor, and the bias regulator circuit communicates with the gate of the common source transistor, the gate of the common gate transistor and the feedback circuit. The feedback circuit is configured to receive a drain voltage from the drain of the common source transistor and generate a feedback voltage, and the bias regulator circuit is configured to receive the feedback voltage and generate and regulate the bias voltage. A gate voltage is generated by the bias voltage, and the gate voltage is injected into the gate of the common gate transistor.

[0020] In an example of operation, a device performs a method, the method comprising receiving a drain voltage from the drain of the common-source transistor of the cascade amplifier, generating the bias voltage from the drain voltage with the bias regulator circuit, and injecting the gate voltage at the gate of the common-gate transistor. The gate voltage is related to the bias voltage, and generating the bias voltage includes regulating the bias voltage.

[0021] exist Figure 1 , a system diagram of an example of an implementation of a device 100 for regulating a bias voltage 102 of a switching power supply 104 according to the present disclosure is shown. The device 100 communicates signals with an external system 106 via a signal path 108. In this example, the external system 106 may be another circuit, module, component, device, or system that provides a rail voltage 114 (“V 轨 ”) is in signal communication with a reference direct current (“DC”) voltage source 110.

[0022] The device 100 includes a cascade amplifier 116, a feedback circuit 118, and a bias regulator circuit 120. The cascade amplifier 116 includes a common-gate transistor 122 and a common-source transistor 124, wherein a source 126 of the common-gate transistor 122 is in signal communication with a drain 128 of the common-source transistor 124 via a signal path 130. The feedback circuit 118 is in signal communication with the source 126 of the common-gate transistor 122 and the drain 128 of the common-source transistor 124 via a signal path 132. The bias regulator circuit 120 is in signal communication with a gate 134 of the common-source transistor 124, a gate 136 of the common-gate transistor 122, and the feedback circuit 118 via signal paths 138, 140, and 142, respectively. The feedback circuit 118 is configured to receive a drain voltage 144 from the common-source transistor 124 and generate a feedback voltage 146, which is transmitted to the bias regulator circuit 120 via the signal path 142. The bias regulator circuit 120 is configured to receive the feedback voltage 146 and generate the bias voltage 102. A gate voltage 148 is generated from the bias voltage 102 and injected into the gate 136 of the common-gate transistor 122.

[0023] Common-gate transistor 122 and common-source transistor 124 may be field effect transistors ("FETs"). In this example, common-gate transistor 122 may be an n-type junction field effect transistor ("JFET"), and common-source transistor 124 may be an enhancement-type n-type metal oxide semiconductor field effect transistor ("MOSFET").

[0024] In an example of operation, the device 100 performs a method that includes receiving a drain voltage 144 from a drain 128 of a common-source transistor 124 of a cascode amplifier 116, generating a bias voltage 102 from the drain voltage 144 with a bias regulator circuit 120, and injecting a gate voltage 148 at a gate 136 of a common-gate transistor 122. The gate voltage 148 is related to the bias voltage 102, and in this example, generating the bias voltage 102 includes regulating the bias voltage 102.

[0025] It will be appreciated by those skilled in the art that circuits, components, modules, and / or devices of or associated with device 100 are described as being in signal communication with each other, where being in signal communication refers to any type of communication and / or connection between circuits, components, modules, and / or devices that allows a circuit, component, module, and / or device to pass and / or receive signals and / or information from another circuit, component, module, and / or device. The communication and / or connection may be along any signal path between circuits, components, modules, and / or devices that allows signals and / or information to pass from one circuit, component, module, and / or device to another circuit, component, module, and / or device and includes wireless or wired signal paths. The signal path may be physical, such as, for example, a conductive metal wire, an electromagnetic waveguide, a cable, an attached and / or electromagnetically or mechanically coupled terminal, a semiconductor or dielectric material or device, or other similar physical connection or coupling. Additionally, the signal path may be non-physical, such as free space (in the case of electromagnetic propagation) or a signal path through digital components, wherein communication information is passed from one circuit, component, module and / or device to another circuit, component, module and / or device in a varying digital format without passing through a direct electromagnetic connection.

[0026] In this example, the external system 106 is in signal communication with the drain 150 of the common-gate transistor 122 via the signal path 108, and the source 152 of the common-source transistor 124 is connected in signal communication with the ground 154. For ease of illustration, the DC voltage source 110 is also connected in signal communication with the ground 156. As previously described, the external system 106 can be a device that provides V to the external system 106. 轨 The reference DC voltage source 110 of 114 is another circuit, module, component, device, or system in signal communication. The external system 106 may include, for example, windings from a switching transformer and other circuits such as a low pass filter.

[0027] The cascade amplifier 116 (also referred to as a "cascade") is a two-stage amplifier that includes a common emitter stage or a common source stage that feeds a common base stage or a common gate stage of the amplifier. Typically, the cascade includes two transistors, which may be a bipolar junction transistor ("BJT") and a field effect transistor ("FET"). The cascade improves the isolation from the input to the output and eliminates the Miller effect of the amplifier, thereby producing an amplifier with a high bandwidth. In this example, the first and second stages of the cascade amplifier 116 are shown as being implemented with FETs. A person of ordinary skill in the art should appreciate that, based on the design parameters of the device 100 and the external system 106, the two transistors (i.e., the common source transistor 124 and the common gate transistor 122) may be optionally implemented as a BJT or a FET.

[0028] In this example, the external system 106 is part of a switching power supply with a relatively high voltage, so the two transistors (i.e., common source transistor 124 and common gate transistor 122) are shown as FETs. Specifically, the common source transistor 124 is an enhancement-type n-type metal oxide semiconductor field effect transistor ("MOSFET") and the common gate transistor 122 is an n-type junction field effect transistor ("JFET"). In this example, the JFET can be, for example, a silicon carbide JFET.

[0029] Feedback circuit 118 is a circuit, component, module, or device that receives drain voltage 144 and generates feedback voltage 146, which is delivered to bias regulator circuit 120 via signal path 142. In one example, feedback circuit 118 can be a feedback path including signal paths 132 and 142, wherein feedback voltage 146 is delivered directly from drain 128 of common-source transistor 124 to drain voltage 144 of bias regulator circuit 120 via combined signal paths 132 and 142.

[0030] In an alternative example, feedback circuit 118 may be configured to receive drain voltage 144 and generate a supply voltage (commonly referred to as “voltage at the common collector”, abbreviated as V CC ) circuit. The power supply voltage Vcc can be used as the power supply voltage of the circuit of the switching power supply 104 (for example, implemented by a controller circuit not shown). In this example, the feedback voltage 146 is V CC . In yet another alternative example, the feedback circuit 118 can be or include a voltage doubler circuit in signal communication with the source 126 of the common-gate transistor 122 and the drain 128 of the common-source transistor 124. Typically, a voltage doubler circuit is an electronic circuit that charges a capacitor using an input voltage (i.e., the drain voltage 144) and switches these charges in a manner such that an output voltage (i.e., feedback voltage 146) produced by the voltage doubler circuit is approximately twice the input voltage. In this example, the voltage doubler circuit is configured to receive the drain voltage 144 from the drain 128 of the common-source transistor 124 and produce a feedback voltage 146, wherein the feedback voltage 146 is approximately equal to twice the drain voltage 144. In this example, the feedback voltage 146 is what is commonly referred to as the drain supply voltage (“V DD ”), if the feedback circuit 118 further includes a circuit configured to generate the first power supply voltage V CC circuit, the supply voltage is approximately 144 of the drain voltage or V CC As described in the previous example. In this example, the feedback voltage 146 is V DD .

[0031] As an example of a feedback circuit 118 including a voltage doubler circuit, the voltage doubler circuit can be a charge pump multiplication circuit having a charge pump. Generally, a charge pump is a type of DC-DC converter circuit that utilizes a capacitor for energy charge storage to increase or decrease voltage. A charge pump is a circuit that can have high efficiency while being an electrically simple circuit.

[0032] The bias regulator circuit 120 is a circuit, component, module, or device that receives the feedback voltage 146 and generates the bias voltage 102. A gate voltage 148 is generated from the bias voltage 102 and is injected into the gate 136 of the common-gate transistor 122. In this example, the bias regulator circuit 120 includes a first reference voltage source and a differential amplifier that compares the feedback voltage 146 with a first reference voltage of the first reference voltage source to generate and regulate the bias voltage 102. The differential amplifier may include an operational amplifier in signal communication with the feedback circuit 118 and the first reference voltage source.

[0033] In addition, the bias regulator circuit 120 may include a signal source (such as a pulse width modulation "PWM" source) that sets the gate 134 of the common-source transistor 124 to a drive signal generated by the signal source. The signal source may optionally be a PWM source, a predetermined signal source, or a signal source driven by the feedback voltage 146 or another feedback signal (not shown).

[0034] In an example of operation, the bias regulator circuit 120 generates the bias voltage 102 from the feedback voltage 146 by comparing the feedback voltage 146 with a first reference voltage using a differential amplifier to generate and regulate the bias voltage 102. The bias regulator circuit 120 also sets the gate 134 of the common-source transistor 124 to the drive signal. By regulating the bias voltage 102 relative to the gate voltage 148 injected into the gate 136 of the common-gate transistor 122, the bias regulator circuit 120 also regulates the resulting drain voltage 144 at the drain 128 of the common-source transistor 124. In addition, by regulating the drain voltage 144, the bias regulator circuit 120 also regulates the feedback voltage 146, which may be V CC 、V DD or both.

[0035] In this example, the apparatus 100 may also include an optional driver circuit 158 ​​that is in signal communication with both the bias regulator circuit 120 and the gate 136 of the common-gate transistor 122 via signal paths 160 and 140, respectively. The optional driver circuit 158 ​​may include a voltage divider circuit, wherein the voltage divider circuit is configured to receive the bias voltage 102 and generate the gate voltage 148. The voltage divider circuit may include a low pass filter to filter out any high frequency noise on the bias voltage 102 signal passed from the bias regulator circuit 120 to the optional driver circuit 158. Alternatively, if the optional driver circuit 158 ​​is not present in the device 100, the gate voltage 148 is the bias voltage 102 because the signal path 140 is the same as the signal path 160 due to the absence of the optional driver circuit 158.

[0036] exist Figure 2 , a circuit diagram of an example of an implementation of the feedback circuit 118 according to the present disclosure is shown. In this example, the feedback circuit 118 may include a first voltage divider 200 and an optional second voltage divider 202. As previously discussed, the feedback circuit 118 is a circuit, component, module, or device that receives the drain voltage 144 via the signal path 132 and generates a feedback voltage 146, which is passed to the bias regulator circuit 120 via the signal path 142. In this example, the feedback circuit 118 is configured to receive the drain voltage 144 and generate a first supply voltage V via the first voltage divider 200. CC In addition, the feedback circuit 118 is further configured to receive the drain voltage 144 and generate a second power supply voltage V via an optional second voltage divider 202. DD 206. Based on the design of the device 100, the first power supply voltage V CC 204 or the second power supply voltage V DD 206 may be used as the feedback voltage 146 that is passed to the bias regulator circuit 120 .

[0037] In this example, the optional second voltage divider 202 can be part of a voltage doubler circuit 208. As an example, the voltage doubler circuit 208 can include the optional second voltage divider 202 and a first diode D1 210, a second diode D2 212, a third diode D3 214, and a first capacitor C1 216. The optional second voltage divider 202 can include a second capacitor C2 222 and a ground 224 connection.

[0038] As previously described, the voltage doubler circuit 208 is an electronic circuit that charges C1 216 from an input voltage (ie, drain voltage 144) and switches the charge in a manner such that the resulting output voltage of the voltage doubler circuit 208 (ie, V DD206) is approximately twice the input voltage (ie, drain voltage 144), or alternatively may be approximately V CC 204. In this example, voltage doubler circuit 208 is a charge pump voltage doubler circuit.

[0039] As another example, the first voltage divider 200 may include a third capacitor C3 230 and another ground 232 connection.

[0040] As previously discussed, the feedback circuit 118 may alternatively include only a single voltage divider (the first voltage divider 200 or the optional second voltage divider 202) that generates the first supply voltage V delivered via the feedback voltage 146. CC 204 or the second power supply voltage V DD 206. In addition, if the feedback circuit 118 includes both the first voltage divider 200 and the optional second voltage divider 202, based on the design of the device 100, the feedback circuit 118 can communicate signals with the bias regulator circuit 120 via the signal path 142 and the second signal path 236. In this example, since the feedback voltage 146 and the second signal path 236 can be used to convert V CC 204 is transmitted to the bias regulator circuit 120, the first signal path 142 can be used to convert V DD 206 is passed to the bias regulator circuit 120, where V CC 204 can be utilized by a differential amplifier, and V DD 206 may be used to bias circuits, components, modules, or devices within the bias regulator circuit 120 .

[0041] Steering Figure 3 , a circuit diagram of an example of an implementation of a bias regulator circuit 120 according to the present disclosure is shown. As previously discussed, the bias regulator circuit 120 is a circuit, component, module, or device that receives a feedback voltage 146 via a signal path 142 and generates a bias voltage 102. In this example, the bias regulator circuit 120 includes a first reference voltage source 300 and a differential amplifier 302 that compares the feedback voltage 146 (or V if the second signal path 236 is present) to the reference voltage 146. cc 204) and the first reference voltage (“V Ref ”) to generate and adjust the bias voltage 102. In this example, based on the previous Figure 2 A person skilled in the art will understand that, based on the design, if the second signal path 236 exists, the signal path 142 can be used as the second signal path 236 instead, and the feedback voltage 146 will be used as the V provided by the second signal path 236 instead. ccThe differential amplifier 302 may include an operational amplifier (“op-amp”) 306 in signal communication with the feedback circuit 118 and the first reference voltage source via signal paths 142 and 308, respectively. Ref 304 is applied to a positive input terminal 310 of the operational amplifier 306, and the feedback voltage 146 is applied to a negative input terminal 312 of the operational amplifier 306. The differential amplifier 302 also includes a first resistor R1 314 and a fourth capacitor C4 316, wherein both R1 314 and C4 316 are arranged in parallel and in signal communication with the negative input terminal 312 of the operational amplifier 306 and an output terminal 318 of the operational amplifier 306. The operational amplifier 306 is also connected in signal communication with ground 320, and V is passed to the operational amplifier 306 via signal path 322. DD 206 bias. Based on this design, if V DD 206 is equal to feedback voltage 146, then signal path 322 may be the same signal path 142. Alternatively, if since feedback voltage is instead equal to V CC 204, V DD 206 is not equal to the feedback voltage 146, then the signal path 322 can be Figure 2 In this alternative example, the comparison V CC 204 and V Ref 304, and using V DD 206 is used to bias the operational amplifier 306 .

[0042] In this example, the bias regulator circuit 120 may include a signal source 324 that sets the gate 134 of the common-source transistor 124 to a drive signal (“V Ref2 ”) 326. As previously discussed, the signal source 324 may alternatively be a PWM source, a predetermined signal source, or a signal source driven by the feedback voltage 146 or another feedback signal (not shown). The bias regulator circuit 120 may include a second resistor R2 328 and a third resistor R3 330, which are arranged as a voltage divider circuit that is in signal communication with the negative input terminal 312 of the operational amplifier 306, the ground 320 connection, and the feedback circuit 118 via the signal path 142. In this example, the feedback voltage 146 will produce a voltage drop across R2 328 before being applied to the negative input terminal 312 of the operational amplifier 306.

[0043] As previously discussed, in an example of operation, the bias regulator circuit 120 compares the feedback voltage 146 with V by using the differential amplifier 302. Ref304 to generate bias voltage 102 from feedback voltage 146 to generate and regulate bias voltage 102. Bias regulator circuit 120 also sets gate 134 of common source transistor 124 to V Ref2 326. Also as previously discussed, by regulating the bias voltage 102 relative to the gate voltage 148 injected into the gate 136 of the common-gate transistor 122, the bias regulator circuit 120 also regulates the resulting drain voltage 144 at the drain 128 of the common-source transistor 124. In addition, by regulating the drain voltage 144, the bias regulator circuit 120 also regulates the feedback voltage 146, which may be V CC 、V DD In addition, by adjusting the gate voltage 148, the bias regulator circuit 120 also regulates the amount of current (“I 外部系统 ”)162.

[0044] exist Figure 4 , a circuit diagram of an example of an implementation of an optional driver circuit 158 ​​according to the present disclosure is shown. The optional driver circuit 158 ​​is in signal communication with the bias regulator circuit 120 and the gate 136 of the common-gate transistor 122 via signal paths 160 and 140, respectively. The optional driver circuit 158 ​​may include a voltage divider circuit 400, wherein the voltage divider circuit 400 is configured to receive the bias voltage 102 and generate the gate voltage 148. The voltage divider circuit 400 may include a low-pass filter 402 to filter out any high-frequency noise on the bias voltage 102 signal passed from the bias regulator circuit 120 to the optional driver circuit 158. In this example, the low-pass filter 402 may include a fourth resistor R4 404 and a fifth capacitor C5 406, which are arranged in parallel and are in signal communication with both the ground connection 408 and the fifth resistor R5 410, and the gate 136 of the common-gate transistor 122 via the signal path 140. R5 410 is also in signal communication with the gate 136 of the common-gate transistor 122 and the bias regulator circuit 120 via signal paths 140 and 160, respectively. In general, the combination of the voltage divider circuit 400 and the low pass filter 402 reduces the magnitude of the voltage value of the bias voltage 102 to produce the gate voltage 148 and filters any high frequency noise from the gate voltage 148 before injecting the gate voltage 148 into the gate 136 of the common-gate transistor 122. As previously discussed, alternatively, if the optional driver circuit 158 ​​is not present in the device 100, the gate voltage 148 is the bias voltage 102 because the signal path 140 is the same as the signal path 160 due to the absence of the optional driver circuit 158.

[0045] Steering Figure 5 , a circuit diagram showing an example of an implementation of a device 500 for adjusting a bias voltage of a switching power supply 502 according to the present disclosure. In this example, similar to Figure 1 In the example shown, the device 500 includes the cascade amplifier 116, the feedback circuit 118, the bias regulator circuit 120 and the optional driver circuit 158. Alternatively, the switching power supply 502 includes the external system 106. In this example, the above-mentioned Figures 1 to 4 The circuit elements shown and described with respect to the cascade amplifier 116 , the feedback circuit 118 , the bias regulator circuit 120 , and the optional driver circuit 158 ​​.

[0046] Specific to this example, V DD 206 is shown as the feedback voltage 146 passed to the bias regulator circuit 120 via the signal path 142. The V DD 206 is shown both biasing the operational amplifier 306 and being injected into the negative input terminal 312 of the operational amplifier 306 through R2 328. The external system 106 is shown with a transformer 504, a sixth capacitor C6 506, a sixth resistor R6 508, a seventh resistor R7 512, a seventh capacitor C7 514, a fourth diode D4 516, and a fifth diode D5 518. In this example, C7 514 and R7 512 are connected to ground 520 and in signal communication with an output 522 of the external system 106.

[0047] In this example, C2 222 and C3 230 are sized to achieve low ripple voltage based on the load of the IC and the switching frequency also known as the off-time of the cascade, where C = (T 关断 *I 偏置 ) / ΔV 纹波 As an example of operation, in Figure 6 , the voltage V according to the present disclosure is shown as a function of time. DD 206, gate voltage 148 and V Ref 304. In this example, the graph 600 has a vertical axis 602 representing voltage and a horizontal axis 604 representing time. The vertical axis 602 has a range of 0 to 15 volts, and the horizontal axis 804 has a range of 0 to 5 milliseconds.

[0048] exist Figure 7 , a circuit diagram of another example of an implementation of a device 700 for adjusting a bias voltage of a switching power supply 702 according to the present disclosure is shown. In this example, the device 700 is similar to the Figure 5 The device 500 shown and described is different in that Figure 7In, with Figure 5 Unlike the device 500 shown, the device 700 has two feedback signal paths 142 and 236 from the feedback circuit 118 to the bias regulator circuit 120. The first feedback signal path 142 converts V DD 206 is transmitted to the bias regulator circuit 120, and the second feedback signal path 236 converts V CC 204 is passed to the bias regulator circuit 120. In this example, the operational amplifier 306 uses V DD 206 is used to bias the operational amplifier 305, and V CC 204 is applied to the operational amplifier 306 via R2 328 and is coupled to V Ref 304 is compared. As an example of operation, Figure 8 , the voltage V according to the present disclosure is shown as a function of time. CC 204, gate voltage 148 and V Ref 304. In this example, the graph 800 has a vertical axis 802 representing voltage and a horizontal axis 804 representing time. The vertical axis 802 has a range of 0 to 8 volts, and the horizontal axis 804 has a range of 0 to 5 milliseconds.

[0049] Steering Fig. 9 , a flowchart showing an exemplary implementation of a method 900 for adjusting the bias voltage of a switching power supply according to the present disclosure is shown. In this example, the method utilizes the above-mentioned Figure 1 , Figure 5 and Figure 7 Any of the apparatus 100, 500 and 700 shown and described.

[0050] The method begins 902 by receiving 904 a drain voltage 144 from a drain 128 of a common-source transistor 124 of the cascade amplifier and generating 906 a bias voltage 102 from the drain voltage 144 with a bias regulator circuit 120. The method then includes injecting 908 a gate voltage 148 at a gate 136 of the common-gate transistor 122. The method then ends 910. Furthermore, in this example, the gate voltage 148 is related to the bias voltage 102, and generating the bias voltage 102 includes regulating the bias voltage 102.

[0051] In this example, receiving the drain voltage 144 from the drain 128 of the common-source transistor 124 may include receiving the drain voltage 144 with the feedback circuit 118 and, in response, generating the feedback voltage 146, and generating the bias voltage 102 from the drain voltage 144 may include generating the bias voltage 102 from the feedback voltage 146 with the bias regulator circuit 120. In addition, generating the bias voltage 102 from the feedback voltage 146 may include comparing the feedback voltage 146 with V Ref 304 to generate and adjust the bias voltage 102. In this example, the method 900 may also include setting the gate 134 of the common source transistor 124 to V Ref2 326.

[0052] In an alternative example of method 900, feedback voltage 146 may be generated by voltage doubler circuit 208 within feedback circuit 118, and feedback voltage 146 may be approximately equal to twice drain voltage 144. In this alternative example, generating bias voltage 102 from feedback voltage 146 includes comparing feedback voltage 146 with Vdc using differential amplifier 302. Ref 304 to generate and adjust the bias voltage 102, and also includes setting the gate 134 of the common source transistor 124 to V Ref2 326.

[0053] In this example, injecting gate voltage 148 at gate 136 of common-gate transistor 122 may include dividing bias voltage 102 to generate gate voltage 148 with voltage divider circuit 400. In this example, method 900 also includes low pass filtering bias voltage 102 with voltage divider circuit 400 to generate gate voltage 148.

[0054] It should be understood that various aspects or details of the present invention may be changed without departing from the scope of the present invention. It is not exhaustive and does not limit the present invention to the disclosed precise form. In addition, the foregoing description is for illustrative purposes only, not for limiting purposes. Modifications and changes are feasible in view of the above description, or may be obtained from practicing the present invention. The claims and their equivalents define the scope of the present invention.

[0055] In some alternative examples of implementation, one or more functions marked in the blocks may not occur in the order marked in the drawings. For example, in some cases, two blocks shown in succession may be executed substantially concurrently, or blocks may sometimes be executed in reverse order, depending on the functionality involved. In addition, other blocks may be added in addition to the blocks shown in the flowchart or block diagram.

[0056] The description of different examples of implementations has been presented for illustration and description purposes, but is not intended to be exhaustive or limited to examples of the disclosed form. Many modifications and variations will be apparent to those of ordinary skill in the art. In addition, different examples of implementations may provide different features than other desired examples. One or more selected examples are selected and described in order to best explain the principles of the examples, practical applications, and to enable others of ordinary skill in the art to understand the various examples of the present disclosure, with various modifications suitable for specific intended uses.

[0057] In addition, detailed reference has been made to examples of implementations of the disclosed invention, one or more of which have been shown in the accompanying drawings. Each example is provided in a manner that explains the present technology rather than limiting the present technology. In fact, although the present specification has been described in detail with reference to specific examples of implementations of the present invention, it should be understood by those skilled in the art that, after obtaining an understanding of the foregoing, alternative forms, variations and equivalents of these examples of implementations can be easily conceived. For example, the features of a part of an example of an implementation shown and described can be used together with an example of another implementation to obtain a further example of the implementation. Therefore, it is expected that this subject matter covers all such modifications and variations within the scope of the attached claims and their equivalents. Without departing from the scope of the present invention, those skilled in the art may make these and other modifications and variations to the present invention, and the scope of the present invention is more specifically set forth in the attached claims. In addition, those skilled in the art should understand that the foregoing description is only illustrative and is not intended to limit the present invention.

Claims

1. A device for adjusting a bias voltage of a switching power supply, the device comprising: a cascade amplifier having a common gate transistor and a common source transistor, wherein a source of the common gate transistor is in signal communication with a drain of the common source transistor; a feedback circuit in signal communication with the source of the common-gate transistor and the drain of the common-source transistor, wherein the feedback circuit is configured to receive a drain voltage from the drain of the common-source transistor and to generate a first feedback voltage and a second feedback voltage using the drain voltage, the first feedback voltage having a first voltage level and the second feedback voltage having a second voltage level; as well as a bias regulator circuit in signal communication with the gate of the common-source transistor, the gate of the common-gate transistor, and the feedback circuit, wherein the bias regulator circuit is configured to receive the first feedback voltage and the second feedback voltage and to generate and regulate the bias voltage using the first feedback voltage and the second feedback voltage, wherein a gate voltage is generated by the bias voltage, and wherein the gate voltage is injected into the gate of the common-gate transistor.

2. The apparatus of claim 1, wherein the bias regulator circuit comprises a differential amplifier that compares the first feedback voltage with a reference voltage to generate and adjust the bias voltage, the differential amplifier being biased by the second feedback voltage.

3. The apparatus of claim 2, wherein the differential amplifier comprises an operational amplifier.

4. The device of claim 2, wherein the gate of the common-source transistor is set to a drive signal.

5. The apparatus of claim 1 , wherein the feedback circuit comprises a voltage doubler circuit in signal communication with the source of the common-gate transistor and the drain of the common-source transistor, wherein the voltage doubler circuit is configured to receive the drain voltage from the drain of the common-source transistor and generate the second feedback voltage, and The second feedback voltage is approximately equal to twice the drain voltage.

6. The apparatus of claim 5, wherein the voltage doubler circuit comprises a charge pump multiplier circuit.

7. The apparatus of claim 1, wherein the common-gate transistor is a junction field effect transistor.

8. The apparatus of claim 7, wherein the common-source transistor is a metal oxide semiconductor field effect transistor.

9. The apparatus of claim 1, further comprising a driver circuit in signal communication with the bias regulator circuit and the gate of the common-gate transistor, wherein the gate voltage is generated by the driver circuit from the bias voltage.

10. The device according to claim 9, wherein the driver circuit comprises a voltage divider circuit, and The voltage divider circuit is configured to receive the bias voltage and generate the gate voltage.

11. The apparatus of claim 10, wherein the voltage divider circuit comprises a low pass filter.

12. The apparatus of claim 11, wherein the gate voltage is the bias voltage.

13. A method of regulating a bias voltage of a switching power supply using a device having a cascade amplifier, a feedback circuit, and a bias regulator circuit, the method comprising: receiving a drain voltage from a drain of a common-source transistor of the cascode amplifier; generating, by the feedback circuit, a first feedback voltage and a second feedback voltage using the drain voltage, the first feedback voltage having a first voltage level and the second feedback voltage having a second voltage level; generating the bias voltage from the drain voltage using the first feedback voltage and the second feedback voltage with the bias regulator circuit; as well as Injecting a gate voltage at the gate of the common-gate transistor, wherein the gate voltage is related to the bias voltage, and The generating the bias voltage includes adjusting the bias voltage.

14. The method of claim 13, wherein generating the bias voltage from the first feedback voltage and the second feedback voltage comprises comparing the first feedback voltage with a reference voltage using a differential amplifier to generate and adjust the bias voltage.

15. The method of claim 14, further comprising setting a gate of the common-source transistor to a drive signal.

16. The method of claim 13, wherein the second feedback voltage is generated by a voltage doubler circuit within the feedback circuit, and The second feedback voltage is approximately equal to twice the drain voltage.

17. The method of claim 16, wherein generating the bias voltage from the first feedback voltage comprises comparing the first feedback voltage with a reference voltage using a differential amplifier to generate and adjust the bias voltage, the differential amplifier being biased by the second feedback voltage, and The method also includes setting a gate of the common-source transistor to a drive signal.

18. The method of claim 13, Wherein injecting the gate voltage at the gate of the common-gate transistor includes dividing the bias voltage with a voltage divider circuit to generate the gate voltage.

19. The method of claim 18, further comprising low pass filtering the bias voltage with the voltage divider circuit to generate the gate voltage.

20. The method of claim 13, wherein the gate voltage is the bias voltage.

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