Display devices
By designing a combination of a high-resolution display area and a light-transmitting area in a display device, the problem of the difficulty of display devices in the prior art in achieving both high resolution and light transmittance is solved, thereby achieving a wider range of functions and applications.
Patent Information
- Application Number
- CN202011229228.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2019-12-11
- Filing Date
- 2020-11-06
- Publication Date
- 2025-10-21
- Estimated Expiration
- 2040-11-06
AI Technical Summary
Existing display devices find it difficult to balance high-resolution display and light transmittance requirements when integrating multifunctional components, resulting in limited overall performance.
A display device is designed, comprising a first display area and a second display area. The first display area is used for high-resolution image display. Components are arranged in the second display area and the second display area includes a transmissive portion to achieve light transmittance. The emission area of the auxiliary sub-pixels is larger than that of the main sub-pixels. The auxiliary sub-pixels are arranged in two rows, and the transmissive portion is configured as a circle or other shape to optimize light transmission.
It achieves both high-resolution display and light transmittance, enhancing the functional diversity and application scope of display devices.
Smart Images

Figure CN112951878B_ABST
Abstract
Description
[0001] This application claims priority to and the benefit of Korean Patent Application No. 10-2019-0164800 filed on December 11, 2019, in the Korean Intellectual Property Office, the disclosure of which is incorporated herein in its entirety by reference. Technical Field
[0002] An aspect of one or more example embodiments relates to a display apparatus. Background Art
[0003] Recently, the applications of display devices have been diversified. As display devices have become thinner and lighter with the advancement of technology, their scope of use has broadened.
[0004] As display devices are being used in various ways, the shapes of the display devices may be designed in various ways, and functions that can be associated with or connected to the display devices are increasing.
[0005] The above information disclosed in this Background section is only for enhancement of understanding of the background technology and therefore the information discussed in this Background section does not necessarily constitute prior art. Summary of the Invention
[0006] Aspects of one or more example embodiments include a display device including a first display area as a main display area and a second display area in which components, etc. may be arranged. However, this is merely an example, and the scope of the embodiments according to the present disclosure is not limited.
[0007] Additional aspects will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the disclosed presented example embodiments.
[0008] According to one or more example embodiments, a display device includes: a substrate including a first display area and a second display area; a main sub-pixel arranged on the substrate in the first display area; and a basic unit arranged on the substrate in the second display area, the basic unit including a pixel group and a transmission portion, the pixel group including an auxiliary sub-pixel, wherein the pixel group and the transmission portion are alternately arranged along a first direction, and the auxiliary sub-pixels included in one pixel group among the pixel groups are arranged in two rows, and a size of an emission area of a first auxiliary sub-pixel among the auxiliary sub-pixels is larger than a size of an emission area of a first main sub-pixel among the main sub-pixels presenting the same color as the first auxiliary sub-pixel.
[0009] According to some example embodiments, the number of auxiliary sub-pixels included in one pixel group among the pixel groups may be three, and each of the auxiliary sub-pixels may be arranged at a vertex of a virtual triangle.
[0010] According to some example embodiments, the number of auxiliary sub-pixels included in the basic unit may be 3 / 8 of the number of main sub-pixels included in a corresponding unit having the same area as that of the basic unit in the first display region.
[0011] According to some example embodiments, one pixel group and two transmission portions may be arranged along a second direction crossing the first direction.
[0012] According to some example embodiments, the number of auxiliary sub-pixels included in one pixel group among the pixel groups may be four, and each of the auxiliary sub-pixels may be arranged at a vertex of a virtual parallelogram.
[0013] According to some example embodiments, the virtual parallelogram is a rectangle.
[0014] According to some example embodiments, the number of auxiliary sub-pixels included in the basic unit may be ¼ the number of main sub-pixels included in a corresponding unit having the same area as that of the basic unit in the first display region.
[0015] According to some example embodiments, pixel groups may be separated from each other in a basic unit.
[0016] According to some example embodiments, the transmissive portions may each have a circular shape.
[0017] According to some example embodiments, the counter electrode integrally provided in the main sub-pixel and the auxiliary sub-pixel may be arranged in the first display area and the second display area, and the counter electrode may include an opening corresponding to the transmissive portion.
[0018] According to some example embodiments, the display apparatus may further include an inorganic insulating layer disposed on the substrate, and the inorganic insulating layer may include an opening corresponding to the transmission portion.
[0019] According to some example embodiments, the display device may further include a lower electrode layer disposed between the substrate and the auxiliary sub-pixel, and the lower electrode layer may include a lower hole corresponding to the transmission portion.
[0020] According to one or more example embodiments, a display device includes: a substrate including a first display area and a second display area, a main sub-pixel is arranged in the first display area, and a pixel group including auxiliary sub-pixels and a transmission portion is arranged in the second display area; a first pixel electrode and a first emission layer, both configured to realize a first main sub-pixel among the main sub-pixels; a second pixel electrode and a second emission layer, both configured to realize a first auxiliary sub-pixel among the auxiliary sub-pixels that presents the same color as the first main sub-pixel; and a counter electrode, integrally arranged in the first display area and the second display area, wherein the auxiliary sub-pixels included in the pixel group are arranged in two rows, and the size of the emission area of the first auxiliary sub-pixel is larger than the size of the emission area of the first main sub-pixel.
[0021] According to some example embodiments, the display device may further include a functional layer disposed between the first pixel electrode and the counter electrode and between the second pixel electrode and the counter electrode, and a portion of the functional layer may be disposed to correspond to the transmission portion.
[0022] According to some example embodiments, the display device may further include a lower electrode layer disposed between the substrate and the second pixel electrode, and the lower electrode layer may include a lower hole corresponding to the transmission portion.
[0023] According to some example embodiments, the display device may further include a pixel defining layer, the pixel defining layer including a first opening configured to expose a central portion of the first pixel electrode and a second opening to expose a central portion of the second pixel electrode, the emission area of the first main sub-pixel may be defined by the first opening, and the emission area of the first auxiliary sub-pixel may be defined by the second opening.
[0024] According to some example embodiments, the display apparatus may further include an inorganic insulating layer disposed on the substrate, and the inorganic insulating layer may include an opening corresponding to the transmission portion.
[0025] According to some example embodiments, the first display area and the second display area may be arranged to face an encapsulation substrate of the substrate and sealed.
[0026] According to some example embodiments, the display device may further include a thin film encapsulation layer including a first inorganic encapsulation layer, an organic encapsulation layer, and a second inorganic encapsulation layer sequentially disposed on the counter electrode.
[0027] According to some example embodiments, the display device may further include an image sensor disposed in the second display area (eg, under the substrate in the second display area). BRIEF DESCRIPTION OF THE DRAWINGS
[0028] The above and other aspects, features, and characteristics of certain example embodiments disclosed will become more apparent from the following description taken in conjunction with the accompanying drawings, in which:
[0029] Figure 1 is a schematic perspective view of a display device according to some example embodiments;
[0030] Figure 2 is a schematic cross-sectional view of a display device according to some example embodiments;
[0031] Figure 3A and Figure 3B is a schematic plan view of a display device according to some example embodiments;
[0032] Figure 4A is an equivalent circuit diagram of a pixel circuit that may be arranged in a display area and / or a sensor area of a display device according to some example embodiments;
[0033] Figure 4B is an equivalent circuit diagram of a pixel circuit that may be arranged in a display area and / or a sensor area of a display device according to some example embodiments;
[0034] Figure 5 is a schematic layout diagram illustrating an arrangement of sub-pixels arranged in a first display area and a second display area and a transmissive portion arranged in the second display area according to some example embodiments;
[0035] Figure 6 It is along Figure 5 sectional views taken along lines II' and II-II';
[0036] Figure 7 is a schematic cross-sectional view of a display device according to some example embodiments;
[0037] Figure 8 is a schematic cross-sectional view of a display device according to some example embodiments;
[0038] Figure 9 is a schematic layout diagram illustrating an arrangement of sub-pixels and a transmission portion according to some example embodiments;
[0039] Figure 10 is a schematic layout diagram illustrating an arrangement of sub-pixels and a transmission portion according to some example embodiments;
[0040] Figure 11 is a schematic layout diagram showing an arrangement of sub-pixels and a transmission portion according to a comparative example; and
[0041] Figure 12 is a table showing visibility and lifespan according to some example embodiments and comparative examples. DETAILED DESCRIPTION
[0042] A more detailed reference will now be made to the aspects of some example embodiments shown in the accompanying drawings, wherein the same reference numerals refer to the same elements from time to time. In this regard, this example embodiment can have different forms and should not be construed as being limited to the description set forth herein. Therefore, below, only example embodiments are described with reference to the drawings to explain the aspects of some example embodiments according to this description. As used herein, the term "and / or" includes any combination and all combinations of one or more of the relevant listed items. Throughout the disclosure, the expression "at least one of a, b, and c" represents only a, only b, only c, both a and b, both a and c, both b and c, all of a, b, and c, or variations thereof.
[0043] Hereinafter, aspects of some example embodiments will be described in more detail with reference to the accompanying drawings. When describing example embodiments with reference to the accompanying drawings, identical or corresponding elements are denoted by identical reference numerals, and redundant descriptions thereof will be omitted.
[0044] It will be understood that although the terms "first," "second," etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another.
[0045] As used herein, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.
[0046] It will be understood that terms such as “comprises,” “includes,” and “has” used herein specify the presence of stated features or elements, but do not preclude the presence or addition of one or more other features or elements.
[0047] It will be understood that when a layer, region or element is referred to as being “on” another layer, region or element, it can be “directly on” the other layer, region or element, or can be “indirectly on” the other layer, region or element with one or more intervening layers, regions or elements therebetween.
[0048] For the convenience of description, the sizes of the components in the drawings may be exaggerated. In other words, since the sizes and thicknesses of the elements in the drawings are arbitrarily shown for the convenience of description, the following embodiments are not limited thereto.
[0049] In the example embodiments that follow, it will be understood that when a film, layer, region, element, or component is referred to as being "connected to" or "bonded to" another film, layer, region, element, or component, the film, layer, region, element, or component may be directly or indirectly connected to or bonded to the other film, layer, region, element, or component. That is, for example, there may be intervening films, layers, regions, elements, or components. In the example embodiments that follow, it will be understood that when a film, layer, region, element, or component is referred to as being "electrically connected to" or "electrically bonded to" another film, layer, region, element, or component, the film, layer, region, element, or component may be directly or indirectly electrically connected to or bonded to the other film, layer, region, element, or component. That is, for example, there may be intervening films, layers, regions, elements, or components.
[0050] Figure 1 is a schematic perspective view of a display apparatus 1 according to some example embodiments.
[0051] Reference Figure 1 The display device 1 may include a first display area DA1 and a non-display area NDA. An image may be displayed or realized in the first display area DA1, and no image may be displayed or realized in the non-display area NDA. The display device 1 may provide or display a main image by using light emitted from a plurality of main sub-pixels Pm arranged in the first display area DA1. In this specification, a sub-pixel refers to an area (e.g., an area having a display element) that emits light of one color, such as red, green, blue, or white, and refers to the smallest unit constituting an image.
[0052] The display device 1 may include a second display area DA2. Figure 2 Described in more detail, the second display area DA2 may be an area in which components (such as sensors using visible light, infrared light, or sound) are arranged. The second display area DA2 may include a transmissive portion TA that transmits light and / or sound output from the components to the outside or traveling from the outside or an external component toward the components. According to some example embodiments, when light is transmitted through the second display area DA2, the transmittance may be approximately 30% or greater, more preferably, approximately 50% or greater, approximately 75% or greater, approximately 80% or greater, approximately 85% or greater, or approximately 90% or greater.
[0053] According to some example embodiments, a plurality of auxiliary sub-pixels Pa may be arranged in the second display area DA2, and a specific image may be provided using light emitted from the auxiliary sub-pixels Pa. The image provided in the second display area DA2 may be an auxiliary image and may have a lower resolution than the image provided in the first display area DA1. That is, because the second display area DA2 includes a transmissive portion TA capable of transmitting light and / or sound, the number of auxiliary sub-pixels Pa arranged per unit area in the second display area DA2 may be smaller than the number of main sub-pixels Pm arranged per unit area in the first display area DA1.
[0054] The second display area DA2 may be arranged at one side of the first display area DA1. According to some example embodiments, Figure 1 In the embodiment shown, the second display area DA2 is arranged above the first display area DA1 so that the second display area DA2 is arranged between the non-display area NDA and the first display area DA1. However, the embodiments according to the present disclosure are not limited thereto. For example, the shape of the second display area DA2 may be circular, elliptical, or polygonal such as a triangle or a pentagon, and the second display area DA2 may be arranged inside the first display area DA1 and surrounded by the first display area DA1.
[0055] Hereinafter, although an organic light-emitting display device is described as an example of the display device 1 according to some example embodiments, the display device 1 according to an embodiment of the present disclosure is not limited thereto. According to some example embodiments, various types of display devices such as an inorganic light-emitting display device or a quantum dot light-emitting display device may be used.
[0056] Figure 2 is a cross-sectional view schematically illustrating a display device 1 according to some example embodiments, and may be viewed along Figure 1 The cross section corresponds to the line AA'.
[0057] Reference Figure 2 , the display device 1 may include a display panel 10 including display elements and a component 20 corresponding to the second display area DA2.
[0058] The display panel 10 may include a substrate 100, a display element layer 200 disposed above the substrate 100, and a thin film encapsulation layer 300 serving as a sealing member or encapsulant for sealing the display element layer 200 (e.g., protecting the display element layer 200 from external contaminants). In addition, the display panel 10 may further include a lower protective film 175 disposed below the substrate 100.
[0059] The substrate 100 may include glass or a polymer resin. The polymer resin may include polyethersulfone, polyacrylate, polyetherimide, polyethylene naphthalate, polyethylene terephthalate, polyphenylene sulfide, polyarylate, polyimide, polycarbonate, or cellulose acetate propionate. The substrate 100 including the polymer resin may have flexible, rollable, or bendable properties. The substrate 100 may have a multilayer structure including an inorganic layer and a layer including the above-mentioned polymer resin.
[0060] The display element layer 200 may include a circuit layer including a first thin film transistor TFT and a second thin film transistor TFT', a main organic light emitting diode OLED and an auxiliary organic light emitting diode OLED' as display elements, and insulating layers IL and IL' located between the substrate 100 and the main organic light emitting diode OLED and the auxiliary organic light emitting diode OLED'.
[0061] A main subpixel Pm including a first thin film transistor TFT and a main organic light emitting diode OLED connected to the first thin film transistor TFT can be arranged in the first display area DA1, and an auxiliary subpixel Pa including a second thin film transistor TFT' and an auxiliary organic light emitting diode OLED' connected to the second thin film transistor TFT' can be arranged in the second display area DA2.
[0062] In addition, a transmissive portion TA in which no display element is arranged may be arranged in the second display area DA2. The transmissive portion TA may be understood as a region through which light or signals emitted from or incident to the assembly 20 are transmitted.
[0063] The component 20 may be positioned in the second display area DA2. The component 20 may be an electronic component that uses light or sound. For example, the component 20 may be an image sensor configured to capture images, a camera, a sensor configured to receive and use light (e.g., an infrared sensor), a sensor configured to output and detect light or sound to measure distance, a sensor configured to recognize fingerprints, a small lamp configured to output light, a speaker configured to output sound, etc.
[0064] When the component 20 is an electronic component that uses light, the component 20 can use light of various wavelengths, such as visible light, infrared light, and ultraviolet light. Multiple components 20 can be arranged in the second display area DA2. For example, a light-emitting element and a light-receiving element can be provided together as a component 20 in a single second display area DA2. Alternatively, the light-emitting element and the light-receiving element can be provided simultaneously in a single component 20.
[0065] The lower electrode layer BSM may be disposed in the second display area DA2. The lower electrode layer BSM may be disposed corresponding to the lower portion of the second thin film transistor TFT'. The lower electrode layer BSM may block external light from reaching the auxiliary sub-pixel Pa including the second thin film transistor TFT'. For example, the lower electrode layer BSM may block light emitted from the component 20 from reaching the auxiliary sub-pixel Pa.
[0066] In some example embodiments, a constant voltage or signal is applied to the lower electrode layer BSM to prevent damage to the pixel circuit due to electrostatic discharge.
[0067] The thin film encapsulation layer 300 may include at least one inorganic encapsulation layer and at least one organic encapsulation layer. In this regard, Figure 2 3 shows a first inorganic encapsulating layer 310 and a second inorganic encapsulating layer 330 and an organic encapsulating layer 320 therebetween.
[0068] The first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 may each include one or more inorganic insulating materials selected from the group consisting of aluminum oxide, titanium oxide, tantalum oxide, hafnium oxide, zinc oxide, silicon oxide, silicon nitride, and silicon oxynitride. The organic encapsulation layer 320 may include a polymer material. The polymer material may include acrylic resin, epoxy resin, polyimide, polyethylene, etc.
[0069] The lower protective film 175 may be attached to the lower portion of the substrate 100 to support and protect the substrate 100. The lower protective film 175 may include an opening 175OP provided in the second display area DA2. Since the opening 175OP is provided in the lower protective film 175, the light transmittance of the second display area DA2 may be improved. The lower protective film 175 may include polyethylene terephthalate (PET) or polyimide (PI).
[0070] The area of the second display area DA2 may be larger than the area of the area in which the assembly 20 is disposed. Therefore, the area of the opening 175OP provided in the lower protective film 175 may not match the area of the second display area DA2. For example, the area of the opening 175OP may be smaller than the area of the second display area DA2.
[0071] In addition, a plurality of components 20 may be arranged in the second display area DA2. The components 20 may have different functions. For example, one of the components 20 may be a camera, and another one of the components 20 may be an infrared sensor.
[0072] According to some example embodiments, elements such as an input sensing member configured to sense a touch input, a polarizer, a retarder, a color filter, an anti-reflection member including a black matrix, and a transparent window may be further disposed in the display panel 10 .
[0073] Although the thin film encapsulation layer 300 is used as an encapsulation member for sealing the display element layer 200 according to some example embodiments, embodiments of the present disclosure are not limited thereto. For example, a sealing substrate bonded to the substrate 100 by a sealant or glass frit may be used as a member for sealing the display element layer 200.
[0074] Figure 3A is a schematic plan view of a display panel 10 according to some example embodiments.
[0075] Reference Figure 3A The display panel 10 includes a plurality of primary sub-pixels Pm arranged in the first display area DA1. The primary sub-pixels Pm can be implemented as display elements such as organic light emitting diodes. Each of the primary sub-pixels Pm can emit light of any one of red, green, blue or white colors through an organic light emitting diode. The first display area DA1 can be Figure 2 The described packaging member covers and protects from external air, moisture, and the like.
[0076] The second display area DA2 may be arranged on one side of the first display area DA1, and a plurality of auxiliary sub-pixels Pa may be arranged in the second display area DA2. The auxiliary sub-pixels Pa may each be implemented as a display element such as an organic light-emitting diode. Each of the auxiliary sub-pixels Pa may emit light of any one of red, green, blue, or white colors via an organic light-emitting diode. The transmissive portion TA arranged between the auxiliary sub-pixels Pa may be arranged in the second display area DA2. At least one component 20 may be arranged to correspond to the lower portion of the second display area DA2 of the display panel 10.
[0077] According to some example embodiments, one primary subpixel Pm and one auxiliary subpixel Pa may be driven by the same pixel circuit. However, embodiments of the present disclosure are not limited thereto. The pixel circuit included in the primary subpixel Pm and the pixel circuit configured to drive the auxiliary subpixel Pa may be different from each other. Because the second display area DA2 includes the transmissive portion TA, the resolution of the second display area DA2 may be smaller than that of the first display area DA1.
[0078] The pixel circuit configured to drive the main subpixel Pm and the auxiliary subpixel Pa can be electrically connected to the peripheral circuit arranged in the non-display area NDA. The first scan driving circuit 110, the second scan driving circuit 120, the terminal 140, the data driving circuit 150, the first power line 160, and the second power line 170 can be arranged in the non-display area NDA.
[0079] The first scan driving circuit 110 may provide a scan signal to each pixel circuit through a scan line SL. The first scan driving circuit 110 may provide an emission control signal to each pixel circuit through an emission control line EL. The second scan driving circuit 120 may be arranged in parallel with the first scan driving circuit 110, with the first display area DA1 located between the first scan driving circuit 110 and the second scan driving circuit 120. Some of the pixel circuits driving the main sub-pixel Pm and the auxiliary sub-pixel Pa arranged in the second display area DA2 may be electrically connected to the first scan driving circuit 110, and the other pixel circuits driving the main sub-pixel Pm and the auxiliary sub-pixel Pa may be connected to the second scan driving circuit 120. According to some example embodiments, the second scan driving circuit 120 may be omitted.
[0080] The terminal 140 may be arranged on one side of the substrate 100. The terminal 140 may be exposed without being covered by the insulating layer, thereby being electrically connected to the printed circuit board PCB. The terminal PCB-P of the printed circuit board PCB may be electrically connected to the terminal 140 of the display panel 10. The printed circuit board PCB may transmit a signal or power of a controller (not shown) to the display panel 10. The control signal generated by the controller may be transmitted to the first scan driving circuit 110 and the second scan driving circuit 120 through the printed circuit board PCB. The controller may provide a first power supply voltage ELVDD and a second power supply voltage ELVSS to the first power line 160 and the second power line 170 through a first connection line 161 and a second connection line 171, respectively (see the circuit diagram to be described below). Figure 4A and Figure 4B ). The first power voltage ELVDD may be supplied to the pixel circuit configured to drive the main subpixel Pm and the auxiliary subpixel Pa through the driving voltage line PL connected to the first power line 160, and the second power voltage ELVSS may be supplied to the counter electrode of the organic light emitting diode OLED connected to the second power line 170.
[0081] The data driver circuit 150 may be electrically connected to the data line DL. The data signal of the data driver circuit 150 may be provided to the pixel circuit configured to drive the main sub-pixel Pm and the auxiliary sub-pixel Pa via the connection line 151 connected to the terminal 140 and the data line DL connected to the connection line 151. FIG3 shows that the data driver circuit 150 is arranged on the printed circuit board PCB. However, according to some example embodiments, the data driver circuit 150 may be arranged on the substrate 100. For example, the data driver circuit 150 may be arranged between the terminal 140 and the first power line 160.
[0082] The first power line 160 may include a first sub-line 162 and a second sub-line 163 extending in parallel along the x-direction, with the first display area DA1 located between the first sub-line 162 and the second sub-line 163. The second power line 170 may partially surround the first display area DA1 in a ring shape with one side open.
[0083] exist Figure 3A In FIG. 5 , the second display area DA2 is shown as being arranged on one side of the first display area DA1, but embodiments of the present disclosure are not limited thereto. For example, Figure 3B As shown in , the second display area DA2 may be set to an area corresponding to the components arranged in the second display area DA2. In this case, the second display area DA2 may be arranged inside the first display area DA1 and may be surrounded by the first display area DA1.
[0084] Figure 4A and Figure 4B is an equivalent circuit diagram of a pixel circuit PC that may be included in the display panel 10 according to some example embodiments.
[0085] Reference Figure 4A , the pixel circuit PC can be connected to the scan line SL, the data line DL, the drive voltage line PL, etc. The pixel circuit PC can be connected to the organic light emitting diode OLED as a display element and can drive the organic light emitting diode OLED. Therefore, the pixel circuit PC can implement each of the sub-pixels Pm and Pa.
[0086] The pixel circuit PC may include a driving thin film transistor T1, a switching thin film transistor T2, and a storage capacitor Cst. The switching thin film transistor T2 may be connected to a scan line SL and a data line DL and may be configured to transmit a data signal Dm input through the data line DL to the driving thin film transistor T1 according to a scan signal Sn input through the scan line SL.
[0087] The storage capacitor Cst may be connected to the switching thin film transistor T2 and the driving voltage line PL and may be configured to store a voltage corresponding to a difference between a voltage received from the switching thin film transistor T2 and a first power voltage ELVDD (or driving voltage) supplied to the driving voltage line PL.
[0088] The driving thin film transistor T1 may be connected to the driving voltage line PL and the storage capacitor Cst and may be configured to control a driving current flowing from the driving voltage line PL to the organic light emitting diode OLED according to a voltage value stored in the storage capacitor Cst. The organic light emitting diode OLED may emit light with a certain brightness according to the driving current.
[0089] Already referenced Figure 4AThe case where the pixel circuit PC includes two thin film transistors and one storage capacitor is described, but the embodiments according to the present disclosure are not limited thereto. Figure 4B As shown in , the pixel circuit PC may include seven thin film transistors and one storage capacitor.
[0090] Reference Figure 4B The pixel circuit PC may include a plurality of thin film transistors and a storage capacitor. The thin film transistors and the storage capacitor may be connected to the signal lines SL, SL-1, EL, and DL, the initialization voltage line VL, and the driving voltage line PL.
[0091] The thin film transistors may include a driving thin film transistor T1 , a switching thin film transistor T2 , a compensation thin film transistor T3 , a first initialization thin film transistor T4 , an operation control thin film transistor T5 , an emission control thin film transistor T6 , and a second initialization thin film transistor T7 .
[0092] The signal lines may include a scan line SL configured to transmit a scan signal Sn, a previous scan line SL-1 configured to transmit a previous scan signal Sn-1 to the first initialization thin film transistor T4 and the second initialization thin film transistor T7, an emission control line EL configured to transmit an emission control signal En to the operation control thin film transistor T5 and the emission control thin film transistor T6, and a data line DL intersecting the scan line SL and configured to transmit a data signal Dm. The driving voltage line PL may be configured to transmit a driving voltage ELVDD to the driving thin film transistor T1, and the initialization voltage line VL may be configured to transmit an initialization voltage Vint for initializing the driving thin film transistor T1 and the pixel electrode.
[0093] The driving gate electrode G1 of the driving thin film transistor T1 can be electrically connected to the first electrode Cst1 of the storage capacitor Cst. The driving source electrode S1 of the driving thin film transistor T1 can be electrically connected to the driving voltage line PL by operating the control thin film transistor T5. The driving drain electrode D1 of the driving thin film transistor T1 can be electrically connected to the pixel electrode of the organic light emitting diode OLED through the emission control thin film transistor T6. The driving thin film transistor T1 can receive the data signal Dm according to the switching operation of the switching thin film transistor T2 and supply the driving current I to the organic light emitting diode OLED. OLED .
[0094] The switching gate electrode G2 of the switching thin film transistor T2 can be electrically connected to the scan line SL. The switching source electrode S2 of the switching thin film transistor T2 can be electrically connected to the data line DL. The switching drain electrode D2 of the switching thin film transistor T2 can be electrically connected to the driving source electrode S1 of the driving thin film transistor T1, and is electrically connected to the driving voltage line PL through the operation control thin film transistor T5. The switching thin film transistor T2 can be turned on in response to the scan signal Sn received via the scan line SL and can perform a switching operation to transmit the data signal Dm received via the data line DL to the driving source electrode S1 of the driving thin film transistor T1.
[0095] The compensation gate electrode G3 of the compensation thin film transistor T3 can be electrically connected to the scan line SL. The compensation source electrode S3 of the compensation thin film transistor T3 can be electrically connected to the drive drain electrode D1 of the drive thin film transistor T1 and electrically connected to the pixel electrode of the organic light emitting diode OLED through the emission control thin film transistor T6. The compensation drain electrode D3 of the compensation thin film transistor T3 can be electrically connected to the first electrode Cst1 of the storage capacitor Cst, the first initialization drain electrode D4 of the first initialization thin film transistor T4, and the drive gate electrode G1 of the drive thin film transistor T1. The compensation thin film transistor T3 can be turned on in response to the scan signal Sn received through the scan line SL and electrically connect the drive gate electrode G1 of the drive thin film transistor T1 to the drive drain electrode D1 of the drive thin film transistor T1, thereby diode-connecting the drive thin film transistor T1.
[0096] The first initialization gate electrode G4 of the first initialization thin film transistor T4 can be electrically connected to the previous scan line SL-1. The first initialization source electrode S4 of the first initialization thin film transistor T4 can be electrically connected to the second initialization drain electrode D7 of the second initialization thin film transistor T7 and the initialization voltage line VL. The first initialization drain electrode D4 of the first initialization thin film transistor T4 can be electrically connected to the first electrode Cst1 of the storage capacitor Cst, the compensation drain electrode D3 of the compensation thin film transistor T3, and the drive gate electrode G1 of the drive thin film transistor T1. The first initialization thin film transistor T4 can be turned on in response to the previous scan signal Sn-1 received through the previous scan line SL-1 and perform an initialization operation of transmitting the initialization voltage Vint to the drive gate electrode G1 of the drive thin film transistor T1, thereby initializing the voltage of the drive gate electrode G1 of the drive thin film transistor T1.
[0097] The operation control gate electrode G5 of the operation control thin film transistor T5 can be electrically connected to the emission control line EL. The operation control source electrode S5 of the operation control thin film transistor T5 can be electrically connected to the driving voltage line PL. The operation control drain electrode D5 of the operation control thin film transistor T5 can be electrically connected to the driving source electrode S1 of the driving thin film transistor T1 and the switching drain electrode D2 of the switching thin film transistor T2.
[0098] The emission control gate electrode G6 of the emission control thin film transistor T6 can be electrically connected to the emission control line EL. The emission control source electrode S6 of the emission control thin film transistor T6 can be electrically connected to the driving drain electrode D1 of the driving thin film transistor T1 and the compensation source electrode S3 of the compensation thin film transistor T3. The emission control drain electrode D6 of the emission control thin film transistor T6 can be electrically connected to the second initialization source electrode S7 of the second initialization thin film transistor T7 and the pixel electrode of the organic light emitting diode OLED.
[0099] The operation control thin film transistor T5 and the emission control thin film transistor T6 can be turned on at the same time according to the emission control signal En received through the emission control line EL, and transmit the driving voltage ELVDD to the organic light emitting diode OLED so that the driving current I OLED Flow through the organic light-emitting diode OLED.
[0100] A second initialization gate electrode G7 of the second initialization thin film transistor T7 can be electrically connected to the previous scan line SL-1. A second initialization source electrode S7 of the second initialization thin film transistor T7 can be electrically connected to the emission control drain electrode D6 of the emission control thin film transistor T6 and the pixel electrode of the organic light emitting diode OLED. A second initialization drain electrode D7 of the second initialization thin film transistor T7 can be electrically connected to the first initialization source electrode S4 of the first initialization thin film transistor T4 and the initialization voltage line VL. The second initialization thin film transistor T7 can be turned on according to the previous scan signal Sn-1 received through the previous scan line SL-1 and initialize the pixel electrode of the organic light emitting diode OLED.
[0101] Figure 4B A case is shown in which the first initialization thin film transistor T4 and the second initialization thin film transistor T7 are electrically connected to the previous scan line SL-1, but the embodiment is not limited thereto. According to some example embodiments, the first initialization thin film transistor T4 may be electrically connected to the previous scan line SL-1 and may be driven according to the previous scan signal Sn-1, while the second initialization thin film transistor T7 may be electrically connected to a separate signal line (e.g., the next scan line) and may be driven according to a signal received through the signal line.
[0102] The second electrode Cst2 of the storage capacitor Cst can be electrically connected to the driving voltage line PL, and the counter electrode of the organic light emitting diode OLED can be electrically connected to the second power supply voltage ELVSS. Therefore, the organic light emitting diode OLED can receive the driving current I from the driving thin film transistor T1. OLED and emits light to display images.
[0103] Each of the compensation thin film transistor T3 and the first initialization thin film transistor T4 is Figure 4B 1 is shown as having dual gate electrodes, but each of the compensation thin film transistor T3 and the first initialization thin film transistor T4 may have a single gate electrode.
[0104] According to some example embodiments, the main sub-pixel Pm and the auxiliary sub-pixel Pa may be implemented by the same pixel circuit PC. However, the embodiments of the present disclosure are not limited thereto. The main sub-pixel Pm and the auxiliary sub-pixel Pa may be implemented by pixel circuits PC having different structures. For example, Figure 4B The pixel circuit can be used as a pixel circuit for driving the main sub-pixel Pm, and Figure 4A The pixel circuit can be used as a pixel circuit for driving the auxiliary sub-pixel Pa.
[0105] Figure 5 is a schematic layout diagram showing the arrangement of sub-pixels arranged in the first display area DA1 and the second display area DA2 and the transmissive portion TA arranged in the second display area DA2, and Figure 6 It is along Figure 5 Cross-sectional views taken along lines II' and II-II'.
[0106] Reference Figure 5 In the display device 1 according to some example embodiments, the first to third main sub-pixels Pm1, Pm2, and Pm3 may be arranged in the first display area DA1, and the first to third auxiliary sub-pixels Pa1, Pa2, and Pa3 and the transmissive portion TA may be arranged in the second display area DA2.
[0107] According to some example embodiments, the first to third auxiliary subpixels Pa1, Pa2, and Pa3 arranged in the second display area DA2 may be arranged in a pixel arrangement structure arranged in two rows between the transmissive portion TA. As described above, the term "subpixel" as used herein refers to an emission area that is the smallest unit for realizing an image. When an organic light-emitting diode is used as a display element, the emission area may be defined by an opening in a pixel-defining layer, which will be described in more detail below.
[0108] like Figure 5 As shown in FIG, the primary sub-pixels Pm1, Pm2, and Pm3 arranged in the first display area DA1 can be arranged in a pentile structure. The first primary sub-pixel Pm1, the second primary sub-pixel Pm2, and the third primary sub-pixel Pm3 can realize different colors. For example, the first primary sub-pixel Pm1, the second primary sub-pixel Pm2, and the third primary sub-pixel Pm3 can realize red, green, and blue, respectively.
[0109] A plurality of first main sub-pixels Pm1 and a plurality of third main sub-pixels Pm3 may be alternately arranged in a first row 1N. A plurality of second main sub-pixels Pm2 may be spaced apart from each other at certain intervals in an adjacent second row 2N. The third main sub-pixels Pm3 and the first main sub-pixels Pm1 may be alternately arranged in an adjacent third row 3N. The second main sub-pixels Pm2 may be spaced apart from each other at certain intervals in an adjacent fourth row 4N. This pixel arrangement may be repeated up to the Nth row. The sizes of the third main sub-pixels Pm3 and the first main sub-pixels Pm1 may be larger than the sizes of the second main sub-pixels Pm2.
[0110] In this case, the first master sub-pixel Pm1 and the third master sub-pixel Pm3 arranged in the first row 1N and the second master sub-pixel Pm2 arranged in the second row 2N can be arranged alternately. Therefore, the first master sub-pixel Pm1 and the third master sub-pixel Pm3 can be alternately arranged in the first column 1M. The second master sub-pixel Pm2 can be separated from each other at a certain interval in the second column 2M. The third master sub-pixel Pm3 and the first master sub-pixel Pm1 can be alternately arranged in the third column 3M. The second master sub-pixel Pm2 can be separated from each other at a certain interval in the fourth column 4M. Such pixel arrangement can be repeated until the Mth column.
[0111] The pixel arrangement structure can be expressed differently as follows: the first main sub-pixel Pm1 is arranged at the first and third vertices facing each other among the vertices of a virtual parallelogram VS with the center point of the second main sub-pixel Pm2 as the center point of the parallelogram (e.g., a rectangle), and the third main sub-pixel Pm3 is arranged at the second and fourth vertices as the other vertices. In this case, the virtual parallelogram VS can be modified into various forms such as a rectangle, a rhombus, and a square.
[0112] Such a pixel arrangement structure is called a pentile matrix structure or a pentile structure, and can achieve high resolution with a small number of pixels by applying a rendering driver that expresses colors by sharing adjacent pixels.
[0113] The auxiliary sub-pixels Pa1, Pa2, and Pa3 arranged in the second display area DA2 may be based on a pentile structure and arranged in a pixel arrangement structure arranged in two rows between the transmissive portions TA along the y direction.
[0114] The first auxiliary subpixel Pa1, the second auxiliary subpixel Pa2, and the third auxiliary subpixel Pa3 can realize different colors. For example, the first auxiliary subpixel Pa1, the second auxiliary subpixel Pa2, and the third auxiliary subpixel Pa3 can realize red, green, and blue, respectively.
[0115] The first auxiliary subpixel Pa1 and the third auxiliary subpixel Pa3 may be alternately arranged in the first row 1N, and the second auxiliary subpixel Pa2 may be separated from each other at a certain interval in the adjacent second row 2N. Next, the transmissive portion TA may be arranged corresponding to the adjacent third row 3N and fourth row 4N. This pixel arrangement may be repeated until the N'th row.
[0116] In this case, the first auxiliary subpixel Pa1 and the third auxiliary subpixel Pa3 arranged in the first row 1N and the second auxiliary subpixel Pa2 arranged in the second row 2N may be arranged alternately. Thus, the first auxiliary subpixel Pa1 and the third auxiliary subpixel Pa3 may be arranged alternately in the first column 1I. The second auxiliary subpixel Pa2 may be spaced apart at intervals in the second column 2I. The third auxiliary subpixel Pa3 and the first auxiliary subpixel Pa1 may be arranged alternately in the third column 3I. Subsequently, no auxiliary subpixel may be arranged in the adjacent fourth column 4I. This pixel arrangement may be repeated until the first column.
[0117] Compared to the basic pentile structure in the first display area DA1, this pixel arrangement has no subpixels in the third row 3N and the fourth row 4N, and no subpixels in the fourth column 4I. Therefore, in the basic pentile structure, only three subpixels can be arranged in the area of the second display area DA2 where eight subpixels are permitted. This pixel arrangement is called a 3 / 8 pentile structure.
[0118] Such a pixel arrangement structure is represented differently as follows: the first auxiliary subpixel Pa1, the second auxiliary subpixel Pa2, and the third auxiliary subpixel Pa3 are arranged at the vertices of a virtual triangle VT. The first auxiliary subpixel Pa1, the second auxiliary subpixel Pa2, and the third auxiliary subpixel Pa3 may form a single pixel group Pg. That is, the subpixels included in the single pixel group Pg may be arranged in two rows in the y direction and in three columns along the x direction.
[0119] The transmission part TA is an area in which no display element is arranged and therefore has a high light transmittance. A plurality of transmission parts TA may be provided in the second display area DA2. The transmission parts TA may be arranged alternately with the pixel groups Pg along the y direction. The transmission parts TA may be provided in various shapes such as polygons, octagons, ellipses, and circles. When the transmission part TA is provided to be close to a circle, the diffraction characteristics of light may be improved. Therefore, when the component provided in the second display area DA2 is an image sensor or a camera, the transmission part TA may be provided to be close to a circle. The shape of the transmission part TA may be determined to be provided on the lower electrode layer BSM (see FIG. Figure 2 ) in the lower hole BSMH (see Figure 6 ) shape.
[0120] In the second display area DA2, an arrangement of basic units U in which a certain number of pixel groups Pg and a certain number of transmission parts TA are bundled may be repeatedly arranged along the x-direction and the y-direction.
[0121] exist Figure 5 In the example, a basic unit U may have a rectangular shape in which four pixel groups Pg and eight transmissive portions TA arranged around the four pixel groups Pg are bundled. The basic unit U represents a division of a repeating shape, not a break in the structure. According to some example embodiments, the pixel groups Pg may be arranged continuously along the x-direction. However, embodiments are not limited thereto. The pixel groups Pg and transmissive portions TA may be arranged in various arrangements within the basic unit U.
[0122] A corresponding unit U', which is provided with the same area as that of the basic unit U, may be set in the first display area DA1. In this case, the number of the main sub-pixels Pm1, Pm2, and Pm3 included in the corresponding unit U' may be greater than the number of the auxiliary sub-pixels Pa1, Pa2, and Pa3 included in the basic unit U. That is, the number of the auxiliary sub-pixels Pa1, Pa2, and Pa3 included in the basic unit U is 12, while the number of the main sub-pixels Pm1, Pm2, and Pm3 included in the corresponding unit U' is 32. Therefore, the number of the auxiliary sub-pixels Pa1, Pa2, and Pa3 per basic unit and the number of the main sub-pixels Pm1, Pm2, and Pm3 may be provided in a ratio of 3:8.
[0123] According to some example embodiments, Figure 5 As shown in FIG, the auxiliary sub-pixels Pa1, Pa2, and Pa3 have a pixel arrangement structure arranged in two rows between the transmissive portions TA arranged along the y direction. The size of each of the auxiliary sub-pixels Pa1, Pa2, and Pa3 can be designed to be larger than the size of each of the main sub-pixels Pm1, Pm2, and Pm3 representing the same color.
[0124] The first, second, and third auxiliary subpixels Pa1, Pa2, and Pa3 exhibit different colors. Therefore, to form the first, second, and third auxiliary subpixels Pa1, Pa2, and Pa3, a fine metal mask may be used to deposit the emission layer. In this case, to ensure process reliability, the first, second, and third auxiliary subpixels Pa1, Pa2, and Pa3 may be arranged with specific gaps g1 and g2 between them.
[0125] According to some example embodiments, the transmissive portion TA may be disposed above and below the pixel group Pg including the first auxiliary subpixel Pa1, the second auxiliary subpixel Pa2, and the third auxiliary subpixel Pa3. Only the size of each emission area may be expanded in the +y direction or the -y direction without changing the gaps between the auxiliary subpixels Pa1, Pa2, and Pa3.
[0126] For example, Figure 5 As shown in the enlarged view of , the first auxiliary sub-pixel Pa1 and the third auxiliary sub-pixel Pa3 can be expanded in the +y direction, and the second auxiliary sub-pixel Pa2 can be expanded in the -y direction. Figure 5 In the enlarged view of FIG, a dotted line indicated in each of the auxiliary sub-pixels Pa1, Pa2, and Pa3 represents the size of each of the main sub-pixels Pm1, Pm2, and Pm3.
[0127] When the auxiliary sub-pixels Pa1, Pa2, Pa3 included in the pixel group Pg are arranged in three or more rows, in order to expand the sizes of the auxiliary sub-pixels Pa1, Pa2, and Pa3, since the gaps g1 and g2 between the auxiliary sub-pixels Pa1, Pa2, and Pa3 should be maintained, the gaps between the rows will be further apart, and therefore, the entire pixel arrangement will be misaligned and a sufficient area of the transmission portion TA cannot be ensured.
[0128] According to some example embodiments, the auxiliary sub-pixels Pa1, Pa2, and Pa3 included in the pixel group Pg are arranged in two rows. Even when the sizes of the auxiliary sub-pixels Pa1, Pa2, and Pa3 are partially expanded, the auxiliary sub-pixels Pa1, Pa2, and Pa3 may be arranged in the same row as the main sub-pixels arranged in the first display area DA1. Even when the sizes of the auxiliary sub-pixels Pa1, Pa2, and Pa3 are increased, the reduction in the area of the transmissive portion TA may be minimized or reduced.
[0129] According to some example embodiments, a size of at least one of the auxiliary sub-pixels Pa1, Pa2, and Pa3 may be larger than a size of the main sub-pixels Pm1, Pm2, and / or Pm3 realizing the same color.
[0130] In the case where the auxiliary sub-pixels Pa1, Pa2, and Pa3 have the same size as the main sub-pixels Pm1, Pm2, and Pm3, when the same current is applied to the auxiliary sub-pixels Pa1, Pa2, and Pa3 and the main sub-pixels Pm1, Pm2, and Pm3, the brightness of the second display area DA2 may be reduced as a whole. When more current is applied to the auxiliary sub-pixels Pa1, Pa2, and Pa3 to compensate for the brightness of the second display area DA2, the auxiliary sub-pixels Pa1, Pa2, and Pa3 may be easily degraded.
[0131] According to some example embodiments, degradation of the auxiliary subpixels Pa1, Pa2, and Pa3 can be prevented or reduced and brightness can be improved by adopting a pixel arrangement structure in which emission areas of the auxiliary subpixels Pa1, Pa2, and Pa3 are provided in a large size in the second display area DA2.
[0132] Furthermore, according to some example embodiments, three auxiliary sub-pixels Pa1, Pa2, and Pa3 included in a single pixel group Pg may be distributed between the transmissive portions TA, thereby improving visibility, which will be described in more detail below.
[0133] Figure 6 It is along Figure 5 The cross-sectional view taken along the lines II' and II-II'. Figure 6 According to some example embodiments, the display device 1 may include a first display area DA1 and a second display area DA2. The third main subpixel Pm3 may be arranged in the first display area DA1, and the third auxiliary subpixel Pa3 and the transmissive portion TA may be arranged in the second display area DA2. In this case, the third main subpixel Pm3 and the third auxiliary subpixel Pa3 may be subpixels representing the same color. According to some example embodiments, the third main subpixel Pm3 and the third auxiliary subpixel Pa3 may realize a blue color.
[0134] The main subpixel Pm may include a first thin film transistor TFT, a main storage capacitor Cst, and a main organic light emitting diode OLED. The auxiliary subpixel Pa may include a second thin film transistor TFT', an auxiliary storage capacitor Cst', and an auxiliary organic light emitting diode OLED'. The transmissive portion TA may include an opening area TAH corresponding to the transmissive portion TA.
[0135] The component 20 may be arranged in the second display area DA2 (e.g., below the substrate 100 in the second display area DA2). The component 20 may be an image sensor, a camera configured to capture images, or an infrared sensor configured to transmit and receive infrared (IR) light. Since the transmissive portion TA is arranged in the second display area DA2, the second display area DA2 may transmit light transmitted to and received from the component 20. For example, light emitted from the component 20 may travel along the z-direction through the transmissive portion TA, and light generated from outside the display device 1 may travel along the -z-direction through the transmissive portion TA and be incident on the component 20. In some embodiments, the component 20 may include a plurality of image sensors, such that one image sensor is arranged to correspond to one transmissive portion TA.
[0136] Hereinafter, a structure of a stack of elements included in the display device 1 according to the embodiment will be described.
[0137] The substrate 100 may include glass or a polymer resin. The polymer resin may include polyethersulfone (PES), polyacrylate (PA), polyetherimide (PEI), polyethylene naphthalate (PEN), polyethylene terephthalate (PET), polyphenylene sulfide (PPS), polyarylate (PAR), polyimide (PI), polycarbonate (PC), or cellulose acetate propionate (CAP). The substrate 100 including the polymer resin may have flexible, rollable, or bendable properties. The substrate 100 may have a multilayer structure including an inorganic layer and a layer including the above-mentioned polymer resin.
[0138] The buffer layer 111 may be disposed on the substrate 100. The buffer layer 111 may reduce or block penetration of foreign matter, moisture, or external air from the bottom of the substrate 100, and may provide a flat surface on the substrate 100. The buffer layer 111 may include an inorganic material such as an oxide or a nitride, an organic material, or an organic / inorganic composite, and may have a single-layer structure or a multilayer structure of an inorganic material and an organic material. A barrier layer configured to block penetration of external air may also be included between the substrate 100 and the buffer layer 111. According to some example embodiments, the buffer layer 111 may include silicon oxide (SiO2) or silicon nitride (SiN x ). The buffer layer 111 may have a structure in which a first buffer layer 111 a and a second buffer layer 111 b are stacked.
[0139] The lower electrode layer BSM may be disposed between the first buffer layer 111a and the second buffer layer 111b in the second display area DA2. According to some example embodiments, the lower electrode layer BSM may also be disposed between the substrate 100 and the first buffer layer 111a. The lower electrode layer BSM may be disposed below the second thin film transistor TFT' to prevent the characteristics of the second thin film transistor TFT' from being degraded due to light emitted from the assembly 20, etc.
[0140] In addition, the lower electrode layer BSM can be connected to the line GCL arranged on another layer through a contact hole. The lower electrode layer BSM can receive a constant voltage or signal from the line GCL. For example, the lower electrode layer BSM can receive a driving voltage ELVDD or a scan signal. Because the lower electrode layer BSM receives a constant voltage or signal, the possibility of generating electrostatic discharge can be significantly reduced. The lower electrode layer BSM may include aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), lithium (Li), calcium (Ca), molybdenum (Mo), titanium (Ti), tungsten (W) and / or copper (Cu). The lower electrode layer BSM may be a single layer or a multilayer including the above materials.
[0141] According to some example embodiments, the lower electrode layer BSM may be provided to correspond to the entire second display area DA2. In this case, the lower electrode layer BSM may include a lower hole BSMH corresponding to the transmissive portion TA. According to some example embodiments, the shape and size of the transmissive portion TA may be determined by the shape and size of the lower hole BSMH. That is, the width Wb of the lower hole BSMH may be consistent with the width of the transmissive portion TA. According to some example embodiments, considering the diffraction characteristics of light, the lower hole BSMH may be provided in a circular shape.
[0142] A first thin-film transistor TFT and a second thin-film transistor TFT' may be disposed on the buffer layer 111. The first thin-film transistor TFT1 may include a first semiconductor layer A1, a first gate electrode G1, a first source electrode S1, and a first drain electrode D1. The second thin-film transistor TFT' may include a second semiconductor layer A2, a second gate electrode G2, a second source electrode S2, and a second drain electrode D2. The first thin-film transistor TFT may be electrically connected to the main organic light-emitting diode OLED in the first display area DA1 to drive the main organic light-emitting diode OLED. The second thin-film transistor TFT' may be electrically connected to the auxiliary organic light-emitting diode OLED' in the second display area DA2 to drive the auxiliary organic light-emitting diode OLED'.
[0143] The first semiconductor layer A1 and the second semiconductor layer A2 may be arranged on the buffer layer 111 and may include polycrystalline silicon. According to some example embodiments, the first semiconductor layer A1 and the second semiconductor layer A2 may include amorphous silicon. According to some example embodiments, the first semiconductor layer A1 and the second semiconductor layer A2 may each include an oxide of at least one selected from indium (In), gallium (Ga), tin (Sn), zirconium (Zr), vanadium (V), hafnium (Hf), cadmium (Cd), germanium (Ge), chromium (Cr), titanium (Ti), and zinc (Zn). The first semiconductor layer A1 and the second semiconductor layer A2 may each include a channel region and a source region and a drain region doped with impurities.
[0144] The second semiconductor layer A2 may overlap the bottom electrode layer BSM with the second buffer layer 111b therebetween. According to some example embodiments, the width of the second semiconductor layer A2 may be smaller than the width of the bottom electrode layer BSM. Therefore, when projected in a direction perpendicular to the substrate 100, the second semiconductor layer A2 may overlap the bottom electrode layer BSM as a whole.
[0145] The first gate insulating layer 112 may be provided to cover the first semiconductor layer A1 and the second semiconductor layer A2. The first gate insulating layer 112 may include an inorganic insulating material such as silicon oxide (SiO2), silicon nitride (SiN x), silicon oxynitride (SiON), aluminum oxide (Al2O3), titanium oxide (TiO2), tantalum oxide (Ta2O5), hafnium oxide (HfO2) or zinc oxide (ZnO2). The first gate insulating layer 112 may be a single layer or multiple layers including the above inorganic insulating materials.
[0146] The first gate electrode G1 and the second gate electrode G2 may be arranged on the first gate insulating layer 112 to overlap the first semiconductor layer A1 and the second semiconductor layer A2, respectively. The first gate electrode G1 and the second gate electrode G2 may each include molybdenum (Mo), aluminum (Al), copper (Cu), titanium (Ti), or the like, and may be a single layer or multiple layers. For example, the first gate electrode G1 and the second gate electrode G2 may each be a single layer of Mo.
[0147] The second gate insulating layer 113 may be provided to cover the first gate electrode G1 and the second gate electrode G2. The second gate insulating layer 113 may include an inorganic insulating material such as silicon oxide (SiO2), silicon nitride (SiN x ), silicon oxynitride (SiON), aluminum oxide (Al2O3), titanium oxide (TiO2), tantalum oxide (Ta2O5), hafnium oxide (HfO2) or zinc oxide (ZnO2). The second gate insulating layer 113 may be a single layer or multiple layers including the above inorganic insulating materials.
[0148] A first upper electrode CE2 of the main storage capacitor Cst and a second upper electrode CE2 ′ of the auxiliary storage capacitor Cst′ may be disposed on the second gate insulating layer 113 .
[0149] In the first display area DA1, the first upper electrode CE2 may overlap the first gate electrode G1 therebelow. The first gate electrode G1 and the first upper electrode CE2, overlapping each other with the second gate insulating layer 113 therebetween, may constitute a main storage capacitor Cst. The first gate electrode G1 may be a first lower electrode CE1 of the main storage capacitor Cst.
[0150] In the second display area DA2, the second upper electrode CE2' may overlap the second gate electrode G2 thereunder. The second gate electrode G2 and the second upper electrode CE2', overlapping each other with the second gate insulating layer 113 therebetween, may constitute an auxiliary storage capacitor Cst'. The second gate electrode G2 may be the second lower electrode CE1' of the auxiliary storage capacitor Cst'.
[0151] The first upper electrode CE2 and the second upper electrode CE2' may include aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), lithium (Li), calcium (Ca), molybdenum (Mo), titanium (Ti), tungsten (W) and / or copper (Cu), and may be a single layer or a multilayer including the above materials.
[0152] The interlayer insulating layer 115 may cover the first upper electrode CE2 and the second upper electrode CE2'. The interlayer insulating layer 115 may include silicon oxide (SiO2), silicon nitride (SiN x ), silicon oxynitride (SiON), aluminum oxide (Al2O3), titanium oxide (TiO2), tantalum oxide (Ta2O5), hafnium oxide (HfO2) or zinc oxide (ZnO2).
[0153] When the first gate insulating layer 112, the second gate insulating layer 113, and the interlayer insulating layer 115 are collectively referred to as the inorganic insulating layer IL, the structure in which the inorganic insulating layer IL is stacked on the substrate 100 may have a transmittance of about 90% or more with respect to infrared wavelengths. For example, light having a wavelength of about 900 nm to about 1100 nm passing through the substrate 100 and the inorganic insulating layer IL may have a transmittance of about 90%.
[0154] The source electrodes S1 and S2 and the drain electrodes D1 and D2 may be disposed on the interlayer insulating layer 115. The source electrodes S1 and S2 and the drain electrodes D1 and D2 may each include a conductive material including molybdenum (Mo), aluminum (Al), copper (Cu), titanium (Ti), or the like, and may each be a single layer or a multilayer including the above materials. For example, the source electrodes S1 and S2 and the drain electrodes D1 and D2 may each have a multilayer structure of Ti / Al / Ti.
[0155] The planarization layer 117 may be disposed to cover the source electrodes S1 and S2 and the drain electrodes D1 and D2. The planarization layer 117 may have a flat upper surface so that the first and second pixel electrodes 221 and 221' to be disposed thereon are flatly formed.
[0156] The planarization layer 117 may be a single layer or multiple layers of a film including an organic material. The planarization layer 117 may include a general polymer (e.g., benzocyclobutene (BCB), polyimide, hexamethyldisiloxane (HMDSO), polymethyl methacrylate (PMMA), or polystyrene (PS)), a polymer derivative having a phenolic group, an acrylic polymer, an imide polymer, an aromatic ether polymer, an amide polymer, a fluorine polymer, a paraxylene polymer, a vinyl alcohol polymer, and any blend thereof.
[0157] The planarization layer 117 may include an opening exposing one of the first source electrode S1 and the first drain electrode D1 of the first thin film transistor TFT, and the first pixel electrode 221 may be electrically connected to the first thin film transistor TFT by contacting the first source electrode S1 or the first drain electrode D1 through the opening.
[0158] In addition, the planarization layer 117 may include an opening exposing one of the second source electrode S2 and the second drain electrode D2 of the second thin film transistor TFT′, and the second pixel electrode 221′ may be electrically connected to the second thin film transistor TFT′ by contacting the second source electrode S2 or the second drain electrode D2 through the opening.
[0159] The first pixel electrode 221 and the second pixel electrode 221' may each include a conductive oxide such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In2O3), indium gallium oxide (IGO), or aluminum zinc oxide (AZO). According to some example embodiments, the first pixel electrode 221 and the second pixel electrode 221' may each include a reflective film containing silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), or any combination thereof. According to some example embodiments, the first pixel electrode 221 and the second pixel electrode 221' may also each include a film containing ITO, IZO, ZnO, or In2O3 above and / or below the reflective film. In some embodiments, the first pixel electrode 221 and the second pixel electrode 221' may each have a stacked structure of ITO / Ag / ITO.
[0160] The pixel defining layer 119 may cover the edges of the first pixel electrode 221 and the second pixel electrode 221'. The pixel defining layer 119 may overlap the first pixel electrode 221 and the second pixel electrode 221' and may include a first opening OP1 and a second opening OP2 that define the emission area of the sub-pixel. The pixel defining layer 119 increases the distance between the edges of the first pixel electrode 221 and the second pixel electrode 221' and the counter electrode 223 located above the first pixel electrode 221 and the second pixel electrode 221', thereby preventing arcing, etc. from occurring at the edges of the first pixel electrode 221 and the second pixel electrode 221'. The pixel defining layer 119 may include at least one organic insulating material such as polyimide, polyamide, acrylic resin, benzocyclobutene, hexamethyldisiloxane (HMDSO) and phenolic resin, and may be formed by spin coating, etc.
[0161] When the planarization layer 117 and the pixel defining layer 119 are referred to as an organic insulating layer OL, the organic insulating layer OL may have a transmittance of about 90% or more with respect to infrared wavelengths. For example, light having a wavelength of about 900 nm to about 1100 nm passing through the organic insulating layer OL may have a transmittance of about 90%.
[0162] In the first opening OP1 and the second opening OP2 of the pixel defining layer 119, the first emission layer 222b and the second emission layer 222b' can be provided to correspond to the first pixel electrode 221 and the second pixel electrode 221', respectively. The first emission layer 222b and the second emission layer 222b' can each include a high molecular weight material or a low molecular weight material and can emit red light, green light, blue light, or white light.
[0163] The organic functional layer 222e may be disposed above and / or below the first emission layer 222b and the second emission layer 222b'. The organic functional layer 222e may include the first functional layer 222a and / or the second functional layer 222c. The first functional layer 222a or the second functional layer 222c may be omitted.
[0164] The first functional layer 222a may be arranged below the first emission layer 222b and the second emission layer 222b'. The first functional layer 222a may be a single layer or multiple layers including an organic material. The first functional layer 222a may be a hole transport layer (HTL) having a single layer structure. Alternatively, the first functional layer 222a may include a hole injection layer (HIL) and the HTL. The first functional layer 222a may be formed integrally to correspond to the main sub-pixel Pm and the auxiliary sub-pixel Pa included in the first display area DA1 and the second display area DA2. Therefore, a portion of the first functional layer 222a may be arranged to correspond to the transmission portion TA.
[0165] The second functional layer 222c may be disposed on the first emission layer 222b and the second emission layer 222b'. The second functional layer 222c may be a single layer or multiple layers including an organic material. The second functional layer 222 may include an electron transport layer (ETL) and / or an electron injection layer (EIL). The second functional layer 222c may be integrally formed to correspond to the main sub-pixel Pm and the auxiliary sub-pixel Pa included in the first display area DA1 and the second display area DA2. Therefore, a portion of the second functional layer 222c may be arranged to correspond to the transmissive portion TA.
[0166] The counter electrode 223 may be arranged on the second functional layer 222c. The counter electrode 223 may include a conductive material having a low work function. For example, the counter electrode 223 may include a (semi) transparent layer containing silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), lithium (Li), calcium (Ca) or any alloy thereof. Optionally, the counter electrode 223 may also include a layer such as ITO, IZO, ZnO or In2O3 located on the (semi) transparent layer containing the above materials. The counter electrode 223 may be formed integrally to correspond to the main sub-pixel Pm and the auxiliary sub-pixel Pa included in the first display area DA1 and the second display area DA2.
[0167] The layers formed from the first pixel electrode 221 to the opposite electrode 223 in the first display area DA1 may constitute a main organic light emitting diode OLED, and the layers formed from the second pixel electrode 221' to the opposite electrode 223 in the second display area DA2 may constitute an auxiliary organic light emitting diode OLED'.
[0168] An upper layer 250 comprising an organic material may be disposed on the counter electrode 223. The upper layer 250 may be a layer configured to protect the counter electrode 223 and increase light extraction efficiency. The upper layer 250 may include an organic material having a refractive index higher than that of the counter electrode 223. Alternatively, the upper layer 250 may be provided by stacking layers having different refractive indices. For example, the upper layer 250 may be provided by stacking a high refractive index layer and a low refractive index layer and a high refractive index layer. In this case, the refractive index of the high refractive index layer may be approximately 1.7 or greater, and the refractive index of the low refractive index layer may be approximately 1.3 or less.
[0169] The upper layer 250 may further include LiF. Alternatively, the upper layer 250 may further include silicon oxide (SiO2) or silicon nitride (SiN x ) of inorganic insulating materials.
[0170] According to some example embodiments, the first functional layer 222a, the second functional layer 222c, the opposing electrode 223, and the upper layer 250 may each include an opening area TAH corresponding to the transmission portion TA. That is, the first functional layer 222a, the second functional layer 222c, the opposing electrode 223, and the upper layer 250 may each include an opening corresponding to the transmission portion TA.
[0171] The openings of the first functional layer 222a, the second functional layer 222c, the counter electrode 223, and the upper layer 250 can be formed by direct laser irradiation or laser lift-off using a sacrificial layer. Therefore, the widths of the openings forming the opening area TAH can be substantially equal to each other. For example, the width Wt of the opening of the counter electrode 223 can be substantially equal to the width Wt of the opening area TAH.
[0172] When the size of the transmission portion TA is determined by the lower hole BSMH of the lower electrode layer BSM, the width Wb of the lower hole BSMH may be less than or equal to the width Wt of the opening area TAH.
[0173] The opening area TAH corresponds to the transmission part TA, which may mean that the opening area TAH overlaps the transmission part TA. In this case, the area of the opening area TAH may be smaller than the area of the first hole H1 formed in the inorganic insulating layer IL. For this reason, the width Wt of the opening area TAH is Figure 6 The area of the opening area TAH and the area of the first hole H1 may be defined as the area of the opening having the smallest area when compared with other holes (eg, H2 and H3) at the opening area TAH.
[0174] According to some example embodiments, the first functional layer 222a, the second functional layer 222c, the counter electrode 223, and the upper layer 250 may be arranged on side surfaces of the first hole H1, the second hole H2, and the third hole H3. In some embodiments, the slope of the side surfaces of the first hole H1, the second hole H2, and the third hole H3 relative to the upper surface of the substrate 100 may be gentler than the slope of the side surface of the open area TAH relative to the upper surface of the substrate 100.
[0175] Since the formation of the open area TAH means that members such as the opposing electrode 223 are removed from the transmission portion TA, the light transmittance of the transmission portion TA may be significantly increased.
[0176] The main organic light emitting diode OLED and the auxiliary organic light emitting diode OLED′ may be sealed by a thin film encapsulation layer 300. The thin film encapsulation layer 300 may be disposed on the upper layer 250. The thin film encapsulation layer 300 may prevent or reduce the penetration of external moisture or foreign matter or contaminants into the main organic light emitting diode OLED and the auxiliary organic light emitting diode OLED′.
[0177] The thin film encapsulation layer 300 may include at least one inorganic encapsulation layer and at least one organic encapsulation layer. In this regard, Figure 6 The thin film encapsulation layer 300 is shown having a structure in which a first inorganic encapsulation layer 310, an organic encapsulation layer 320, and a second inorganic encapsulation layer 330 are stacked. According to some example embodiments, the number of organic encapsulation layers, the number of inorganic encapsulation layers, and a stacking order may vary.
[0178] The first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 may each include one or more inorganic insulating materials such as aluminum oxide, titanium oxide, tantalum oxide, hafnium oxide, zinc oxide, silicon oxide, silicon nitride, or silicon oxynitride, and may be formed by chemical vapor deposition (CVD), etc. The organic encapsulation layer 320 may include a polymer material. The polymer material may include silicone resin, acrylic resin, epoxy resin, polyimide, polyethylene, etc.
[0179] The first inorganic encapsulating layer 310, the organic encapsulating layer 320, and the second inorganic encapsulating layer 330 may be integrally formed to cover the first display area DA1 and the second display area DA2. Therefore, the first inorganic encapsulating layer 310, the organic encapsulating layer 320, and the second inorganic encapsulating layer 330 may be arranged in the opening area TAH.
[0180] According to some example embodiments, the organic encapsulation layer 320 may be integrally formed to cover the first display area DA1 and the second display area DA2, but may not be present in the transmissive portion TA. In other words, the organic encapsulation layer 320 may include an opening corresponding to the transmissive portion TA. In this case, the first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 may contact each other in the opening area TAH.
[0181] According to some example embodiments, the size of the second opening OP2 defining the emission area EA2 of the third auxiliary subpixel Pa3 may be larger than the size of the first opening OP1 defining the emission area EA1 of the third main subpixel Pm3. Therefore, when the same current is supplied, the brightness of the third auxiliary subpixel Pa3 may be higher.
[0182] Figure 7 is a schematic cross-sectional view of a display device 1 according to some example embodiments. Figure 7 In, with Figure 6 The same reference numerals as in the drawings refer to the same components, and redundant descriptions thereof will be omitted.
[0183] Reference Figure 7 , the display device 1 may include a first display area DA1 in which the main subpixel Pm is arranged, and a second display area DA2 in which the auxiliary subpixel Pa and the transmissive portion TA are arranged. The emission area EA2 of the auxiliary subpixel Pa may be larger than the emission area EA1 of the main subpixel Pm.
[0184] According to some example embodiments, at least one of the first and second functional layers 222a and 222c and the upper layer 250 may be disposed to correspond to the transmissive portion TA. That is, at least one of the first and second functional layers 222a and 222c and the upper layer 250 may be disposed in the open area TAH.
[0185] The opposing electrode 223 may include an opening corresponding to the transmissive portion TA. The width Wt of the opening may be substantially equal to the width Wt of the opening area TAH. In this case, the opposing electrode 223 may be formed using a mask provided with a shielding film covering the transmissive portion TA.
[0186] Figure 8 is a schematic cross-sectional view of a display device 1 according to some example embodiments. Figure 8 In, with Figure 6 The same reference numerals as in the drawings refer to the same components, and redundant descriptions thereof will be omitted.
[0187] Reference Figure 8 , the display device 1 may include a first display area DA1 in which the main subpixel Pm is arranged, and a second display area DA2 in which the auxiliary subpixel Pa and the transmissive portion TA are arranged. The emission area EA2 of the auxiliary subpixel Pa may be larger than the emission area EA1 of the main subpixel Pm.
[0188] According to some example embodiments, the main organic light emitting diode OLED and the auxiliary organic light emitting diode OLED' may be covered by an encapsulation substrate 300'. The encapsulation substrate 300' may include a transparent material. For example, the encapsulation substrate 300' may include a glass material. Alternatively, the encapsulation substrate 300' may include a polymer resin or the like. The encapsulation substrate 300' may prevent or reduce the penetration of external moisture, foreign matter, or contaminants into the main organic light emitting diode OLED and the auxiliary organic light emitting diode OLED'.
[0189] A sealing material such as a sealant may be disposed between the substrate 100 on which the main organic light emitting diode OLED and the auxiliary organic light emitting diode OLED' are formed and the encapsulation substrate 300'. The sealing material may block external moisture or foreign matter that may penetrate between the substrate 100 and the encapsulation substrate 300'.
[0190] Figure 9 is a schematic layout diagram of a pixel arrangement structure according to some example embodiments. Figure 9 In, with Figure 5 The same reference numerals as in the drawings refer to the same components, and redundant descriptions thereof will be omitted.
[0191] Reference Figure 9, the pixel groups Pg and the transmissive portions TA arranged in the second display area DA2 may be alternately arranged along one direction (y direction). The auxiliary sub-pixels Pa1, Pa2, and Pa3 included in one pixel group Pg may have a two-row pixel arrangement structure. In addition, the size of at least one of the auxiliary sub-pixels Pa1, Pa2, and Pa3 may be larger than the size of the main sub-pixels Pm1, Pm2, and / or Pm3 representing the same color.
[0192] According to some example embodiments, a plurality of transmission portions TA may be arranged between pixel groups Pg along one direction. Figure 9 As shown in FIG, two transmission parts TA may be arranged between two pixel groups Pg. According to some example embodiments, the transmission part TA may be set to an octagonal or circular shape in consideration of the diffraction characteristics of light. According to some example embodiments, the shape of the transmission part TA may be implemented as a lower electrode layer BSM (see FIG. Figure 6 )The shape of the lower hole BSMH.
[0193] One pixel group Pg may include a first auxiliary sub-pixel Pa1, a second auxiliary sub-pixel Pa2, and a third auxiliary sub-pixel Pa3 representing different colors. Therefore, one pixel group Pg may include three auxiliary sub-pixels.
[0194] The first auxiliary subpixel Pa1, the second auxiliary subpixel Pa2, and the third auxiliary subpixel Pa3 may form a pixel arrangement structure in which the first auxiliary subpixel Pa1, the second auxiliary subpixel Pa2, and the third auxiliary subpixel Pa3 are arranged at the vertices of a virtual triangle VT. In this case, the first auxiliary subpixel Pa1 and the third auxiliary subpixel Pa3 may be arranged in the first row 1N, and the second auxiliary subpixel Pa2 may be arranged in the second row 2N.
[0195] The number of the auxiliary sub-pixels Pa1, Pa2, and Pa3 included in the basic unit U is 12, and the number of the main sub-pixels Pm1, Pm2, and Pm3 included in the corresponding unit U' is 32. Therefore, the number of the auxiliary sub-pixels Pa1, Pa2, and Pa3 and the number of the main sub-pixels Pm1, Pm2, and Pm3 may be set in a ratio of 3:8.
[0196] According to some example embodiments, one pixel group Pg and two transmissive portions TA may be repeatedly arranged along the x-direction in the second display area DA2. Furthermore, the pixel groups Pg and the transmissive portions TA may be alternately arranged along the y-direction. That is, the pixel groups Pg may be distributed and arranged in the basic unit U, thereby improving visibility.
[0197] In addition, such an arrangement may increase the size of the emission areas of the auxiliary sub-pixels Pa1 , Pa2 , and Pa3 , thereby preventing degradation of the auxiliary sub-pixels Pa1 , Pa2 , and Pa3 and achieving improved brightness.
[0198] Figure 10 is a schematic layout diagram of a pixel arrangement structure according to some example embodiments. Figure 10 In, with Figure 5 The same reference numerals as in the drawings refer to the same components, and redundant descriptions thereof will be omitted.
[0199] Reference Figure 10 , the pixel groups Pg and the transmissive portions TA arranged in the second display area DA2 may be alternately arranged along one direction (y direction). The auxiliary sub-pixels Pa1, Pa2, and Pa3 included in one pixel group Pg may have a two-row pixel arrangement structure. In addition, the size of at least one of the auxiliary sub-pixels Pa1, Pa2, and Pa3 may be larger than the size of the main sub-pixels Pm1, Pm2, and / or Pm3 representing the same color.
[0200] According to some example embodiments, one pixel group Pg may include one first auxiliary subpixel Pa1, two second auxiliary subpixels Pa2, and one third auxiliary subpixel Pa3. Thus, one pixel group Pg may include four auxiliary subpixels. The first auxiliary subpixel Pa1, the second auxiliary subpixel Pa2, and the third auxiliary subpixel Pa3 may realize different colors. For example, the first auxiliary subpixel Pa1, the second auxiliary subpixel Pa2, and the third auxiliary subpixel Pa3 may realize red, green, and blue, respectively.
[0201] The four auxiliary sub-pixels may form a pixel arrangement structure in which a first auxiliary sub-pixel Pa1, a second auxiliary sub-pixel Pa2, and a third auxiliary sub-pixel Pa3 are arranged at the vertices of a virtual parallelogram VS'. According to some example embodiments, the virtual parallelogram VS' may be a rectangle. In this case, the first auxiliary sub-pixel Pa1 and the third auxiliary sub-pixel Pa3 may be arranged in a first row 1N, and the two second auxiliary sub-pixels Pa2 may be arranged in a second row 2N.
[0202] The number of the auxiliary sub-pixels Pa1, Pa2, and Pa3 included in the basic unit U is 8, and the number of the main sub-pixels Pm1, Pm2, and Pm3 included in the corresponding unit U' is 32. Therefore, the number of the auxiliary sub-pixels Pa1, Pa2, and Pa3 and the number of the main sub-pixels Pm1, Pm2, and Pm3 may be set at a ratio of 1:4.
[0203] According to some example embodiments, one pixel group Pg and one transmissive portion TA may be alternately arranged along the x-direction and the y-direction in the second display area DA2. Such a pixel arrangement structure is referred to as a 1 / 4 pentile structure. According to some example embodiments, the pixel groups Pg may be distributed and arranged in the basic unit U, thereby improving visibility.
[0204] In addition, the auxiliary sub-pixels Pa1, Pa2, and Pa3 can be arranged in two rows in the pixel group Pg, thereby facilitating the expansion of the emission area. That is, such an arrangement can increase the size of the emission area of the auxiliary sub-pixels Pa1, Pa2, and Pa3, thereby preventing or reducing degradation of the auxiliary sub-pixels Pa1, Pa2, and Pa3 and achieving improved brightness.
[0205] Figure 11 A comparative example for comparison with the example is shown, and shows a case in which the auxiliary sub-pixels are arranged in a 1 / 4 pentile structure in the second display area DA2.
[0206] Reference Figure 11 In the display device according to the comparative example, eight auxiliary sub-pixels Pa1, Pa2, and Pa3 are arranged in one pixel group Pg, and four auxiliary sub-pixels Pa1, Pa2, and Pa3 in the pixel group Pg are arranged in four rows. In addition, only one pixel group Pg is arranged in the basic unit U, and the transmissive portion TA is arranged in the remaining area.
[0207] The number of auxiliary sub-pixels Pa1, Pa2, and Pa3 included in the basic unit U is 8, and the number of main sub-pixels Pm1, Pm2, and Pm3 included in the corresponding unit U' is 32. Therefore, the number of auxiliary sub-pixels Pa1, Pa2, and Pa3 and the number of main sub-pixels Pm1, Pm2, and Pm3 can be set in a ratio of 1:4. This pixel arrangement structure is called a 1 / 4 pentile structure.
[0208] Such a pixel arrangement structure is advantageous in terms of ensuring the transmissive portion TA. However, the gaps between the auxiliary sub-pixels Pa1, Pa2, and Pa3 must be maintained. Therefore, it is difficult to increase the size of each of the auxiliary sub-pixels Pa1, Pa2, and Pa3.
[0209] In addition, since the pixel group Pg realizing the image is offset to either side of the basic unit U, it may be disadvantageous in terms of visibility.
[0210] Figure 12 is a table showing visibility and lifespan according to examples and comparative examples.
[0211] Reference Figure 12 , Example 1 is Figure 5An embodiment in which a 3 / 8 pentile structure is adopted in the second display area DA2 and the size of the auxiliary sub-pixel is enlarged. A comparative example is an embodiment in which a 3 / 8 pentile structure is adopted in the second display area DA2 and the size of the auxiliary sub-pixel is enlarged. Figure 11 Example 2 is a case where the size of the auxiliary sub-pixel is equal to the size of the main sub-pixel. Figure 10 An embodiment in which a 1 / 4 pentile structure is adopted and the size of the auxiliary sub-pixel is enlarged.
[0212] like Figure 12 As shown in , in Examples 1 and 2, pixel groups Pg including auxiliary sub-pixels are distributed and arranged. Therefore, compared with the comparative example, images can be recognized smoothly.
[0213] Furthermore, in Examples 1 and 2, since the size of the auxiliary sub-pixel is large, it can be seen that the life of the display element is increased.
[0214] As described above, aspects of some example embodiments may have a pixel arrangement structure in which the size of the auxiliary sub-pixel included in the second display area is relatively easily adjusted, thereby providing a highly reliable display device.
[0215] It should be understood that the embodiments described herein should be considered in a descriptive sense only and not for purposes of limitation. Descriptions of features or aspects within each embodiment should generally be considered applicable to other similar features or aspects in other embodiments. Although one or more embodiments have been described with reference to the drawings, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope as defined by the claims and their equivalents.
Claims
1. A display device, comprising: a substrate comprising a first display area and a second display area; a plurality of main sub-pixels located on the substrate in the first display area; as well as a basic unit located on the substrate in the second display area, the basic unit comprising a plurality of pixel groups and a transmissive portion, the plurality of pixel groups comprising auxiliary sub-pixels, wherein each pixel group in the plurality of pixel groups comprises a red auxiliary sub-pixel, a green auxiliary sub-pixel, and a blue auxiliary sub-pixel; wherein the plurality of pixel groups and the transmission parts are alternately arranged along a first direction, and the auxiliary sub-pixels included in one pixel group among the plurality of pixel groups are arranged in two rows spaced apart along the first direction, wherein the size of the emission area of the first auxiliary sub-pixel among the auxiliary sub-pixels is larger than the size of the emission area of the first main sub-pixel among the plurality of main sub-pixels that presents the same color as the first auxiliary sub-pixel, and Some of the plurality of main sub-pixels constitute a main pixel group, and the gaps and positional relationships between the main sub-pixels in the main pixel group are the same as the gaps and positional relationships between the auxiliary sub-pixels in the pixel group.
2. The display device according to claim 1, wherein The number of the auxiliary sub-pixels included in the one pixel group among the plurality of pixel groups is three, and each of the auxiliary sub-pixels is arranged at a vertex of a virtual triangle.
3. The display device according to claim 1, wherein The number of the auxiliary sub-pixels included in the basic unit is 3 / 8 of the number of main sub-pixels included in a corresponding unit having the same area as that of the basic unit in the first display region. The display device according to claim 1 , wherein: The one pixel group and two of the transmissive portions are arranged along a second direction crossing the first direction.
5. The display device according to claim 1, wherein The number of the auxiliary sub-pixels included in the one pixel group among the plurality of pixel groups is four, and each of the auxiliary sub-pixels is arranged at a vertex of a virtual parallelogram. The display device according to claim 5 , wherein: The virtual parallelogram is a rectangle.
7. The display device according to claim 5, wherein The number of the auxiliary sub-pixels included in the basic unit is 1 / 4 of the number of main sub-pixels included in a corresponding unit having the same area as that of the basic unit in the first display region.
8. The display device according to claim 5, wherein The plurality of pixel groups are separated from each other in the basic unit.
9. The display device according to claim 1, wherein The transmission parts each have a circular shape.
10. The display device according to claim 1, wherein A counter electrode integrally provided in the plurality of main sub-pixels and the auxiliary sub-pixel is arranged in the first display area and the second display area, and includes an opening corresponding to the transmission portion.
11. The display device according to claim 1, further comprising an inorganic insulating layer on the substrate, in, The inorganic insulating layer includes an opening corresponding to the transmission portion.
12. The display device according to claim 1, further comprising a lower electrode layer located between the substrate and the auxiliary sub-pixel. in, The lower electrode layer includes a lower hole corresponding to the transmission portion.
13. A display device, comprising: a substrate comprising a first display area and a second display area, wherein the first display area is provided with a main sub-pixel, and the second display area is provided with a transmissive portion and a pixel group including an auxiliary sub-pixel; The first pixel electrode and the first emission layer are both configured to realize a first main sub-pixel among the main sub-pixels; The second pixel electrode and the second emission layer are both configured to realize a first auxiliary sub-pixel among the auxiliary sub-pixels that presents the same color as the first main sub-pixel; as well as a counter electrode, integrally arranged in the first display area and the second display area, The pixel group includes a red auxiliary sub-pixel, a green auxiliary sub-pixel and a blue auxiliary sub-pixel. wherein the pixel groups and the transmission parts are alternately arranged along a first direction, The auxiliary sub-pixels included in the pixel group are arranged in two rows spaced apart along the first direction, The size of the emission area of the first auxiliary sub-pixel is larger than the size of the emission area of the first main sub-pixel, and Some of the main sub-pixels constitute a main pixel group, and the gaps and positional relationships between the main sub-pixels in the main pixel group are the same as the gaps and positional relationships between the auxiliary sub-pixels in the pixel group.
14. The display device according to claim 13, further comprising a functional layer arranged between the first pixel electrode and the counter electrode and between the second pixel electrode and the counter electrode, in, A portion of the functional layer is arranged to correspond to the transmission portion.
15. The display device according to claim 13, further comprising a lower electrode layer disposed between the substrate and the second pixel electrode, in, The lower electrode layer includes a lower hole corresponding to the transmission portion.
16. The display device according to claim 13 , further comprising a pixel defining layer, the pixel defining layer comprising a first opening configured to expose a central portion of the first pixel electrode and a second opening configured to expose a central portion of the second pixel electrode, in, The emission area of the first main sub-pixel is defined by the first opening, and the emission area of the first auxiliary sub-pixel is defined by the second opening.
17. The display device according to claim 13, further comprising an inorganic insulating layer disposed on the substrate, in, The inorganic insulating layer includes an opening corresponding to the transmission portion.
18. The display device according to claim 13, wherein The first display area and the second display area are arranged to face the encapsulation substrate of the substrate and sealed. 19 . The display device of claim 13 , further comprising a thin film encapsulation layer including a first inorganic encapsulation layer, an organic encapsulation layer, and a second inorganic encapsulation layer sequentially disposed on the counter electrode. 20 . The display device of claim 13 , further comprising an image sensor disposed under the substrate in the second display area.
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