Semiconductor Structure and Method for Forming the Same

Abstract

A semiconductor structure and a method for forming the same. The forming method includes: providing a substrate; forming a bottom ferromagnetic structure on the substrate; forming a buffer material layer and a non-magnetic insulating layer on the bottom ferromagnetic structure; and forming a top ferromagnetic structure on the non-magnetic insulating layer. In the forming method of the semiconductor structure provided by the embodiments of the present invention, the materials of the bottom ferromagnetic structure and the top ferromagnetic structure generally both include FeCoB. The buffer material layer can prevent the B ions in the bottom ferromagnetic structure from diffusing into the non-magnetic insulating layer, and the buffer material layer can prevent the B ions in the top ferromagnetic structure from diffusing into the non-magnetic insulating layer. The non-magnetic insulating layer is not easily affected by B ions and has a high magnetoresistance ratio. After patterning the bottom ferromagnetic structure, the buffer material layer, the non-magnetic insulating layer and the top ferromagnetic structure, a plurality of magnetic tunnel junction units are formed, so that the tunneling magnetoresistance effect of the magnetic tunnel junction units is strong.

Description

Technical Field

[0001] Embodiments of the present invention relate to the field of semiconductor manufacturing, and in particular, to a semiconductor structure and a method for forming the same. Background Art

[0002] Magnetic Random Access Memory (MRAM) is a non-volatile magnetic random access memory. The so-called "non-volatile" means that the memory can remain intact after the power is turned off. MRAM devices have the high-speed read and write capabilities of Static Random Access Memory (SRAM) and the high integration of Dynamic Random Access Memory (DRAM), and can basically be written repeatedly infinitely. Magnetic Random Access Memory is a "fully functional" solid-state memory. Therefore, its application prospects are very promising and it is expected to dominate the next-generation memory market.

[0003] MRAM is a storage device including an MRAM cell array. Each MRAM cell stores data bits using resistance values instead of charges. Each MRAM cell includes a Magnetic Tunnel Junction (MTJ) cell. The resistance of the Magnetic Tunnel Junction (MTJ) cell can be adjusted to represent logic "0" or logic "1". The MTJ cell includes a bottom ferromagnetic structure, a non-magnetic insulating layer, and a top ferromagnetic structure. The resistance of the MTJ cell can be adjusted by changing the direction of the magnetic moment of the top ferromagnetic structure relative to the bottom ferromagnetic structure. In particular, when the magnetic moment of the top ferromagnetic structure is parallel to the magnetic moment of the bottom ferromagnetic structure, the resistance of the MTJ cell is low, corresponding to logic "0". Conversely, when the magnetic moment of the top ferromagnetic structure is not parallel to the magnetic moment of the bottom ferromagnetic structure, the resistance of the MTJ cell is high, corresponding to logic "1". The MTJ cell is connected between top and bottom electrodes, and the current flowing through the MTJ cell from one electrode to the other can be detected to determine the resistance and thus the logic state.

[0004] The tunneling magnetoresistance (TMR) effect in magnetic tunnel junctions is the key to the development of magnetic random access memories, magnetic sensors, and new programmable logic devices. Summary of the Invention

[0005] The problem solved by the embodiments of the present invention is to provide a semiconductor and a method for forming the same, so as to improve the electrical performance of the semiconductor structure.

[0006] To solve the above problems, an embodiment of the present invention provides a method for forming a semiconductor structure, including: providing a substrate; forming a bottom ferromagnetic structure on the substrate; forming a buffer material layer and a non-magnetic insulating layer on the bottom ferromagnetic structure; and forming a top ferromagnetic structure on the non-magnetic insulating layer.

[0007] Correspondingly, an embodiment of the present invention further provides a semiconductor structure, including: a substrate; a bottom ferromagnetic structure located on the substrate; a buffer material layer and a non-magnetic insulating layer located on the bottom ferromagnetic structure; and a top ferromagnetic structure located on the non-magnetic insulating layer.

[0008] Compared with the prior art, the technical solution of the embodiment of the present invention has the following advantages:

[0009] In the method for forming the semiconductor structure provided by the embodiment of the present invention, the bottom ferromagnetic structure and the top ferromagnetic structure generally both include FeCoB. The buffer material layer is generally formed below the non-magnetic insulating layer, and the buffer material layer can prevent B ions in the bottom ferromagnetic structure from diffusing into the non-magnetic insulating layer; or, the buffer material layer is generally formed above the non-magnetic insulating layer, and the buffer material layer can prevent B ions in the top ferromagnetic structure from diffusing into the non-magnetic insulating layer; or, the buffer material layer is formed both below and above the non-magnetic insulating layer at the same time. The buffer material layer can prevent B ions in the bottom ferromagnetic structure from diffusing into the non-magnetic insulating layer, and the buffer material layer can prevent B ions in the top ferromagnetic structure from diffusing into the non-magnetic insulating layer. In the above three cases, the non-magnetic insulating layer is not easily affected by B ions and has a relatively high magnetoresistance ratio. After patterning the bottom ferromagnetic structure, the buffer material layer, the non-magnetic insulating layer, and the top ferromagnetic structure, a plurality of magnetic tunnel junction units are formed. Therefore, when the semiconductor structure works, the tunneling magnetoresistance effect of the magnetic tunnel junction units is relatively strong, which is beneficial to improving the electrical performance of the semiconductor structure. Description of the Drawings

[0010] Figure 1 A schematic structural diagram of a semiconductor structure;

[0011] Figures 2 to 9 is a schematic structural diagram corresponding to each step in an embodiment of the method for forming the semiconductor structure of the present invention;

[0012] Figure 10 is a schematic diagram of the principle of a magnetic tunnel junction unit. Detailed Embodiments

[0013] The currently formed semiconductor structure still has the problem of poor performance. The reason for the poor performance of the semiconductor structure is analyzed in combination with a schematic structural diagram of a semiconductor structure.

[0014] Figure 1 , shows a schematic structural diagram of a semiconductor structure.

[0015] Refer to Figure 1, the semiconductor structure includes: a substrate 10 having an interconnect structure 16 therein; a bottom electrode 11 located on the substrate 10, and the bottom electrode 11 is connected to the interconnect structure 16; a bottom ferromagnetic structure 12 located on the bottom electrode 11; a non-magnetic insulating layer 13 located on the bottom ferromagnetic structure 12; a top ferromagnetic structure 14 located on the non-magnetic insulating layer 13; and a second electrode 15 located on the top ferromagnetic structure 14.

[0016] The materials of the bottom ferromagnetic structure 12 and the top ferromagnetic structure 14 generally both include FeCoB. After forming the top ferromagnetic structure 14, the semiconductor structure is usually annealed. During the annealing process, the movement of B ions in FeCoB in the bottom ferromagnetic structure 12 and the top ferromagnetic structure 14 speeds up and easily diffuses into the non-magnetic insulating layer 13. Affected by the B ions, the non-magnetic insulating layer 13 has a reduced magnetoresistance ratio, making the tunneling magnetoresistance (TMR) effect of the magnetic tunnel junction unit composed of the bottom ferromagnetic structure 12, the non-magnetic insulating layer 13, and the top ferromagnetic structure 14 weak, thus resulting in poor electrical performance of the semiconductor structure.

[0017] To solve the above technical problem, an embodiment of the present invention provides a method for forming a semiconductor structure, including: providing a substrate; forming a bottom ferromagnetic structure on the substrate; forming a buffer material layer and a non-magnetic insulating layer on the bottom ferromagnetic structure; and forming a top ferromagnetic structure on the non-magnetic insulating layer.

[0018] In the method for forming a semiconductor structure provided by the embodiment of the present invention, the materials of the bottom ferromagnetic structure and the top ferromagnetic structure generally both include FeCoB. The buffer material layer is formed below the non-magnetic insulating layer, and the buffer material layer can block the diffusion of B ions in the bottom ferromagnetic structure into the non-magnetic insulating layer; or, the buffer material layer is formed above the non-magnetic insulating layer, and the buffer material layer can block the diffusion of B ions in the top ferromagnetic structure into the non-magnetic insulating layer; or, the buffer material layer is formed both below and above the non-magnetic insulating layer, and the buffer material layer can block the diffusion of B ions in the bottom ferromagnetic structure into the non-magnetic insulating layer, and the buffer material layer can block the diffusion of B ions in the top ferromagnetic structure into the non-magnetic insulating layer. In the above three cases, the non-magnetic insulating layer is not easily affected by B ions and has a high magnetoresistance ratio. After patterning the bottom ferromagnetic structure, the buffer material layer, the non-magnetic insulating layer, and the top ferromagnetic structure to form multiple magnetic tunnel junction units, when the semiconductor structure works, the tunneling magnetoresistance effect of the magnetic tunnel junction units is strong, which is beneficial to improving the electrical performance of the semiconductor structure.

[0019] To make the above - mentioned objects, features, and advantages of the embodiments of the present invention more obvious and understandable, the following detailed description of the specific embodiments of the present invention will be given with reference to the accompanying drawings.

[0020] Figures 2 to 9 It is a schematic structural diagram corresponding to each step in an embodiment of the method for forming a semiconductor structure according to an embodiment of the present invention.

[0021] Refer to Figure 2 , a substrate 100 is provided, and the substrate 100 includes a dielectric layer 101 and a conductive structure 102 located in the dielectric layer 101.

[0022] The substrate 100 is used to provide a process platform for subsequently forming magnetic tunnel junction (MTJ) units.

[0023] In this embodiment, functional structures such as transistors, resistive structures, and conductive structures may be formed at the bottom of the dielectric layer 101. Among them, the transistor may be one or both of an NMOS transistor and a PMOS transistor. Specifically, the transistor includes functional structures such as a gate structure and source - drain doping regions located on both sides of the gate structure.

[0024] The dielectric layer 101 is used to achieve electrical isolation between the conductive structures 102 and between the devices at the bottom of the dielectric layer 101 and the subsequently formed magnetic tunnel junction units.

[0025] Specifically, the material of the dielectric layer 101 is a low - k dielectric material (a low - k dielectric material refers to a dielectric material with a relative dielectric constant greater than or equal to 2.6 and less than or equal to 3.9), an ultra - low - k dielectric material (an ultra - low - k dielectric material refers to a dielectric material with a relative dielectric constant less than 2.6), silicon oxide, silicon nitride, or silicon oxynitride and other dielectric materials.

[0026] In this embodiment, the material of the dielectric layer 101 is a low - k dielectric material, which is beneficial to reducing the parasitic capacitance between the back - end interconnect structures, and thus is beneficial to reducing the back - end RC delay. In other embodiments, according to the actual process, the dielectric layer may also be a metal interlayer dielectric (IMD).

[0027] The bottom end of the conductive structure 102 is connected to the source - drain doping region in the transistor at the bottom of the dielectric layer 101, and the top end of the conductive structure 102 is used for electrical connection with the subsequently formed magnetic tunnel junction unit.

[0028] In this embodiment, the material of the conductive structure 102 is copper. In other embodiments, the material of the conductive structure may also be other conductive materials such as cobalt and tungsten.

[0029] Refer to Figure 3 , a bottom ferromagnetic structure (Pinning Layer) 103 is formed on the conductive structure 102.

[0030] The bottom ferromagnetic structure 103 has a fixed magnetic direction. The bottom ferromagnetic structure 103 is used to prepare for the subsequent formation of a non-magnetic insulating layer and the patterning of the top ferromagnetic structure to form a magnetic tunnel unit.

[0031] In this embodiment, the bottom ferromagnetic structure 103 includes an antiferro-magnetic (AFM) layer 1031 and a pinned layer 1032 located on the antiferro-magnetic layer 1031.

[0032] During the writing process of the magnetic tunnel junction unit, the antiferro-magnetic layer 1031 is used to fix the magnetization direction of the pinned layer 1032, preventing the magnetization direction from being changed due to the influence of the induction magnetic field generated when the current flows through the bit line or the word line, because the coercivity of the pinned layer 1032 is not large enough.

[0033] Specifically, the material of the antiferro-magnetic layer 1031 includes one or more of platinum manganese (PtMn), iridium manganese (IrMn), rhodium manganese (RhMn), iron manganese (FeMn), Pt alloys, and Mn alloys. In this embodiment, the material of the antiferro-magnetic layer 1031 includes platinum manganese (PtMn).

[0034] In this embodiment, the antiferro-magnetic layer 1031 is formed by a Physical Vapor Deposition (PVD) process. The Physical Vapor Deposition process has the advantages of low deposition temperature (usually below 550 °C), fast deposition rate, controllable composition and structure of the deposited layer, simple operation, high efficiency, and low cost, and the Physical Vapor Deposition process has a high compatibility with existing machines and process flows. In other embodiments, the antiferro-magnetic layer can also be formed by chemical vapor deposition (CVD) or Atomic Layer Deposition (ALD).

[0035] The pinned layer 1032 includes a Fe-containing material. Specifically, the material of the pinned layer 1032 includes one or more of FeCoB, CoFeTa, NiFe, and FePt. In this embodiment, the material of the pinned layer 1032 includes FeCoB.

[0036] In this embodiment, the pinned layer 1032 is formed by a Physical Vapor Deposition process. In other embodiments, the pinned layer can also be formed by chemical vapor deposition or Atomic Layer Deposition.

[0037] In the step of forming the bottom ferromagnetic structure 103, after forming the antiferromagnetic layer 1031 and before forming the pinned layer 1032, a first coupling layer 1033 is further formed on the antiferromagnetic layer 1031.

[0038] When the semiconductor structure operates, the first coupling layer 1033 enables the antiferromagnetic layer 1031 and the pinned layer 1032 to be antiferromagnetically coupled, forming a closed magnetic field line between the antiferromagnetic layer 1031 and the pinned layer 1032. The closed magnetic field line can prevent the magnetization directions between magnetic tunnel junctions from being affected by external leakage of magnetic field lines.

[0039] Specifically, the first coupling layer 1033 is composed of a non-magnetic conductive material. In this embodiment, the first coupling layer 1033 includes ruthenium (Ru). In other embodiments, the first coupling layer may further include other suitable materials, such as Ti, Ta, Cu, or Ag.

[0040] In this embodiment, the first coupling layer 1033 is formed by a physical vapor deposition process. In other embodiments, the first coupling layer may also be formed by a chemical vapor deposition or atomic layer deposition process.

[0041] The method for forming the semiconductor structure further includes: after providing a substrate and before forming the bottom ferromagnetic structure 103, a first electrode 104 is formed on the conductive structure 102.

[0042] The first electrode 104 is a bottom electrode (BE), and the first electrode 104 is used for electrically connecting to a magnetic tunnel junction unit formed subsequently.

[0043] In this embodiment, the material of the first electrode 104 includes one or more of tantalum nitride (TaN), tantalum (Ta), titanium (Ti), and titanium nitride (TiN). In this embodiment, the first electrode 104 is a single-layer structure, and the material of the first electrode 104 is tantalum.

[0044] In this embodiment, the first electrode 104 is formed by an atomic layer deposition process. The atomic layer deposition process includes performing multiple atomic layer deposition cycles, which is beneficial to improving the flatness and thickness uniformity of the first electrode 104, thereby improving the formation quality of the first electrode 104, and further making the flatness and thickness uniformity of the bottom ferromagnetic structure formed subsequently on the first electrode 104 better. In other embodiments, the first electrode may also be formed by a chemical vapor deposition process.

[0045] Reference Figures 4 to 6 and a buffer material layer and a non-magnetic insulating layer 108 are formed on the bottom ferromagnetic structure 103.

[0046] The materials of the bottom ferromagnetic structure 103 and the subsequently formed top ferromagnetic structure generally both include FeCoB. The buffer material layer is formed under the non-magnetic insulating layer 108, and the buffer material layer can prevent the diffusion of B ions in the bottom ferromagnetic structure 103 into the non-magnetic insulating layer 108; alternatively, the buffer material layer is formed above the non-magnetic insulating layer 108, and the buffer material layer can prevent the diffusion of B ions in the top ferromagnetic structure into the non-magnetic insulating layer 108; alternatively, the buffer material layer is formed both under and above the non-magnetic insulating layer 108, the buffer material layer can prevent the diffusion of B ions in the bottom ferromagnetic structure 103 into the non-magnetic insulating layer 108, and the buffer material layer can prevent the diffusion of B ions in the top ferromagnetic structure into the non-magnetic insulating layer 108. In the above three cases, the non-magnetic insulating layer 108 is not easily affected by B ions and has a relatively high magnetoresistance ratio. After patterning the bottom ferromagnetic structure 103, the buffer material layer, the non-magnetic insulating layer 108, and the top ferromagnetic structure, a plurality of magnetic tunnel junction units are formed. Thus, when the semiconductor structure operates, the tunneling magnetoresistance effect of the magnetic tunnel junction units is relatively strong, which is beneficial to improving the electrical performance of the semiconductor structure.

[0047] In this embodiment, the buffer material layer located under the non-magnetic insulating layer 108 is used as the first buffer material layer 105, and the buffer material layer located above the non-magnetic insulating layer 108 is used as the second buffer material layer 109.

[0048] It should be noted that in this embodiment, the steps of forming the buffer material layer and the non-magnetic insulating layer 108 on the bottom ferromagnetic structure 103 include: forming the first buffer material layer 105; forming the non-magnetic insulating layer 108 on the first buffer material layer 105; and forming the second buffer 109 on the non-magnetic insulating layer 108.

[0049] As Figure 4 shown, the first buffer material layer 105 is formed on the bottom ferromagnetic structure 103.

[0050] The material of the first buffer material layer 105 includes non-magnetic insulating material.

[0051] In this embodiment, the material of the first buffer material layer 105 includes BN. Since BN has good thermal stability, it is not easily decomposed during the subsequent annealing process. The B in the first buffer material layer 105 is not easily diffused into the subsequently formed non-magnetic insulating layer. Moreover, BN usually has a rhombohedral lattice or cubic lattice structure, so the lattice of BN is small and the gap between BN lattices is small. Thus, the first buffer material layer 105 can block the penetration of B in the bottom ferromagnetic structure 103, making the magnetoresistance of the non-magnetic insulating layer relatively large. In addition, BN is not easily reacted with iron-group metals or alloys, that is, the first buffer material layer 105 is not easily reacted with the bottom ferromagnetic structure 103, making the blocking stability of the first buffer material layer 105 good.

[0052] In this embodiment, a plasma enhanced atomic layer deposition process (Plasma enhanced Atomic Layer Deposition, PEALD) to form the first buffer material layer 105. Through plasma enhanced layer deposition process is adopted. The first buffer material layer 105 is formed on the surface of the bottom ferromagnetic structure 103 in the form of atomic layers. Therefore, it is beneficial to improve the uniformity of the deposition rate, thickness uniformity and density of the first buffer material layer 105, and is beneficial to reducing the probability of defects such as pinholes, voids and cracks generated in the first buffer material layer 105. In addition, the process temperature of the atomic layer deposition process is usually relatively low, so it is also beneficial to reduce the thermal budget and reduce the probability of performance deviation of the devices at the bottom of the dielectric layer 101. In other embodiments, a chemical vapor deposition process or a physical vapor deposition process may also be used to form the first buffer material layer 105.

[0053] It should be noted that in the step of forming the first buffer material layer 105, the first buffer material layer 105 should not be too thick or too thin. If the first buffer material layer 105 is too thin, it is difficult for the first buffer material layer 105 to block the diffusion of B in the bottom ferromagnetic structure 103 into the non-magnetic insulating layer, resulting in that during the subsequent annealing process, the content of amorphous MgO in the non-magnetic insulating layer is not easily increased, resulting in a strong tunneling magnetoresistance effect of the magnetic tunnel junction unit. And when the magnetic tunnel junction unit works, it cannot well block the electron tunneling through the non-magnetic insulating layer, so that it is difficult for the magnetic tunnel junction unit to control the switching between the high-resistance state and the low-resistance state, resulting in a poor magnetoresistance ratio of the magnetic tunnel junction unit. If the first buffer material layer 105 is too thick, it is not conducive to improving the formation efficiency of the first buffer material layer 105, and thus it is not easy to improve the formation rate of the semiconductor structure. And if the first buffer material layer 105 is too thick, it is difficult to achieve electron tunneling during the subsequent operation of the magnetic tunnel junction unit, resulting in that it is not convenient to make the magnetic tunnel junction unit switch between the high-resistance state and the low-resistance state. In this embodiment, in the step of forming the first buffer material layer 105, the thickness of the first buffer material layer 105 is to

[0054] Reference Figure 5 On the first buffer material layer 105, a non-magnetic insulating layer 108 is formed.

[0055] The non-magnetic insulating layer 108 is used for electrical isolation between the bottom ferromagnetic structure 103 and the subsequently formed top ferromagnetic structure, and at the same time allows electrons to tunnel through the non-magnetic insulating layer 108 under appropriate conditions.

[0056] Specifically, the material of the non-magnetic insulating layer 108 includes MgO, Al2O3, AlN or AlON. In this embodiment, the material of the non-magnetic insulating layer 108 includes MgO.

[0057] In this embodiment, the non-magnetic insulating layer 108 is formed by an electron beam evaporation process (Electron Beam Evaporation, EBE). The electron beam evaporation process uses an electron beam to heat a single crystal metal oxide so that the single crystal metal oxide melts or sublimes and vaporizes, and is deposited on the bottom ferromagnetic structure 103 and cooled to obtain a high-purity non-magnetic insulating layer 108. In other embodiments, the non-magnetic insulating layer can also be formed by a plasma enhanced atomic layer deposition process, a chemical vapor deposition process or a physical vapor deposition process.

[0058] It should be noted that in the step of forming the non-magnetic insulating layer 108 by the electron beam evaporation process, the temperature should not be too high or too low. If the temperature is too high, the metal oxide will melt or sublime too fast under electron beam heating, which easily leads to poor thickness uniformity of the non-magnetic insulating layer 108 everywhere on the first buffer material layer 105, increases the process risk, reduces the process stability, and increases the thermal budget. If the temperature is too low, the metal oxide will melt or sublime too slowly under electron beam heating, resulting in a low content of gaseous metal oxide in the chamber, and correspondingly, the deposition rate of the non-magnetic insulating layer 108 on the first buffer material layer 105 is too slow, which is not conducive to improving the formation rate of the semiconductor structure. In this embodiment, in the step of forming the non-magnetic insulating layer 108 by the electron beam evaporation process, the temperature is 300°C to 500°C.

[0059] It should be noted that in the step of forming the non-magnetic insulating layer 108 on the first buffer material layer 105, the non-magnetic insulating layer 108 should not be too thick or too thin. If the non-magnetic insulating layer 108 is too thick, a sufficiently large bias voltage needs to be applied to the magnetic tunnel junction unit to enable electrons to tunnel through the non-magnetic insulating layer 108, which is not convenient for the magnetic tunnel junction unit to switch between the high-resistance state and the low-resistance state, and is not conducive to reducing the energy consumption of the magnetic tunnel junction unit, resulting in poor electrical performance of the semiconductor structure. If the non-magnetic insulating layer 108 is too thin, when the magnetic tunnel junction unit is working, it cannot effectively block electrons from tunneling through the non-magnetic insulating layer 108, so that the magnetic tunnel junction unit is difficult to control the switching between the high-resistance state and the low-resistance state, resulting in a poor magnetoresistance ratio of the magnetic tunnel junction unit. In this embodiment, in the step of forming the non-magnetic insulating layer 108 on the first buffer material layer 105, the thickness of the non-magnetic insulating layer 108 is 1 nanometer to 3 nanometers.

[0060] Reference Figure 6 , a second buffer material layer 109 is formed on the non-magnetic insulating layer 108.

[0061] In the method for forming a semiconductor structure provided by the embodiment of the present invention, the material of the top ferromagnetic structure generally includes FeCoB. The second buffer material layer 109 can prevent B ions in the top ferromagnetic structure from diffusing into the non-magnetic insulating layer 108. Thus, when the semiconductor structure is working, the non-magnetic insulating layer 108 is not easily affected by B ions, has a high magnetoresistance ratio, so that the tunneling magnetoresistance effect of the magnetic tunnel junction unit is strong, which is conducive to improving the electrical performance of the semiconductor structure.

[0062] The material of the second buffer material layer 109 includes a non-magnetic insulating material. The second buffer material layer 109 can, together with the first buffer material layer 105 and the non-magnetic insulating layer 108, achieve electrical isolation between the bottom ferromagnetic structure 103 and the subsequently formed top ferromagnetic structure, and at the same time allow electrons to tunnel through the first buffer material layer 105, the non-magnetic insulating layer 108, and the second buffer material layer 109 under appropriate conditions.

[0063] In this embodiment, the material of the second buffer material layer 109 includes BN. BN has good thermal stability, so it is not easily decomposed during the subsequent annealing process, and B in the second buffer material layer 109 is not easily diffused into the non-magnetic insulating layer 108; and BN usually has a rhombohedral lattice or a cubic lattice structure, so the lattice of BN is small, and the gap between BN lattices is small. Thus, the second buffer material layer 109 can play a role in blocking B in the top ferromagnetic structure from passing through, making the magnetoresistance ratio of the non-magnetic insulating layer 108 relatively large. In addition, BN is not easily reacted with iron-group metals or alloys, that is, the buffer material layer is not easily reacted with the subsequently formed top ferromagnetic structure, which can make the blocking stability of the second buffer material layer 109 good.

[0064] In this embodiment, the second buffer material layer 109 is formed by a plasma enhanced atomic layer deposition process (PEALD). Through the plasma enhanced atomic layer deposition process, the second buffer material layer 109 is formed on the surface of the non-magnetic insulating layer 108 in the form of atomic layers. Therefore, it is beneficial to improve the uniformity of the deposition rate, thickness uniformity and density of the second buffer material layer 109, and is beneficial to reduce the probability of generating defects such as pinholes, voids, and cracks in the second buffer material layer 109. In addition, the process temperature of the atomic layer deposition process is usually relatively low, so it is also beneficial to reduce the thermal budget and reduce the probability of performance shift of the devices at the bottom of the dielectric layer 101. In other embodiments, the second buffer material layer 109 can also be formed by a chemical vapor deposition process or a physical vapor deposition process.

[0065] It should be noted that in the step of forming the second buffer material layer 109, the second buffer material layer 109 should not be too thick or too thin. If the second buffer material layer 109 is too thin, it is difficult for the second buffer material layer 109 to block the diffusion of B in the top ferromagnetic structure into the non-magnetic insulating layer 108. During the subsequent annealing process, the content of amorphous MgO in the non-magnetic insulating layer 108 is not easy to increase, resulting in a strong tunneling magnetoresistance effect in the magnetic tunnel junction unit. And when the magnetic tunnel junction unit works, it cannot well block the electron tunneling to the non-magnetic insulating layer 108, so that it is difficult for the magnetic tunnel junction unit to control the switching between the high-resistance state and the low-resistance state, resulting in a poor magnetoresistance ratio of the magnetic tunnel junction unit. If the second buffer material layer 109 is too thick, it is not beneficial to improve the formation efficiency of the second buffer material layer 109, and thus it is not easy to improve the formation rate of the semiconductor structure. And if the second buffer material layer 109 is too thick, it is difficult to achieve electron tunneling during the subsequent operation of the magnetic tunnel junction unit, resulting in the inability to conveniently switch the magnetic tunnel junction unit between the high-resistance state and the low-resistance state. In this embodiment, in the step of forming the second buffer material layer 109, the thickness of the second buffer material layer 109 is to

[0066] It should be noted that in other embodiments, the step of forming the buffer material layer and the non-magnetic insulating layer on the bottom ferromagnetic structure includes: forming the buffer material layer; forming the non-magnetic insulating layer on the buffer material layer.

[0067] The buffer material layer can prevent B ions in the bottom ferromagnetic structure from diffusing into the non-magnetic insulating layer. The non-magnetic insulating layer is not easily affected by B ions and has a high magnetoresistance ratio. Subsequently, after patterning the bottom ferromagnetic structure, buffer material layer, non-magnetic insulating layer, and top ferromagnetic structure, multiple magnetic tunnel junction units are formed. Thus, when the semiconductor structure operates, the tunneling magnetoresistance effect of the magnetic tunnel junction units is relatively strong, which is beneficial to improving the electrical performance of the semiconductor structure.

[0068] In some other embodiments, the steps of forming a buffer material layer and a non-magnetic insulating layer on the bottom ferromagnetic structure include: forming the non-magnetic insulating layer; after forming the non-magnetic insulating layer, forming the buffer material layer.

[0069] The buffer material layer is usually formed above the non-magnetic insulating layer. The buffer material layer can prevent B ions in the top ferromagnetic structure from diffusing into the non-magnetic insulating layer. The non-magnetic insulating layer is not easily affected by B ions and has a high magnetoresistance ratio. Subsequently, after patterning the bottom ferromagnetic structure, buffer material layer, non-magnetic insulating layer, and top ferromagnetic structure, multiple magnetic tunnel junction units are formed. Thus, when the semiconductor structure operates, the tunneling magnetoresistance effect of the magnetic tunnel junction units is relatively strong, which is beneficial to improving the electrical performance of the semiconductor structure.

[0070] Reference Figure 7 , a top ferromagnetic structure 106 is formed on the non-magnetic insulating layer 108

[0071] Specifically, a top ferromagnetic structure 106 is formed on the second buffer material layer 109.

[0072] The top ferromagnetic structure 106, buffer material layer, non-magnetic insulating layer 108, and bottom ferromagnetic structure 103 are prepared for subsequent formation of magnetic tunnel junction units.

[0073] The top ferromagnetic structure 106 has a free magnetic orientation. When the magnetic tunnel junction unit operates, the spin-transfer torque (STT) effect is usually used to change or switch the magnetic polarity of the top ferromagnetic structure 106, parallel or opposite to the magnetization direction of the bottom ferromagnetic structure 103, so that the magnetic tunnel junction unit can be in a low-resistance state or a high-resistance state. According to the STT effect, current flows through the magnetic tunnel junction unit to induce an electron flow from the bottom ferromagnetic structure 103 to the top ferromagnetic structure 106. As electrons pass through the bottom ferromagnetic structure 103, the spins of the electrons are polarized. When the spin-polarized electrons reach the top ferromagnetic structure 106, the spin-polarized electrons apply a torque to the top ferromagnetic structure 106 and switch the state of the top ferromagnetic structure 106.

[0074] In this embodiment, the top ferromagnetic structure 106 includes a first free layer 1061 and a second free layer 1062 located on the first free layer 1061. A magnetic field line closure is formed between the first free layer 1061 and the second free layer 1062, which can prevent the magnetization directions between the magnetic tunnel junction units from being affected by the external leakage of magnetic field lines.

[0075] Specifically, the material of the first free layer 1061 includes FeCo, CoNi, CoFeB, FeB, FePt, FePd, and alloys of Fe, Co, and Ni. In this embodiment, the material of the first free layer 1061 is CoFeB.

[0076] In this embodiment, the first free layer 1061 is formed by a physical vapor deposition process. In other embodiments, the first free layer may also be formed by a chemical vapor deposition or atomic layer deposition process.

[0077] The material of the second free layer 1062 includes FeCo, CoNi, CoFeB, FeB, FePt, FePd, and alloys of Fe, Co, and Ni. In this embodiment, the material of the second free layer 1062 is an alloy of Co and Ni.

[0078] In this embodiment, the second free layer 1062 is formed by a physical vapor deposition process. In other embodiments, the second free layer may also be formed by a chemical vapor deposition or atomic layer deposition process.

[0079] The method for forming the semiconductor structure further includes: after forming the top ferromagnetic structure 106, annealing the bottom ferromagnetic structure 103, the buffer material layer, the non-magnetic insulating layer 108, and the top ferromagnetic structure 106.

[0080] The annealing treatment causes the FeCoB in the pinned layer 1032 of the bottom ferromagnetic structure 103 and the first free layer 1061 of the top ferromagnetic structure 106 to change from an amorphous state to a single crystal state, and the MgO in the non-magnetic insulating layer 108 to change from a polycrystalline state to a single crystal state, so that the tunneling magnetoresistance (TMR) effect of the magnetic tunnel junction unit is stronger; and the annealing treatment can magnetize the magnetic particles in the bottom ferromagnetic structure 103 and the top ferromagnetic structure 106, so that the spin directions of the magnetic particles in the bottom ferromagnetic structure 103 and the top ferromagnetic structure 106 are ordered, so that the tunneling magnetoresistance (TMR) effect of the subsequently formed magnetic tunnel junction unit is stronger.

[0081] Annealing treatment causes the B ions in the bottom ferromagnetic structure 103 and the B ions in the top ferromagnetic structure 106 to have an accelerated diffusion rate. The first buffer material layer 105 can prevent the B ions in the bottom ferromagnetic structure 103 from diffusing into the non-magnetic insulating layer 108, and the second buffer material layer 109 can prevent the B ions in the top ferromagnetic structure 106 from diffusing into the non-magnetic insulating layer 108. Thus, when the semiconductor structure operates, the non-magnetic insulating layer 108 is not easily affected by B ions, has a relatively high magnetoresistance ratio, resulting in a stronger tunneling magnetoresistance effect for the subsequently formed magnetic tunnel junction units, which is beneficial to improving the electrical performance of the semiconductor structure.

[0082] In this embodiment, annealing can be performed by means of strong magnetic field annealing.

[0083] Reference Figure 8 , a second electrode 107 is formed on the top ferromagnetic structure 106.

[0084] The second electrode 107 is a top electrode (TE), and the second electrode 107 is used to electrically connect the magnetic tunnel junction unit to the metal layer subsequently formed on the magnetic tunnel junction unit.

[0085] In this embodiment, the material of the second electrode 107 is one or more of tantalum nitride (TaN), tantalum (Ta), titanium (Ti), and titanium nitride (TiN). In this embodiment, the second electrode 107 has a single-layer structure, and the material of the second electrode 107 is tantalum.

[0086] Reference Figure 9 and Figure 10 , the method for forming the semiconductor structure further includes: after forming the second electrode 107, patterning the bottom ferromagnetic structure 103, the buffer material layer, the non-magnetic insulating layer 108, and the top ferromagnetic structure 106 to form a plurality of magnetic tunnel junction units 200. Among them Figure 10 is a schematic diagram of the principle of the magnetic tunnel junction unit.

[0087] Specifically, during the process of forming the magnetic tunnel junction units 200: the first electrode 104 and the second electrode 107 are also patterned.

[0088] In this embodiment, dry etching is used for patterning. The dry etching process has anisotropic etching characteristics and good etching profile controllability, which is beneficial to making the morphology of the magnetic tunnel junction unit 200 meet the process requirements. Moreover, during the dry etching process, the dielectric layer 101 can be used as the etching stop position, and it is not easy to damage the conductive structure 102 in the dielectric layer 101. In addition, by replacing the etching gas, the first electrode 104, the bottom ferromagnetic structure 103, the buffer material layer, the non-magnetic insulating layer 108, the top ferromagnetic structure 106, and the second electrode 107 can be etched in the same etching equipment, which simplifies the process steps.

[0089] Correspondingly, an embodiment of the present invention further provides a semiconductor structure. Referring to Figure 9 , a schematic structural diagram of an embodiment of the semiconductor structure of the present invention is shown.

[0090] The semiconductor structure includes: a substrate 100; a bottom ferromagnetic structure 103 located on the substrate 100; a buffer material layer and a non-magnetic insulating layer 108 located on the bottom ferromagnetic structure 103; and a top ferromagnetic structure 106 located on the non-magnetic insulating layer 108.

[0091] The materials of the bottom ferromagnetic structure 103 and the top ferromagnetic structure 106 generally include FeCoB. The buffer material layer is located below the non-magnetic insulating layer 108, and the buffer material layer can block the diffusion of B ions in the bottom ferromagnetic structure 103 into the non-magnetic insulating layer 108; or, the buffer material layer is located above the non-magnetic insulating layer 108, and the buffer material layer can block the diffusion of B ions in the top ferromagnetic structure 106 into the non-magnetic insulating layer 108; or, the buffer material layer is located both below and above the non-magnetic insulating layer 108, the buffer material layer can block the diffusion of B ions in the bottom ferromagnetic structure 103 into the non-magnetic insulating layer 108, and the buffer material layer can block the diffusion of B ions in the top ferromagnetic structure 106 into the non-magnetic insulating layer 108. In the above three cases, the non-magnetic insulating layer 108 is not easily affected by B ions and has a high magnetoresistance ratio. The bottom ferromagnetic structure 103, the buffer material layer, the non-magnetic insulating layer 108, and the top ferromagnetic structure 106 serve as the magnetic tunnel junction unit 200. Thus, when the semiconductor structure works, the tunneling magnetoresistance effect of the magnetic tunnel junction unit is strong, which is beneficial to improving the electrical performance of the semiconductor structure.

[0092] In this embodiment, the buffer material layer located below the non-magnetic insulating layer 108 is used as the first buffer material layer 105, and the buffer material layer located above the non-magnetic insulating layer 108 is used as the second buffer material layer 109.

[0093] It should be noted that in this embodiment, a first buffer material layer 105 is formed below the non-magnetic insulating layer 108; a second buffer material layer 109 is formed above the non-magnetic insulating layer 108.

[0094] The substrate 100 is used to provide a process platform for the process. The substrate 100 includes a dielectric layer 101 and a conductive structure 102 located in the dielectric layer 101.

[0095] In this embodiment, functional structures such as transistors, resistor structures, and conductive structures may be provided at the bottom of the dielectric layer 101. Among them, the transistor may be one or both of an NMOS transistor and a PMOS transistor. Specifically, the transistor includes functional structures such as a gate structure and source / drain doping regions located on both sides of the gate structure.

[0096] The dielectric layer 101 is used to achieve electrical isolation between the conductive structures 102 and between the devices at the bottom of the dielectric layer 101 and the magnetic tunnel junction unit 200.

[0097] Specifically, the material of the dielectric layer 101 is a low-k dielectric material (a low-k dielectric material refers to a dielectric material with a relative dielectric constant greater than or equal to 2.6 and less than or equal to 3.9), an ultra-low-k dielectric material (an ultra-low-k dielectric material refers to a dielectric material with a relative dielectric constant less than 2.6), silicon oxide, silicon nitride, or silicon oxynitride and other dielectric materials.

[0098] In this embodiment, the material of the dielectric layer 101 is a low-k dielectric material, which is beneficial to reducing the parasitic capacitance between the back-end interconnect structures, and thus beneficial to reducing the back-end RC delay. In other embodiments, according to the actual process, the dielectric layer may also be a metal interlayer dielectric (IMD).

[0099] The bottom end of the conductive structure 102 is connected to the source / drain doping region in the transistor at the bottom of the dielectric layer 101, and the top end of the conductive structure 102 is used for electrical connection with the magnetic tunnel junction unit 200.

[0100] In this embodiment, the material of the conductive structure 102 is copper. In other embodiments, the material of the conductive structure may also be other conductive materials such as cobalt and tungsten.

[0101] The bottom ferromagnetic structure 103 has a fixed magnetic direction.

[0102] In this embodiment, the bottom ferromagnetic structure 103 includes an antiferromagnetic layer 1031 and a pinned layer 1032 located on the antiferromagnetic layer 1031.

[0103] During the writing process of the magnetic tunnel junction cell 200, the antiferromagnetic layer 1031 is used to fix the magnetization direction of the pinned layer 1032, preventing the magnetization direction from being affected by the direction of the induced magnetic field generated when the current flows through the bit line or the word line due to the insufficient coercivity of the pinned layer 1032.

[0104] Specifically, the material of the antiferromagnetic layer 1031 includes one or more of platinum manganese (PtMn), iridium manganese (IrMn), rhodium manganese (RhMn), iron manganese (FeMn), Pt alloys, and Mn alloys. In this embodiment, the material of the antiferromagnetic layer 1031 includes platinum manganese (PtMn).

[0105] The pinned layer 1032 includes a Fe-containing material. Specifically, the material of the pinned layer 1032 includes one or more of FeCoB, CoFeTa, NiFe, and FePt. In this embodiment, the material of the pinned layer 1032 includes FeCoB.

[0106] The semiconductor structure further includes: a first electrode located between the conductive structure 102 and the bottom ferromagnetic structure 103.

[0107] The first electrode 104 is a bottom electrode (BE), and the first electrode 104 is used to electrically connect to the magnetic tunnel junction cell 200.

[0108] In this embodiment, the material of the first electrode 104 is one or more of tantalum nitride (TaN), tantalum (Ta), titanium (Ti), and titanium nitride (TiN). In this embodiment, the first electrode 104 is a single-layer structure, and the material of the first electrode 104 is tantalum.

[0109] The first buffer material layer 105 can prevent B ions in the bottom ferromagnetic structure 103 from diffusing into the non-magnetic insulating layer 108. Thus, when the semiconductor structure operates, the non-magnetic insulating layer 108 is not easily affected by B ions from the bottom ferromagnetic structure 103, has a relatively high magnetoresistance ratio, enables a stronger tunneling magnetoresistance effect of the magnetic tunnel junction cell 200, and is beneficial to improving the electrical performance of the semiconductor structure.

[0110] The material of the first buffer material layer 105 includes a non-magnetic insulating material.

[0111] In this embodiment, the material of the first buffer material layer 105 includes BN. Since BN has good stability, it is not easily decomposed, and B in the first buffer material layer 105 is not likely to diffuse into the non-magnetic insulating layer 108. Moreover, BN generally has a rhombohedral lattice or cubic lattice structure, so the lattice of BN is small, and the gap between BN lattices is small. Thus, the first buffer material layer 105 can play a role in blocking B in the bottom ferromagnetic structure 103 from passing through, making the magnetoresistance of the non-magnetic insulating layer relatively large. In addition, BN is not likely to react with iron-group metals or alloys, that is, the first buffer material layer 105 is not likely to react with the bottom ferromagnetic structure 103, making the blocking stability of the first buffer material layer 105 good.

[0112] It should be noted that the first buffer material layer 105 should not be too thick or too thin. If the first buffer material layer 105 is too thin, it is difficult for the first buffer material layer 105 to block the diffusion of B in the bottom ferromagnetic structure 103 into the non-magnetic insulating layer 108, resulting in a decrease in the content of amorphous MgO in the non-magnetic insulating layer 108, leading to a poor tunneling magnetoresistance effect of the magnetic tunnel junction unit 200. And when the magnetic tunnel junction unit 200 works, it cannot well block the electron tunneling through the non-magnetic insulating layer 108, so that it is difficult for the magnetic tunnel junction unit 200 to control the switching between the high-resistance state and the low-resistance state. If the first buffer material layer 105 is too thick, it is not conducive to improving the formation efficiency of the first buffer material layer 105, and thus it is not easy to improve the formation rate of the semiconductor structure. Moreover, if the first buffer material layer 105 is too thick, it is difficult to achieve electron tunneling when the magnetic tunnel junction unit 200 works, resulting in the inability to conveniently switch the magnetic tunnel junction unit 200 between the high-resistance state and the low-resistance state. In this embodiment, the thickness of the first buffer material layer 105 is to

[0113] The non-magnetic insulating layer 108 is used for electrical isolation between the bottom ferromagnetic structure 103 and the top ferromagnetic structure 106, and at the same time allows electrons to tunnel through the non-magnetic insulating layer 108 under appropriate conditions.

[0114] Specifically, the material of the non-magnetic insulating layer 108 includes MgO, Al2O3, AlN or AlON. In this embodiment, the material of the non-magnetic insulating layer 108 includes MgO.

[0115] It should be noted that the non-magnetic insulating layer 108 should not be too thick or too thin. If the non-magnetic insulating layer 108 is too thick, a sufficiently large bias voltage needs to be applied to the magnetic tunnel junction unit 200 to enable electrons to tunnel through the non-magnetic insulating layer 108, which makes it inconvenient to switch the magnetic tunnel junction unit 200 between the high-resistance state and the low-resistance state, is not conducive to reducing the energy consumption of the magnetic tunnel junction unit 200, and results in poor electrical performance of the semiconductor structure. If the non-magnetic insulating layer 108 is too thin, when the magnetic tunnel junction unit 200 is operating, it cannot effectively block electrons from tunneling through the non-magnetic insulating layer 108, so that it is difficult for the magnetic tunnel junction unit 200 to control the switching between the high-resistance state and the low-resistance state, resulting in a poor magnetoresistance ratio of the magnetic tunnel junction unit 200. In this embodiment, the thickness of the non-magnetic insulating layer 108 is 1 nanometer to 3 nanometers.

[0116] The second buffer material layer 109 can prevent B ions in the top ferromagnetic structure 106 from diffusing into the non-magnetic insulating layer 108. Thus, when the semiconductor structure is operating, the non-magnetic insulating layer 108 is not easily affected by B ions, has a relatively high magnetoresistance ratio, enables a strong tunneling magnetoresistance effect of the magnetic tunnel junction unit 200, and is conducive to improving the electrical performance of the semiconductor structure.

[0117] The material of the second buffer material layer 109 includes a non-magnetic insulating material. The second buffer material layer 109 can, together with the first buffer material layer 105 and the non-magnetic insulating layer 108, achieve electrical isolation between the bottom ferromagnetic structure 103 and the top ferromagnetic structure 106, and at the same time allow electrons to tunnel through the first buffer material layer 105, the non-magnetic insulating layer 108, and the second buffer material layer 109 under appropriate conditions.

[0118] In this embodiment, the material of the second buffer material layer 109 includes BN. BN has good stability and is not easily decomposed, so B in the second buffer material layer 109 is not easily diffused into the non-magnetic insulating layer 108; and BN usually has a rhombohedral lattice or a cubic lattice structure, so the lattice of BN is small, and the gap between BN lattices is small, enabling the second buffer material layer 109 to play a role in blocking B in the top ferromagnetic structure 106 from passing through, and making the magnetoresistance ratio of the non-magnetic insulating layer 108 relatively large. In addition, BN is not easily reacted with iron-group metals or alloys, that is, the buffer material layer is not easily reacted with the top ferromagnetic structure 106, enabling the second buffer material layer 109 to have good blocking stability.

[0119] It should be noted that the second buffer material layer 109 should not be too thick or too thin. If the second buffer material layer 109 is too thin, it is difficult for the second buffer material layer 109 to prevent the diffusion of B in the top ferromagnetic structure 106 into the non-magnetic insulating layer 108, resulting in a decrease in the content of amorphous MgO in the non-magnetic insulating layer 108, leading to a poor tunneling magnetoresistance effect of the magnetic tunnel junction unit 200. Moreover, when the magnetic tunnel junction unit 200 operates, it cannot effectively block the electron tunneling through the non-magnetic insulating layer 108, so it is difficult for the magnetic tunnel junction unit 200 to control the switching between the high-resistance state and the low-resistance state. If the second buffer material layer 109 is too thick, it is not conducive to improving the formation efficiency of the second buffer material layer 109, and thus it is not easy to increase the formation rate of the semiconductor structure. Also, if the second buffer material layer 109 is too thick, it is difficult to achieve electron tunneling when the magnetic tunnel junction unit 200 operates, resulting in the inability to conveniently switch the magnetic tunnel junction unit 200 between the high-resistance state and the low-resistance state. In this embodiment, the thickness of the second buffer material layer 109 is to

[0120] The top ferromagnetic structure 106 has a free magnetic orientation. When the magnetic tunnel junction unit 200 operates, the spin-transfer torque (STT) effect is usually used to change or switch the magnetic polarity of the top ferromagnetic structure 106, which is parallel or opposite to the magnetization direction of the bottom ferromagnetic structure 103, so that the magnetic tunnel junction unit 200 can be in the low-resistance state or the high-resistance state. According to the STT effect, current flows through the magnetic tunnel junction unit 200 to induce an electron flow from the bottom ferromagnetic structure 103 to the top ferromagnetic structure 106. As electrons pass through the bottom ferromagnetic structure 103, the spins of the electrons are polarized. When the spin-polarized electrons reach the top ferromagnetic structure 106, the spin-polarized electrons exert a torque on the top ferromagnetic structure 106 and switch the state of the top ferromagnetic structure 106.

[0121] In this embodiment, the top ferromagnetic structure 106 includes a first free layer 1061 and a second free layer 1062 located on the first free layer 1061. A magnetic flux line closure is formed between the first free layer 1061 and the second free layer 1062, and the magnetic flux line closure can prevent the magnetization directions between the magnetic tunnel junction units 200 from being affected by the leaked magnetic flux lines.

[0122] Specifically, the material of the first free layer 1061 includes FeCo, CoNi, CoFeB, FeB, FePt, FePd, and alloys of Fe, Co, and Ni. In this embodiment, the material of the first free layer 1061 includes CoFeB.

[0123] The material of the second free layer 1062 includes FeCo, CoNi, CoFeB, FeB, FePt, FePd, and alloys of Fe, Co, and Ni. In this embodiment, the material of the second free layer 1062 includes an alloy of Co and Ni.

[0124] The semiconductor structure further includes: a second electrode 107 located on the top ferromagnetic structure 106.

[0125] The second electrode 107 is a top electrode (TE), and the second electrode 107 is used to electrically connect the magnetic tunnel junction unit 200 to a metal layer formed on the magnetic tunnel junction unit 200.

[0126] In this embodiment, the material of the second electrode 107 is one or more of tantalum nitride (TaN), tantalum (Ta), titanium (Ti), and titanium nitride (TiN). In this embodiment, the second electrode 107 has a single-layer structure, and the material of the second electrode 107 is tantalum.

[0127] It should be noted that in other embodiments, the semiconductor structure has only one buffer material layer; the non-magnetic insulating layer is located on the buffer material layer.

[0128] The buffer material layer can prevent B ions in the bottom ferromagnetic structure from diffusing into the non-magnetic insulating layer. The non-magnetic insulating layer is not easily affected by B ions and has a high magnetoresistance ratio. Therefore, when the semiconductor structure operates, the tunneling magnetoresistance effect of the magnetic tunnel junction unit is strong, which is beneficial to improving the electrical performance of the semiconductor structure.

[0129] In some other embodiments, the semiconductor structure has only one buffer material layer, and the non-magnetic insulating layer is located on the buffer material layer.

[0130] The buffer material layer is formed above the non-magnetic insulating layer, and the buffer material layer can prevent B ions in the top ferromagnetic structure from diffusing into the non-magnetic insulating layer. The non-magnetic insulating layer is not easily affected by B ions and has a high magnetoresistance ratio. Therefore, when the semiconductor structure operates, the tunneling magnetoresistance effect of the magnetic tunnel junction unit is strong, which is beneficial to improving the electrical performance of the semiconductor structure.

[0131] The semiconductor structure in this embodiment can be formed by using the formation method described in the foregoing embodiments, or can be formed by using other formation methods. For the specific description of the semiconductor structure in this embodiment, reference can be made to the corresponding description in the foregoing embodiments, and details are not repeated herein.

[0132] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the scope defined by the claims.

Claims

1. A method for forming a semiconductor structure, characterized in that, Comprising: Providing a substrate; Forming a bottom ferromagnetic structure on the substrate, the bottom ferromagnetic structure including an antiferromagnetic layer and a pinned layer located on the antiferromagnetic layer; The material of the pinned layer includes FeCoB; Forming a buffer material layer and a non-magnetic insulating layer on the bottom ferromagnetic structure; Forming a top ferromagnetic structure on the non-magnetic insulating layer, the top ferromagnetic structure including a first free layer and a second free layer located on the first free layer; the material of the first free layer includes FeCoB; The step of forming the buffer material layer and the non-magnetic insulating layer includes: forming a buffer material layer; Forming a non-magnetic insulating layer on the buffer material layer; or, forming a non-magnetic insulating layer; after forming the non-magnetic insulating layer, forming a buffer material layer; or, the step of forming the buffer material layer and the non-magnetic insulating layer includes: forming a buffer material layer; forming a non-magnetic insulating layer on the buffer material layer; after forming the non-magnetic insulating layer and before forming the top ferromagnetic structure, forming a buffer material layer on the non-magnetic insulating layer again; The material of the buffer material layer includes BN, and BN has a rhombohedral lattice or cubic lattice structure, so that the buffer material layer can block the penetration of B ions.

2. The method for forming a semiconductor structure as claimed in claim 1, wherein, The buffer material layer is formed by using a plasma-enhanced atomic layer deposition process, a chemical vapor deposition process or a physical vapor deposition process.

3. The method for forming a semiconductor structure according to claim 1, wherein, In the step of forming the buffer material layer, the thickness of the buffer material layer is to 4. The method for forming a semiconductor structure according to claim 1, wherein, The material of the non-magnetic insulating layer includes MgO, Al2O3, AlN or AlON.

5. The method for forming a semiconductor structure according to claim 1, wherein The method for forming the semiconductor structure further includes: after forming the top ferromagnetic structure, annealing the bottom ferromagnetic structure, the buffer material layer, the non-magnetic insulating layer and the top ferromagnetic structure.

6. A semiconductor structure, characterized in that, Comprising: A substrate; A bottom ferromagnetic structure, located on the substrate, the bottom ferromagnetic structure including an antiferromagnetic layer and a pinned layer located on the antiferromagnetic layer; The material of the pinned layer includes FeCoB; A buffer material layer and a non-magnetic insulating layer, located on the bottom ferromagnetic structure; A top ferromagnetic structure, located on the non-magnetic insulating layer, the top ferromagnetic structure including a first free layer and a second free layer located on the first free layer; the material of the first free layer includes FeCoB; the buffer material layer is located between the bottom ferromagnetic structure and the non-magnetic insulating layer; Or, The buffer material layer is located between the non-magnetic insulating layer and the top ferromagnetic structure; Or, The non-magnetic insulating layer is located between two buffer material layers; The top ferromagnetic structure is located on the buffer material layer on the non-magnetic insulating layer; The material of the buffer material layer includes BN, and BN has a rhombohedral lattice or cubic lattice structure, so that the buffer material layer can block the penetration of B ions.

7. The semiconductor structure according to claim 6, wherein The thickness of the buffer material layer is to 8. The semiconductor structure according to claim 6, wherein The material of the non-magnetic insulating layer includes MgO, Al2O3, AlN or AlON.

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