A memory error correction method and device

Abstract

The embodiments of the present application provide a memory error correction method and device, which can determine a reprogramming voltage interval for a target threshold voltage distribution state, and program a storage cell whose threshold voltage is in the reprogramming interval based on a preset reference voltage and incremental step pulse programming, wherein the reprogramming voltage interval is defined by a start voltage and an end voltage, the start voltage is less than the read voltage of the target threshold voltage distribution state, and the end voltage can be determined according to the data retention time requirement of the target threshold voltage distribution state, so that the reprogrammed storage cell can be determined according to the reprogramming voltage interval, and the threshold voltage after reprogramming can be determined according to the reference voltage, which can meet more practical application scenarios, better meet the data requirements in practical applications, and avoid programming of storage cells that do not need to be programmed, thereby reducing the additional loss of the storage cell.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor devices and manufacturing thereof, and in particular to a memory error correction method and device. Background Art

[0002] Semiconductor memory devices may be characterized as volatile or nonvolatile. Although volatile semiconductor memory devices can perform read and write operations at high speed, the contents stored in volatile semiconductor memory devices are lost when the power is off. In contrast, nonvolatile semiconductor memory devices are characterized by retaining stored contents regardless of whether power is applied or not. Flash memory devices are typical examples of nonvolatile semiconductor memory devices, and flash memory devices can be widely used as data storage media.

[0003] As the demand for large-capacity storage devices increases, multi-level cell storage devices or multi-bit storage devices that store multiple bits per cell are being widely used. In a storage device using a multi-level cell, different threshold voltages can be obtained by injecting different numbers of electrons into the floating gate or charge trapping layer, thereby representing different logic states. Taking multi-level cell (MLC) NAND Flash as an example, when reading data, four logic states can be distinguished by applying three different read voltages to the gate.

[0004] However, the threshold voltage of a memory cell generally varies with the characteristics of the memory device, the passage of time, and / or the ambient temperature. For example, electrons in a floating gate or a charge trapping layer will gradually be lost over time, causing the threshold voltage of the memory cell to decrease. When the threshold voltage of a memory cell decreases from a voltage higher than the corresponding read voltage to a voltage lower than the corresponding read voltage, a read error will occur in the memory cell, which is called a data retention error. The data retention error will gradually increase with the increase of storage time.

[0005] Error Correcting Code (ECC) can correct errors in read data and is an important means to ensure the consistency of written data and read data and improve the reliability of storage systems. However, ECC also has a certain error correction range. If the original bit error rate of the read data does not exceed the ECC error correction range, the correct data can be obtained through ECC error correction. If the original bit error rate of the read data is high, it will exceed the error correction capability of the error control code and the written data cannot be correctly restored.

[0006] Data retention error is the main component of NAND Flash data errors and has the greatest impact on NAND Flash reliability. The longest storage time corresponding to when data can finally be correctly read out after being stored is called data retention time. How to extend the data retention time is an important research direction in this field.

[0007] Reprogramming technology refers to when data retention errors occur in stored data and the number of errors does not exceed the ECC error correction range, the correct data is obtained through ECC error correction, and the correct data is rewritten to the original page. The rewriting process can also be called reprogramming. During the reprogramming process, the storage cell whose threshold voltage is less than the reference voltage Vref due to electron loss will be charged with electrons by incremental step pulse programming (ISPP), so that its threshold voltage is greater than the reference voltage Vref again, thereby reducing data retention errors.

[0008] However, currently the memory cells targeted for reprogramming and the threshold voltage after reprogramming are both determined based on a reference voltage, which cannot meet actual needs. Summary of the invention

[0009] In view of this, the purpose of the present application is to provide a memory error correction method and device, which can reasonably determine the memory cells that need to be reprogrammed to meet actual needs.

[0010] To achieve the above purpose, this application has the following technical solutions:

[0011] A memory error correction method, comprising:

[0012] Determine a corresponding reprogramming voltage interval for a target threshold voltage distribution; the reprogramming voltage interval is defined by a start voltage and an end voltage, the start voltage is less than a read voltage of the target threshold voltage distribution, and the end voltage is determined according to a data retention time requirement of the target threshold voltage distribution;

[0013] According to a preset reference voltage, based on incremental step pulse programming, the memory cells whose threshold voltages are located in the reprogramming voltage interval are programmed.

[0014] Optionally, the preset reference voltage is determined according to a data retention time requirement of the target threshold voltage distribution state, and the data retention time requirement is determined according to a historical data retention time of the target threshold voltage distribution state.

[0015] Optionally, the target threshold voltage distribution is one of a plurality of threshold voltage distributions, and a difference between a preset reference voltage corresponding to the threshold voltage distribution and a read voltage corresponding to the threshold voltage distribution is positively correlated with a threshold voltage corresponding to the threshold voltage distribution.

[0016] Optionally, the step voltage of the incremental step pulse programming is in the range of 0.2-0.5V, and / or the difference between the read voltage of the target threshold voltage distribution state and the start voltage is in the range of 0.3-0.5V.

[0017] Optionally, the storage unit is one of MLC, TLC, and QLC.

[0018] The embodiment of the present application also provides an error correction device for a memory, comprising:

[0019] a reprogramming voltage interval determination unit, configured to determine a corresponding reprogramming voltage interval for a target threshold voltage distribution; the reprogramming voltage interval is defined by a start voltage and an end voltage, the start voltage is less than a read voltage of the target threshold voltage distribution, and the end voltage is determined according to a data retention time requirement of the target threshold voltage distribution;

[0020] The reprogramming unit is used to program the storage cells whose threshold voltages are located in the reprogramming voltage interval based on the incremental step pulse programming according to the preset reference voltage.

[0021] Optionally, the preset reference voltage is determined according to a data retention time requirement of the target threshold voltage distribution state, and the data retention time requirement is determined according to a historical data retention time of the target threshold voltage distribution state.

[0022] Optionally, the target threshold voltage distribution is one of a plurality of threshold voltage distributions, and a difference between a preset reference voltage corresponding to the threshold voltage distribution and a read voltage corresponding to the threshold voltage distribution is positively correlated with a threshold voltage corresponding to the threshold voltage distribution.

[0023] Optionally, the step voltage of the incremental step pulse programming is in the range of 0.2-0.5V, and / or the difference between the read voltage of the target threshold voltage distribution state and the start voltage is in the range of 0.3-0.5V.

[0024] Optionally, the storage unit is one of MLC, TLC, and QLC.

[0025] The embodiment of the present application provides a memory error correction method and device, which can determine a reprogramming voltage interval for a target threshold voltage distribution state, and program a storage cell whose threshold voltage is in the reprogramming interval based on a preset reference voltage and incremental step pulse programming, wherein the reprogramming voltage interval is defined by a start voltage and an end voltage, the start voltage is less than the read voltage of the target threshold voltage distribution state, and the end voltage can be determined according to the data retention time requirement of the target threshold voltage distribution state, so that the reprogrammed storage cell can be determined according to the reprogramming voltage interval, and the threshold voltage after reprogramming can be determined according to the reference voltage, which has more adjustability and can meet more practical application scenarios compared to the prior art in which both are determined according to the reference voltage. In fact, by determining the number of storage cells to be reprogrammed, the extension amount of the data retention time can be adjusted, which can better meet the data requirements in practical applications, and avoid the prior art in which a larger reference voltage is set to obtain a larger data retention time extension value, resulting in the programming of storage cells that do not need to be programmed, thereby reducing the additional loss of storage cells. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0027] Figure 1 This is a schematic diagram of a current data storage;

[0028] Figure 2 A schematic diagram of a current reprogramming method is shown;

[0029] Figure 3 A schematic diagram of charging electrons into a storage unit using ISPP;

[0030] Figure 4 A flowchart of a memory error correction method provided in an embodiment of the present application;

[0031] Figure 5 This is a schematic diagram of a reprogramming process in an embodiment of the present application;

[0032] Figure 6 A schematic diagram of a corresponding relationship between a preset reference voltage-termination voltage and an extended data retention time in an embodiment of the present application;

[0033] Figure 7 A schematic diagram of a process for determining a reprogramming voltage interval for multiple threshold voltage distribution states in an embodiment of the present application;

[0034] Figure 8 A schematic diagram of a preset reference voltage and a step voltage in an embodiment of the present application;

[0035] Fig. 9 A structural block diagram of an error correction device for a memory provided in an embodiment of the present application. DETAILED DESCRIPTION

[0036] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0037] In order to facilitate understanding of the reading method provided in the embodiment of the present application, the specific application scenario of the embodiment of the present application is first introduced. The non-volatile memory includes a plurality of storage units arranged in an array for storing data. Among them, the storage unit is divided into a number of blocks, each block is divided into a number of pages, and the reading, writing, verification, and clearing operations of the non-volatile memory can be performed in units of pages.

[0038] The non-volatile memory includes a memory cell array, control logic, a page buffer (PB), a word line voltage generator and a word line decoder. Each column of memory cells in the memory cell array is connected to the page buffer via a bit line (BL), and the gate of each row of memory cells is connected to the word line decoder via a word line (WL). The control logic controls the word line voltage generator and the page buffer. When performing a read operation, the control logic controls the word line voltage generator to apply a read voltage on the selected word line, and after applying a read pass voltage on the unselected word line, controls the page buffer to sense the data stored in the memory cell on the corresponding bit line according to different read operation methods, thereby reading the data stored in the non-volatile memory.

[0039] Non-volatile memory is mainly divided into several types, such as SLC (Single-Level Cell), MLC (Milti-Level Cell), TLC (Trinary-Level Cell), QLC (Quad-Level Cell), etc. SLC is 1 bit / cell, each storage cell stores 1 bit of data, and the storage cell has only two storage states: "0" and "1". MLC is 2 bits / cell, each storage cell stores 2 bits of data, and the storage cell has four storage states: "00", "01", "10", "11". TLC is 3 bits / cell, each storage cell stores 3 bits of data, and the storage cell has eight storage states: "000", "001", "010", "011", "100", "101", "110", "111". It can be understood that the storage cell of non-volatile memory can also store more than 3 bits of data. QLC, that is, 4bit / cell, each storage cell stores 4 bits of data, and the storage cell has 16 storage states: "0000", "0001", "0010", "0011", "0100", "0101", "0110", "0111", "1000", "1001", "1010", "1011", "1100", "1101", "1110", "1111".

[0040] In order to determine the storage state of a memory cell and thus read out the data stored therein, for an SLC type non-volatile memory, a read operation is performed on the selected word line, a read voltage is applied on the word line, and the data is sensed, so that the data stored in the corresponding memory cell can be read out. However, for non-volatile memories such as MLC and TLC that store multiple bits of data per memory cell, since each memory cell has more than two storage states, it is necessary to perform multiple consecutive read operations on the same memory cell and apply multiple read voltages of different magnitudes on the word line to sense the stored data, so that the actual storage state of the memory cell can be determined and the data stored in the non-volatile memory can be read out.

[0041] At present, the threshold voltage of a storage unit usually changes with the characteristics of the storage device, the passage of time and / or the ambient temperature. For example, the electrons in the floating gate or the charge trapping layer will gradually disappear with the increase of time, so that the threshold voltage of the storage unit will decrease. When the threshold voltage of the storage unit decreases from a voltage higher than the corresponding read voltage to a voltage lower than the corresponding read voltage, the storage unit will generate a read error, which is called a data retention error. The data retention error will gradually increase with the increase of storage time. Error Correcting Code (ECC) can correct the error of the read data, which is an important means to ensure the consistency of the written data and the read data and improve the reliability of the storage system. However, ECC also has a certain error correction range. If the original bit error rate of the read data does not exceed the ECC error correction range, the correct data can be obtained through ECC error correction. If the original bit error rate of the read data is high, it will exceed the error correction capability of the error control code and the written data cannot be correctly restored.

[0042] refer to Figure 1 As shown, it is a current data storage schematic diagram, the horizontal axis is the threshold voltage (threhold voltage), the vertical axis is the number of storage cells, the figure takes E, P1, P2, P3 states as examples for explanation, the solid line represents the initial threshold voltage distribution formed by the threshold voltage of the storage cell at time zero when the data is written into the flash memory, and the dotted line represents the threshold voltage distribution of the flash memory after a period of storage time. It can be seen from the figure that after a period of storage time, due to the leakage of the charge retained by the storage cell, the threshold voltage distribution of the flash memory is offset to the side with a smaller threshold voltage, that is, the distribution is shifted to the left. If the read voltage Vread1, Vread2, Vread3 used at the time zero of data writing is used to read the flash memory at this time, the error rate of the read data will be high. It is very likely that the ECC check cannot be passed and the correct storage data cannot be obtained.

[0043] Reprogramming technology refers to when data retention errors occur in stored data and the number of errors does not exceed the ECC error correction range, the correct data is obtained through ECC error correction, and the correct data is rewritten to the original page. The rewriting process can also be called reprogramming. During the reprogramming process, the storage cell whose threshold voltage is less than the reference voltage due to electron loss will be charged with electrons by incremental step pulse programming (ISPP), so that its threshold voltage is greater than the reference voltage again, thereby reducing data retention errors.

[0044] refer to Figure 2As shown in FIG. 1 , a schematic diagram of a current reprogramming is shown. The horizontal axis is the threshold voltage (VT), and the vertical axis is the number of storage cells (Cell Count). Taking four threshold voltage distribution states as an example, Figure 2 The curves in 2A, 2B, and 2C in the figure respectively represent the initial threshold distribution, the threshold distribution after the data retention time, and the threshold distribution after data recovery, wherein the storage cells with higher threshold voltages have more electrons, and each threshold voltage distribution state corresponds to the storage states "11", "10", "01", and "00", respectively, and there are reference voltages REF1, REF2, and REF3 between adjacent threshold voltage distribution states. After the data retention time, the threshold voltage distribution state of the flash memory shifts to the side with a smaller threshold voltage, that is, the distribution state shifts to the left, and even the threshold voltage of some storage cells moves from the right side of the reference voltage to the left side. ISPP electron injection can achieve reprogramming, so that the threshold voltage less than the reference voltage shifts to the right side of the reference voltage, thereby reducing the bit error rate.

[0045] refer to Figure 3 As shown in FIG. 1 , a schematic diagram of using ISPP to charge electrons into a storage cell is shown, where the horizontal axis is the threshold voltage and the vertical axis is the number of storage cells. For a threshold voltage distribution state (V th State), the solid line represents the initial threshold distribution (Initial V th ), the dotted line represents the threshold distribution after the data retention time (After Retention), where V step is the step voltage, V verify is the reference voltage, V Read To read the voltage, a certain step voltage is used to inject electrons into the storage cells whose threshold voltage is less than the reference voltage, so that the threshold voltage of these storage cells is greater than the reference voltage and less than V verify +V step , to achieve data recovery.

[0046] However, the current reprogramming targets storage cells only based on the reference voltage, that is, the storage cells with threshold voltages less than the reference voltage are reprogrammed. In order to make the reprogrammed storage cells have a larger threshold voltage, the reference voltage is usually greater than the read voltage. However, only storage cells with threshold voltages near the read voltage will cause read errors. This method of programming all storage cells to the left of the reference voltage will cause some storage cells that do not cause errors to be programmed when the reference voltage is large, which is likely to cause additional wear of the storage cells. When the reference voltage is small, the reprogrammed storage cells will have data retention errors again in a short time, so the data retention time is extended less and cannot meet actual needs.

[0047] Based on the above technical problems, the embodiment of the present application provides a memory error correction method and device, which can determine the reprogramming voltage interval for the target threshold voltage distribution state, and program the storage cells whose threshold voltage is in the reprogramming interval based on the preset reference voltage and incremental step pulse programming, wherein the reprogramming voltage interval is defined by a start voltage and an end voltage, the start voltage is less than the read voltage of the target threshold voltage distribution state, and the end voltage is greater than or equal to the read voltage, so that the reprogrammed storage cells can be determined according to the reprogramming voltage interval, and the threshold voltage after reprogramming can be determined according to the reference voltage, which has more adjustability and can meet more practical application scenarios compared to the prior art in which both are determined according to the reference voltage. In fact, the end voltage can be determined according to the data retention time requirement of the target threshold voltage distribution state, so that the extension amount of the data retention time can be adjusted by determining the number of storage cells to be reprogrammed, which can better meet the data requirements in practical applications, and avoid the prior art in which a larger reference voltage is set to obtain a larger data retention time extension value, resulting in the programming of storage cells that do not need to be programmed, thereby reducing the additional loss of storage cells.

[0048] Based on the above ideas, in order to make the above-mentioned purposes, features and advantages of the present application more obvious and easy to understand, the specific implementation methods of the present application are described in detail below with reference to the accompanying drawings.

[0049] First, it should be noted that the memory error correction method and device provided in the embodiment of the present application are not only applicable to NAND flash memory, but also to magnetoresistive random access memory (MRAM), phase change memory (PCRAM), phase change memory and switch (PCMS), resistive memory, ferroelectric RAM (FRAM), spin torque transfer memory (STT), thermally assisted switch memory (TAS), millipede memory, floating junction gate memory (FJG RAM), battery backup RAM and other non-volatile memories. Each storage unit in the memory can store 2 bits or more data.

[0050] refer to Figure 4 FIG. 1 is a flowchart of a memory error correction method provided by an embodiment of the present application. The method may include:

[0051] S101, determining a corresponding reprogramming voltage interval for a target threshold voltage distribution state.

[0052] In an embodiment of the present application, a storage cell belonging to a certain threshold voltage distribution state can be reprogrammed, and the threshold voltage distribution state can be used as a target threshold voltage distribution state. The target threshold voltage distribution state can be one of multiple threshold voltage distribution states. In actual operation, each threshold voltage distribution state in the multiple threshold voltage distribution states can be used as a target threshold voltage distribution state in turn, thereby realizing reprogramming of each distribution state. For example, each threshold voltage distribution state in the multiple threshold voltage distribution states can be used as a target threshold voltage distribution state in turn in the order of threshold voltage from small to large or from large to small.

[0053] For example, in a TLC NAND flash memory device, the target threshold voltage distribution state may be one of (E, P1, P2, ..., P7). In actual operation, E to P7 may be used as target threshold voltage distribution states in sequence, or P7 to E may be used as target threshold voltage distribution states in sequence to achieve reprogramming of the TLC NAND flash memory device.

[0054] The target threshold voltage distribution state may correspond to a reprogramming voltage region (PGM Region). The reprogramming voltage region is used to determine the memory cells to be programmed. The reprogramming voltage region is defined by a start voltage and an end voltage, that is, the reprogramming voltage region includes a region greater than or equal to the start voltage and less than or equal to the end voltage. The start voltage can be expressed as V Start , the termination voltage can be expressed as V End .

[0055] Among them, the starting voltage is less than the read voltage of the target threshold voltage distribution state, and can be set to a value with a larger absolute value of the difference with the read voltage to be close to the lowest threshold voltage in the target threshold voltage distribution state after the data retention time. For example, the absolute value range of the difference can be 0.3-0.5V, specifically, it can be 0.4V, so that the reprogramming interval with a lower lower limit can include a smaller threshold voltage in the target threshold voltage distribution state.

[0056] The termination voltage can be greater than or equal to the read voltage V of the target threshold voltage distribution. Read Of course, the termination voltage may also be slightly lower than the read voltage of the target threshold voltage distribution (at this time, no storage cell has a threshold voltage between the termination voltage and the read voltage), so that the reprogramming voltage interval may at least include the portion of the target threshold voltage distribution whose threshold voltage is lower than the read voltage. The termination voltage may be determined according to the data retention time requirement of the target threshold voltage distribution. Generally, the greater the data retention time requirement, the greater the termination voltage, the larger the corresponding reprogramming voltage interval, and the more storage cells whose threshold voltages are in the reprogramming voltage interval.

[0057] Specifically, the data retention time requirement is determined according to the characteristics of the stored data. Generally speaking, for "hot data" with a shorter storage time, the data retention time requirement is shorter, where hot data is data that needs to be updated in a short time, and for "cold data" with a longer storage time, the data retention time requirement is longer, where cold data is data that does not need to be updated in a short time. Of course, in actual operation, there are many ways to determine whether the stored data is "hot data" or "cold data". One implementation method is to determine the stored data characteristics according to the historical data retention time of the target threshold voltage distribution state, and then determine the data retention time requirement, that is, determine the termination voltage of the target threshold voltage distribution state according to the historical data retention time of the target threshold voltage distribution state. The data retention time requirement is actually an extension requirement based on the historical data retention time, that is, an extended data retention time requirement. For the target threshold voltage distribution state, the data retention time requirement can have a corresponding relationship with the termination time.

[0058] refer to Figure 5 , which is a schematic diagram of a reprogramming process in an embodiment of the present application, wherein the target threshold voltage distribution state is V th State, the voltage distribution state before the target threshold voltage distribution state is Previous V th State, the termination voltage can be V End and V end Specifically, the difference between the termination voltage of the target threshold voltage distribution state and the read voltage may be 0.1-0.3V.

[0059] That is to say, the termination voltage can be determined according to the data retention time requirement of the target threshold voltage distribution state, and the range of the reprogramming voltage interval defined by the start voltage and the termination voltage is determined by the data retention time requirement of the target threshold voltage distribution state. Therefore, the data of the storage cell whose threshold voltage is in the reprogramming voltage interval can be determined according to the data retention time requirement of the target threshold voltage distribution state. When the data of the storage cell whose threshold voltage is in the reprogramming voltage interval is used as the programmed unit, the data retention time that can be stored after reprogramming can be controlled by controlling the number of programmed units, thereby achieving the function of reducing unnecessary unit wear during the reprogramming process and dynamically adjusting the data retention time according to the data retention time required for the data, thereby meeting different data retention time requirements.

[0060] In specific implementation, before S101 , data may be decoded by ECC to obtain correct data, and the correct data may be used to reprogram the subsequent storage unit.

[0061] S102 , programming a memory cell whose threshold voltage is within the reprogramming voltage interval based on an incremental step pulse programming according to a preset reference voltage.

[0062] After determining the reprogramming voltage interval, two consecutive read operations can be performed using the start voltage and the end voltage, so that the storage cells whose threshold voltages are in the reprogramming voltage interval can be determined, and these storage cells are used as reprogramming cells, and other storage cells are used as programming inhibition cells, so that the reprogramming cells are programmed, and the programming inhibition cells will not be programmed. Of course, the storage cells that do not belong to the target threshold voltage distribution state are naturally inhibited and not programmed, so only the storage cells whose threshold voltages in the target threshold voltage distribution state are in the reprogramming voltage interval are used as reprogramming cells. The reprogramming cells and the programming inhibition cells can be marked in the page buffer, and the storage cells marked as programming inhibition cells are inhibited from programming.

[0063] The reprogramming unit can be programmed based on incremental step pulse programming, by gradually increasing the programming voltage so that the programmed voltage gradually increases with the step voltage, and the programming is completed when the programmed voltage is greater than the reference voltage. The reference voltage here can be pre-set as a preset reference voltage. In this way, after programming the reprogramming unit, the threshold voltage of the reprogramming unit is greater than the preset reference voltage and less than the sum of the preset reference voltage and the step voltage, that is, it falls within [V verify , V verify +V step ] interval, by setting a larger preset reference voltage, the threshold voltage of the reprogramming unit can be increased to a greater extent, increasing the time it takes for it to drop to the read voltage again, thereby increasing the data retention time.

[0064] That is, the preset reference voltage is related to the achievable data retention time, so the preset reference voltage can be determined according to the data retention time requirement of the target threshold voltage distribution state. Of course, the data retention time requirement is determined according to the historical data retention time of the target threshold voltage distribution state. Figure 5 As shown, the preset reference voltage can be V Verity and V Verity '.

[0065] That is, the preset reference voltage and the termination voltage can be determined according to the data retention time requirements of the target threshold voltage distribution state, and these two factors will affect the actual data retention time that can be extended. Therefore, the preset reference voltage and the termination voltage can be comprehensively considered to establish a corresponding relationship between the preset reference voltage-termination voltage and the data retention time that can be extended.

[0066] refer to Figure 6, which is a schematic diagram of the corresponding relationship between a preset reference voltage, a termination voltage and an extended data retention time in an embodiment of the present application, wherein the abscissa is the termination voltage, and the ordinate is the extended data retention time (ExtendedRetention Time), and different curves represent different preset reference voltages, wherein V verify_ini is the reference voltage without adjustment in the prior art. At this time, V verify_ini At the same time, as the termination voltage in the prior art, the extended data retention time that can be achieved by the corresponding reprogramming (Conv.) in the prior art is also fixed.

[0067] In the embodiment of the present application, the preset reference voltage V verify_1 , V verify_2 For example, V verify_1 , V verify_2 are preset reference voltages that increase in sequence, both of which are greater than V verify_ini (This is only an example. In other embodiments, the reference voltage may also be less than V verify_ini , and the reference voltage is greater than V end ), so using V verify_ini , V verify_1 , V verify_2 These three preset reference voltages and multiple termination voltages can achieve many different extended data retention times. The prop. curve represents the reprogramming effect that can be achieved by the embodiment of the present application, which corresponds to multiple different extended data retention times. In actual operation, the extended data retention time can be used to determine the corresponding termination voltage and preset reference voltage. The correspondence between the three can be detected in advance and stored in the memory as a lookup table for search. That is, the termination voltage and preset reference voltage corresponding to the target threshold voltage distribution state can be obtained by looking up the table, and the start voltage can also be included in the lookup table.

[0068] The target threshold voltage distribution state can be one of a plurality of threshold voltage distribution states, and each threshold voltage distribution state can correspond to its own termination voltage and preset reference voltage, and then the plurality of threshold voltage distribution states can be sequentially used as the target threshold voltage distribution state according to the corresponding termination voltage and preset reference voltage, and each threshold voltage distribution state can be reprogrammed in sequence. Specifically, sequential readings can be performed in sequence using the initial voltage and termination voltage corresponding to each preset reference voltage to determine the storage cells that need to be programmed for each threshold voltage distribution state, and then each threshold voltage distribution state can be reprogrammed in sequence.

[0069] refer to Figure 7, which is a schematic diagram of the reprogramming voltage interval determination process for multiple threshold voltage distribution states in an embodiment of the present application, wherein the storage unit is TLC, the reading order can be from low state to high state, and P5 corresponds to the initial voltage V Start_5 and the termination voltage V End_5 , P6 corresponds to the initial voltage V Start_6 and the termination voltage V End_6 , P7 corresponds to the initial voltage V Start_7 and the termination voltage V End_7 , then the initial voltage V Start_5 and the termination voltage V End_5 The area between is used as the reprogramming voltage interval (PGMregion) corresponding to P5, and the memory cell with a threshold voltage at P4 is programmed inhibited (PGM-inhibit). Similarly, the initial voltage V Start_6 and the termination voltage V End_6 The area between is used as the reprogramming voltage interval corresponding to P6, and the initial voltage V Start_7 and the termination voltage V End_7 The area between is used as the reprogramming voltage interval corresponding to P7.

[0070] When the target threshold voltage distribution state is one of multiple threshold voltage distribution states, the multiple threshold voltage distribution states can correspond to multiple preset reference voltages. Since the programming voltage range is used to control the programmed storage cell, the preset reference voltage can be set at a higher level. Compared with the prior art, the preset reference voltage can have a larger value, so that a longer data retention time can be achieved without causing loss of the storage cell.

[0071] However, the width of the threshold voltage distribution state is usually constant. The increase of the reference voltage may reduce the distance between the target threshold voltage distribution state after programming and the adjacent higher state. To solve this problem, there are two solutions:

[0072] In the first method, different reference voltage enhancement levels can be set for different threshold voltage distribution states. Generally speaking, the charge loss of a higher state storage cell is more serious, so its data retention time is relatively short, so a larger preset reference voltage can be set for the higher state storage cell, that is, the difference between the higher state preset reference voltage and the read voltage is greater than the difference between the lower state preset reference voltage and the read voltage. It can also be said that the difference between the preset reference voltage and the read voltage is positively correlated with the threshold voltage of the corresponding threshold voltage distribution state, so that the threshold voltage of the higher state storage cell has a greater enhancement after programming.

[0073] In fact, reference Figure 8 FIG. 1 is a schematic diagram of a preset reference voltage and a step voltage in an embodiment of the present application, wherein the preset reference voltage VVerity Compared with the prior art, it has certain improvements, and the higher state preset reference voltage V Verity The greater the degree of improvement, the greater the difference between the preset reference voltage and the read voltage in the higher state. For example, the difference between the preset reference voltage and the read voltage in the P7 state may range from 0 to 0.4V.

[0074] The second method is to appropriately reduce the step voltage V during the programming operation. step , since the threshold voltage of the reprogrammed memory cell belongs to [V verify , V verify +V step ], so reduce V step The threshold voltage distribution expansion caused by the proposed technology can be reduced. Of course, V step Directly related to the programming operation time. V step When V is smaller, the threshold voltage distribution becomes narrower, but the programming operation time increases, and vice versa. Therefore, V is used only when system performance is not a critical factor to be considered. step The range of the reduced step voltage is 0.2-0.5V.

[0075] Of course, the first and second methods solve the technical problem from different perspectives. In some implementations, the first and second methods can be used simultaneously, that is, different reference voltage enhancement levels are set for different threshold voltage distribution states, and the step voltage in the programming operation is appropriately reduced. Figure 8 As shown, V step The smaller the step voltage, the smaller the step voltage is, the Smaller V step Indicates that V verify +V step In some embodiments, the degree of reduction of the step voltage is related to the degree of increase of the reference voltage. The more the reference voltage is increased, the more the corresponding step voltage is reduced. The step voltage can also be stored in a lookup table, so that the start voltage, end voltage, preset reference voltage, and step voltage corresponding to the target threshold voltage distribution state can be obtained simultaneously by using the lookup table.

[0076] The above shows the reprogramming process of a single threshold voltage distribution state, that is, the reprogramming process of the target threshold voltage distribution state, and the reprogramming of multiple threshold voltage distribution states in sequence. After the memory device has been stored for a long time, when the data error is close to the ECC error correction range again, the reprogramming operation can be performed again, which will not be repeated here.

[0077] The embodiment of the present application provides a memory error correction method, which can determine a reprogramming voltage interval for a target threshold voltage distribution state, and program a storage cell whose threshold voltage is in the reprogramming interval based on a preset reference voltage and incremental step pulse programming, wherein the reprogramming voltage interval is defined by a start voltage and an end voltage, the start voltage is less than the read voltage of the target threshold voltage distribution state, and the end voltage can be determined according to the data retention time requirement of the target threshold voltage distribution state, so that the reprogrammed storage cell can be determined according to the reprogramming voltage interval, and the threshold voltage after reprogramming can be determined according to the reference voltage, which has more adjustability and can meet more practical application scenarios compared to the prior art in which both are determined according to the reference voltage. In fact, by determining the number of storage cells to be reprogrammed, the extension amount of the data retention time can be adjusted, which can better meet the data requirements in practical applications, and avoid the prior art in which a larger reference voltage is set to obtain a larger data retention time extension value, resulting in the programming of storage cells that do not need to be programmed, thereby reducing the additional loss of storage cells.

[0078] Based on the memory error correction method provided in the above embodiment, the present application embodiment also provides a memory error correction device, referring to Fig. 9 FIG. 1 is a block diagram of a memory error correction device provided in an embodiment of the present application, and the device includes:

[0079] A reprogramming voltage interval determination unit 110 is used to determine a corresponding reprogramming voltage interval for a target threshold voltage distribution; the reprogramming voltage interval is defined by a start voltage and an end voltage, the start voltage is less than a read voltage of the target threshold voltage distribution, and the end voltage is determined according to a data retention time requirement of the target threshold voltage distribution;

[0080] The reprogramming unit 120 is used to program the storage cells whose threshold voltages are located in the reprogramming voltage interval based on the incremental step pulse programming according to the preset reference voltage.

[0081] Optionally, the preset reference voltage is determined according to a data retention time requirement of the target threshold voltage distribution state, and the data retention time requirement is determined according to a historical data retention time of the target threshold voltage distribution state.

[0082] Optionally, the target threshold voltage distribution is one of a plurality of threshold voltage distributions, and a difference between a preset reference voltage corresponding to the threshold voltage distribution and a read voltage corresponding to the threshold voltage distribution is positively correlated with a threshold voltage corresponding to the threshold voltage distribution.

[0083] Optionally, the step voltage of the incremental step pulse programming is in the range of 0.2-0.5V, and / or the difference between the read voltage of the target threshold voltage distribution state and the start voltage is in the range of 0.3-0.5V.

[0084] Optionally, the storage unit is one of MLC, TLC, and QLC.

[0085] The embodiment of the present application provides an error correction device for a memory, which can determine a reprogramming voltage interval for a target threshold voltage distribution state, and program a storage cell whose threshold voltage is in the reprogramming interval based on a preset reference voltage and incremental step pulse programming, wherein the reprogramming voltage interval is defined by a start voltage and an end voltage, the start voltage is less than the read voltage of the target threshold voltage distribution state, and the end voltage can be determined according to the data retention time requirement of the target threshold voltage distribution state, so that the reprogrammed storage cell can be determined according to the reprogramming voltage interval, and the threshold voltage after reprogramming can be determined according to the reference voltage, which has more adjustability and can meet more practical application scenarios compared to the prior art in which both are determined according to the reference voltage. In fact, by determining the number of storage cells to be reprogrammed, the extension amount of the data retention time can be adjusted, which can better meet the data requirements in practical applications, and avoid the prior art in which a larger reference voltage is set to obtain a larger data retention time extension value, resulting in the programming of storage cells that do not need to be programmed, thereby reducing the additional loss of storage cells.

[0086] Each embodiment in this specification is described in a progressive manner, and the same or similar parts between the embodiments can be referred to each other, and each embodiment focuses on the differences from other embodiments. In particular, for the device embodiment, since it is basically similar to the method embodiment, the description is relatively simple, and the relevant parts can be referred to the partial description of the method embodiment.

[0087] The above is only a preferred implementation of the present application. Although the present application has been disclosed as a preferred embodiment, it is not intended to limit the present application. Any technician familiar with the art can use the above disclosed methods and technical contents to make many possible changes and modifications to the technical solution of the present application without departing from the scope of the technical solution of the present application, or modify it into an equivalent embodiment of equivalent changes. Therefore, any simple modification, equivalent change and modification made to the above embodiments based on the technical essence of the present application without departing from the content of the technical solution of the present application still falls within the scope of protection of the technical solution of the present application.

Claims

1. A memory error correction method, characterized in that: include: Determining a corresponding reprogramming voltage interval for a target threshold voltage distribution state; The reprogramming voltage interval is defined by a start voltage and an end voltage, the start voltage is less than a read voltage of the target threshold voltage distribution state, and the end voltage is determined according to a data retention time requirement of the target threshold voltage distribution state; an absolute value of a difference between the start voltage and the read voltage falls within a preset range; According to a preset reference voltage, based on incremental step pulse programming, storage cells whose threshold voltage is in the reprogramming voltage interval are programmed so that the threshold voltage of the storage cells in the reprogramming voltage interval is greater than the preset reference voltage after programming; the preset reference voltage is determined according to the data retention time requirement of the target threshold voltage distribution state, and the data retention time requirement is determined according to the historical data retention time of the target threshold voltage distribution state; the preset reference voltage is greater than the termination voltage.

2. The method according to claim 1, characterized in that The target threshold voltage distribution is one of a plurality of threshold voltage distributions, and a difference between a preset reference voltage corresponding to the threshold voltage distribution and a read voltage corresponding to the threshold voltage distribution is positively correlated with a threshold voltage corresponding to the threshold voltage distribution.

3. The method according to any one of claims 1 to 2, characterized in that: The step voltage of the incremental step pulse programming is in the range of 0.2-0.5V, and / or the difference between the read voltage of the target threshold voltage distribution state and the start voltage is in the range of 0.3-0.5V.

4. The method according to any one of claims 1 to 2, characterized in that: The storage unit is one of MLC, TLC and QLC.

5. A memory error correction device, characterized in that: include: a reprogramming voltage interval determination unit, configured to determine a corresponding reprogramming voltage interval for a target threshold voltage distribution state; The reprogramming voltage interval is defined by a start voltage and an end voltage, the start voltage is less than a read voltage of the target threshold voltage distribution state, and the end voltage is determined according to a data retention time requirement of the target threshold voltage distribution state; an absolute value of a difference between the start voltage and the read voltage falls within a preset range; A reprogramming unit is used to program storage cells whose threshold voltages are located in the reprogramming voltage interval based on incremental step pulse programming according to a preset reference voltage, so that the threshold voltages of the storage cells in the reprogramming voltage interval are greater than the preset reference voltage after programming; the preset reference voltage is determined according to the data retention time requirement of the target threshold voltage distribution state, and the data retention time requirement is determined according to the historical data retention time of the target threshold voltage distribution state; the preset reference voltage is greater than the termination voltage.

6. The device according to claim 5, characterized in that The target threshold voltage distribution is one of a plurality of threshold voltage distributions, and a difference between a preset reference voltage corresponding to the threshold voltage distribution and a read voltage corresponding to the threshold voltage distribution is positively correlated with a threshold voltage corresponding to the threshold voltage distribution.

7. The device according to any one of claims 5 to 6, characterized in that: The step voltage of the incremental step pulse programming is in the range of 0.2-0.5V, and / or the difference between the read voltage of the target threshold voltage distribution state and the start voltage is in the range of 0.3-0.5V.

8. The device according to any one of claims 5 to 6, characterized in that: The storage unit is one of MLC, TLC and QLC.

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