Analog-to-digital conversion device and method

By introducing a control unit into the analog-to-digital conversion device, integrating multiple analog-to-digital conversion requests, the problem of conflict between analog-to-digital signal conversion requests between multi-core MCUs is solved, and more efficient analog-to-digital conversion and lower system load are achieved.

CN113055009BActive Publication Date: 2025-03-21HYUNDAI AUTOEVER
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Patent Information

Application Number
CN202011364545.2
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Priority Date
2019-12-27
Filing Date
2020-11-27
Publication Date
2025-03-21
Estimated Expiration
2040-11-27

AI Technical Summary

Technical Problem

Prior Art During the analog-to-digital conversion process, analog-to-digital signal conversion request conflicts between multiple core MCUs, resulting in inefficiency and increased system load.

Method used

By introducing a control unit into the analog-to-digital conversion device, a plurality of analog-to-digital conversion requests are integrated, and based on the periodicity and delay allowable time of the request, it is determined whether to integrate non-periodic requests into the periodic request, thereby reducing the number of analog-to-digital conversions and system load.

Benefits of technology

It effectively reduces the analog-to-digital conversion efficiency and system load, solves the problem of analog-to-digital conversion request conflict, and improves the reliability and efficiency of the system.

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Abstract

The present invention relates to an analog-to-digital conversion device and method. The present invention comprises: a control unit, which is used to receive analog-to-digital conversion requests from multiple processing modules; and an analog-to-digital converter, which performs analog-to-digital conversion according to the analog-to-digital conversion requests received from the control unit, wherein the control unit integrates the analog-to-digital conversion requests according to the periodicity of the AD conversion requests and transmits them to the analog-to-digital converter.
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Description

Technical Field

[0001] The present invention relates to an analog-to-digital conversion device and method. More specifically, the present invention relates to an analog-to-digital conversion device and method capable of processing multiple analog-to-digital signal conversion requests by integration. Background Art

[0002] As safety and productivity issues increase in the automotive industry, the need for standardized software platforms that guarantee reliability and reusability is also increasing. AUTOSAR (AUTomotive Open System Architecture) is a standard platform for vehicle electronic software developed for such reliability and reusability purposes, and many automotive companies are committed to developing commercial vehicles equipped with platforms developed based on AUTOSAR.

[0003] The AUTOSAR architecture is installed on the electronic control unit (ECU), which is the basic unit of vehicle control. Each ECU consists of a basic software layer (BSW) module, application software components running on it, and a runtime environment (RTE) that supports communication between them in order to perform functions.

[0004] In addition, electronic control devices installed in vehicles in the past used microcontrollers (MCU) to perform each control function. These MCUs only have one core, but recently, multi-core MCUs with multiple cores have been used, and each core is being developed to be able to perform a control function independently.

[0005] In the process of ECU executing vehicle control, there are many times when it is necessary to receive analog signals and convert them into digital signals. However, even if the ADC (Analog-Digital Converter) that converts analog signals into digital signals has multiple channels, when an analog signal is converted into a digital signal through any one channel, the signal cannot be converted through other channels. In other words, when the analog-to-digital signal conversion is performed through one channel, the analog-to-digital signal conversion through other channels will be ignored (the ADC will just return "Not OK").

[0006] Furthermore, even when a multi-core MCU is used, each core individually requests AD conversion from an ADC (Analog-Digital Converter) that converts analog signals into digital signals. Therefore, when one core requests signal conversion from the ADC, AD conversion requests from other cores often fail.

[0007] In addition, in the process of reading the conversion result from the ADC, there is a problem of consuming a lot of load and increasing the load of the entire platform.

[0008] Prior art documents

[0009] Patent Documents

[0010] Patent Document 1 Korean Patent Publication No. 10-2014-0092131 Summary of the invention

[0011] Technical issues to be solved

[0012] In order to solve the above problems, an object of the present invention is to provide an analog-to-digital conversion device and method, which can reduce the analog-to-digital conversion efficiency and system load by integrating and processing digital conversion requests of multiple analog signals.

[0013] Solutions to technical problems

[0014] The present invention provides an analog-to-digital conversion device, which includes: a control unit, used to receive analog-to-digital conversion requests (AD conversion) from multiple processing modules; and an analog-to-digital converter (ADC), used to perform analog-to-digital conversion according to the analog-to-digital conversion requests received from the control unit, and the control unit integrates the analog-to-digital conversion requests according to the periodicity of the analog-to-digital conversion requests and transmits them to the analog-to-digital converter.

[0015] In one embodiment, when the analog-to-digital conversion request is periodic, the control unit may transmit the analog-to-digital conversion request to the analog-to-digital converter at a prescribed time interval.

[0016] In one embodiment, when the analog-to-digital conversion request is a non-periodic analog-to-digital conversion request, the control unit may integrate a periodic analog-to-digital conversion request to be executed after the non-periodic analog-to-digital conversion request with the non-periodic analog-to-digital conversion request.

[0017] Moreover, a delay permission time is set in the non-periodic analog-to-digital conversion request, and the delay permission time is an allowed delay time for analog-to-digital conversion. When the delay permission time is longer than the time until the periodic analog-to-digital conversion request, the control unit can integrate the non-periodic analog-to-digital conversion request into the periodic analog-to-digital conversion request.

[0018] Moreover, a delay allowance time is set in the non-periodic analog-to-digital conversion request, and the delay allowance time is the allowable delay time for analog-to-digital conversion. When the delay allowance time is less than the time until the periodic analog-to-digital conversion request, the control unit can additionally process the non-periodic analog-to-digital conversion request.

[0019] In one embodiment, the control unit includes: a transceiver unit for sending and receiving signals; a conversion information storage unit for storing information of the processing module requesting the analog-to-digital conversion; and an analog-to-digital conversion integration unit for integrating the analog-to-digital conversion request and transmitting it.

[0020] Furthermore, the conversion information storage unit may store, as conversion information, whether the analog-to-digital conversion request is periodic, the delay allowable time when the analog-to-digital conversion request is non-periodic, and channel information of the analog-to-digital converter assigned to the analog-to-digital conversion request.

[0021] In one embodiment, the analog-to-digital conversion device includes a multi-core microprocessor, which has a first core, a second core and peripheral devices. The processing module and the control unit are arranged in the first core, the analog-to-digital converter is included in the peripheral devices, and the input-output device that receives the analog-to-digital conversion request from the control unit and transmits it to the analog-to-digital converter is arranged in the second core.

[0022] The peripheral device may be provided with a common memory, and the common memory receives the analog-to-digital conversion request from the first core for temporary storage, and temporarily stores the analog-to-digital conversion result from the analog-to-digital converter.

[0023] The present invention provides an analog-to-digital conversion method, which is a method for converting an analog signal into a digital signal, which includes: (a) a step in which a control unit receives analog-to-digital conversion requests (AD conversion) from multiple processing modules; (b) a step in which the control unit determines the periodicity of the analog-to-digital conversion request; and (c) when the analog-to-digital conversion request is a non-periodic analog-to-digital conversion request, determining whether to integrate a periodic analog-to-digital conversion request to be executed after the non-periodic analog-to-digital conversion request and the non-periodic analog-to-digital conversion request, and executing the analog-to-digital conversion step.

[0024] In one embodiment, in the step (c), the delay allowable time of the non-periodic analog-to-digital conversion request is compared with the time (A) until the periodic analog-to-digital conversion request to be executed after the non-periodic analog-to-digital conversion request. When the delay allowable time is greater than the time (A), the non-periodic analog-to-digital conversion request and the periodic analog-to-digital conversion request can be integrated.

[0025] In one embodiment, in the step (c), the delay allowable time of the non-periodic analog-to-digital conversion request is compared with the time (A) until the periodic analog-to-digital conversion request to be executed after the non-periodic analog-to-digital conversion request, and when the delay allowable time is less than the time (A), the non-periodic analog-to-digital conversion request can be processed additionally.

[0026] In one embodiment, when the non-periodic analog-to-digital conversion request is additionally processed, if there are other non-periodic analog-to-digital conversion requests within the analog-to-digital conversion waiting time that is less than the delay allowable time, the non-periodic analog-to-digital conversion requests are integrated for processing.

[0027] Effects of the Invention

[0028] According to the present invention, by integrating and processing digital conversion requests of a plurality of analog signals, the analog-to-digital conversion efficiency and the system load can be reduced.

[0029] In addition, according to the present invention, the problem of conversion request being rejected during analog-to-digital conversion can be solved. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figure 1 is a block diagram of an analog-to-digital conversion device according to an embodiment of the present invention.

[0031] Figure 2 FIG. 4 is a diagram illustrating an example of AD conversion information in an analog-to-digital conversion device according to an embodiment of the present invention.

[0032] Figure 3 is based on Figure 2 The AD conversion information shown is integrated with an example diagram of AD conversion request processing.

[0033] Figure 4 is a flow chart showing an analog-to-digital conversion method according to an embodiment of the present invention.

[0034] Figure 5 is a block diagram of an analog-to-digital conversion device according to another embodiment of the present invention.

[0035] In the figure:

[0036] 10: Analog-to-digital conversion device, 20: control unit, 30: memory, 40: analog-to-digital converter (ADC) DETAILED DESCRIPTION

[0037] Below, the preferred embodiments of the present invention are described in detail with reference to the accompanying drawings. First, it should be noted that when the components in each figure are marked with reference numerals, the same reference numerals are marked for the same components even if they are represented in different figures. When describing the present invention, if it is determined that the specific description of the relevant known structure or function will make the gist of the present invention unclear, the detailed description thereof will be omitted. Below, the preferred embodiments of the present invention are described, but the technical idea of ​​the present invention is not limited thereto, and it is natural that it can be deformed and implemented in various forms by ordinary technicians in the field.

[0038] Figure 1 is a block diagram of an analog-to-digital conversion device according to an embodiment of the present invention.

[0039] In vehicle control, analog-to-digital conversion (hereinafter referred to as 'AD conversion') is required for various current or voltage values ​​for battery monitoring, sensing values ​​of analog sensors such as radar or ultrasonic sensors, and sensing of steering angles.

[0040] exist Figure 1 In FIG. 1 , multiple processing modules requiring AD conversion are illustrated. The processing modules may be various applications for vehicle control, sensor processing modules, battery monitoring modules, etc. For the convenience of explanation, in FIG. Figure 1 A first processing module 12a, a second processing module 12b, a third processing module 12c, a fourth processing module 12d and a fifth processing module 12e are illustrated, and these processing modules can be implemented in the form of software or hardware.

[0041] According to one embodiment of the present invention, an analog-to-digital conversion device 10 includes: a control unit 20, which receives an AD conversion request from a processing module and transmits the AD conversion result to the processing module; a memory 30, which temporarily stores the AD conversion request and AD conversion result from the control unit 20; and an analog-to-digital converter (ADC) 40, which performs AD conversion at the request of the control unit 20.

[0042] The control unit 20 may include: a transceiver unit 22 for sending and receiving signals; a conversion information storage unit 24 for storing information of the processing module requesting AD conversion; and an analog-to-digital conversion integration unit 26 for integrating the AD conversion request and transmitting it to the memory 30.

[0043] The transceiver 22 receives analog information from the processing module and transmits it to the memory 30. In addition, the transceiver 22 can receive digital signals converted by the ADC 40 and transmit them to the processing module.

[0044] The conversion information storage unit 24 can store information on AD conversion requested by the processing module (AD conversion information). The AD conversion information may include whether the AD conversion request is periodic, the period when the AD conversion request is periodic, the processing delay allowable time when the AD conversion request is non-periodic, and the channel information of the ADC 40 to be allocated for the AD conversion request. The AD conversion information can be stored in the conversion information storage unit 24 in the form of a table.

[0045] The analog-to-digital conversion integration unit 26 can integrate multiple AD conversion requests and transmit them to the memory 30 so that the ADC 40 can perform conversion at the same time.

[0046] ADC40 has multiple channels. In one embodiment, ADC40 may have 8 channels and digitally convert to 10-bit values. However, in the embodiment of the present invention, ADC40 may have 4 channels, 16 channels, etc., and the output digital value may be less than or greater than 10 bits.

[0047] Figure 2 is a diagram exemplarily showing AD conversion information in an analog-to-digital conversion device according to an embodiment of the present invention, Figure 3 It is shown based on Figure 2 The AD conversion information shown is integrated with an example diagram of AD conversion request processing.

[0048] Reference Figure 2 , exemplifies the AD conversion information stored in the conversion information storage unit 24. The AD conversion information may be pre-stored or may be received from each processing module. The second processing module 12b and the fourth processing module 12d periodically request AD conversion, and the remaining processing modules 12a, 12c, and 12e non-periodically request AD conversion. The AD conversion cycle of the second processing module 12b is 10ms, and the AD conversion cycle of the fourth processing module 12d is 20ms. The delay allowable time after the AD conversion request of the first processing module 12a, the third processing module 12c, and the fifth processing module 12e is 3ms, 2ms, and 5ms, respectively. In addition, the first processing module 12a, the second processing module 12b, the third processing module 12c, the fourth processing module 12d, and the fifth processing module 12e are respectively assigned to 1, 2, 4, 5, and 8 of the channels of the ADC40.

[0049] The analog-to-digital conversion integration unit 26 integrates the AD conversion request with reference to the AD conversion information in the conversion information storage unit 24 , which will be described below.

[0050] Figure 3 (a) shows the periodic AD conversion process, Figure 3 (b) shows a non-periodic AD conversion request, Figure 3 (c) shows the integrated processing AD conversion.

[0051] Reference Figure 3 (a) of the present invention processes the periodic AD conversion requests of the second processing module 12b and the fourth processing module 12d according to a predetermined period. Figure 2 In the example, the AD conversion cycles of the second processing module 12b and the fourth processing module 12d are 10ms and 20ms respectively. Figure 3 In the example, AD conversion requested by the second processing module 12b indicated by ② and AD conversion requested by the fourth processing module 12d indicated by ④ are performed in corresponding cycles.

[0052] However, if Figure 3As shown in (b), it is assumed that there is a non-periodic AD conversion request in the first processing module 12a represented by ①, there is a non-periodic AD conversion request in the third processing module 12c represented by ③, and there is a non-periodic AD conversion request in the fifth processing 12e represented by ⑤.

[0053] In case A, the AD conversion request of the first processing module 12a is 13ms, and the periodic AD conversion request of the second processing module 12b is predetermined at 15ms. Figure 2 , the delay allowed time of AD conversion of the first processing module 12a is 3ms. Figure 3 As shown in (c), the AD conversion of the first processing module 12a and the AD conversion of the second processing module 12b can be processed together, and the AD conversion is performed by the allocated channel of the ADC 40. Figure 2 , the AD conversion requested by the first processing module 12 a may be performed on channel 1 of the ADC 40 , and the AD conversion requested by the second processing module 12 b may be performed on channel 2 of the ADC 40 .

[0054] In case B, the AD conversion request of the third processing module 12c is at 22ms, but the periodic AD conversion thereafter is predetermined at 25ms for the AD conversion request of the second processing module 12b. Figure 2 Since the allowed delay time of the AD conversion of the third processing module 12c is 2ms, the AD conversion request of the third processing module 12c cannot be executed together with other periodic AD conversions, and therefore, the AD conversion is performed separately.

[0055] In case C, the AD conversion request of the fifth processing module 12e is 27ms, and the periodic AD conversion request of the fourth processing module 12d is predetermined at 30ms. Figure 2 , the delay allowed time of the AD conversion of the fifth processing module 12e is 5ms. Figure 3 As shown in (c), the AD conversion of the fifth processing module 12e can be processed together with the AD conversion of the fourth processing module 12d.

[0056] In case D, the AD conversion request of the fifth processing module 12e is 36ms. The delay allowable time of the AD conversion of the fifth processing module 12e is 5ms. Since other periodic AD conversions are not scheduled within the delay allowable time, AD conversion must be performed separately. However, in the case of case D, it is also possible to consider delaying the allowable time and waiting for other AD conversion requests (waiting for AD conversion). As in case D, when the AD conversion request of the first processing module 12a is 38ms, the AD conversions of the fifth processing module 12e and the first processing module 12a can be integrated and processed together. In this case, the AD conversion waiting time should be shorter than the delay allowable time, and the AD conversion waiting time can be set differently according to the characteristics of the system.

[0057] Figure 4 is a flow chart showing an analog-to-digital conversion method according to an embodiment of the present invention.

[0058] The analog-to-digital conversion device 10 receives an AD conversion request from a processing module ( S10 ).

[0059] The control unit 20 of the analog-to-digital conversion device 10 determines whether the received AD conversion request is periodic or aperiodic ( S20 ). As described above, the control unit 20 can determine the periodicity of the AD conversion request based on the information stored in the conversion information storage unit 24 .

[0060] In the case of a periodic AD conversion request, the control unit 20 transmits the corresponding AD conversion request to the ADC 40 ( S50 ).

[0061] In the case of a non-periodic AD conversion request, the control unit 20 checks the delay allowable time for the AD conversion request, and compares the delay allowable time with the time (A) until the fastest AD conversion cycle in the next periodic AD conversion (S30).

[0062] When the result of the judgment in step (S30) is that the delay allowable time is less than the time (A) until the next AD conversion cycle, the AD conversion request must be executed immediately, and therefore the AD conversion request is transmitted to the ADC 40 (S50).

[0063] However, when the result of the judgment in step (S30) is that the delay allowable time is longer than the time (A) until the next AD conversion cycle, the AD conversion request is integrated into the next AD conversion cycle (S40) and executed together with the AD conversion performed periodically (S50).

[0064] After step (S50), ADC 40 executes the AD conversion request transmitted to the channel and transmits the AD conversion result to control unit 20 (S60). Control unit 20 may transmit the AD conversion result to the processing module again.

[0065] On the other hand, in an embodiment of the present invention, when the judgment result of step (S30) is that the delay allowable time is less than the time (A) until the next AD conversion cycle, the AD conversion request is not executed immediately, and when there are other non-periodic AD conversion requests within the AD conversion waiting time (delay allowable time), these requests can be integrated and the AD conversion can be requested to the ADC.

[0066] Figure 5 is a block diagram of an analog-to-digital conversion device according to another embodiment of the present invention.

[0067] Figure 5 The analog-to-digital conversion device 100 is based on a multi-core microprocessor and includes a first core 110A, a second core 110B, and a timer, a memory, and an ADC 140 as a peripheral device 150 .

[0068] The first core 110A and the second core 110B are implemented using an AUTOSAR-based software platform, which may include a basic software layer (BSW) module, an application software component (APP) running thereon, and a runtime environment (RTE) supporting communication therebetween. The basic software layer (BSW) modules BSW1, BSW2, BSW3, BM (battery management), others 1, others 2, and application software components APP1, APP2, APP3 may request AD conversion from the control unit 120.

[0069] The control unit 120 may be configured to execute and refer to Figure 1 The control unit 20 has the same functions as described above.

[0070] The control unit 120 may integrate the AD conversion requests and transmit the integrated AD conversion requests to the shared memory 130 .

[0071] The AD conversion request at the control section 120 may be transmitted to the ADC 140 .

[0072] In one embodiment, the AD conversion request to the ADC 140 may be mediated by the second core 110B. That is, the AD conversion request integrated in the first core 110A is stored in the common memory 130, and the second core 110B receives the AD conversion request stored in the common memory 130 using the input / output device (I / O) 114 and may request the ADC 140 to perform the AD conversion. In addition, the second core 110B may receive the AD conversion result in the ADC 140 and transmit it to the control unit 120 of the first core 110A through the common memory 130.

[0073] In the structure, in a multi-core microprocessor composed of multiple cores, one core is set to Figure 5The second core 110B in the ADC 140 is used, and the other cores transmit the AD conversion request to the second core 110B, thereby allowing a specific core to exclusively process the AD conversion request in relation to the ADC 140 .

[0074] The above description is only an example of the technical idea of ​​the present invention. A person skilled in the art of the present invention can make various modifications, changes and substitutions without changing the essential characteristics of the present invention. Therefore, the above-mentioned embodiments and drawings are used to illustrate the technical idea of ​​the present invention, but not to limit the present invention. The scope of the technical idea of ​​the present invention is not limited to these embodiments and drawings. The protection scope of the present invention should be interpreted by the scope of the claims, and should be interpreted as all technical ideas within the equivalent scope are included in the claims of the present invention.

Claims

1. An analog-to-digital conversion device, characterized in that: include: A control unit, used for receiving analog-to-digital conversion requests from a plurality of processing modules; as well as an analog-to-digital converter, configured to perform analog-to-digital conversion according to the analog-to-digital conversion request received from the control unit, The control unit integrates the analog-to-digital conversion request according to the periodicity of the analog-to-digital conversion request and transmits the analog-to-digital conversion request to the analog-to-digital converter, When the analog-to-digital conversion request is a non-periodic analog-to-digital conversion request, the control section integrates a periodic analog-to-digital conversion request to be executed after the non-periodic analog-to-digital conversion request with the non-periodic analog-to-digital conversion request.

2. The analog-to-digital conversion device according to claim 1, characterized in that: When the analog-to-digital conversion request is periodic, the control unit transmits the analog-to-digital conversion request to the analog-to-digital converter at a prescribed time interval.

3. The analog-to-digital conversion device according to claim 1, characterized in that: The non-periodic analog-to-digital conversion request is provided with a delay allowance time, and the delay allowance time is an allowable delay time for analog-to-digital conversion. When the delay allowable time is longer than a time until the periodic analog-to-digital conversion request, the control unit integrates the non-periodic analog-to-digital conversion request into the periodic analog-to-digital conversion request.

4. The analog-to-digital conversion device according to claim 1, characterized in that: The non-periodic analog-to-digital conversion request is provided with a delay allowance time, and the delay allowance time is an allowable delay time for analog-to-digital conversion. When the delay allowable time is less than the time until the periodic analog-to-digital conversion request, the control section additionally processes the non-periodic analog-to-digital conversion request.

5. The analog-to-digital conversion device according to claim 1, characterized in that: The control unit comprises: A transceiver unit, used for sending and receiving signals; a conversion information storage unit, used to store information of the processing module requesting the analog-to-digital conversion; and The analog-to-digital conversion integration unit integrates the analog-to-digital conversion request and transmits it.

6. The analog-to-digital conversion device according to claim 5, characterized in that: The conversion information storage unit stores, as conversion information, whether the analog-to-digital conversion request is periodic, a delay allowable time when the analog-to-digital conversion request is non-periodic, and channel information of the analog-to-digital converter assigned to the analog-to-digital conversion request.

7. The analog-to-digital conversion device according to any one of claims 1 to 6, characterized in that: The multi-core microprocessor comprises a first core, a second core and a peripheral device. The processing module and the control unit are arranged in the first core, The analog-to-digital converter is included in the peripheral device, The input / output device that receives the analog-to-digital conversion request from the control unit and transmits it to the analog-to-digital converter is arranged in the second core.

8. The analog-to-digital conversion device according to claim 7, characterized in that: The peripheral device is provided with a common memory, and the common memory receives the analog-to-digital conversion request from the first core and temporarily stores the analog-to-digital conversion result from the analog-to-digital converter.

9. An analog-to-digital conversion method, which is a method for converting an analog signal into a digital signal, characterized in that: include: (a) a step in which a control unit receives analog-to-digital conversion requests from a plurality of processing modules; (b) the control unit determines the periodicity of the analog-to-digital conversion request; as well as (c) When the analog-to-digital conversion request is a non-periodic analog-to-digital conversion request, a step of integrating a periodic analog-to-digital conversion request to be executed after the non-periodic analog-to-digital conversion request with the non-periodic analog-to-digital conversion request to perform analog-to-digital converter conversion.

10. The analog-to-digital conversion method according to claim 9, characterized in that: In the step (c), the delay allowable time of the non-periodic analog-to-digital conversion request is compared with the time until the periodic analog-to-digital conversion request is to be executed after the non-periodic analog-to-digital conversion request, and when the delay allowable time is greater than the time until the periodic analog-to-digital conversion request is to be executed after the non-periodic analog-to-digital conversion request, the non-periodic analog-to-digital conversion request and the periodic analog-to-digital conversion request are integrated.

11. The analog-to-digital conversion method according to claim 9, characterized in that: In the step (c), the delay allowable time of the non-periodic analog-to-digital conversion request is compared with the time until the periodic analog-to-digital conversion request is to be executed after the non-periodic analog-to-digital conversion request, and when the delay allowable time is less than the time until the periodic analog-to-digital conversion request is to be executed after the non-periodic analog-to-digital conversion request, the non-periodic analog-to-digital conversion request is additionally processed.

12. The analog-to-digital conversion method according to claim 11, characterized in that: When the non-periodic analog-to-digital conversion request is processed separately, if there are other non-periodic analog-to-digital conversion requests within the analog-to-digital conversion waiting time that is less than the delay allowable time, the non-periodic analog-to-digital conversion request and the other non-periodic analog-to-digital conversion requests are integrated for processing.

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