Light detection device, optical device and manufacturing method thereof

Abstract

The present invention provides a light detection device and a method for manufacturing the same. The light detection device includes an insulating layer, a silicon layer, a light detection layer, N first doped regions, and M second doped regions. The silicon layer is disposed above the insulating layer. The light detection layer is disposed above the silicon layer and extends within at least a portion of the silicon layer. The first doped region has a first dopant type and is disposed within the light detection layer. The second doped region has a second dopant type and is disposed within the light detection layer. The first doped region and the second doped region are alternately arranged. M and N are integers equal to or greater than 2. The present invention also provides an optical device.

Description

Technical Field

[0001] Embodiments of the present invention relate to a light detection device, an optical device and a method for manufacturing the same. Background Art

[0002] Optical signals can be used in a variety of applications, including high-speed and secure data transmission between two or more devices. Photodiodes are used to convert received photons into an electric current. The performance of photodiodes is usually evaluated according to several parameters, such as quantum efficiency, operating wavelength, sensitivity, etc. It is desirable to improve the performance of photodiodes. Summary of the invention

[0003] According to one aspect of an embodiment of the present invention, there is provided a light detecting device, comprising: an insulating layer; a silicon layer located above the insulating layer; a light detecting layer located above the silicon layer and extending within at least a portion of the silicon layer; N first doping regions of a first dopant type located within the light detecting layer; and M second doping regions of a second dopant type located within the light detecting layer, wherein the first doping regions and the second doping regions are arranged alternately; and wherein M and N are integers equal to or greater than 2.

[0004] According to another aspect of an embodiment of the present invention, an optical device is provided, comprising: an insulating layer; a silicon layer located above the insulating layer; a light detection layer located above the silicon layer and extending within at least a portion of the silicon layer, the light detection layer having a first region and a second region separated from the first region, wherein the first region of the light detection layer is configured to convert light into a first photocurrent, wherein the second region is configured to convert light received from the first region into a second photocurrent, and wherein an amplitude of the second photocurrent is less than an amplitude of the first photocurrent.

[0005] According to another aspect of an embodiment of the present invention, there is provided a method for manufacturing a light detecting device, comprising: (a) providing a substrate; (b) forming an insulating layer on the substrate; (c) forming a silicon layer on the insulating layer; (d) forming a light detecting layer located on the silicon layer and extending within at least a portion of the silicon layer; (e) forming two or more first doping regions of a first dopant type in the light detecting layer; and (f) forming two or more second doping regions of a second dopant type in the light detecting layer, wherein the first doping regions and the second doping regions are arranged alternately. BRIEF DESCRIPTION OF THE DRAWINGS

[0006] Aspects of the present invention will be best understood from the following detailed description when read in conjunction with the accompanying drawings. It should be noted that, in accordance with standard practice in the industry, the various components are not drawn to scale. In fact, the dimensions of the various components may be arbitrarily increased or decreased for clarity of discussion.

[0007] Figure 1AA top view of a light detection device according to some embodiments of the present disclosure is shown.

[0008] Figure 1B According to some embodiments of the present disclosure, Figure 1A A cross-sectional view of a light detection device is shown.

[0009] Figure 1C According to some embodiments of the present disclosure, Figure 1A A cross-sectional view of a light detection device is shown.

[0010] Figure 1D According to some embodiments of the present disclosure, Figure 1A A cross-sectional view of a light detection device is shown.

[0011] Figure 2A A top view of a light detection device according to some embodiments of the present disclosure is shown.

[0012] Figure 2B According to some embodiments of the present disclosure, Figure 2A A cross-sectional view of a light detection device is shown.

[0013] Figure 2C According to some embodiments of the present disclosure, Figure 2A A cross-sectional view of a light detection device is shown.

[0014] Figure 3A A top view of a light detection device according to some embodiments of the present disclosure is shown.

[0015] Figure 3B According to some embodiments of the present disclosure, Figure 3A A cross-sectional view of a light detection device is shown.

[0016] Figure 3C According to some embodiments of the present disclosure, Figure 3A A cross-sectional view of a light detection device is shown.

[0017] Figure 4A A top view of a light detection device according to some embodiments of the present disclosure is shown.

[0018] Figure 4B A schematic diagram of a current generating circuit according to some embodiments of the present disclosure is shown.

[0019] FIG. 5A to FIG. 5D is a series of cross-sectional views illustrating processing steps for fabricating a light detecting device according to some embodiments of the present disclosure. DETAILED DESCRIPTION

[0020] The following disclosure provides many different embodiments or examples for realizing the different features of the provided subject matter. Specific examples of components and arrangements are described below to simplify the present invention. Of course, these are merely examples and are not intended to limit the present invention. For example, in the following description, forming a first component above or on a second component may include an embodiment in which the first component and the second component are directly contacted, and may also include an embodiment in which an additional component may be formed between the first component and the second component so that the first component and the second component may not be in direct contact. In addition, the present invention may repeat reference numerals and / or characters in various examples. This repetition is for the purpose of simplicity and clarity, and does not itself indicate the relationship between the various embodiments and / or configurations discussed.

[0021] Furthermore, for ease of description, spatially relative terms such as "below," "beneath," "lower," "above," "upper," etc. may be used herein to describe the relationship of one element or component to another (or additional) elements or components as shown in the figures. The spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. The device may be otherwise oriented (rotated 90 degrees or at other orientations), and the spatially relative descriptors used herein should likewise be interpreted accordingly.

[0022] The manufacture and use of the embodiments are discussed in detail below. However, it should be understood that the present invention provides many applicable inventive concepts that can be embodied in a variety of specific environments. The specific embodiments discussed only illustrate specific ways to manufacture and use the present invention and do not limit the scope of the present invention.

[0023] Figure 1A A top view of a light detection device 2 according to some embodiments of the present disclosure is shown. Figure 1B According to some embodiments of the present disclosure, Figure 1A A cross-sectional view of the light detection device 2 taken along line BB′ is shown. Figure 1C According to some embodiments of the present disclosure, Figure 1A A cross-sectional view of the light detection device 2 taken along line CC' is shown. Figure 1D According to some embodiments of the present disclosure, Figure 1A A cross-sectional view of the light detection device 2 taken along line DD′ is shown. In some embodiments, the light detection device 2 is a photodiode or a light detector. The light detector 2 may include a substrate 20, an insulating layer 21, a silicon layer 22, and a light detection layer 23.

[0024] The substrate 20 includes a semiconductor material such as silicon. In some embodiments, the substrate 20 may include other semiconductor materials such as silicon germanium, silicon carbide, gallium arsenide, etc. Optionally, the substrate 20 includes another element semiconductor such as silicon germanium; a compound semiconductor including gallium arsenide, gallium phosphide, indium phosphide, indium arsenide, or indium antimonide; or an alloy-type semiconductor including SiGe, GaAsP, AlInAs, AlGaAs, GaInAs, GaInP, or GaInAsP; or a combination thereof. In yet another embodiment, the substrate 20 may be SOI. In other alternatives, the substrate 20 may include a doped epitaxial layer, a gradient semiconductor layer, and / or a semiconductor layer covering another semiconductor layer of a different type, such as a silicon layer on a silicon germanium layer.

[0025] The insulating layer 21 is disposed on the substrate 20. The insulating layer 21 may be a shallow trench isolation (STI) or a local oxidation of silicon (LOCOS). In some embodiments, the insulating layer 21 may include an oxide (e.g., silicon oxide or germanium oxide), a nitride (e.g., silicon nitride), an oxynitride (e.g., GaP oxynitride), SiO2, a nitrogen-containing oxide (e.g., nitrogen-containing SiO2), a micro-oxynitride (e.g., SiO2 implanted with N2), Si x O y N z , polymeric materials, etc. In some embodiments, the insulating layer 21 may also be referred to as a buried oxide or BOX layer.

[0026] The silicon layer 22 is disposed on the insulating layer 21. Figure 1A and Figure 1D As shown, the silicon layer 22 may include a plurality of n-doped regions 22n1, 22n2, 22n3, 22n4 and p-doped regions 22p1, 22p2, 22p3 and 22p4. The n-doped regions 22n1, 22n2, 22n3, 22n4 and the p-doped regions 22p1, 22p2, 22p3 and 22p4 are arranged alternately. In other words, there is an n-doped region between two adjacent p-doped regions, or there is a p-doped region between two adjacent n-doped regions. For example, the n-doped region 22n1 may be arranged between two adjacent p-doped regions 22p1 and 22p2. For example, the p-doped region 22p2 may be arranged between two adjacent n-doped regions 22n1 and 22n2. In some embodiments, there may be any number of n-doped regions and p-doped regions, depending on different design specifications. For example, there may be N n-doped regions and N p-doped regions, where N is an integer greater than 1. The doping concentration of the n-type doping regions 22n1, 22n1, 22n3, 22n4 and the p-type doping regions 22p1, 22p2, 22p3, 22p4 may vary depending on the process used and the specific design. In some embodiments, the doping concentration of the p-type material or the n-type material may be from about 10 17Atoms / cm3 to 10 19 In the range of atoms / cubic centimeter.

[0027] The light detection layer 23 is disposed above the silicon layer 22 and extends within at least a portion of the silicon layer 22. In some embodiments, the light detection layer 23 may be formed of or include silicon, germanium, indium gallium arsenide, lead sulfide, mercury cadmium telluride, or any other suitable material.

[0028] In some embodiments, Figure 1B As shown, the p-doped region 22p1 may diffuse or extend within the photodetection layer 23. For example, the p-doped region 22p1 may include a first portion disposed within a portion of the silicon layer 22 adjacent to the side 231 of the photodetection layer 23, and a second portion disposed within the photodetection layer 23. In some embodiments, the thickness of the p-doped region 22p1 within the photodetection layer 23 (e.g., the second portion of the p-doped region 22p1) is equal to or less than the thickness of the photodetection layer 23. In some embodiments, the thickness of the p-doped region 22p1 within the photodetection layer 23 is greater than the thickness of the p-doped region 22p1 within the silicon layer 22 (e.g., the first portion of the p-doped region 22p1). In some embodiments, the p-doped region 22p1 may diffuse from the side 231 of the photodetection layer 23 to the opposite side 232. For example, the width of the p-doped region 22p1 within the photodetection layer 23 may be substantially the same as the width of the photodetection layer 23.

[0029] In other embodiments, Figure 2A and Figure 2B , which respectively show a top view and a cross-sectional view of the light detection device 3 according to some embodiments of the present disclosure, the p-doped region 22p1 is not diffused to the side 232 of the light detection layer 23. For example, the width of the p-doped region 22p1 in the light detection layer 23 may be smaller than the width of the light detection layer 23. For example, there may be a distance between the side 232 of the light detection layer 23 and the p-doped region 22p1.

[0030] In other embodiments, Figure 3A and Figure 3B As shown, a top view and a cross-sectional view of the light detecting device 4 according to some embodiments of the present disclosure are respectively shown, and the p-doped region 22p1 also diffuses out from the side 232 of the light detecting layer 23 and diffuses in a portion of the silicon layer 22 adjacent to the side 232 of the light detecting layer 23. For example, the p-doped region 22p1 may include a first portion disposed in a portion of the silicon layer 22 adjacent to the side 231 of the light detecting layer 23, a second portion disposed in the light detecting layer 23, and a third portion disposed in a portion of the silicon layer 22 adjacent to the side 232 of the light detecting layer 23.

[0031] refer to Figure 1C, the n-doped region 22n1 may diffuse or extend within the photo detection layer 23. In some embodiments, the thickness of the n-doped region 22n1 within the photo detection layer 23 is equal to or less than the thickness of the photo detection layer 23. In some embodiments, the thickness of the n-doped region 22n1 within the photo detection layer 23 is greater than the thickness of the n-doped region 22n1 within the silicon layer 22. In some embodiments, the n-doped region 22n1 may diffuse from the side 232 of the photo detection layer 23 to the side 231. For example, the width of the n-doped region 22n1 within the photo detection layer 23 may be substantially the same as the width of the photo detection layer 23.

[0032] In other embodiments, Figure 2A and Figure 2C , which respectively show a top view and a cross-sectional view of a light detection device 3 according to some embodiments of the present disclosure, the n-doped region 22n1 is not diffused to the side 231 of the light detection layer 23. For example, the width of the n-doped region 22n1 in the light detection layer 23 may be smaller than the width of the light detection layer 23. For example, there may be a distance between the side 231 of the light detection layer 23 and the n-doped region 22n1.

[0033] In other embodiments, Figure 3A and Figure 3C As shown, a top view and a cross-sectional view of the light detection device 4 according to some embodiments of the present disclosure are respectively shown. The n-doped region 22n1 also diffuses out from the side 231 of the light detection layer 23 and diffuses within the portion of the silicon layer 22 adjacent to the side 231 of the light detection layer 23.

[0034] refer to Figure 1D The light detection layer 23 is disposed on the silicon layer 22, and a portion of the light detection layer 23 is within the silicon layer 22. For example, the silicon layer 22 may include an opening or a groove, and the light detection layer 23 may be disposed within the opening or the groove. The light detection layer 23 may protrude from the top surface of the silicon layer 22. In some embodiments, a portion of the silicon layer 22 is disposed between the light detection layer 23 and the insulating layer 21.

[0035] like Figure 1A As shown, the silicon layer 22 may include or define a waveguide structure 22w. The waveguide structure 22w may extend in a first direction (e.g., axial direction) substantially parallel to the length of the light detection layer. The waveguide structure 22w may be used as a conduit for guiding light (or photons) along the first direction into the light detection layer 23. The p-doped regions 22p1, 22p2, 22p3, 22p4 and the n-doped regions 22n1, 22n2, 22n3, 22n4 are alternately arranged in a direction substantially perpendicular to the first direction.

[0036] In operation, the p-doped regions 22p1, 22p2, 22p3, 22p4 are electrically coupled to cathode nodes V21, V23, V25, V27, respectively, and the n-doped regions 22n1, 22n2, 22n3, 22n4 are electrically coupled to anode nodes V22, V24, V26, V28, respectively. When the light detection device 2 is biased with appropriate voltages via the cathode nodes V21, V23, V25, V27 and the anode nodes V22, V24, V26, V28, the incident photons will trigger the generation of free electron-hole pairs in the light detection layer 23. The holes move toward the anode nodes V22, V24, V26, V28, and the electrons move toward the cathode nodes V21, V23, V25, V27, and a photocurrent (or sensing current) is generated.

[0037] like Figure 1A As shown, the light detection layer 23 can be divided into a plurality of regions. For example, the light detection layer 23 can include a region defined by a p-doped region 22p1 and an n-doped region 22n1, a region defined by an n-doped region 22n1 and a p-doped region 22p2, a region defined by a p-doped region 22p2 and an n-doped region 22n2, a region defined by an n-doped region 22n2 and a p-doped region 22p3, a region defined by a p-doped region 22p3 and an n-doped region 22n3, a region defined by an n-doped region 22n3 and a p-doped region 22p4, and a region defined by a p-doped region 22p4 and an n-doped region 22n4.

[0038] When light passes through the p-doped region 22p1 and enters the area defined by the light detection layer 23, the p-doped region 22p1 and the n-doped region 22n1, the incident photons will trigger the generation of free electron-hole pairs in the area defined by the light detection layer 23, the p-doped region 22p1 and the n-doped region 22n1. The holes move toward the anode node V22, the electrons move toward the cathode node V21, and a photocurrent (or sensing current) is generated. Similarly, when light passes through the p-doped region 22p1, the n-doped region 22n1 and the p-doped region 22p2 and enters the area defined by the light detection layer 23, the p-doped region 22p2 and the n-doped region 22n2, the incident photons will trigger the generation of free electron-hole pairs in the area defined by the light detection layer 23, the p-doped region 22p2 and the n-doped region 22n2. The holes move toward the anode node V24, the electrons move toward the cathode node V23, and a photocurrent (or sensing current) is generated. Similarly, when light passes through the p-doped region 22p1, the n-doped region 22n1, the p-doped region 22p2, the n-doped region 22n2, and the p-doped region 22p3 and enters the region defined by the light detection layer 23, the p-doped region 22p3, and the n-doped region 22n3, the incident photons will trigger the generation of free electron-hole pairs in the region defined by the light detection layer 23, the p-doped region 22p3, and the n-doped region 22n3. The holes move toward the anode node V26, the electrons move toward the cathode node V25, and a photocurrent (or sensing current) is generated. Similarly, when light passes through the p-doped region 22p1, the n-doped region 22n1, the p-doped region 22p2, the n-doped region 22n2, the p-doped region 22p3, the n-doped region 22n3 and the p-doped region 22p4 and enters the region defined by the light detection layer 23, the p-doped region 22p4 and the n-doped region 22n4, the incident photons will trigger the generation of free electron-hole pairs in the region defined by the light detection layer 23, the p-doped region 22p4 and the n-doped region 22n4. The holes move toward the anode node V28, the electrons move toward the cathode node V27, and a photocurrent (or sensing current) is generated.

[0039] In some embodiments, the light detection device may include an n-doped region and a p-doped region located at two opposite ends of the light detection layer of the light detection device, so that the distance between the n-doped region and the p-doped region is limited by the width of the light detection layer, and the generation rate of the photocurrent is also limited by the width of the light detection layer. Figure 1A , Figure 2A and Figure 3AIn the embodiment shown, since the p-doped regions 22p1, 22p2, 22p3, 22p4 and the n-doped regions 22n1, 22n2, 22n3, 22n4 are arranged entirely or partially across the light detection layer 23, the distance between two adjacent doped regions will not be limited by the width W21 of the light detection layer 23. In some embodiments, the distance between the p-doped region and the n-doped region adjacent thereto (for example, the p-doped region 22p1 and the n-doped region 22n1) is in the range of about a few nanometers (nm) to about 500 nm, which is smaller than the width W21 of the light detection layer 23 (for example, 0.5 μm to 10 μm). Therefore, the light detection device 2, 3 or 4 has a higher generation rate of photocurrent. The AC bandwidth of the photocurrent generated by the light detection device 2, 3 or 4 is greater than 10 GHz and can reach about several hundred GHz. In some embodiments, if the distance between two adjacent doping regions (eg, the p-doping region 22 p 1 and the n-doping region 22 n 1 ) is 100 nm, the AC bandwidth of the photocurrent is approximately 100 GHz.

[0040] In addition, if the length of the n-doped region and the p-doped region is substantially equal to the length of the light detection layer (e.g., from about 1 μm to about 100 μm), the conductive electrode connected to the n-doped region and the p-doped region may have a relatively large parasitic capacitance, which will further reduce the AC bandwidth of the light detection device. Figure 1A , Figure 2A and Figure 3A In the illustrated embodiment, the length of the n-doped regions 22n1, 22n2, 22n3, 22n4 and the p-doped regions 22p1, 22p2, 22p3, 22p4 is substantially equal to the width W21 of the light detection layer 23 (e.g., from about 0.5 μm to about 10 μm), which can alleviate the parasitic capacitance problem of the conductive electrodes connected to the n-doped regions 22n1, 22n2, 22n3, 22n4 and the p-doped regions 22p1, 22p2, 22p3, 22p4. In some embodiments, the parasitic capacitance between the conductive electrodes (connected to the n-doped regions 22n1, 22n2, 22n3, 22n4 and the p-doped regions 22p1, 22p2, 22p3, 22p4) and the ground can be reduced by N, where N is the sum of the n-doped regions and the p-doped regions.

[0041] Figure 4A The following are some examples according to the present disclosure: Figure 1A The light detection device 2 is connected to the current generating circuit 50 as shown. In some embodiments, the light detection device 2 can be Figure 2A The light detection device 3 shown in Figure 3AThe light detection device 4 shown in the figure or any other suitable light detection device can be replaced. In some embodiments, the current generating circuit 50 can be an equalizer or include an equalizer. The current generating circuit 50 can include one or more DC bias circuits B51, B52, B53, B54, one or more delay circuits D51, D52, D53 and one or more adding circuits (or adders) A51, A52, A53.

[0042] In some embodiments, Figure 4A As shown, cathode nodes V21, V23, V25, V27 are grounded or connected to a lower DC voltage (compared with the DC voltage applied to anode nodes V22, V24, V26, V28), and anode nodes V22, V24, V26, V28 are connected to a higher DC voltage (compared with the DC voltage applied to cathode nodes V21, V23, V25, V27). For example, anode nodes V22, V24, V26, V28 can be connected to respective DC bias circuits B51, B52, B53 and B54. In other embodiments, all anode nodes V22, V24, V26, V28 can be connected to separate DC bias circuits. In some embodiments, anode nodes V22, V24, V26, V28 are provided with the same DC voltage. Optionally, anode nodes V22, V24, V26, V28 can be provided with different DC voltages.

[0043] In operation, when light passes through the p-doped region 22p1 and enters the region defined by the light detection layer 23, the p-doped region 22p1 and the n-doped region 22n1, the incident photons will trigger the generation of free electron-hole pairs in the region defined by the light detection layer 23, the p-doped region 22p1 and the n-doped region 22n1. The holes move toward the anode node V22 and the electrons move toward the cathode node V21 to generate a photocurrent (or sensing current) I O1 When light passes through the p-doped region 22p1, the n-doped region 22n1, and the p-doped region 22p2 and enters the region defined by the light detection layer 23, the p-doped region 22p2, and the n-doped region 22n2, the incident photons will trigger the generation of free electron-hole pairs in the region defined by the light detection layer 23, the p-doped region 22p2, and the n-doped region 22n2. The holes move toward the anode node V24, and the electrons move toward the cathode node V23 to generate a photocurrent (or sensing current) I O2. When light passes through the p-doped region 22p1, the n-doped region 22n1, the p-doped region 22p2, the n-doped region 22n2 and the p-doped region 22p3 and enters the region defined by the light detection layer 23, the p-doped region 22p3 and the n-doped region 22n3, the incident photons will trigger the generation of free electron-hole pairs in the region defined by the light detection layer 23, the p-doped region 22p3 and the n-doped region 22n3. The holes move toward the anode node V26, and the electrons move toward the cathode node V25 to generate a photocurrent (or sensing current) I O3 . When light passes through the p-doped region 22p1, the n-doped region 22n1, the p-doped region 22p2, the n-doped region 22n2, the p-doped region 22p3, the n-doped region 22n3 and the p-doped region 22p4 and enters the area defined by the light detection layer 23, the p-doped region 22p4 and the n-doped region 22n4, the incident photons will trigger the generation of free electron-hole pairs in the area defined by the light detection layer 23, the p-doped region 22p4 and the n-doped region 22n4. The holes move toward the anode node V28, and the electrons move toward the cathode node V27 to generate a photocurrent (or sensing current) I O4 .

[0044] In some embodiments, due to the light propagation delay along the photodetection layer 23, the photocurrent I O2 Relative to the photocurrent I O1 With time delay (or phase difference), the photocurrent I O3 Relative to the photocurrent I O2 With a time delay (or phase difference), and the photocurrent I O4 Relative to the photocurrent I O3 With a time delay (or phase difference). For example, with the photocurrent I O1 Compared with the photocurrent I O2 Can have phase difference Photocurrent I O3 Can have phase difference And the photocurrent I O4 Can have phase difference

[0045] In addition, since the light passes through the p-doped region 22p1, the n-doped region 22n1, the p-doped region 22p2, the n-doped region 22n2, the p-doped region 22p3, the n-doped region 22n3 and the p-doped region 22p4, the intensity of the light will decrease as the light moves away from the waveguide structure 22w. In some embodiments, the light intensity loss in the light detection layer 23 is equal to or less than about 5dB / cm. Therefore, the photocurrent I O2 The magnitude is smaller than the photocurrent I O1 The magnitude of the photocurrent I O3 The magnitude is smaller than the photocurrent I O2 The magnitude of the photocurrent IO4 The magnitude is smaller than the photocurrent I O3 The amplitude.

[0046] Photocurrent I O1 is sent to the delay circuit D51 to generate the delay current I51. In some embodiments, the delay time of the delay circuit D51 is substantially equal to the photocurrent I O2 and photocurrent I O1 Therefore, the current I51 sent from the delay circuit D51 to the adder A51 is relatively large relative to the photocurrent I O2 There is no time delay (or have the same phase). The adding circuit A51 is configured to add the current I51 and the photocurrent I O2 are combined to produce current I52.

[0047] The current I52 is sent to the delay circuit D52 to generate the delay current I53. In some embodiments, the delay time of the delay circuit D52 is substantially equal to the photocurrent I O3 and photocurrent I O2 Therefore, the current I53 sent from the delay circuit D52 to the adder A52 is relatively large relative to the photocurrent I O3 There is no time delay (or have the same phase). The adding circuit A52 is configured to add the current I53 and the photocurrent I O3 are combined to produce current I52.

[0048] The current I54 is sent to the delay circuit D53 to generate the delay current I55. In some embodiments, the delay time of the delay circuit D53 is substantially equal to the photocurrent I O4 and photocurrent I O3 Therefore, the current I55 sent from the delay circuit D53 to the adder A53 is relatively large relative to the photocurrent I O4 There is no time delay (or have the same phase). The adding circuit A53 is configured to add the current I54 and the photocurrent I O4 The combinations are performed to produce current I56.

[0049] In some embodiments, the light detection device may include only a single p-doped region and a single n-doped region, and the signal width of the photocurrent generated by the light detection device is substantially equal to the pulse width of the light input to the light detection device plus the light propagation delay along the light detection layer of the light detection device. Therefore, the signal width of the photocurrent generated by the light detection device is also limited by the light propagation delay along the light detection layer, which limits the AC bandwidth of the light detection device. Figure 4AIn the embodiment shown, the light detection device 2 includes a plurality of pairs of n-doped regions and p-doped regions, each pair generates its own photocurrent, and the photocurrent is sent to the delay circuits D51, D52, D53 and the adding circuits A51, A52, A53 to generate the output current I56. Therefore, the light propagation delay problem can be alleviated. The signal width of the output current I56 generated by the light detection device 2 is substantially equal to the pulse width of the light input to the light detection device 2 plus the light propagation delay along the light detection layer 23 divided by N, where N is the sum of the n-doped region and the p-doped region. This will further increase the AC bandwidth of the light detection device 2.

[0050] Figure 4B According to some embodiments of the present disclosure, Figure 4A Schematic diagram of a portion of the current generating circuit 50 shown. For simplicity and clarity, some elements or components are omitted in the accompanying drawings. The current generating circuit 50 may include a plurality of transistors M510, M511, M520, M521, M530, M531, M540, M541, M550, M551, M560, M561, M570 and M571 connected or configured to form a plurality of current mirror circuits. For example, a PMOS current mirror circuit may be formed by pairs of “transistors M520 and M521”, “transistors M540 and M541”, and “transistors M560 and M561”. For example, an NMOS current mirror circuit may be formed by pairs of “transistors M510 and M511”, “transistors M530 and M531”, and “transistors M550 and M551”. As shown in FIG. Figure 4B As shown, each of the adding circuits A51, A52, and A53 may include one or more current mirror circuits.

[0051] In some embodiments, each of the delay circuits D51, D52, and D53 may be implemented by a transmission line. In some embodiments, the delay time of each of the delay circuits D51, D52, and D53 may be determined based on the length of the transmission line. For example, the delay time of the transmission line may be expressed as: τ=L / Vg, where τ represents the delay time of the transmission line, L represents the length of the transmission line, and Vg represents the group velocity of the transmission line.

[0052] In some embodiments, the transistors of each PMOS current mirror circuit may include the same aspect ratio (W / L) or width. For example, the aspect ratio of transistor M520, M540, or M560 is the same as the aspect ratio of transistor M521, M541, or M561, respectively. Therefore, the magnitude of the current flowing through transistor M520, M540, or M560 will be substantially the same as the magnitude of the current flowing through transistor M521, M541, or M561, respectively. Therefore, the photocurrent I O1 The amplitude of ' is basically equal to the photocurrent I O1The amplitude of the photocurrent I52' is substantially equal to the amplitude of the photocurrent I52, and the amplitude of the photocurrent I54' is substantially equal to the amplitude of the photocurrent I54. Therefore, the amplitude of the output current I56 is substantially equal to the amplitude of the photocurrent I O1 ,I O2 ,I O3 and I O4 The sum of the amplitudes.

[0053] In some embodiments, the transistors of each PMOS current mirror circuit may include different aspect ratios or widths. For example, the aspect ratio of transistor M520, M540, or M560 is different from the aspect ratio of transistor M521, M541, or M561, respectively. Therefore, the magnitude of the current flowing through transistor M520, M540, or M560 may be different from the magnitude of the current flowing through transistor M521, M541, or M561, respectively. Therefore, the photocurrent I O1 ' is different from the photocurrent I O1 The amplitude of the photocurrent I52' is different from the amplitude of the photocurrent I52, and the amplitude of the photocurrent I54' is different from the amplitude of the photocurrent I54. Therefore, the amplitude of the output current I56 is substantially equal to the ratio multiplied by the photocurrent I O1 ,I O2 ,I O3 and I O4 The sum of the amplitudes of , where the ratio corresponds to the aspect ratio of the transistors of each PMOS current mirror circuit. By selecting transistors M521, M541 or M561 having a larger aspect ratio or width than transistors M521, M541 or M561, respectively, the amplitude of output current I56 can be increased. This will increase the flexibility of circuit design.

[0054] FIG. 5A to FIG. 5D is a cross-sectional view of an intermediate structure of a method for manufacturing a light detection device according to some embodiments. In some embodiments, FIG. 5A to FIG. 5D The steps shown can be used to form Figure 1A , Figure 1B , Figure 1C and Figure 1D The light detection device 2 shown. Optionally, FIG. 5A to FIG. 5D The steps shown in can be used to form any other light detecting device.

[0055] refer to Figure 5A, providing or receiving a substrate 20. The substrate 20 includes a semiconductor material such as silicon. In some embodiments, the substrate 20 may include other semiconductor materials such as silicon germanium, silicon carbide, gallium arsenide, etc. Optionally, the substrate 20 includes another element semiconductor such as silicon germanium; a compound semiconductor including gallium arsenide, gallium phosphide, indium phosphide, indium arsenide, or indium antimonide; or an alloy-type semiconductor including SiGe, GaAsP, AlInAs, AlGaAs, GaInAs, GaInP, or GaInAsP; or a combination thereof. In yet another embodiment, the substrate 20 may be SOI. In other alternatives, the substrate 20 may include a doped epitaxial layer, a gradient semiconductor layer, and / or a semiconductor layer covering another semiconductor layer of a different type, such as a silicon layer on a silicon germanium layer. The substrate 20 may be doped with an n-type dopant such as arsenic, phosphorus, or the like, or may be doped with a p-type dopant such as boron.

[0056] Then, an insulating layer 21 is disposed on the substrate 20. The insulating layer 21 may be STI or local oxidation of silicon LOCOS. The insulating layer 21 may be formed of an electrically insulating material such as a dielectric material. In some embodiments, the insulating layer 21 may be formed of an oxide (e.g., silicon oxide or germanium oxide), a nitride (e.g., silicon nitride), an oxynitride (e.g., GaP oxynitride), SiO2, a nitrogen-containing oxide (e.g., nitrogen-containing SiO2), a micro-oxynitride (e.g., SiO2 implanted with N2), a silicon oxynitride (SiO2), or a silicon oxynitride (SiO2). x O y N z ), polymeric materials, etc. The dielectric material may be formed by using a suitable process such as atomic layer deposition (ALD), chemical vapor deposition (CVD), physical vapor deposition (PVD), thermal oxidation, UV-ozone oxidation, or a combination thereof. In some embodiments, a planarization operation such as grinding or chemical mechanical planarization (CMP) process may be used to remove excess material of the insulating layer 21.

[0057] refer to Figure 5B The silicon layer 22 is formed or disposed on the insulating layer 21. A trench 22t is formed from the top surface of the silicon layer 22 to the silicon layer 22. In some embodiments, a portion of the silicon layer 22 is retained to define the bottom surface of the trench 22t. In some embodiments, the silicon layer 22 can be formed by, for example, etching (e.g., dry etching, wet etching, reactive ion etching (RIE) operation, etc.) or any other suitable operation. Then, as Figure 5C As shown, the trench 21t is filled with the light detection layer 23. The light detection layer 23 may protrude from the top surface of the silicon layer 22.

[0058] refer to Figure 5D, p-doped regions 22p1, 22p2, 22p3, 22p4 and n-doped regions 22n1, 22n2, 22n3, 22n4 are formed in the silicon layer 22 and the light detection layer 23. Figure 5D As shown, n-doped regions 22n1, 22n2, 22n3, 22n4 and p-doped regions 22p1, 22p2, 22p3 and 22p4 are arranged alternately. In other words, there is an n-doped region between two adjacent p-doped regions, or there is a p-doped region between two adjacent n-doped regions. In some embodiments, there may be any number of n-doped regions and p-doped regions, depending on different design specifications. For example, there may be N n-doped regions and N p-doped regions, where N is an integer greater than 1.

[0059] In some embodiments, p-doped regions 22p1, 22p2, 22p3, 22p4 and n-doped regions 22n1, 22n2, 22n3, 22n4 may be formed by implanting dopants through an ion implantation operation, an epitaxial operation, or any other suitable operation. Ions or dopants are implanted into desired portions of the silicon layer 22 and the light detection layer 23. In some embodiments, a photomask may be used to allow only desired portions to receive dopants. The doping concentration amount of the n-type doped regions 22n1, 22n1, 22n3, 22n4 and p-type doped regions 22p1, 22p2, 22p3, 22p4 may vary depending on the process used and the specific design. In some embodiments, the doping concentration of the p-type material or the n-type material may be in the range from about 10 17 Atoms / cm3 to 10 19 In the range of atoms / cubic centimeter.

[0060] In some embodiments, when the silicon layer 22 is formed, a waveguide structure may be formed or defined. The waveguide structure may extend in a first direction (e.g., axial direction) substantially parallel to the length of the light detection layer. The waveguide structure may be used as a conduit to guide light (or photons) into the light detection layer 23 along a first direction. The p-doped regions 22p1, 22p2, 22p3, 22p4 and the n-doped regions 22n1, 22n2, 22n3, 22n4 are alternately arranged in a direction substantially perpendicular to the first direction.

[0061] In some embodiments, the present disclosure provides a light detection device. The light detection device includes an insulating layer, a silicon layer, a light detection layer, N first doped regions, and M second doped regions. The silicon layer is disposed above the insulating layer. The light detection layer is disposed above the silicon layer and extends within at least a portion of the silicon layer. The first doped region has a first dopant type and is disposed within the light detection layer. The second doped region has a second dopant type and is disposed within the light detection layer. The first doped region and the second doped region are arranged alternately. M and N are integers equal to or greater than 2.

[0062] In some embodiments, the present disclosure provides a light detection device. The light detection device includes an insulating layer, a silicon layer, a light detection layer, a waveguide structure, a first doped region, and a second doped region. The silicon layer is disposed above the insulating layer. The light detection layer is disposed above the silicon layer and extends within at least a portion of the silicon layer. The waveguide structure is disposed adjacent to the silicon layer and extends in a first direction. The first doped region has a first dopant type and is disposed within the light detection layer. The second doped region has a second dopant type and is disposed within the light detection layer. The first doped region and the second doped region are arranged in a second direction substantially perpendicular to the first direction.

[0063] In some embodiments, the present disclosure provides a light detection device, comprising: an insulating layer; a silicon layer located above the insulating layer; a light detection layer located above the silicon layer and extending within at least a portion of the silicon layer; N first doping regions of a first dopant type located within the light detection layer; and M second doping regions of a second dopant type located within the light detection layer, wherein the first doping regions and the second doping regions are arranged alternately; and wherein M and N are integers equal to or greater than 2.

[0064] In the above-mentioned light detecting device, one of the first doped regions includes a first portion within a portion of the silicon layer adjacent to the first side of the light detecting layer and a second portion within the light detecting layer.

[0065] In the above-mentioned light detection device, the width of the second portion of the first doped region is substantially the same as the width of the light detection layer.

[0066] In the above-mentioned light detection device, the first doped region also includes a third portion within the portion of the silicon layer adjacent to the second side of the light detection layer, wherein the second side of the light detection layer is opposite to the first side of the light detection layer.

[0067] In the above-mentioned light detection device, the width of the second portion of the first doped region is smaller than the width of the light detection layer.

[0068] In the above-mentioned light detecting device, the silicon layer includes a waveguide structure extending in the first direction and configured to guide light to the light detecting layer.

[0069] In the above light detecting device, the first doping region and the second doping region are arranged in a second direction substantially perpendicular to the first direction.

[0070] In the above-mentioned light detecting device, a distance between one of the first doping regions and one of the second doping regions adjacent to the first doping region is in a range of about 10 nanometers (nm) to about 500 nm.

[0071] In some embodiments, the present disclosure provides an optical device. The optical device includes an insulating layer, a silicon layer, and a light detection layer. The silicon layer is disposed above the insulating layer. The light detection layer is disposed above the silicon layer and extends within at least a portion of the silicon layer. The light detection layer has a first region and a second region separated from the first region. The first region of the light detection layer is configured to convert light into a first photocurrent. The second region is configured to convert light received from the first region into a second photocurrent. The amplitude of the second photocurrent is less than the amplitude of the first photocurrent.

[0072] The above-mentioned optical device also includes: a first doped region of the first dopant type, located in the light detection layer; a second doped region of the second dopant type, located in the light detection layer; a third doped region of the first dopant type, located in the light detection layer; and a fourth doped region of the second dopant type, located in the light detection layer, wherein the first doped region and the second doped region define a first area of ​​the light detection layer, and wherein the third doped region and the fourth doped region define a second area of ​​the light detection layer.

[0073] In the above optical device, the first photocurrent leads the second photocurrent by a first time.

[0074] In the above optical device, a delay circuit configured to receive the first photocurrent and generate a first current is further included, wherein the first current delays the first photocurrent by a first time.

[0075] In the above optical device, further comprising an adding circuit configured to receive the first current and the second photocurrent and combine the first current and the second photocurrent.

[0076] In the above optical device, the amplitude of the first current is equal to or greater than the amplitude of the first photocurrent.

[0077] In some embodiments, the present disclosure provides a method for manufacturing a light detection device. The method includes: (a) providing a substrate; (b) forming an insulating layer on the substrate; (c) forming a silicon layer on the insulating layer; (d) forming a light detection layer on the silicon layer and extending in at least a portion of the silicon layer; (e) forming two or more first doping regions of a first doping type in the light detection layer; (f) forming two or more second doping regions of a second dopant type in the light detection layer. The first doping regions and the second doping regions are arranged alternately.

[0078] In the above method, step (d) further comprises: forming a trench from the top surface of the silicon layer to the silicon layer; and filling the trench with the light detection layer.

[0079] In the above method, it also includes: forming a waveguide structure adjacent to the silicon layer and extending in the first direction, wherein the first doping region and the second doping region are arranged in a second direction substantially perpendicular to the first direction.

[0080] In the above method, the first doped region is also formed in a portion of the silicon layer adjacent to the first side of the light detection layer, and the first doped region diffuses from the first side of the light detection layer to the second side of the light detection layer opposite to the first side of the light detection layer.

[0081] In the above method, there is a distance between the second side of the light detection layer and the first doping region.

[0082] In the above method, the first doped region is also diffused to a portion of the silicon layer adjacent to the second side of the light detection layer.

[0083] The scope of the present application is not intended to be limited to the specific embodiments of the processes, machines, manufactures, and material compositions, means, methods, and steps described in the specification. As will be readily understood by those skilled in the art from the disclosure of the present disclosure, according to the present disclosure, processes, machines, manufactures, material compositions, means, methods, or steps currently existing or to be developed later that perform the same results as the corresponding embodiments described herein or achieve functions substantially the same as those thereof can be utilized. Therefore, the appended claims are intended to be included in the scope of processes, machines, manufactures, material compositions, means, methods, or steps / operations. In addition, each claim constitutes a separate embodiment, and the combination of various claims and embodiments is within the scope of the present disclosure.

Claims

1. A light detection device, comprising: Insulation layer; a silicon layer, located above the insulating layer; a light detecting layer located above the silicon layer and extending within at least a portion of the silicon layer; N first doping regions of a first dopant type, located in the light detection layer; as well as M second doping regions of a second dopant type, located in the light detection layer, wherein the first doping regions and the second doping regions are arranged alternately; and Wherein, M and N are integers equal to or greater than 2, Among them, one of the first doped regions includes a first portion within a portion of the silicon layer adjacent to the first side of the photo detection layer and a second portion within the photo detection layer.

2. The light detection device according to claim 1, wherein: The first doped region and the second doped region also extend into the light detection layer.

3. The light detection device according to claim 1, wherein: The width of the second portion of the first doped region is substantially the same as the width of the light detection layer.

4. The light detection device according to claim 3, wherein: The first doped region also includes a third portion within a portion of the silicon layer adjacent to a second side of the light detection layer, wherein the second side of the light detection layer is opposite to the first side of the light detection layer.

5. The light detection device according to claim 1, wherein: The width of the second portion of the first doped region is smaller than the width of the light detection layer.

6. The light detection device according to claim 1, wherein: The silicon layer includes a waveguide structure extending in a first direction and configured to guide light to the light detection layer.

7. The light detection device according to claim 6, wherein: The first doping region and the second doping region are arranged in a second direction substantially perpendicular to the first direction.

8. The light detection device according to claim 1, wherein A distance between one of the first doping regions and one of the second doping regions adjacent to the first doping region is in a range of 100 nanometers (nm) to 500 nm.

9. An optical device, comprising: Insulation layer; a silicon layer, located above the insulating layer; a light detecting layer located above the silicon layer and extending within at least a portion of the silicon layer, the light detecting layer having a first region and a second region spaced apart from the first region, wherein the first region of the light detection layer is configured to convert light into a first photocurrent, wherein the second region is configured to convert the light received from the first region into a second photocurrent, and The amplitude of the second photocurrent is smaller than the amplitude of the first photocurrent.

10. The optical device according to claim 9, further comprising: a first doped region of a first dopant type located within the light detecting layer; a second doped region of a second dopant type located within the light detecting layer; a third doped region of the first dopant type, located within the light detecting layer; as well as A fourth doped region of the second dopant type is located within the light detection layer, wherein the first doping region and the second doping region define the first region of the light detection layer, and Wherein, the third doping region and the fourth doping region define the second area of ​​the light detection layer.

11. The optical device according to claim 9, wherein: The first photocurrent leads the second photocurrent by a first time.

12. The optical device according to claim 11, further comprising a delay circuit configured to receive the first photocurrent and generate a first current, wherein: The first current delays the first photocurrent by the first time. 13 . The optical device of claim 12 , further comprising a summing circuit configured to receive the first current and the second photocurrent and combine the first current and the second photocurrent.

14. The optical device according to claim 12, wherein: The magnitude of the first current is equal to or greater than the magnitude of the first photocurrent.

15. A method for manufacturing a light detection device, comprising: (a) providing a substrate; (b) forming an insulating layer on the substrate; (c) forming a silicon layer on the insulating layer; (d) forming a light detecting layer located on the silicon layer and extending within at least a portion of the silicon layer; (e) forming two or more first doping regions of a first dopant type in the light detection layer; as well as (f) forming two or more second doping regions of a second dopant type in the light detection layer, wherein the first doping regions and the second doping regions are arranged alternately, Wherein, the first doped region is also formed in a portion of the silicon layer adjacent to the first side of the photo detection layer, and the first doped region diffuses from the first side of the photo detection layer to the second side of the photo detection layer opposite to the first side of the photo detection layer.

16. The method according to claim 15, wherein: The step (d) further comprises: forming a trench from a top surface of the silicon layer into the silicon layer; and The trench is filled with the photodetection layer.

17. The method according to claim 15, further comprising: A waveguide structure is formed adjacent to the silicon layer and extending in a first direction, wherein the first doped region and the second doped region are arranged in a second direction substantially perpendicular to the first direction.

18. The method according to claim 15, wherein: The first doped region and the second doped region also extend into the light detection layer.

19. The method according to claim 18, wherein: There is a distance between the second side of the light detection layer and the first doping region.

20. The method according to claim 18, wherein: The first doped region also diffuses to a portion of the silicon layer adjacent to the second side of the light detection layer.

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