Data processing system

Abstract

Data processing system. The data processing system comprises a memory (9) and a processor (17) in communication with the memory (9). The processor (17) is configured to, when storing a data array in the memory (9), generate information representative of the content of a data block representing a particular region of the data array, write the data block into a data structure in the memory (9), and write the information representative of the content of the data block into the data structure.

Description

Technical Field

[0001] This invention relates to data processing systems, and more particularly to systems and methods for writing out data arrays generated by data processing systems (such as graphics processing systems). Background Technology

[0002] When processing image data (e.g., video), the output (e.g., a frame) is typically written to an output (e.g., frame or window) buffer in memory before it is ready to be displayed, for example, as the output of a graphics processing system. Writing data to the output buffer consumes a relatively large amount of power and memory bandwidth, especially when the output buffer typically resides in memory external to, for example, the graphics processor.

[0003] Therefore, it is desirable to reduce the power consumption of the output buffer. An earlier application by the applicant, GB-2474114, discloses a technique for achieving this purpose. According to this technique, each output frame is written to the output buffer by writing data blocks representing specific regions of the frame. When a data block is to be written to the output buffer, the data block is compared with data blocks already stored in the output buffer, and a determination is made based on this comparison whether to write the data block to the output buffer.

[0004] The applicant believes that there is still room for such an operation when writing the data array to memory. Summary of the Invention

[0005] According to a first aspect of the present invention, a method for operating a data processing system is provided, the method comprising:

[0006] When you want to store a data array in memory:

[0007] Generate information representing the contents of data blocks that represent a specific region of the data array;

[0008] The data block is written into the data structure of the memory; and

[0009] Information representing the content of the data block is written into the data structure.

[0010] According to a second aspect of the present invention, a data processing system is provided, the data processing system comprising:

[0011] Memory; and

[0012] A processor that communicates with the memory;

[0013] The processor is configured as follows:

[0014] When the data array is stored in the memory:

[0015] Generate information representing the contents of data blocks that represent a specific region of the data array;

[0016] The data block is written into the data structure of the memory; and

[0017] Information representing the content of the data block is written into the data structure.

[0018] Therefore, the present invention provides a method for operating a data processing system and the data processing system itself. The data processing system includes a processor, which is configured, for example, to generate data for forming a data array (e.g., image data frames for display). The data processing system also includes a memory for storing the data array. The processor communicates (data) with the memory.

[0019] The method includes (and the processor is configured to): when a data array is to be stored in memory, generating information representing the contents of data blocks, each data block representing a specific corresponding region of the data array. For a data block to be stored, the data block, along with its content-representative information, is written into a data structure in memory. Thus, the data block itself and its content-representative information are stored together in the same data structure (in memory).

[0020] As will be discussed further below, the applicant has recognized that storing content representation information in the same (single) data structure as the data block (used to generate the content representation information) that represents its content makes it easier to work with the data as a whole (i.e., the data block and the associated content representation information). This contrasts with, for example, using a separate data structure (e.g., a buffer) to store content representation information.

[0021] For example, the data structures of this invention can be helpful for drivers used with data processing systems because, when using data arrays and content representing information, these drivers only need to deal with a single data structure (e.g., header 'a'). This is especially true for newer (graphics) APIs such as Vulkan.

[0022] For example, information representing the block content can be used to perform a comparison of the data in the block with a version of the block already stored in memory, and / or with data in other blocks (e.g., in other (e.g., previous or subsequent) data arrays). This comparison allows for a decision on whether to actually write the data block to memory, thereby allowing for a reduction in the number of data blocks written to memory, and thus helping to reduce power and memory bandwidth consumption associated with data array output (e.g., frame buffer) operations.

[0023] This invention can be implemented in any suitable and desirable data processing system. For example, the processor may include a graphics processing unit (GPU), a display processing unit (DPU), a video processing unit (VPU), or an image signal processor (ISP). The applicant has recognized that, in the context of a graphics processor, it may be particularly useful to store content representation information in the same (single) data structure as the data block representing the content of that content representation information (used to generate the content representation information), in the manner discussed. Therefore, in one embodiment, the data processing system includes a graphics processing system, and the processor includes a graphics processing unit (GPU).

[0024] The data array to be stored in memory and the data blocks to be written into the data structure in memory (and from which content representation information is generated) can be any suitable and desired data array and blocks of such array that the data processor can operate on. The data array and data blocks preferably include those being processed by the data processor, each comprising an array of data elements, each data element having an associated data value.

[0025] For example, and preferably, the data array may include an image being processed by a data (e.g., graphics) processor, and therefore the data array will include appropriate color values ​​for the data elements (sampling locations) of the data array and are appropriate color values ​​represented by the data array. In this case, the data array may include, for example, frames being processed by the processor for display, and / or data used or generated by the processor, such as graphics textures. In other configurations, the data array may include geometric data, such as the geometric data of vertices and / or primitives being processed by the processor.

[0026] Therefore, in a preferred embodiment, the data array to be stored in the memory and the data blocks processed in the manner of the present invention include image data (e.g., textures or frames) or geometric data (positions and / or attributes). Therefore, preferably, the data blocks written out and generating content representing information include image or geometric data blocks (e.g., tiles) representing specific regions of image data frames.

[0027] The data (e.g., graphics) processing operation performed by a (e.g., graphics) processor using a data array can be, correspondingly, any suitable and desired (e.g., graphics) processing operation that the (e.g., graphics) processor can perform. Thus, for example, it could be a suitable graphics geometry processing operation or a fragment (pixel) shading operation, etc. In a preferred embodiment, the processing operation is a graphics shading operation, such as geometry shading, vertex shading, or fragment shading operation. The operation can also be a computational shading operation, wherein the (e.g., graphics) processor performs a computational shading operation.

[0028] A data block (written into a data structure and used to generate information representing the content) can represent any suitable and desired area of ​​the data array. For example, a data block can represent the entire data array (e.g., a single data block can be written for the entire data array).

[0029] However, in one implementation, a data block represents a portion (less than all) of the data array. Preferably, the data array comprises multiple data blocks. More preferably, the multiple data blocks represent corresponding multiple regions (areas) of the data array.

[0030] Therefore, in one implementation, the method is performed on (e.g., individual blocks) of multiple blocks (comprising some or all of the overall data array), and the processor is configured, in particular, to generate content representation information and write the data blocks and content representation information to a data structure. As discussed below, there are many different ways to achieve this.

[0031] Similarly, as discussed below, there are implementations where data blocks (and, for example, the content of the blocks and the resulting content representation information) are not written out (e.g., due to the nature of the content of the blocks and the content representation information thereder). Therefore, when a data array is represented by multiple data blocks, some or all of the data blocks (and, for example, the content representation information of these blocks) may not be written out (e.g., because existing blocks already stored in memory can be used instead).

[0032] Preferably, the data array includes a data array of a data array stream (e.g., an image data frame stream) to be processed in the manner of the present invention. Therefore, in one embodiment, the method is performed for multiple data arrays of the data array stream (e.g., individual data arrays in a plurality of data arrays) (and the processor is configured, in particular, to generate content representation information and write data blocks and content representation information to a data structure).

[0033] When a data array is to be represented by multiple data blocks, preferably, the method includes (and the processor is configured to) dividing the data array into multiple data blocks. The individual data blocks within the multiple data blocks can then be processed according to the method of the invention.

[0034] In order to generate content representation information (and to write out the blocks and associated content representation information), the data blocks into which the data array is divided can each represent any suitable and desired region (area, e.g., tile) of the data array that the processor can operate on (e.g., an image data frame). Preferably, the individual data blocks represent different regions of the entire data array (although these blocks may overlap if necessary). Each block should represent an appropriate region (area) of the data array, such as multiple data locations within the array (e.g., pixels of image data).

[0035] The data blocks of the data array are preferably rectangular, such as squares. The rectangular blocks can take any suitable and desired size. Preferably, each rectangular block has a size between 4×4 data elements (sampling positions, e.g., pixels) and 64×64 data elements, and preferably, each edge of the rectangular block has a 2 n The size of a data element, where n is an integer (e.g., between and including 2 and 6). For example, a block can correspond to a rendered tile of, for example, an image data frame (e.g., a 16×16 sampled position).

[0036] Data blocks that have already generated content representing information (representing specific areas of a data array) can be written into a data structure in memory in any suitable and desired manner. For example, data blocks can be written (and stored) in a data structure in an unencoded (e.g., uncompressed) format. However, in one implementation, a block-based encoding (compression) scheme is preferably used to write (and store) data blocks in an encoded (e.g., compressed) format into the data structure.

[0037] Therefore, preferably, the method includes (and the processor is configured to): encoding (and preferably compressing) data blocks of a data array, and writing the encoded data blocks into a data structure in memory. As outlined below, content representation information may also be encoded (compressed) for writing (e.g., as part of an associated data block).

[0038] Any suitable and desired encoding (compression) technique can be used to encode (compress) one or more blocks of the data array. In one set of embodiments, the method includes (and the processor is configured to): encode one or more blocks of the data array using frame buffer compression techniques described in the applicant's patents US 8,542,939B2, US 9,014,496B2, US 8,990,518B2, and US 9,116,790B2. In one set of embodiments, the method includes (and the processor is configured to): additionally or alternatively (and preferably also) encode one or more blocks of the data array using a fixed-rate compression technique.

[0039] The encoding of data blocks can be performed by the processor or any suitable and desired element (e.g., a processing unit) associated with the processor. For example, encoding can be performed by the shader core of a processor (e.g., a graphics processor) or by an encoder (e.g., an external encoder) associated with the processor or memory.

[0040] In one embodiment, the data processing system includes a cache system (e.g., a processor cache system) and the cache system is configured to transfer data blocks stored in memory to the processor for use by the processor when performing (e.g., graphics) processing operations, and to transfer data blocks from the processor to memory.

[0041] The caching system includes:

[0042] A cache configured to: receive data blocks from memory and provide data blocks to the processor for use during processing operations, and receive data blocks from the processor to send to memory; and

[0043] A data encoder, which is associated with the cache and configured as follows:

[0044] When writing uncompressed data blocks from the cache to memory, the uncompressed data blocks from the cache are encoded to be stored in compressed format in memory, and the compressed data blocks are sent to memory for storage; and

[0045] When a compressed data block is read from memory into the cache, the compressed data block from memory is decoded and stored in the cache in an uncompressed format.

[0046] Preferably, the data encoder is located between the processor's (e.g., L2) cache and (external) memory, and is preferably integrated into the processor's (e.g., L2) cache system.

[0047] Data structures containing data blocks can be stored in memory in any suitable and desired manner. In one implementation, the memory includes an output buffer, and the data blocks and associated contents represent data structures to which information is written. For example, the output buffer may include a frame buffer to which image data frames are output.

[0048] In a preferred embodiment, multiple data blocks of the data array (e.g., constituting the entire data array) are written to memory. Therefore, in one set of embodiments, the method includes (and the processor is configured to): for each data block representing a specific region of the data array among the multiple data blocks of the data array: generating information representing the content of the data block, writing the data block to a data structure in memory, and writing the information representing the content of the data block to the data structure (e.g., such that the data structure stores multiple data blocks and associated (multiple) related content representation information).

[0049] When multiple data blocks are written, for each of the written data blocks (among the multiple data blocks), the data block and its content representation information are written into the same data structure in memory. However, as will be outlined below, different data blocks (e.g., the same data array) and their corresponding content representation information can be written into different data structures.

[0050] When multiple data blocks are written, each data block and its associated content representation information can be written into the data structure in any suitable and desired manner. For example, each data block and its associated content representation information can be written into different corresponding data structures, such that multiple data blocks and their associated content representation information are written into multiple corresponding data structures, where each data structure contains only a single data block and its associated content representation information.

[0051] However, in one implementation, the method includes (and the processor is configured to): writing multiple data blocks (of the data array to be written out) and their corresponding multiple associated content representation information into the same data structure in memory.

[0052] Any suitable and desired number of data blocks (and associated content representation information) of a data array can be stored in a common data structure. For example, all data blocks (and associated content representation information) of a data array to be written can be written to the same single data structure.

[0053] In a preferred embodiment, there are multiple data structures, each storing some, but not all, of the blocks that make up the (overall) data array. Therefore, for example, if needed, the memory (e.g., the memory's output buffer) preferably contains multiple data structures.

[0054] In this implementation, as outlined above, each of the multiple data structures may store only a single data block and its associated content representation information. However, preferably, one or more (e.g., individual) data structures store multiple (but not all) blocks that make up the (overall) data array.

[0055] Therefore, in a preferred embodiment, the method includes (and the processor is configured to): for each data block representing a specific region of the data array among a plurality of data blocks of the data array: writing the data block into a data structure in memory, and writing information representing the content of the data block into the data structure; wherein, two or more data blocks among the plurality of data blocks and their associated content representation information are written into a first data structure in memory; and one or more other data blocks among the plurality of data blocks and their associated content representation information are written into a second data structure in memory.

[0056] Therefore, preferably, the number of data structures in the memory that contain multiple blocks and their associated content representation information is less than the number of data blocks that are written out. Preferably, each of the multiple data structures stores multiple data blocks and their associated content representation information.

[0057] For example, the number of data structures required can depend on the number of blocks to be written (which in turn can depend on the size of the data array and / or the (e.g., variable) number of blocks to be written at any given time).

[0058] Any suitable and desired number of blocks can be stored in (e.g., individual) data structures. Preferably, the individual data structures store the same number of blocks of the data array.

[0059] In a preferred embodiment, content representation information is written separately from the corresponding data block (e.g., the corresponding data block is written to a different region of the data structure) into the data structure (e.g., a region of the data structure). Thus, for example, a data block is (e.g., encoded and) written into one region of the data structure (to store the data block), and the corresponding content representation information is written into another region of the data structure, which is (allocated) to store header information along with other header information of the data stored in the data structure.

[0060] Therefore, preferably, the method includes (and the processor is configured to): when the data array is to be stored in memory:

[0061] Data blocks are written to a region of a data structure in memory, wherein the data structure includes one or more regions for storing data blocks of the array and a region for storing associated header information; and

[0062] Information representing the contents of a data block is written to the area that stores the associated header information.

[0063] When writing multiple data blocks of a data array and their corresponding associated content representation information into memory, the method preferably includes (and the processor is configured to): for each data block representing a specific region of the data array among the multiple data blocks of the data array:

[0064] Data blocks are written to a region of a data structure in memory, wherein the data structure includes multiple regions of the data blocks in the storage array and a region storing associated header information; and

[0065] Information representing the contents of a data block is written to the area that stores the associated header information.

[0066] Storing content representation information in the header (header region) of a data structure (e.g., in an unencoded (e.g., uncompressed) format) allows the content representation information to be easily accessed (e.g., by a driver) when working with related data blocks stored in the data structure. This is especially true when multiple data blocks are stored in the data structure (along with fragments of their corresponding content representation information stored in the header region), because when the content representation information is needed, only a single region of the data structure (i.e., the header region) needs to be involved.

[0067] Content representation information may be written (and stored) in a data structure (e.g., a region of the data structure) in an unencoded (e.g., uncompressed) format. Alternatively, content representation information may be (e.g., encoded (e.g., compressed)) and written (e.g., compressed) in an encoded (e.g., compressed) format in a data structure (e.g., a region of the data structure).

[0068] Content representation information can be written (and stored) together with the data block that generated the content representation information into a data structure (e.g., the same area of ​​the data structure). In this case, the content representation information can be written into the data structure in the same format as the data block. For example, the content representation information can be encoded (e.g., compressed) together with the data block so that it can be written into the data structure in an encoded (e.g., compressed) format.

[0069] However, as outlined above, it is preferable to write (and store) the content representation information separately from the corresponding data blocks in the data structure. This helps to allow the content representation information to be written and stored in the data structure in any suitable and desired format (e.g., a format different from that of the data blocks).

[0070] In a preferred embodiment, the content representation information (and, for example, any other header information) is written (and stored) in a data structure in a format different from that of the data blocks that generated the content representation information. For example, while the data blocks are encoded (e.g., compressed) and written to the data structure, the content representation information is preferably written to the data structure in an unencoded (e.g., uncompressed) format. This facilitates easy (e.g., via a driver) access to the content representation information (and, for example, any other header information) when working with associated data blocks stored in the data structure.

[0071] The data structure's regions can be configured to store data blocks and associated content representation information in any suitable and desired manner.

[0072] In a preferred embodiment, the data block is preferably stored (together) in a portion of the data structure (e.g., at one end of the data structure), wherein the content of the block represents information stored separately from the block in the data structure in a separate portion of the data structure (e.g., at the other end of the data structure), such as in the header.

[0073] Therefore, in one implementation, the data structure (e.g., various data structures among a plurality of data structures) includes a portion for storing data blocks, preferably including multiple regions for storing multiple data blocks of a data array. For example, each region among the multiple regions can be configured (e.g., allocated) to store a corresponding data block written into the data structure.

[0074] In a preferred embodiment, the data structure includes one or more regions for storing (e.g., respectively) one or more data blocks of a data array and a region for storing header information of one or more data blocks.

[0075] Therefore, the header (header region) will store (e.g., multiple) header information for multiple blocks (separately from the region storing data blocks).

[0076] The header (header region) should and preferably stores the associated header information of the data block, which preferably includes content representation information of the data block.

[0077] In a preferred embodiment, the content representation information of the data block is stored separately from any other header information of the data block in the header (header region) of the data structure. Therefore, preferably, the header region of the data structure includes a sub-region for storing (other) header information of the data block and a (separate) sub-region for storing the content representation information of the data block. These (header region) sub-regions are preferably specific (e.g., predefined) sub-regions of the header region, such as sub-regions reserved for these different types of information.

[0078] For example, this allows content representation information to be read and written separately from the remaining header data.

[0079] Therefore, preferably, when multiple data blocks are to be stored in (e.g., individual) data structures, (e.g., individual) data structures include multiple areas for storing the data blocks of the array and areas for storing associated header information (including, for example, and preferably, (e.g., content representation information separate from other header data)). Thus, for a set of multiple data blocks stored (and, for example, grouped together) in a data structure, the header storage area can provide a common (and, for example, separate) storage area shared by the group of data blocks to store, for example, header information associated with the data blocks separately or jointly.

[0080] The header region of a data structure can be located anywhere suitable and desired within the data structure, such as within a memory page. In one implementation, the header region is located at a specific (e.g., predefined) location within the data structure. For example, the header region could be located in the first or last region of the data structure (e.g., a cache line). It is understood that this allows a single (e.g., physical) memory address to be used to reference a data block and its associated header information, since the location of the header information can be implicitly known from the header region located at the (same) specific (e.g., predefined) location (e.g., always).

[0081] Similar to content representation information, the header region of a data structure storing one or more sets of data blocks may store any suitable and desired header information that may be appropriate for the set of data blocks, such as information associated with or related to the blocks (separately or jointly) of the array stored in the data structure.

[0082] Therefore, the header region (and header information) of one or more data block sets may, and preferably may, store and include one or more of the following, and preferably all of the following: for each data block in the data block set, an indication of whether the data block is stored in memory in a compressed format; for each data block in the data block set, any desired compression parameters / status, such as an indication of the compression format already used for that data block; and for each data block in the data block set, an indication of the number of memory transactions (bursts) required to read (compressed) data from memory for the data block in question (this may be appropriate in the case of using a variable rate compression scheme, and thus it is desirable to indicate how much data needs to be retrieved from memory for each individual data block).

[0083] Preferably, the regions used to store data blocks within the data structure are all of the same, specific (e.g., predetermined) size. Correspondingly, the header region used to store header information (e.g., including sub-regions for storing content representation information and sub-regions for storing header information of data blocks) is also of a specific (e.g., predetermined) size, and preferably the same size as the data block region.

[0084] In a particularly preferred embodiment, the region size is based on and corresponds to the amount of data that can be processed in the corresponding memory transaction (burst) in the processing system. Therefore, in a particularly preferred embodiment, each region corresponds to an integer number of cache lines, for example, and preferably, four cache lines.

[0085] In this case, the sub-regions used to store the header region for storing content representation information will include some, but not all, of the header region, and are again preferably cache line aligned so that the content representation information can be easily retrieved.

[0086] In one implementation, the data structure comprises a single (e.g., 4kB) page of memory. Therefore, preferably, the data structure comprises a contiguous set of memory addresses. Setting up the data structure in this way (e.g., a data structure that stores organized blocks of data (e.g., along with corresponding header information) in a memory page, and, for example, a data structure with a single physical base address (e.g., a memory page)) can help, for example, simplify physical addressing required in relation to data blocks in memory.

[0087] This makes it easier for the processor (hardware) to process such data blocks. In particular, it makes it easier for the processor's (e.g., L2) cache to process these data blocks. This is because, at least in the preferred embodiment, the (e.g., L2) cache operates on physical addresses, so it is easier for the cache to work when the header information is stored in the same physical memory page as the associated data block. Thus, the (e.g., L2) cache may only need to keep track of a single physical address for the header and the associated data block.

[0088] The memory pages (e.g., 4kB) can be configured in any suitable and desired manner. In one embodiment, the data structure (e.g., memory page) includes 16 areas (e.g., 256B) storing data blocks and / or header information of the data array. Preferably, the data structure includes 15 areas (e.g., 256B) storing “payload” data blocks of the data array (for (e.g., graphics) processing operations) and 1 area (e.g., 256B) storing associated header information.

[0089] For example, a given data array can be divided into one or more (e.g., multiple) such pages (e.g., 4kB in size) and stored in memory, for example, as a buffer. Of course, other sizes of memory pages and blocks are also possible.

[0090] Information representing the contents of a data block of a data structure to be written into memory can be generated in any suitable and desired manner and can include any suitable and desired content representation information (which represents the data value of the data element of the block).

[0091] In one implementation, the content representation information is based on, and preferably derived from, the content of the data block (the data values ​​of the data elements). Preferably, the content representation information is in the form of a "signature" of the data block, which is generated based on or according to the content of the data block.

[0092] Such a data block content "signature" may include, for example, and preferably, any suitable set of information that can be considered to represent the content of the data block, such as a checksum, CRC (Cyclic Redundancy Check), or hash value obtained from (generated for) the data block. A suitable signature will include standard CRC (e.g., CRC-32 or CRC-64) or other forms of signature (e.g., MD5, SHA-1, etc.).

[0093] Any suitable and desired "signature" generation process (such as a CRC function or hash function, e.g., suitable for the type of signature being generated) can be used to generate a signature for a data block. Preferably, when generating a signature for a data block, the data in the data block is processed in a selected (preferably specific or predetermined) order. This can further help reduce power consumption. In a preferred embodiment, the data is processed using the Hilbert order (Hilbert curve).

[0094] For example, a single signature can be generated together for all data channels of the array (thus generating a single signature for, for example, RGBA data blocks (e.g., pixel blocks), or a separate signature (e.g., CRC) can be generated for each data channel (e.g., color plane). Similarly, if needed, color conversion can be performed and separate signatures can be generated for the Y, U, and V planes.

[0095] As those skilled in the art will understand, the longer the signature generated for a data block (the more accurately the signature represents the data block), the less likely there will be an erroneous "match" between signatures (and thus, for example, an error in not writing a new data block to the output buffer). Therefore, generally, longer or shorter signatures (e.g., CRC) can be used depending on the desired accuracy (and, for example, as a trade-off relative to the memory and processing resources required for signature generation and processing).

[0096] In a preferred embodiment, the signature is weighted for a specific aspect of the data block's content compared to other aspects of the data block's content (e.g., and preferably, to a specific aspect or portion of the data of the data block (the data representing the content of the data block)). This allows, for example, a signature of a given overall length to provide a better overall result by weighting the signature to those portions of the data block's content (e.g., the data representing the content) that have a greater impact on the overall output (e.g., as perceived by a viewer of an image).

[0097] In this preferred embodiment, a longer (more accurate) signature is generated for the MSB bits of the data value (e.g., color) compared to the LSB bits of the data value (e.g., color). (Generally, for example, the LSB bits of color are less important than the MSB bits, and therefore the applicant has recognized that using a relatively inaccurate signature for the LSB bits is acceptable, as the applicant believes that the error when comparing the LSB bits of different data blocks (e.g., rendered tiles) will have a smaller adverse effect on the overall output)).

[0098] For example, depending on the application's requirements, such as display, different signature lengths may be used for different applications. This can help reduce power consumption. Therefore, in a preferred embodiment, the length of the signature used can vary during use. Preferably, the signature length can be changed according to the application in use (it can be adaptively adjusted according to the application in use).

[0099] In a preferred embodiment, the content representation information of the written block may include data from the data block itself (e.g., data values), rather than generated (e.g., additional and / or modified) content representation information (i.e., (separate) data (values) different from the block itself). For example, when the data block is a "special case" (e.g., all elements of the data block have the same value (e.g., a constant (or clear) color block of a so-called image data frame)), the content representation information may include such data.

[0100] Therefore, in the implementation, instead of generating content representation information for data blocks, the content representation information for blocks includes a single value from the content of the data block, which is preferably used for the data block as a whole.

[0101] For example, (for all data elements of a data block), when the data block is a constant (e.g., clean) value (e.g., color), the constant data value of the entire block can be written as the content representation information for that block. For example, an indication (e.g., a flag) can also be written in the block's header information to indicate that the content representation information includes this "special case," for example, without expecting other cases to be included in the content representation information. Writing this content representation information (and, for example, the associated indication) may mean that writing the data block itself is redundant (and in implementations, this is done when the content representation information includes such data).

[0102] Therefore, in an implementation, the method includes (and the processor is configured to): (for all data elements of the data block) determining when the data block is a constant (e.g., clean) data value (e.g., color), and when the data block is a constant value, not (e.g., encoding the data block and) writing the data block into a data structure in memory, and for example, writing the constant value (e.g., color) of the entire block as content representation information of the block into the data structure in memory.

[0103] Preferably, the method includes (and the processor is configured to): writing an indication (e.g., a flag) into a data structure (e.g., a header of the data structure) in memory, the indication indicating that the content representation information of the block includes data values ​​(e.g., colors) to be used for the entire block. Thus, for each block in a set of data blocks, the header information may include an indication (e.g., a flag) of whether the content representation information includes constant data values ​​(e.g., colors) for the entire block, or a “signature” representing the content.

[0104] Therefore, instead of simply writing individual data blocks to a memory data structure once they are ready, the data block can first be evaluated to determine if it is a constant value (e.g., color), and based on that evaluation, (without) (e.g., encoding the data block) the data block is written to memory. The applicant has discovered and recognized that this process can be used to (further) reduce the number of data blocks that will be written to memory in use, thereby reducing the number of memory transactions and thus reducing associated power and memory bandwidth consumption.

[0105] The content generated for a block represents information that can be used in any suitable and desired manner or for any suitable and desired purpose.

[0106] In one implementation, the method includes (and the processor is configured to) write the data block into a data structure in memory before the data block is written:

[0107] The information representing the content of the data block generated for the data block is compared with the information representing the content of the data block in the data structure already stored in memory, and...

[0108] The comparison is used to determine whether to write the data block (and, for example, the content representation information) into the data structure in the memory.

[0109] Preferably, a step is performed to compare the content representation information generated for the data block to be written to memory with the content representation information for the data block stored in memory to assess the similarity (or other) of the data blocks. Preferably, a decision on whether to write the data block is made based on the similarity (or other) of the corresponding content representation information of the data blocks.

[0110] The content representation information generated for the new block and the previous block can therefore be used to allow comparison between the new data block to be written and at least one data block that has already been written (and therefore that at least one block and its associated content representation information have been stored in a data structure in memory). Therefore, instead of simply writing each data block to a data structure in memory once it is ready, the data block can first be compared with at least one data block already stored in memory (by comparing the corresponding content representation information of these blocks), and then a determination can be made based on that comparison whether to write (the new) data block to memory (or not).

[0111] The applicant has discovered and recognized that this processing can be used to potentially and significantly reduce the number of data blocks to be written to memory in use, thereby significantly reducing the number of memory transactions and thus reducing associated power and memory bandwidth consumption.

[0112] For example, and preferably, when it is found that the content representation information of the newly generated data block is sufficiently similar (e.g., identical) to the content representation information of the data block already stored in memory, it can (and preferably) be determined that there is no need to write the newly generated data block to memory, thereby eliminating the need for memory "transactions".

[0113] On the other hand, when it is determined from the content representation information that the block of the data structure to be written into memory is not (not) sufficiently similar (e.g., identical) to the block already stored in memory, then the new block should be written into the data structure in memory, as described above.

[0114] Furthermore, the applicant has recognized that it is relatively common for new data blocks to be identical or similar to data blocks already in memory, for example, in areas of an image that do not change from frame to frame (e.g., the sky, a sports field when the camera is stationary, much of the user interface of many applications, etc.). Therefore, by facilitating the ability to identify these areas and then avoiding writing them back to memory if necessary, significant savings in memory write operations (write transactions) can be achieved.

[0115] Typically, content representation information comparison and data block writing (or not writing) can be configured in any suitable and desired manner. In a preferred embodiment, it is configured in the manner described in the applicant's earlier patents US 9,881,401, US 9,406,155 and US 8,988,443, which involve the use of this technology to eliminate and reduce memory transactions.

[0116] Therefore, preferably, the method further includes (and the processor is configured to): when it is determined, based on the comparison, that a data structure in which a data block should be written into memory is to be written: write the data block into the data structure in memory. (Preferably, the method includes (and the processor is configured to): when it is determined, based on the comparison, that a data structure in which a data block should not be written into memory is to be not written: do not write the data block into the data structure in memory.)

[0117] Preferably, the method further includes (and the processor is configured to): when it is determined based on the comparison that a data block should be written into a data structure in memory, writing information representing the content of the data block into the data structure. Preferably, the method includes: when it is determined based on the comparison that a data block should not be written into a data structure, not writing information representing the content of the data block into the data structure.

[0118] Therefore, preferably, whenever a data block (from which content representation information has been generated) is written to a data structure in memory, the content representation information is also written to the data structure (and / or, for example, the header information is updated). However, as discussed herein, in some embodiments, for example, as a result of comparison with a data block already stored in memory, the data block may not be written to memory. In this case (when the data block is not written to the data structure in memory), preferably, the content representation information generated from the data block is also not written to the data structure in memory (and / or the header information is not updated).

[0119] As needed, the content representation information of the newly generated data block can be compared with the content representation information of the data block stored for the corresponding data block location in the memory (in the data array) and / or with the content representation information of one or more data blocks with different locations in the array.

[0120] In a preferred embodiment, the content representation information of the block to be written back to memory is compared with the content representation information of a version of the block already stored in memory (i.e., the block in memory has the same location in the data array as the block to be written back).

[0121] This comparison, which examines when the content representation information of a new data block matches (or at least matches sufficiently) the content representation information of a data block already stored in memory, makes it possible to determine when a new data block to be written into memory is sufficiently similar (e.g., identical) to an existing version of a block already stored in memory.

[0122] For example, when a set of multiple data blocks and their associated content representation information are stored in the same data structure, the content representation information of the data block to be written back to memory can be compared with the content representation information of other data blocks and the corresponding data blocks stored in memory (e.g., the same data structure in memory). For instance, the content representation information of a new data block being written back to memory can be compared with the content representation information of other blocks in a set of multiple blocks that share a header data block with it (and with the content representation information of a version of the block itself stored in memory). This could potentially allow for the identification of more block "matches".

[0123] In this scenario, in a preferred embodiment, the content representation information of the data block to be written back to memory is compared with the content representation information of a plurality of other blocks, such as other blocks in a set of blocks that share a header data block with the data block (i.e., have content representation information stored in the header data block of the data block set), to determine when the content representation information of the new block to be written back to memory is sufficiently similar to the content representation information of another block stored in memory. Therefore, in this case, for example, within a set of blocks stored and grouped together as a collection of multiple data blocks having a common header data block (e.g., and preferably as memory pages), the similarity of the blocks is tested.

[0124] In these structures, when a data block is determined to be sufficiently similar to other data blocks already stored in memory based on a comparison of content representation information, it is preferably labeled and recorded, for example, in the header information of the data block in question (e.g., a set of multiple data blocks to which the data block in question belongs). For example, and preferably, the header information may record that the block is similar to another block and indicate that the other block has been identified as the block in question. Other structures are also possible if desired.

[0125] As will be appreciated from the above, in one embodiment, the techniques described herein are implemented in a system that includes memory and a processor (e.g., a graphics processing unit (GPU)). In one embodiment, data for performing (e.g., graphics) processing operations (e.g., to generate rendered output (e.g., an image to be displayed)) is stored in memory.

[0126] In one embodiment, the processor is configured to generate content representation information of data blocks to be written to a data array in the manner described above, and to write the data blocks and associated content representation information to a data structure in memory. In one embodiment, for example, the output written to memory (e.g., forming (at least partially) rendered output) is displayed on a display of an electronic device such as a telephone, tablet, television, or computer screen (e.g., via a cache system).

[0127] The memory can be, and in one implementation, located outside the processor (e.g., off-chip). In one implementation, the memory includes, for example, external DRAM. Of course, other structures are also possible.

[0128] (For example, a graphics) processor (e.g., a graphics processing unit) may, and in one embodiment, implement and execute a (graphics) processing pipeline to perform (graphics) processing operations.

[0129] In the case of a graphics processor and a graphics processing pipeline, the graphics processing pipeline may include, and in one embodiment does include, any one or more of the processing stages that a graphics processing pipeline typically includes, and in one embodiment may include all of the processing stages that a graphics processing pipeline typically includes, such as and preferably a primitive setting stage, a rasterizer, a renderer (preferably in the form of a programmable fragment shader (shader core) or including a programmable fragment shader).

[0130] In one embodiment, the graphics processor (processing pipeline) also includes one or more programmable shader levels, such as one or more items in a programmable shader level, and in one embodiment, all items in a programmable shader level, such as a vertex shader level, a shell shader, a tessellation level (e.g., where tessellation is performed by executing a shader program), a domain (evaluation) shader level (shader), a geometry shader level (shader), and a fragment shader.

[0131] The graphics processing unit (processing pipeline) may also include any other suitable and desired processing stages that a graphics processing pipeline may include, such as a depth (or depth and stencil) tester, a mixer, a tile buffer, a write unit, etc.

[0132] In one embodiment, the (e.g., graphics) processing system includes a main processor that executes applications that may require (e.g., graphics) processing by the (e.g., graphics) processor. In one embodiment, the system also includes appropriate storage units (e.g., memory), caches, etc., as described above.

[0133] The techniques described herein can be used in or in any suitable and desired data processing system and processor. For example, the processor may include a graphics processing unit (GPU), a display processing unit (DPU), a video processing unit (VPU), or an image signal processor (ISP).

[0134] As an example, the techniques described herein can be used with tile-based renderers (tile-based graphics processing systems). Therefore, in one implementation, the processor (processing pipeline) is a tile-based graphics processor (processing pipeline). However, other architectures are certainly possible.

[0135] In one implementation, the various functions of the techniques described herein are performed on a single processing platform that generates and outputs data arrays, such as those written to frame buffers for use with display devices.

[0136] In one embodiment, the data processing system and / or processor further includes one or more memories and / or memory devices, and / or communicates with one or more memories and / or memory devices that store the data described herein and / or store software that performs the processing described herein. The data processing system and / or processor may also communicate with a main microprocessor, and / or with a display based on images of data generated by the processor (processing pipeline).

[0137] The techniques described herein can be implemented in any suitable system (e.g., a properly configured microprocessor-based system). In some implementations, the techniques described herein are implemented in computer and / or microprocessor-based systems.

[0138] The various functions of the techniques described herein can be performed in any desired and suitable manner. For example, the functions of the techniques described herein can be implemented in hardware or software as needed. Thus, for example, the various functional elements and functional levels of the techniques described herein may include: suitable one or more processors, one or more controllers, functional units, circuits / circuit systems, processing logic, microprocessor devices, etc., capable of operating to perform various functions, such as suitable dedicated hardware elements (processing circuits / circuit systems) and / or programmable hardware elements (processing circuits / circuit systems) that can be programmed to operate in a desired manner.

[0139] It should also be noted here that, as those skilled in the art will understand, the various functions of the techniques described herein can be copied and / or executed in parallel on a given processor. Similarly, processing levels can share processing circuitry / systems when needed.

[0140] Furthermore, any one or more processing levels of the techniques described herein can be implemented as processing level circuits / circuit systems, for example, in the form of one or more fixed functional units (hardware) (processing circuits / circuit systems), and / or in the form of programmable processing circuits / circuit systems that can be programmed to perform desired operations. Similarly, any one or more processing levels and processing level circuits / circuit systems of the techniques described herein can be provided as separate circuit elements to one or more other processing levels or processing level circuits / circuit systems, and / or any one or more processing levels and processing level circuits / circuit systems can be formed at least partially from shared processing circuits / circuit systems.

[0141] Those skilled in the art will also understand that all described embodiments of the technology described herein may appropriately include any one or more or all of the features described herein.

[0142] The methods described herein can be implemented at least in part using software (e.g., computer programs). Therefore, it can be seen that, when viewed from other embodiments, the techniques described herein provide computer software particularly suitable for executing the methods described herein when installed on a data processor, including computer program units that execute the computer software code portion of the methods described herein when the program units are run on the data processor, and computer programs that include code suitable for executing all steps of the methods described herein when the program is run on a data processing system. The data processing system may be a microprocessor, a programmable FPGA (Field-Programmable Gate Array), etc.

[0143] The techniques described herein also extend to computer software carriers that include software that, when used to operate a graphics processor, renderer, or other system including a data processor, causes said processor, renderer, or system to perform the steps of the methods described herein together with said data processor. Such computer software carriers can be physical storage media, such as ROM chips, CD-ROMs, RAM, flash memory, or disks, or they can be signals, such as electronic signals, optical signals, or (e.g., to satellites, etc.) radio signals transmitted through wires.

[0144] It should also be understood that not all steps of the methods described herein need to be performed by computer software. Therefore, according to another broad implementation, the techniques described herein provide computer software, and such software is installed on a computer software carrier to perform at least one step of the methods set forth herein.

[0145] Therefore, the techniques described herein can be suitably implemented as computer program products for use with computer systems. Such implementations may include a series of computer-readable instructions fixed on a tangible, non-transitory medium, such as a computer-readable medium, e.g., a disk, CD-ROM, ROM, RAM, flash memory, or hard disk. It may also include a series of computer-readable instructions that can be invisibly transmitted to a computer system via a modem or other interface device on a tangible medium or using wireless technology, including but not limited to optical or analog communication lines, and wireless technology including but not limited to microwave, infrared, or other transmission technologies. This series of computer-readable instructions performs all or part of the functions previously described herein.

[0146] Those skilled in the art will understand that such computer-readable instructions can be written in a variety of programming languages ​​to be used with many computer architectures or operating systems. Furthermore, these instructions can be stored using any current or future memory technology (including, but not limited to, semiconductor, magnetic, or optical), or transmitted using any current or future communication technology (including, but not limited to, optical, infrared, or microwave). It is conceivable that such computer program products can be distributed as removable media with accompanying printed or electronic documentation (e.g., shrink-wrapped software) on a computer system, for example, pre-installed on a system ROM or fixed disk, or distributed from servers or electronic bulletin boards via networks (e.g., the Internet or the World Wide Web). Attached Figure Description

[0147] Various embodiments of the invention described herein will now be described by way of example only and with reference to the accompanying drawings, wherein:

[0148] Figure 1 An exemplary graphics processing system that can implement the present invention is shown;

[0149] Figure 2 It is shown schematically and in more detail. Figure 1 The caching system of the embodiments shown;

[0150] Figure 3 The data structures used in embodiments of the present invention are shown;

[0151] Figure 4This is a flowchart illustrating the operation of writing data from a graphics processor to memory in an embodiment of the present invention; and

[0152] Figure 5 The generation and use of content representation signatures in embodiments of the present invention are illustrated schematically and in more detail.

[0153] Where appropriate, the same reference numerals in the accompanying drawings are used for the same elements and features. Detailed Implementation

[0154] Several embodiments of the present invention will now be described in the context of graphics processing systems.

[0155] Figure 1 An exemplary graphics processing system 1 is shown that can implement the present invention and its embodiments.

[0156] Figure 1 The exemplary graphics processing system 1 shown includes a main processor, which includes a central processing unit (CPU) 2 in the form of a system-on-a-chip (SoC) 7, a graphics processing unit (GPU) 3, a video codec 4, a display controller 5, and a memory controller 6. Figure 1 As shown, these units communicate via interconnect 8 and have access to an off-chip memory system (memory) 9. In this system, the GPU 3, video codec 4, and / or CPU 2 generate frames (images) to be displayed, and then the display controller 5 provides the frames to the display 10 for display.

[0157] When using this system, an application 11, such as a game, running on the main processor (CPU) 2, will need to display frames on the display 10. To do this, the application 11 sends appropriate commands and data to the driver 12 of the graphics processing unit 3 running on the CPU 2. The driver 12 then generates appropriate commands and data to cause the graphics processing unit 3 to render appropriate frames for display and store these frames in appropriate frame buffers (e.g., main memory 9). The display controller 5 then reads these frames into the buffer for display, and then reads them out of the buffer and displays them on the display panel of the display 10.

[0158] As part of this process, the graphics processor 3 reads data such as textures and geometry to be rendered from the memory 9, processes the data, and then returns the data to the memory 9 (e.g., in the form of processed textures and / or frames to be displayed). Then, for example, as described above, the data is further read from the memory by, for example, the display controller 5 for display on the display 10. Therefore, data transfer is required to and from the graphics processor 3 (especially to and from the processing cores of the graphics processor 3) and the memory 9.

[0159] To facilitate this and reduce the amount of data written to memory 9 during graphics processing operations, graphics processing system 1 also includes a cache system 13 disposed between graphics processor 3 and interconnect 8. The cache system 13 is capable of transferring data between memory 9 and graphics processor 3. Therefore, the cache system 13 controls the writing of blocks of data (e.g., pixels) generated by graphics processor 3 to memory 9.

[0160] Figure 2 The components of the graphics processing system 1 (including the cache system 13) relevant to the operation of this embodiment are shown schematically and in more detail, and especially those related to transferring data from the graphics processor 3 to the memory 9 using the "transaction elimination" operation. Those skilled in the art will understand that the following may exist... Figure 2 Other components of the system not shown in the diagram.

[0161] Figure 2 The memory 9 and graphics processor 3 are shown. (Example) Figure 2 As shown, there is a cache system 13 between the memory 9 and the graphics processor 3. The cache system 13 is capable of transferring data from the memory 9 to the graphics processor 3 (and in particular to the processing core (shader core) 14 of the graphics processor 3), and conversely, transferring data generated by the processing core 14 of the graphics processor 3 back to the memory 9.

[0162] Figure 2 The cache system shown is illustrated as comprising two cache levels: an L3 cache 15 closer to memory 9 and an L2 cache 16 closer to the graphics processor 3 (and data is provided from the L2 cache 16 to the shader core 14). Other cache hierarchy structures are also possible if desired, such as including only a single cache level (L2 cache) or more than two cache levels.

[0163] like Figure 2 As shown, in this embodiment, data is transferred from memory 9 to L3 cache 15, then from L3 cache 15 to L2 cache 16, and from L2 cache 16 to shader core 14 (and vice versa, i.e., data is transferred from shader core 14 to L2 cache 16, from L2 cache 16 to L3 cache 15, and from L3 cache 15 to memory 9).

[0164] To facilitate the processing of compressed data from memory 9 when needed (and the return of compressed data to memory 9), such as Figure 2 As shown, L2 cache 16 is associated with data encoder 17 (in the form of memory page compression unit (MPC)).

[0165] This data encoder 17 is capable of decompressing data received from memory 9 via L3 cache 15 in uncompressed form and storing it in L2 cache 16 for use by the shader core 14 of the graphics processor 3, and conversely, compressing data before writing it back to memory 9 (again via L3 cache 15) from L2 cache 16. The operation of this data encoder (MPC) 17 will be discussed in more detail below.

[0166] like Figure 2 As shown, L2 cache 16 also includes appropriate interconnects 18 (in the form of an asynchronous switching network in this context) for transferring data between L2 cache 16 and shader core 14.

[0167] Furthermore, as will be explained below, when data is to be written from the shader core 14 of the graphics processor 3 to the memory 9, the data encoder 17 of the cache system 13 also performs a "smart erase" operation to generate information (e.g., a CRC "signature") representing the content of each relevant data block. The data encoder 17 then compares this signature with the signature of a version of the data block already stored in the memory 9 (at the same location in the data array) to see when the signatures match.

[0168] If the signatures match, it is assumed that the new data block is the same version as the data block already stored in memory 9, and therefore data encoder 17 abandons writing the new data block to memory 9. This avoids write operations for data blocks that do not actually change from one frame to the next. This can save significant bandwidth and power consumption associated with memory write operations.

[0169] On the other hand, when the signatures do not match, a new data block is written to memory 9 along with the signature generated for that data block.

[0170] This embodiment particularly relates to an improved technique for processing such signatures, for example, when writing data from the graphics processor 3 to the memory 9.

[0171] In this embodiment, the data being processed by the graphics processor 3 (e.g., a data array) is stored in the memory 9 as corresponding data blocks (blocks of the data array), wherein each data block is stored in the memory 9 in compressed form, but in the cache of the graphics processor 3 in uncompressed form for use by the shader core of the graphics processor 3.

[0172] In this embodiment, multiple data blocks from the data array are stored in a corresponding data structure that stores the multiple data blocks together with the corresponding header block of the set of data blocks in question. Figure 3This is illustrated, and a data structure 20 is shown, which includes a set of fifteen storage areas 22 for storing the corresponding data blocks to be stored in the data structure 20, and a header area 21 for storing header information associated with the set of data blocks 22.

[0173] In this embodiment, the header region 21 includes 256 bytes, and each data block storage region 22 also includes 256 bytes (this size of the data block may correspond to an integer number (e.g., four) cache lines).

[0174] Therefore, the data structure 20, with fifteen data block storage areas 22 and their header areas 21, comprises 4 kilobytes of memory pages (and the data blocks and header information will be stored in the same memory page and fit into the same memory page). This then facilitates the addressing of the data blocks, as they all use the same single physical memory address.

[0175] If needed, other configurations for implementing this structure can be used, for example, depending on the memory pages and relative cache line sizes used in the graphics processing system in question.

[0176] like Figure 3 As shown, the header block of the set of data blocks stored in header region 21 (stored in data block storage region 22) may include any suitable and desired header data. For example, this may include an indication 23 for each respective data block, which includes: whether the data block is stored in compressed form (and (if desired) some compression state required to decode (decompress) the block), whether the header data includes a constant color representation of the block, and / or how many memory transactions (bursts) will be required to retrieve the data of the block (in its compressed form) from memory.

[0177] like Figure 3 As shown, in this embodiment, for each data block involved in the header block, the header block 21 also includes a corresponding content indication signature 24 in CRC form. The use of these signatures (CRC) will be discussed further below.

[0178] If necessary, any other suitable and desired form of header data may also be included in header block 21.

[0179] Figure 4 An implementation of the operation of writing data from the graphics processor 3 back to (e.g., evicting data from the cache of the graphics processor 3 to) memory 9 is shown.

[0180] Figure 4The write process shown includes checking whether the block to be written back to memory 9 (to be evicted from L2 cache 16) is the same version as the block already stored in memory 9 (in which case, the operation of writing the block back to memory 9 is not performed, because the version of the block stored in memory 9 is already the same as the block to be written back).

[0181] like Figure 4 As shown, determining whether a new block is the same version as a block already stored in memory 9 is based on a comparison of the content representation signature in CRC (Cyclic Redundancy Check) form for the block.

[0182] like Figure 4 As shown, for example, when a line of the L2 cache of the graphics processor 3 is selected for eviction (and eviction is triggered), the process begins (step 101). The data block, including the data being evicted (cache line), is recorded (registered) in the data encoder 17 associated with the L2 cache 16 as needing to be encoded (compressed) and returned to the memory 9 (step 102).

[0183] Then, the data encoder 17 will attempt to read all rows related to the data block in question from the L2 cache 16 (therefore including rows selected for eviction, as well as any cached rows of that data block that were not selected for eviction) (step 103). The rows read from the L2 cache 16 are also invalidated (marked as invalid) (and thus can be reused).

[0184] The header data of the data block is also read from the memory 9 by the data encoder 17 (step 103).

[0185] If not all the data of the block in question resides in L2 cache 16, and the header data indicates that the block is stored in compressed form in memory 9, then the compressed data of the (entire) block stored in memory 9 is read and decoded (decompressed) by data encoder 17 to provide the uncompressed form of the block. This allows the remaining portion of the block that does not reside in L2 cache 16 to be available to data encoder 17, thus enabling the block to be encoded (compressed) as a whole.

[0186] (Alternatively, when the header data indicates that the data of the block in question is stored in memory 9 in uncompressed form, the data encoder 17 may not need to have all the data for that block. Then, the data for that block in the L2 cache 16 can simply be written out to the appropriate block 22 of the data structure 20 in memory 9.)

[0187] Once the data encoder 17 has read in all the necessary data for the block in question, as well as the block header data, the data encoder 17 determines whether the data of the block represents a "constant color" block (i.e., all data elements of the data block have the same value) (step 104).

[0188] When a new block to be written back to memory 9 is determined to be a constant-color block, data encoder 17 determines whether the version of the block already stored in memory 9 is a constant-color block based on the header data of the version of the block already stored in memory 9. If it is a constant-color block, it determines whether the constant color of the new block (step 105) is the same as the color of the constant-color block in data structure 20 already stored in memory 9 (thus indicating that the contents of the two blocks are the same). The constant-color value of the version of the block already stored in memory 9 can be simply stored in the header data along with a flag indicating that the block is a constant-color block.

[0189] When the colors are determined to be the same, the data encoder 17 does not write the new block back to memory 9 (and the data of that block is discarded). This effectively leaves the existing version of the block in memory.

[0190] On the other hand, when it is determined that the color is different (or simply that the version of the block in memory is not a constant color block), the data encoder 17 does not write the new block back to memory 9, but updates the header data 23 of the block (in the header data block 21 of the set of blocks under discussion) to indicate that the block under discussion is a constant color, and writes the constant color of the block under discussion as a content representation signature into the header of the block under discussion (step 106).

[0191] When it is determined that the new block to be written back to memory 9 is not a constant color block, the data encoder 17 reads the data stored in the header block 21 (e.g., ...). Figure 3 The content of block 22 in memory 9 (which has the same location as the block to be written back in the data array) in memory 9 (shown) represents the signature (CRC) 24 to determine the CRC of the corresponding block in data structure 20.

[0192] Then, the data encoder calculates the CRC representing the contents of the new block to be written back to memory 9 (step 107), and then compares the newly calculated CRC for the new block to be written back to memory 9 with the CRC of the version of that block stored in memory 9 (step 108). See reference. Figure 5 The calculation of CRC is described in more detail, and the newly calculated CRC is compared with the previously calculated CRC.

[0193] If the CRC of the new block is the same as the CRC of the version of the block already stored in data structure 20 in memory 9 (thus indicating that the contents of the two blocks are the same (sufficiently similar)), then the data encoder 17 does not write the new block back to memory 9 (and discards the data of the block). This effectively leaves the existing version of the block in memory.

[0194] On the other hand, when the CRC comparison determines that the new block is different from the version of the block already stored in the data structure 20 in the memory 9, the new block must be written back to the data structure 20 in the memory 9.

[0195] Therefore, the data encoder 22 then appropriately encodes (compresses) the data of the new block to provide a new compressed version of the block (step 109). The new compressed version of the block is then written back to the appropriate block 22 of the data structure 20 in memory 9 (step 110) (to replace the existing version of the block).

[0196] The data encoder will update the header in the data structure for the set of data blocks in question accordingly, for example to indicate new compressed metadata, such as the number of memory transactions required to extract the compressed data of the block, and write the new CRC (content-representative signature) of the block (determined in step 106) into header block 21 (step 111).

[0197] Figure 5 Showing more details Figure 2 Features of the data encoder 17 of the caching system in the illustrated embodiment, these features relate to signature generation and comparison processes (e.g. Figure 4 Steps 108 to 111).

[0198] like Figure 5 As shown, the data block read by the data encoder 17 from, for example, the L2 cache 16 of the graphics processor 3 is passed both to the buffer 25, which temporarily stores the block data during signature generation and comparison processing, and to the signature generator 26.

[0199] The signature generator 26 operates to generate the necessary signature for the block. In this embodiment, the signature is in the form of a 64-bit CRC of the block.

[0200] If necessary, other signature generation functions and other forms of signatures, such as hash functions, can be used instead. For example, a single signature can be generated for RGBA data blocks (e.g., tiles), or separate signatures can be generated for each color plane. Similarly, color conversion can be performed, and separate signatures can be generated for each of Y, U, and V. To reduce power consumption, the tile data processed by signature generator 26 can be reordered (e.g., using Hilbert curves) if necessary.

[0201] Once a signature for a new tile has been generated, it is passed to a signature comparator 28, which compares the signature of the new tile with the signature of an existing version of the tile in data structure 20 in memory 9. (Therefore, in this embodiment, the comparison is with the signature of a tile already in data structure 20 at the tile's location in question.)

[0202] The signatures of multiple blocks from the frame stored in memory 9 are cached in the signature buffer 27 of the data encoder 17 (which can be implemented in various ways, such as a buffer or cache) to facilitate their retrieval during system operation, and thus, when a relevant signature exists in the signature buffer 27, the signature comparator 28 retrieves the relevant signature from the signature buffer 27 (or triggers the retrieval of the signature from the main memory 9) and compares the signature of the version of the block stored in memory 9 with the signature received from the signature generator 26 to see when a match exists.

[0203] If the signatures do not match, the signature comparator 28 controls the write controller 29 to write the new block and its signature into the data structure 20 in the memory 9. Figure 4 (Steps 111 and 110). On the other hand, when the signature comparator 28 finds that the signature of the new block matches the signature of the block already stored in the data structure 20, the write controller 29 invalidates the block and no data is written to the data structure 20 (i.e., the existing block is allowed to remain in the data structure 20 and the signature of the block is preserved).

[0204] In this way, a block is written to data structure 20 in memory 9 only if a signature comparison reveals that the block differs from a version of the block already stored in data structure 20. This helps reduce the number of transactions written to memory 9 when generating frames.

[0205] In some implementations (e.g., when a set of multiple data blocks and their associated CRCs are stored in the same data structure in memory), it is also possible to compare the CRC of a newly generated data block to be written back to memory with the CRC of another data block or other data blocks in a different position in the frame, or with the CRC of one or more data blocks in other (e.g., previous or subsequent) frames and the corresponding data blocks stored in memory (e.g., the same data structure in memory).

[0206] When the CRC of a new block is the same as that of a block already stored in memory, the data encoder does not write the new block back to memory 9 (and the data of that block is discarded). Instead, the data encoder updates the header data of that block (in the header data block of the block set in question) to indicate that the block in question is the same as the other blocks identified as identical.

[0207] Although this embodiment has been discussed above with specific reference to cache operations in relation to a graphics processor in a graphics processing system, the applicant recognizes that using a cache-associated data encoder in the manner of this embodiment discussed above is useful in other cache devices and systems, not just in the context of a graphics processor.

[0208] For example, a processor may include a display processor, a video processor, or an image signal processor (ISP).

[0209] As can be seen from the above, at least in its preferred embodiment, the present invention provides a storage (e.g., compression) of a data block and associated information representing the contents of that data block (e.g., a signature (e.g., CRC)).

[0210] This is achieved, at least in a preferred embodiment of the invention, by storing data blocks and their associated content representation information in the same data structure in memory. This makes it easier, for example, for drivers to process the data as a whole. This is especially true for newer graphics APIs such as Vulkan.

Claims

1. A method for operating a data processing system, the method comprising: When you want to store a data array in memory: Generate information representing the contents of data blocks that represent a specific region of the data array; The data block is written into the data structure of the memory; and The information representing the content of the data block is written into the data structure. The data processing system includes a caching system configured to: transfer data blocks stored in the memory to the processor for use by the processor when performing processing operations, and transfer data blocks from the processor to the memory; The caching system includes a cache and a data encoder associated with the cache, the cache being configured to receive data blocks from the memory and provide data blocks to the processor for use when performing processing operations, and to receive data blocks from the processor for transmission to the memory; The method includes: When data needs to be written from the cache to the memory, the data encoder encodes the uncompressed data blocks from the cache for storage in a compressed format in the memory, and sends the compressed data blocks to the memory for storage; and When a compressed data block is to be read from the memory into the cache, the data encoder decodes the compressed data block from the memory and stores the data block in the cache in an uncompressed format.

2. The method according to claim 1, wherein, The method includes: when the data array is to be stored in memory: The data blocks of the data array are encoded; Write the encoded data block into the data structure in the memory; and The information representing the content of the data block is written into the data structure in an unencoded format.

3. The method according to claim 1 or 2, wherein, The method includes: for each data block representing a specific region of the data array among a plurality of data blocks in the data array: Generate information representing the contents of the data block; The data block is written into the data structure of the memory; and The information representing the content of the data block is written into the data structure, such that the data structure stores the plurality of data blocks and a plurality of pieces of information representing the content of the plurality of data blocks.

4. The method according to claim 3, wherein, The method includes: Write two or more data blocks from the plurality of data blocks, along with content representation information associated with those two or more data blocks, into a first data structure in the memory; and Write one or more of the other data blocks and the content representation information associated with the one or more other data blocks into a second data structure in the memory.

5. The method according to claim 3, wherein, The method includes: for each data block representing a specific region of the data array among a plurality of data blocks in the data array: The data blocks are written into a region of a data structure in the memory, wherein the data structure includes multiple regions for storing data blocks of the data array and a region for storing associated header information; and The information representing the content of the data block is written into the area that stores the associated header information.

6. The method according to claim 1 or 2, wherein, The method includes: determining when the data block is a constant data value; and When the data block is a constant value: The data block is not written to the data structure in the memory; and The constant value of the entire data block is written into the data structure in the memory as information representing the content of the data block.

7. The method according to claim 1 or 2, wherein, The method includes: For at least one data block in the data structure already stored in the memory, the information representing the content of the data block that has been generated for the data block is compared with the information representing the content of the data block in the data structure already stored in the memory; and The comparison is used to determine whether to write the data block into the data structure in the memory.

8. The method according to claim 1 or 2, wherein, The data structure includes one or more regions for storing one or more data blocks of the data array and a region for storing header information of the one or more data blocks.

9. The method according to claim 8, wherein, The header region of the data structure includes a sub-region that stores header information of the one or more data blocks and a sub-region that stores content representation information of the one or more data blocks.

10. A data processing system, the data processing system comprising: Memory; as well as A processor that communicates with the memory; The processor is configured as follows: When the data array is stored in the memory: Generate information representing the contents of data blocks that represent a specific region of the data array; The data block is written into the data structure of the memory; and The information representing the content of the data block is written into the data structure. The data processing system includes a caching system configured to transfer data blocks stored in the memory to the processor for use by the processor when performing processing operations, and to transfer data blocks from the processor to the memory. The caching system includes: A cache, configured to receive data blocks from the memory and provide data blocks to the processor for use during processing operations, and to receive data blocks from the processor for transmission to the memory; and A data encoder, which is associated with the cache and configured to: When an uncompressed data block is to be written from the cache to the memory, the uncompressed data block from the cache is encoded to be stored in a compressed format in the memory, and the compressed data block is sent to the memory for storage; and When a compressed data block is to be read from the memory into the cache, the compressed data block from the memory is decoded, and the data block is stored in the cache in an uncompressed format.

11. The data processing system according to claim 10, wherein, The processor is configured such that, when the data array needs to be stored in memory: The data blocks of the data array are encoded; Write the encoded data block into the data structure in the memory; and The information representing the content of the data block is written into the data structure in an unencoded format.

12. The data processing system according to claim 10 or 11, wherein, The processor is configured to handle individual data blocks representing specific regions of the data array from among a plurality of data blocks in the data array: Generate information representing the contents of the data block; The data block is written into the data structure in the memory; as well as The information representing the content of the data block is written into the data structure, such that the data structure stores the plurality of data blocks and a plurality of pieces of information representing the content of the plurality of data blocks.

13. The data processing system according to claim 12, wherein, The processor is configured to: Two or more data blocks from the plurality of data blocks, along with content representation information associated with those two or more data blocks, are written into a first data structure in the memory; and Write one or more of the other data blocks and the content representation information associated with the one or more other data blocks into a second data structure in the memory.

14. The data processing system according to claim 12, wherein, The processor is configured to, for each data block representing a specific region of the data array among a plurality of data blocks in the data array: The data blocks are written into a region of a data structure in the memory, wherein the data structure includes multiple regions for storing data blocks of the data array and a region for storing associated header information; and The information representing the content of the data block is written into the area that stores the associated header information.

15. The data processing system according to claim 10 or 11, wherein, The processor is configured to: Determine when the data block is a constant data value; and When the data block is a constant value: The data block is not written into the data structure in the memory; and The constant value of the entire data block is written into the data structure in the memory as information representing the content of the data block.

16. The data processing system according to claim 10 or 11, wherein, The processor is configured to: For at least one data block in the data structure already stored in the memory, the information representing the content of the data block that has been generated for the data block is compared with the information representing the content of the data block in the data structure already stored in the memory; as well as The comparison is used to determine whether to write the data block into the data structure in the memory.

17. The data processing system according to claim 10 or 11, wherein, The data structure includes one or more regions for storing one or more data blocks of the data array, and a region for storing header information of the one or more data blocks.

18. The data processing system according to claim 17, wherein, The header region of the data structure includes a sub-region that stores header information of the one or more data blocks and a sub-region that stores content representation information of the one or more data blocks.

19. A computer-readable storage medium storing computer software code, which, when executed on a data processor, performs a method for operating a data processing system, the method comprising: When you want to store a data array in memory: Generate information representing the contents of data blocks that represent a specific region of the data array; The data block is written into the data structure of the memory; and The information representing the content of the data block is written into the data structure. The data processing system includes a caching system configured to: transfer data blocks stored in the memory to the processor for use by the processor when performing processing operations, and transfer data blocks from the processor to the memory; The caching system includes a cache and a data encoder associated with the cache, the cache being configured to receive data blocks from the memory and provide data blocks to the processor for use when performing processing operations, and to receive data blocks from the processor for transmission to the memory; The method includes: When data needs to be written from the cache to the memory, the data encoder encodes the uncompressed data blocks from the cache for storage in a compressed format in the memory, and sends the compressed data blocks to the memory for storage; and When a compressed data block is to be read from the memory into the cache, the data encoder decodes the compressed data block from the memory and stores the data block in the cache in an uncompressed format.

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