Semiconductor device

By setting trenches and mesa on the semiconductor substrate and controlling the hydrogen chemical concentration distribution, the problem of large threshold voltage fluctuations in semiconductor devices is solved, thereby improving the stability and performance of the devices.

CN113140616BActive Publication Date: 2026-01-30FUJI ELECTRIC CO LTD
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Patent Information

Application Number
CN202110055667.1
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Priority Date
2020-12-24
Filing Date
2021-01-15
Publication Date
2026-01-30
Estimated Expiration
2041-01-15

AI Technical Summary

Technical Problem

In semiconductor devices, the threshold voltage of switching elements such as transistors varies greatly, which affects the stability of device performance.

Method used

Trench portions and mesa portions are formed on a semiconductor substrate. The mesa portions have concentration peaks of hydrogen chemical concentration. The threshold voltage is stabilized by controlling the distribution of hydrogen, including setting high-concentration regions and low-concentration regions, combined with the design of interlayer insulating films and contact holes.

Benefits of technology

It effectively reduces the threshold voltage variation of switching elements such as transistors, and improves the performance stability and reliability of the device.

✦ Generated by Eureka AI based on patent content.

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Abstract

In semiconductor devices, it is preferable that the threshold voltage of switching elements such as transistors has small variations. A semiconductor device is provided, comprising: a semiconductor substrate having an upper surface and a lower surface and having a drift region of a first conductivity type; a trench portion disposed such that it extends from the upper surface of the semiconductor substrate to the drift region; and a mesa portion sandwiched between the trench portions, the mesa portion having: a base region of a second conductivity type disposed between the drift region and the upper surface; and a first region having a concentration peak of hydrogen chemical concentration at a first depth position within the mesa portion.
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Description

Technical Field

[0001] This invention relates to a semiconductor device. Background Technology

[0002] Previously, it was known that by injecting hydrogen and allowing it to diffuse to a predetermined depth in a semiconductor substrate, lattice defects formed in the region through which hydrogen passes are combined with hydrogen and thus donated, a technique was known to increase the doping concentration (for example, see Patent Document 1).

[0003] Patent Document 1: Japanese Republished Patent No. 2016-204227 Summary of the Invention

[0004] Technical issues

[0005] In semiconductor devices, it is preferable that the threshold voltage of switching elements such as transistors varies little.

[0006] Technical solution

[0007] To address the aforementioned problems, one embodiment of the present invention provides a semiconductor device comprising a semiconductor substrate having an upper surface and a lower surface, and having a drift region of a first conductivity type. The semiconductor device may include a trench portion disposed such that it extends from the upper surface of the semiconductor substrate to the drift region. The semiconductor device may include a mesa portion sandwiched between the trench portions. The mesa portion may have a base region of a second conductivity type disposed between the drift region and the upper surface. The mesa portion may have a first region having a concentration peak of hydrogen chemical concentration at a first depth position within the mesa portion.

[0008] The first depth location can be the lower end of the base region, near the top. The hydrogen chemical concentration at the first depth location at the center of the platform surface in the width direction can be higher than the hydrogen chemical concentration at the first depth location of the area in contact with the trench.

[0009] The semiconductor device may have a second region disposed on a different surface from the surface where the first region is disposed, and the hydrogen chemical concentration at a first depth position is lower than the hydrogen chemical concentration of the first region at the first depth position.

[0010] The mesa can have a high-concentration region disposed between the drift region and the upper surface of the semiconductor substrate, and the doping concentration is higher than that of the base region. The first depth position can be disposed at a position shallower than the lower end of the high-concentration region.

[0011] The base region may have a doping concentration peak at a second depth position, deeper than the first depth position, in the interface with the sidewall of the trench.

[0012] The high-concentration region can be the emitter region of the first conductivity type, which is located in contact with the trench and has a higher doping concentration than the drift region.

[0013] The high-concentration region can be a contact region of the second conductivity type with a doping concentration higher than that of the base region.

[0014] The semiconductor device may include an emitter electrode disposed above the upper surface of a semiconductor substrate. The distance in the depth direction from the first depth position to the upper surface of the semiconductor substrate in contact with the emitter electrode may be less than 1 μm.

[0015] A semiconductor device may have an interlayer insulating film covering the upper surface of a semiconductor substrate. The interlayer insulating film may have contact holes that expose the upper surface of the semiconductor substrate. In a top view, a first region may be positioned overlapping the contact holes.

[0016] The mesa may have an emitter region of a first conductivity type, which is disposed between the drift region and the upper surface of the semiconductor substrate, and has a higher doping concentration than the base region. The semiconductor device may have an interlayer insulating film covering the upper surface of the semiconductor substrate. The interlayer insulating film may have contact holes that expose the upper surface of the semiconductor substrate. In plan view, a first region may be located at a position overlapping the contact holes. The semiconductor device may have a trench contact portion extending from the upper surface through the emitter region on the lower surface side of the contact holes. The first region may be located at a depth deeper than the bottom surface of the trench contact portion.

[0017] The base region may have a doping concentration peak at a second depth position that is shallower than the first depth position at the interface in contact with the sidewall of the trench.

[0018] The bottom surface of the groove contact portion can be positioned at a third depth in the depth direction from the upper surface to the lower surface. The second depth position can be shallower than the third depth position. The third depth position can be shallower than the first depth position.

[0019] The semiconductor device may include a transistor section, wherein the transistor section has a collector region of a second conductivity type between a drift region and the lower surface of the semiconductor substrate. The semiconductor device may also include a diode section, wherein the diode section may have a cathode region of a first conductivity type between a drift region and the lower surface of the semiconductor substrate. A first region may be disposed on the mesa portion of the transistor section. A second region may be disposed on the mesa portion of the diode section.

[0020] The transistor section may have a first conductivity type region and a second conductivity type region alternately arranged on the upper surface of the mesa along the long side direction of the trench section. In a top view, the first region may be configured to overlap with the first conductivity type region but not with the second conductivity type region.

[0021] The semiconductor device may have a first lower region disposed below the first region on the upper surface side of the semiconductor substrate. The semiconductor device may also have a second lower region, which is located at the same depth as the first lower region and disposed below it. The concentration of recombination centers in the first lower region may be lower than the concentration of recombination centers in the second lower region.

[0022] The upper surface of the mesa may have a second conductive region disposed above ground, which is adjacent to the trench portion. The upper surface of the mesa may also have a first conductive region disposed between the trench portion and the second conductive region, and in contact with the trench portion. The first region may be disposed on the mesa of the transistor portion.

[0023] It should be noted that the above description of the invention does not list all the features of the invention. Furthermore, sub-combinations of these feature groups can also constitute inventions. Attached Figure Description

[0024] Figure 1 This is a top view showing an example of a semiconductor device 100.

[0025] Figure 2 yes Figure 1 An enlarged view of region D in the image.

[0026] Figure 3 It is shown Figure 2 A diagram showing an example of the ee section.

[0027] Figure 4 It is shown Figure 3 A diagram illustrating an example of a method for manufacturing the semiconductor device 100 shown.

[0028] Figure 5 The diagram schematically shows a platform 60 with a first region 270 and the hydrogen chemical concentration distribution in the X-axis and Z-axis directions.

[0029] Figure 6 This is a diagram showing another structural example of a platform 60 with a first region 270.

[0030] Figure 7 This is a diagram showing another structural example of a platform 60 with a first region 270.

[0031] Figure 8 This is a diagram showing another structural example of a platform 60 with a first region 270.

[0032] Figure 9A This is a magnified view of the platform from above, at a depth of 60 degrees.

[0033] Figure 9BThis is another example of a magnified view of the platform surface 60 from above.

[0034] Figure 9C This is another example of a magnified view of the platform surface 60 from above.

[0035] Figure 9D It is shown Figure 9A or Figure 9B A diagram of another example of the ff section.

[0036] Figure 9E It is shown Figure 9A A diagram showing an example of the gg section.

[0037] Figure 9F It is shown Figure 9B A diagram showing an example of the hh section.

[0038] Figure 10 It is shown Figure 2 A diagram of another example of the ee section.

[0039] Figure 11 It is shown Figure 10 A diagram illustrating an example of a method for manufacturing the semiconductor device 100 shown.

[0040] Symbol Explanation

[0041] 10…Semiconductor substrate, 11…Well region, 12…Emitter region, 14…Base region, 15…Contact region, 16…Carrier dam region, 18…Drift region, 20…Buffer zone, 21…Upper surface, 22…Collector region, 23…Lower surface, 24…Collector, 25…Concentration peak, 29…Linear portion, 30…Dummy trench, 31…Front end, 32…Dummy insulating film, 34…Dummy conductive portion, 38…Interlayer insulating film, 39…Linear portion, 40…Gate trench, 41…Front end, 42…Gate insulating film, 44…Gate 52…Emitter electrode, 54…Contact hole, 55…Trench contact, 60, 61…Mesa, 70…Transistor section, 80…Diode section, 81…Extension region, 82…Cathode region, 90…Edge termination structure, 100…Semiconductor device, 130…Outer periphery gate wiring, 131…Active-side gate wiring, 160…Active section, 162…End edge, 164…Gate pad, 210…Second lower region, 220…First lower region, 260…Second region, 270…First region, 275…Concentration peak Detailed Implementation

[0042] The present invention will now be described through embodiments thereof, but these embodiments are not intended to limit the invention as defined in the claims. Furthermore, not all combinations of the features described in the embodiments are necessarily required for the solution of the invention.

[0043] In this specification, one side parallel to the depth direction of the semiconductor substrate is referred to as "upper," and the other side as "lower." One of the two main surfaces of the substrate, layer, or other component is referred to as the upper surface, and the other as the lower surface. The directions of "upper" and "lower" are not limited to the direction of gravity or the direction when mounting the semiconductor device.

[0044] In this specification, orthogonal coordinate axes of X, Y, and Z are sometimes used to illustrate technical matters. Orthogonal coordinate axes merely determine the relative positions of constituent elements and do not limit specific directions. For example, the Z-axis does not necessarily represent the height direction relative to the ground. It should be noted that the +Z-axis direction and the -Z-axis direction are opposite to each other. When a direction is referred to as the Z-axis without specifying positive or negative, it refers to a direction parallel to the +Z-axis and -Z-axis.

[0045] In this specification, orthogonal axes parallel to the upper and lower surfaces of the semiconductor substrate are designated as the X-axis and Y-axis. An axis perpendicular to the upper and lower surfaces of the semiconductor substrate is designated as the Z-axis. In this specification, the direction of the Z-axis is sometimes referred to as the depth direction. Additionally, in this specification, the direction including the X-axis and Y-axis, parallel to the upper and lower surfaces of the semiconductor substrate, is sometimes referred to as the horizontal direction.

[0046] Additionally, the region extending from the center of the semiconductor substrate in the depth direction to the upper surface of the semiconductor substrate is sometimes referred to as the upper surface side. Similarly, the region extending from the center of the semiconductor substrate in the depth direction to the lower surface of the semiconductor substrate is sometimes referred to as the lower surface side. In this specification, the center position in the depth direction of the semiconductor substrate is sometimes referred to as Zc.

[0047] In the context of this specification, the terms "same" or "equal" may also include cases with errors due to manufacturing deviations, etc. Such errors are, for example, within 10%.

[0048] In this specification, the conductivity type of the doped region containing impurities is described as P-type or N-type. In this specification, impurities sometimes specifically refer to either an N-type donor or a P-type acceptor, and sometimes are referred to as dopants. In this specification, doping refers to introducing donors or acceptors into a semiconductor substrate to create a semiconductor exhibiting N-type or P-type conductivity.

[0049] In this specification, doping concentration refers to the concentration of donors or acceptors at thermal equilibrium. In this specification, net doping concentration refers to the net concentration obtained by adding the donor concentration as the concentration of positive ions and the acceptor concentration as the concentration of negative ions, including charge polarity. As an example, if the donor concentration is set to N... D Set the acceptor concentration to NA Then the net doping concentration at any position is N. D -N A In this specification, the net doping concentration is sometimes listed as the doping concentration only.

[0050] Donors have the function of supplying electrons to semiconductors. Acceptors have the function of accepting electrons from semiconductors. Donors and acceptors are not limited to impurities themselves. For example, VOH defects, which are formed by the combination of vacancies (V), oxygen (O), and hydrogen (H) in semiconductors, function as electron-supplying donors. In this specification, VOH defects are sometimes referred to as hydrogen donors.

[0051] In this specification, "P+" or "N+" indicates a higher doping concentration than "P" or "N," while "P-" or "N-" indicates a lower doping concentration than "P" or "N." Similarly, "P++" or "N++" indicates a higher doping concentration than "P+" or "N+." Unless otherwise stated, the unit system used in this specification is SI. Although length is sometimes expressed in cm, various calculations can be performed after conversion to meters (m).

[0052] In this specification, chemical concentration refers to the atomic density of impurities measured independently of the electroactivated state. For example, chemical concentration can be measured by secondary ion mass spectrometry (SIMS). The net doping concentration mentioned above can be determined by capacitance-voltage measurement (CV method). Alternatively, the carrier concentration measured by extended resistance measurement (SR method) can be used as the net doping concentration. The carrier concentration measured by CV or SR method can be the value under thermal equilibrium conditions. Furthermore, in the N-type region, the donor concentration is much greater than the acceptor concentration, so the carrier concentration in this region can be used as the donor concentration. Similarly, in the P-type region, the carrier concentration in this region can also be used as the acceptor concentration. In this specification, the doping concentration in the N-type region is sometimes referred to as the donor concentration, and the doping concentration in the P-type region is sometimes referred to as the acceptor concentration.

[0053] Furthermore, when the concentration distribution of donor, acceptor, or net dopant has a peak, the peak value can be taken as the concentration of the donor, acceptor, or net dopant in that region. When the concentrations of donor, acceptor, or net dopant are almost equal, the average concentration of the donor, acceptor, or net dopant in that region can be taken as the concentration of the donor, acceptor, or net dopant. In this specification, atoms / cm³ is used to express concentration per unit volume. 3 or / cm 3 This unit is used to indicate donor concentration, acceptor concentration, or chemical concentration within a semiconductor substrate. The "atoms" symbol can also be omitted.

[0054] The carrier concentration measured by the SR method can be lower than the donor or acceptor concentration. During the measurement of extended resistance, within the current flow range, the carrier mobility of the semiconductor substrate is sometimes lower than that in the crystalline state. This decrease in carrier mobility is due to carrier scattering caused by crystal structure disorder (disorder) resulting from lattice defects, etc.

[0055] The donor or acceptor concentration calculated from the carrier concentration measured by the CV or SR method can be lower than the chemical concentration of the element representing the donor or acceptor. As an example, in silicon semiconductors, the donor concentration of phosphorus or arsenic (which acts as a donor), or the acceptor concentration of boron (the element boron) (which acts as an acceptor), is approximately 99% of the chemical concentration of these elements. On the other hand, in silicon semiconductors, the donor concentration of hydrogen (which acts as a donor) is on the order of 0.1% to 10% of the chemical concentration of hydrogen. The concentrations in this specification can be values ​​at room temperature. As an example, the room temperature values ​​can be those at 300 K (Kelvin) (approximately 26.9°C).

[0056] Figure 1 This is a top view showing an example of a semiconductor device 100. Figure 1 The image shows the positions obtained by projecting each component onto the upper surface of the semiconductor substrate 10. Figure 1 The image shows only a portion of the components of the semiconductor device 100, and some components are omitted.

[0057] The semiconductor device 100 includes a semiconductor substrate 10. The semiconductor substrate 10 is a substrate formed of a semiconductor material. As an example, the semiconductor substrate 10 is a silicon substrate, but the material of the semiconductor substrate 10 is not limited to silicon.

[0058] When viewed from above, the semiconductor substrate 10 has end edges 162. In this specification, "viewing from above" means viewing from the top surface of the semiconductor substrate 10. In this example, the semiconductor substrate 10 has two sets of end edges 162 facing each other when viewed from above. Figure 1 In the diagram, the X and Y axes are parallel to one end edge 162. Additionally, the Z axis is perpendicular to the upper surface of the semiconductor substrate 10.

[0059] An active portion 160 is provided on the semiconductor substrate 10. The active portion 160 is a region in which the main current flows between the upper and lower surfaces of the semiconductor substrate 10 when the semiconductor device 100 is operating. Figure 1 The case where an emission electrode is provided above the active part 160 is omitted.

[0060] At least one of a transistor section 70 and a diode section 80 is provided in the active section 160. The transistor section 70 includes transistor elements such as IGBTs, and the diode section 80 includes diode elements such as freewheeling diodes (FWDs). Figure 1 In one example, the transistor section 70 and the diode section 80 are alternately arranged along a predetermined alignment direction (the X-axis direction in this example) on the upper surface of the semiconductor substrate 10. In another example, the active section 160 may contain only one of the transistor section 70 and the diode section 80.

[0061] exist Figure 1 In this specification, the area where the transistor section 70 is arranged is marked with the symbol "I", and the area where the diode section 80 is arranged is marked with the symbol "F". In this specification, the direction perpendicular to the arrangement direction when viewed from above is sometimes referred to as the extension direction (in...). Figure 1 (The middle direction is the Y-axis direction). The transistor section 70 and the diode section 80 may each have a long side in the extending direction. That is, the length of the transistor section 70 in the Y-axis direction is greater than its width in the X-axis direction. Similarly, the length of the diode section 80 in the Y-axis direction is greater than its width in the X-axis direction. The extending directions of the transistor section 70 and the diode section 80 may be the same as the long side direction of each trench section described later.

[0062] The diode section 80 has an N+ type cathode region in the area contacting the lower surface of the semiconductor substrate 10. In this specification, the area where the cathode region is provided is referred to as the diode section 80. That is, the diode section 80 is the area that overlaps with the cathode region when viewed from above. On the lower surface of the semiconductor substrate 10, a P+ type collector region may be provided in an area other than the cathode region. In this specification, sometimes an extension region 81 extending the diode section 80 along the Y-axis to the gate wiring is also included within the diode section 80. A collector region is provided on the lower surface of the extension region 81.

[0063] The transistor section 70 has a P+ type collector region in the area that contacts the lower surface of the semiconductor substrate 10. In addition, the transistor section 70 has an N-type emitter region, a P-type base region, and a gate structure having a gate conductive portion and a gate insulating film periodically arranged on the upper surface side of the semiconductor substrate 10.

[0064] The semiconductor device 100 may have one or more pads above the semiconductor substrate 10. In this example, the semiconductor device 100 has a gate pad 164. The semiconductor device 100 may also have pads such as anode pads, cathode pads, and current sensing pads. Each pad is located near the edge 162. "Near the edge 162" refers to the area between the edge 162 and the emitter electrode when viewed from above. When mounting the semiconductor device 100, each pad can be connected to an external circuit via wiring such as wires.

[0065] A gate potential is applied to the gate pad 164. The gate pad 164 is electrically connected to the conductive portion of the gate trench portion of the active portion 160. The semiconductor device 100 includes gate wiring connecting the gate pad 164 and the gate trench portion. Figure 1 In the diagram, the gate wiring is marked with a shading line.

[0066] The gate wiring in this example includes a peripheral gate wiring 130 and an active-side gate wiring 131. In top view, the peripheral gate wiring 130 is disposed between the active portion 160 and the end edge 162 of the semiconductor substrate 10. In top view, the peripheral gate wiring 130 in this example surrounds the active portion 160. Alternatively, the area surrounded by the peripheral gate wiring 130 in top view can also be considered as the active portion 160. Furthermore, the peripheral gate wiring 130 is connected to the gate pad 164. The peripheral gate wiring 130 is disposed above the semiconductor substrate 10. The peripheral gate wiring 130 can be a metal wiring containing aluminum or the like.

[0067] An active-side gate wiring 131 is provided in the active portion 160. By providing the active-side gate wiring 131 in the active portion 160, the variation in wiring length from the gate pad 164 to each region of the semiconductor substrate 10 can be reduced.

[0068] The active-side gate wiring 131 is connected to the gate trench portion of the active portion 160. The active-side gate wiring 131 is disposed above the semiconductor substrate 10. The active-side gate wiring 131 can be a wiring formed from a semiconductor such as polysilicon doped with impurities.

[0069] The active-side gate wiring 131 can be connected to the outer peripheral gate wiring 130. In this example, the active-side gate wiring 131 is configured to extend from one side of the outer peripheral gate wiring 130 to the other side of the outer peripheral gate wiring 130 in the X-axis direction, approximately at the center in the Y-axis direction, in a manner that traverses the active portion 160. When the active portion 160 is divided by the active-side gate wiring 131, transistor portions 70 and diode portions 80 can be alternately arranged in the X-axis direction in each divided region.

[0070] Additionally, the semiconductor device 100 may include a temperature sensing unit (not shown) and / or a current sensing unit (not shown), wherein the temperature sensing unit is a PN junction diode formed of polysilicon or the like, and the current sensing unit simulates the operation of the transistor unit provided in the active unit 160.

[0071] Viewed from above, the semiconductor device 100 of this example has an edge termination structure 90 between the active portion 160 and the edge 162. The edge termination structure 90 is disposed between the peripheral gate wiring 130 and the edge 162. The edge termination structure 90 mitigates electric field concentration on the upper surface side of the semiconductor substrate 10. The edge termination structure 90 may include at least one of a protective ring arranged in an annular shape surrounding the active portion 60, a field plate, and a surface field reducer (RESURF).

[0072] Figure 2 yes Figure 1An enlarged view of region D is shown. Region D includes the transistor section 70, the diode section 80, and the active-side gate wiring 131. The semiconductor device 100 of this example includes a gate trench section 40, a dummy trench section 30, a well region 11, an emitter region 12, a base region 14, and a contact region 15 disposed inside the upper surface side of the semiconductor substrate 10. The gate trench section 40 and the dummy trench section 30 are examples of trench sections. Furthermore, the semiconductor device 100 of this example includes an emitter electrode 52 and an active-side gate wiring 131 disposed above the upper surface of the semiconductor substrate 10. The emitter electrode 52 and the active-side gate wiring 131 are disposed separately from each other.

[0073] Although an interlayer insulating film is provided between the emitter electrode 52 and the active-side gate wiring 131 and the upper surface of the semiconductor substrate 10, Figure 2 (Omitted). In this example, the interlayer insulating film has contact holes 54 provided through it. Figure 2 In the middle, each contact hole 54 is marked with a shading line.

[0074] The emitter electrode 52 is disposed above the gate trench portion 40, the dummy trench portion 30, the well region 11, the emitter region 12, the base region 14, and the contact region 15. The emitter electrode 52 contacts the emitter region 12, the contact region 15, and the base region 14 on the upper surface of the semiconductor substrate 10 through a contact hole 54. Furthermore, the emitter electrode 52 is connected to a dummy conductive portion within the dummy trench portion 30 through a contact hole provided in the interlayer insulating film. The emitter electrode 52 can be connected to the dummy conductive portion of the dummy trench portion 30 at its front end in the Y-axis direction.

[0075] The active-side gate wiring 131 is connected to the gate trench portion 40 through a contact hole provided in the interlayer insulating film. The active-side gate wiring 131 can be connected to the gate conductive portion of the gate trench portion 40 at its front end 41 in the Y-axis direction. The active-side gate wiring 131 is not connected to the dummy conductive portion within the dummy trench portion 30.

[0076] The emitting electrode 52 is formed of a material containing metal. Figure 2 The diagram shows the area where the emitter electrode 52 is disposed. For example, at least a portion of the emitter electrode 52 is formed of aluminum or an aluminum-silicon alloy, such as AlSi, AlSiCu, or other metal alloys. The emitter electrode 52 may have a barrier metal formed of titanium and / or titanium compounds beneath the region formed of aluminum or the like. Furthermore, a plug formed by embedding tungsten or the like in contact with the barrier metal and the aluminum or the like may be present within the contact hole.

[0077] The well region 11 is disposed overlapping with the active-side gate wiring 131. The well region 11 is also disposed with a predetermined width within a region that does not overlap with the active-side gate wiring 131. In this example, the well region 11 is disposed separately from the end of the contact hole 54 in the Y-axis direction on the active-side gate wiring 131 side. The well region 11 is a region of a second conductivity type with a higher doping concentration than the base region 14. In this example, the base region 14 is P-type, and the well region 11 is P+ type.

[0078] Each of the transistor section 70 and the diode section 80 has a plurality of trench sections arranged in the arrangement direction. In the transistor section 70 of this example, one or more gate trench sections 40 and one or more dummy trench sections 30 are alternately provided along the arrangement direction. In the diode section 80 of this example, a plurality of dummy trench sections 30 are provided along the arrangement direction. In the diode section 80 of this example, no gate trench section 40 is provided.

[0079] In this example, the gate trench portion 40 may have two straight portions 39 (the trench portions that are straight along the extension direction) extending in an extension direction perpendicular to the arrangement direction and a front end portion 41 connecting the two straight portions 39. Figure 2 The extension direction in the middle is the Y-axis direction.

[0080] At least a portion of the front end portion 41 is preferably configured to be curved when viewed from above. By connecting the ends of the two straight portions 39 in the Y-axis direction to each other with the front end portion 41, the electric field concentration at the ends of the straight portions 39 can be mitigated.

[0081] In the transistor section 70, dummy trench sections 30 are provided between each straight section 39 of the gate trench section 40. One dummy trench section 30 may be provided between each straight section 39, or multiple dummy trench sections 30 may be provided. The dummy trench section 30 may have a straight shape extending in the extending direction, or it may have a straight section 29 and a front end portion 31, similar to the gate trench section 40. Figure 2 The semiconductor device 100 shown includes both a dummy trench portion 30 with a straight line shape and without a front end portion 31, and a dummy trench portion 30 with a front end portion 31. The direction in which the straight line portion 39 of the gate trench portion 40 or the straight line portion 29 of the dummy trench portion 30 extends longitudinally along the extension direction is defined as the long side direction of the trench portion. The long side direction of the gate trench portion 40 or the dummy trench portion 30 may be consistent with the extension direction. In this example, the extension direction and the long side direction are the Y-axis direction. The arrangement direction of the plurality of gate trench portions 40 or dummy trench portions 30 is defined as the short side direction of the trench portion. The short side direction may be consistent with the arrangement direction. Alternatively, the short side direction may be perpendicular to the long side direction. In this example, the long side direction and the short side direction are perpendicular. In this example, the arrangement direction and the short side direction are the X-axis direction.

[0082] The diffusion depth of the well region 11 can be deeper than the depths of the gate trench portion 40 and the dummy trench portion 30. In a top view, the ends of the gate trench portion 40 and the dummy trench portion 30 in the Y-axis direction are located in the well region 11. That is, at the ends of each trench portion in the Y-axis direction, the bottom of each trench portion in the depth direction is covered by the well region 11. This mitigates the electric field concentration at the bottom of each trench portion.

[0083] In the arrangement direction, mesa portions are provided between each trench portion. A mesa portion refers to the area within the semiconductor substrate 10 that is sandwiched between the trench portions. As an example, the upper end of the mesa portion is the upper surface of the semiconductor substrate 10. The depth of the lower end of the mesa portion is the same as the depth of the lower end of the trench portion. In this example, the mesa portion is provided extending along the trench in the extension direction (Y-axis direction) on the upper surface of the semiconductor substrate 10. In this example, a mesa portion 60 is provided in the transistor portion 70, and a mesa portion 61 is provided in the diode portion 80. When simply referred to as a mesa portion in this specification, it refers to each of mesa portion 60 and mesa portion 61.

[0084] A base region 14 is provided on each mesa. The area of ​​the base region 14 exposed on the upper surface of the semiconductor substrate 10, closest to the active-side gate wiring 131, is designated as base region 14-e. Figure 2 The diagram shows a base region 14-e disposed at one end in the extending direction of each isthmus, but a base region 14-e is also disposed at the other end of each isthmus. In each isthmus, the area sandwiched between the base regions 14-e when viewed from above can be provided with at least one of a first conductivity type emitter region 12 and a second conductivity type contact region 15. In this example, the emitter region 12 is N+ type, and the contact region 15 is P+ type. The emitter region 12 and the contact region 15 can be disposed in the depth direction between the base region 14 and the upper surface of the semiconductor substrate 10.

[0085] The mesa portion 60 of the transistor portion 70 has an emitter region 12 exposed on the upper surface of the semiconductor substrate 10. The emitter region 12 is disposed in contact with the gate trench portion 40. The mesa portion 60 in contact with the gate trench portion 40 may be provided with a contact region 15 exposed on the upper surface of the semiconductor substrate 10.

[0086] Each of the contact area 15 and the emission area 12 on the platform 60 is provided from one groove portion to another in the X-axis direction. As an example, the contact area 15 and the emission area 12 of the platform 60 are alternately arranged along the extension direction of the groove portion (Y-axis direction).

[0087] In another example, the contact area 15 and the emission area 12 of the platform 60 can also be configured as stripes along the extension direction (Y-axis direction) of the groove. For example, the emission area 12 is provided in the area that contacts the groove, and the contact area 15 is provided in the area sandwiched between the emission areas 12.

[0088] The emitter region 12 is not provided on the mesa 61 of the diode section 80. A base region 14 and a contact region 15 may be provided on the upper surface of the mesa 61. A contact region 15 may be provided on the upper surface of the mesa 61 in contact with each of the base regions 14-e, within the area sandwiched between them. A base region 14 may be provided on the upper surface of the mesa 61 within the area sandwiched between the contact regions 15. The base region 14 may be configured throughout the entire area sandwiched between the contact regions 15.

[0089] Contact holes 54 are provided above each mesa surface. The contact holes 54 are located in the region sandwiched between base regions 14-e. In this example, the contact holes 54 are located above each region of contact region 15, base region 14, and emitter region 12. The contact holes 54 are not located in the regions corresponding to base regions 14-e and sink region 11. The contact holes 54 can be located at the center of the mesa surface 60 in the arrangement direction (X-axis direction).

[0090] In the diode section 80, an N+ type cathode region 82 is provided in a region adjacent to the lower surface of the semiconductor substrate 10. A P+ type collector region 22 can be provided in a region on the lower surface of the semiconductor substrate 10 where the cathode region 82 is not provided. The cathode region 82 and the collector region 22 are provided between the lower surface 23 of the semiconductor substrate 10 and the buffer zone 20. Figure 2 In the diagram, the boundary between the cathode region 82 and the collector region 22 is represented by a dashed line.

[0091] The cathode region 82 is disposed separately from the well region 11 in the Y-axis direction. This ensures a sufficient distance between the cathode region 82 and the deeper, more heavily doped P-type region (well region 11), thereby improving breakdown voltage. In this example, the end of the cathode region 82 in the Y-axis direction is disposed further from the well region 11 than the end of the contact hole 54 in the Y-axis direction. In another example, the end of the cathode region 82 in the Y-axis direction may also be disposed between the well region 11 and the contact hole 54.

[0092] Figure 3 It is shown Figure 2 A diagram showing an example of the ee section. The ee section is the XZ plane passing through the emitter region 12 and the cathode region 82. In this example, the semiconductor device 100 has a semiconductor substrate 10, an interlayer insulating film 38, an emitter electrode 52, and a collector electrode 24 in this section.

[0093] An interlayer insulating film 38 is disposed on the upper surface of the semiconductor substrate 10. The interlayer insulating film 38 is a film comprising at least one layer of an insulating film such as silicate glass containing impurities such as boron or phosphorus, a thermal oxide film, and other insulating films. The interlayer insulating film 38 has... Figure 2 Contact hole 54 as described in the diagram.

[0094] The emitter electrode 52 is disposed above the interlayer insulating film 38. The emitter electrode 52 contacts the upper surface 21 of the semiconductor substrate 10 through the contact hole 54 of the interlayer insulating film 38. The collector electrode 24 is disposed on the lower surface 23 of the semiconductor substrate 10. The emitter electrode 52 and the collector electrode 24 are formed of a metallic material such as aluminum. In this specification, the direction (Z-axis direction) in which the emitter electrode 52 and the collector electrode 24 are connected is referred to as the depth direction.

[0095] The semiconductor substrate 10 has an N-type or N-type drift region 18. The drift region 18 is provided in each of the transistor section 70 and the diode section 80.

[0096] On the mesa 60 of the transistor section 70, an N+ type emitter region 12 and a P- type base region 14 are sequentially disposed from the upper surface 21 side of the semiconductor substrate 10. A drift region 18 is disposed below the base region 14. An N+ type careter dam region 16 may also be disposed on the mesa 60. The careter dam region 16 is disposed between the base region 14 and the drift region 18.

[0097] The emitter region 12 is exposed on the upper surface 21 of the semiconductor substrate 10 and is disposed in contact with the gate trench portion 40. The emitter region 12 may contact the trench portions on both sides of the mesa portion 60. The doping concentration of the emitter region 12 is higher than that of the drift region 18.

[0098] The base region 14 is disposed below the launch region 12. In this example, the base region 14 is disposed in contact with the launch region 12. The base region 14 can contact the groove portions on both sides of the platform surface 60.

[0099] Carrier dam region 16 is disposed below base region 14. Carrier dam region 16 is an N+ type region with a higher doping concentration than drift region 18. Carrier dam region 16 may have concentration peaks of donors such as phosphorus or hydrogen donors. By setting a high-concentration carrier dam region 16 between drift region 18 and base region 14, the carrier injection promotion effect (IE effect) can be improved, thereby reducing the turn-on voltage. Carrier dam region 16 may be configured to cover the entire lower surface of base region 14 at each mesa 60.

[0100] A P-type base region 14 is disposed in contact with the upper surface 21 of the semiconductor substrate 10 on the mesa 61 of the diode section 80. A drift region 18 is disposed below the base region 14. A carrier dam region 16 may also be disposed in the mesa 61 below the base region 14.

[0101] In each of the transistor section 70 and the diode section 80, an N+ type buffer 20 may be disposed below the drift region 18. The doping concentration of the buffer 20 is higher than that of the drift region 18. The buffer 20 has a concentration peak 25 with a doping concentration higher than that of the drift region 18. The doping concentration of the concentration peak 25 refers to the doping concentration at the apex of the concentration peak 25. Alternatively, the doping concentration of the drift region 18 may be the average doping concentration in a region where the doping concentration distribution is almost flat.

[0102] In this example, the buffer 20 has three or more concentration peaks 25 in the depth direction (Z-axis direction) of the semiconductor substrate 10. The concentration peaks 25 of the buffer 20 can be set at the same depth position as, for example, the concentration peaks of hydrogen (proton) or phosphorus. The buffer 20 can serve as a field cutoff layer to prevent the depletion layer extending from the lower end of the base region 14 from reaching the P+ type collector region 22 and the N+ type cathode region 82. In this specification, the depth position of the upper end of the buffer 20 is set as Zf. The depth position Zf can be a position where the doping concentration becomes higher than the doping concentration of the drift region 18.

[0103] In the transistor section 70, a P+ type collector region 22 is disposed below the buffer 20. The acceptor concentration in the collector region 22 is higher than that in the base region 14. The collector region 22 may include the same acceptors as the base region 14, or it may include acceptors different from those in the base region 14. The acceptor in the collector region 22 is, for example, boron.

[0104] In the diode section 80, an N+ type cathode region 82 is disposed below the buffer zone 20. The donor concentration in the cathode region 82 is higher than that in the drift region 18. The donors in the cathode region 82 are, for example, hydrogen or phosphorus. It should be noted that the elements that become donors and acceptors in each region are not limited to the examples described above. The collector region 22 and the cathode region 82 are exposed on the lower surface 23 of the semiconductor substrate 10 and are connected to the collector electrode 24. The collector electrode 24 can contact the entire lower surface 23 of the semiconductor substrate 10. The emitter electrode 52 and the collector electrode 24 are formed of a metallic material such as aluminum.

[0105] One or more gate trenches 40 and one or more dummy trenches 30 are provided on the upper surface 21 side of the semiconductor substrate 10. Each trench extends from the upper surface 21 of the semiconductor substrate 10 through the base region 14 to reach the drift region 18. In regions where at least one of the emitter region 12, contact region 15, and carrier dam region 16 is provided, each trench also extends through these doped regions to reach the drift region 18. The trenches extending through the doped regions are not limited to being formed in a sequence after the formation of the doped regions. Forming doped regions between the trenches after the formation of the trenches also includes the case where the trenches extend through the doped regions.

[0106] As described above, the transistor section 70 is provided with a gate trench section 40 and a dummy trench section 30. The diode section 80 is provided with a dummy trench section 30 but not with a gate trench section 40. In this example, the boundary between the diode section 80 and the transistor section 70 in the X-axis direction is the boundary between the cathode region 82 and the collector region 22.

[0107] The gate trench portion 40 has a gate trench disposed on the upper surface 21 of the semiconductor substrate 10, a gate insulating film 42, and a gate conductive portion 44. The gate insulating film 42 is disposed to cover the inner wall of the gate trench. The gate insulating film 42 can be formed by oxidizing or nitriding the semiconductor on the inner wall of the gate trench. The gate conductive portion 44 is disposed inside the gate trench at a position further inward than the gate insulating film 42. That is, the gate insulating film 42 insulates the gate conductive portion 44 from the semiconductor substrate 10. The gate conductive portion 44 is formed of a conductive material such as polysilicon.

[0108] The gate conductive portion 44 may be configured to be longer than the base region 14 in the depth direction. The gate trench portion 40 in this cross section is covered by an interlayer insulating film 38 on the upper surface 21 of the semiconductor substrate 10. The gate conductive portion 44 is electrically connected to the gate wiring. If a predetermined gate voltage is applied to the gate conductive portion 44, a channel formed by an electron inversion layer is formed on the surface layer of the interface in the base region 14 that contacts the gate trench portion 40.

[0109] The dummy trench portion 30 can have the same structure as the gate trench portion 40 in this cross-section. The dummy trench portion 30 has a dummy trench disposed on the upper surface 21 of the semiconductor substrate 10, a dummy insulating film 32, and a dummy conductive portion 34. The dummy conductive portion 34 is electrically connected to the emitter electrode 52. The dummy insulating film 32 is disposed to cover the inner wall of the dummy trench. The dummy conductive portion 34 is disposed inside the dummy trench and is located closer to the inner side than the dummy insulating film 32. The dummy insulating film 32 insulates the dummy conductive portion 34 from the semiconductor substrate 10. The dummy conductive portion 34 can be formed of the same material as the gate conductive portion 44. For example, the dummy conductive portion 34 is formed of a conductive material such as polysilicon. The dummy conductive portion 34 can have the same length in the depth direction as the gate conductive portion 44.

[0110] In this example, the gate trench portion 40 and the dummy trench portion 30 are covered by an interlayer insulating film 38 on the upper surface 21 of the semiconductor substrate 10. It should be noted that the bottom of the dummy trench portion 30 and the gate trench portion 40 can be a downwardly convex curved surface (curved in cross-section). In this specification, the depth of the lower end of the gate trench portion 40 is defined as Zt.

[0111] A first region 270 is provided on at least a portion of the platform surface (in this example, a portion of platform surface 60). The first region 270 is a region where the hydrogen chemical concentration distribution in the depth direction exhibits a concentration peak. That is, the first region 270 is a region where the hydrogen chemical concentration is higher than that of other regions in the platform surface 60. Figure 3 In this configuration, the depth position where the concentration peak is located is designated as the first depth position Z1. The first depth position Z1 is located closer to the upper side than the lower end position Zt of the gate trench portion 40. The first depth position Z1 can be located closer to the upper side than the lower end of the base region 14.

[0112] The first region 270 can be formed, for example, by selectively implanting hydrogen from the upper surface 21 of the semiconductor substrate 10. By heat-treating the semiconductor substrate 10, the hydrogen implanted into the first region 270 diffuses to the boundary between the gate trench portion 40 and the base region 14. This allows the recombination centers at the boundary to be sealed with hydrogen. This boundary functions as the channel of the transistor portion 70. Therefore, if the concentration of recombination centers at this boundary varies, the threshold voltage of the transistor portion 70 may sometimes fluctuate. In this example, because the concentration of recombination centers at this boundary can be reduced, the fluctuation in the concentration of recombination centers can be reduced, and thus the fluctuation in the threshold voltage of the transistor portion 70 can be reduced.

[0113] It should be noted that when the first region 270 is located within the base region 14, the hydrogen dosage is preferably controlled to prevent the first region 270 from becoming an N-type region. The proportion of hydrogen donors formed by the implanted hydrogen is between 0.1% and 10%. The hydrogen chemical concentration at the first depth position Z1 of the first region 270 can be less than 10 times, less than 1 times, or less than 1 / 10 of the chemical concentration of the P-type dopant (e.g., boron) at that position. The hydrogen chemical concentration at the first depth position Z1 of the first region 270 can be more than 0.001 times, more than 0.01 times, more than 0.1 times, or more than 1 times the chemical concentration of the P-type dopant (e.g., boron) at that position.

[0114] A second region 260 may be provided on a portion of the table surface where the first region 270 is not provided (in this example, a portion of the table surface 61). The second region 260 is a region where the hydrogen chemical concentration at a first depth position Z1 is lower than that of the first region 270. The hydrogen chemical concentration of each region may be the hydrogen chemical concentration at the center of the width direction of the table surface. The hydrogen concentration of the second region 260 may be the same as, or higher than, the hydrogen concentration of other regions in the table surface 61 where the second region 260 is provided, excluding the first region 270. As an example, the other regions besides the first region 270 are drift regions 18. The second region 260 may be a portion of the base region 14. The second region 260 may be provided on the table surface 60 or table surface 61 that contacts and is sandwiched in each of the two adjacent dummy groove portions 30.

[0115] In this example, the first region 270 is provided on at least a portion of the mesa 60 of the transistor section 70. In this example, the second region 260 is provided on each mesa 61 of the diode section 80. The second region 260 may also be provided on one or more mesa 60s of the transistor section 70 closest to the diode section 80. The first region 270 may be provided on the mesa 60 that contacts the gate trench section 40, and the second region 260 may be provided on the mesa 60 that does not contact the gate trench section 40.

[0116] Figure 4 It is shown Figure 3 An example of a method for manufacturing the semiconductor device 100 shown. In this example, hydrogen ions are implanted from the upper surface 21 of the semiconductor substrate 10 to a first depth position Z1. It should be noted that before the hydrogen ion implantation, the semiconductor substrate 10 may have trenches, emitter regions 12, base regions 14, carrier dam regions 16, drift regions 18, buffer zones 20, collector regions 22, and cathode regions 82.

[0117] Additionally, an interlayer insulating film 38 can be provided before hydrogen ion implantation. The interlayer insulating film 38 functions as a mask to shield hydrogen ions. Contact holes 54 can be formed in the interlayer insulating film 38. However, contact holes 54 are not formed above the surface of the platform where the first region 270 is not formed. In the process after hydrogen ion implantation, contact holes 54 can be formed above this surface. Thus, hydrogen ions can be implanted into the first region 270, and hydrogen ions can be shielded from the second region 260. In another example, the second region 260 can also be treated with a lower dose ( / cm²) than the first region 270. 2Hydrogen ions are injected. As another example, a photoresist using photolithography can also be used as a mask to shield against hydrogen ions. The opening portion of the mask made of photoresist can be formed to be separated from the inversion layer channel formation region of the gate trench portion 40 when viewed from above.

[0118] After hydrogen ion implantation, the semiconductor substrate 10 is heat-treated. During the heat treatment stage, the semiconductor substrate 10 is heat-treated to allow the hydrogen implanted into the first region 270 to diffuse to the boundary between the base region 14 and the gate trench portion 40. As a result, the concentration of recombination centers at this boundary is reduced. Therefore, the threshold voltage of the semiconductor device 100 can be adjusted.

[0119] Figure 5 The diagram schematically illustrates a platform 60 with a first region 270 and the hydrogen chemical concentration distribution in the X-axis and Z-axis directions. The hydrogen chemical concentration distribution in the X-axis direction is the distribution at the first depth position Z1 of the platform 60. The hydrogen chemical concentration distribution in the Z-axis direction is the distribution at the center position Xc of the platform 60 in the X-axis direction. As described above, at the first depth position Z1, the hydrogen chemical concentration distribution in the Z-axis direction exhibits a concentration peak Zh. Each concentration distribution represents the distribution after heat treatment. Through heat treatment, the hydrogen injected into the first depth position Z1 diffuses in all directions.

[0120] In this example, the positions where the base region 14 contacts each trench portion in the X-axis direction are designated as Xt1 and Xt2. Similarly, the positions of the two ends of the contact hole 54 in the X-axis direction are designated as Xh1 and Xh2. In this example, hydrogen ions are implanted to the first depth position Z1 through the contact hole 54. Therefore, the first region 270 is provided below the contact hole 54. The first region 270 can be the same region as the contact hole 54 in the XY plane. In cases where the hydrogen ion implantation angle is not perpendicular to the substrate 10, the first region 270 and the contact hole 54 may not be the same region in the XY plane. When using a mask formed with resist, if the mask opening is narrower than the contact hole 54, the first region 270 can be formed in a way that is narrower than the contact hole 54. The hydrogen chemical concentration distribution in the X-axis direction below the contact hole 54 can have a concentration peak 275. The concentration peak 275 can be located at the central position Xc of the mesa 60. Below the contact hole 54, the hydrogen chemical concentration at the first depth position Z1 can also be almost uniform. At this point, the peak value of the hydrogen chemical concentration distribution along the X-axis can be taken as the hydrogen chemical concentration at the central position Xc.

[0121] On the other hand, because the gate insulating film 42 is covered by the interlayer insulating film 38, hydrogen ions cannot be implanted into it. Therefore, damage to the gate insulating film 42 can be suppressed. Furthermore, the hydrogen implanted into the first region 270 diffuses through the heat treatment stage to reach positions Xt1 and Xt2. Thus, the recombination centers present at positions Xt1 and Xt2 can be capped with hydrogen. Because the concentration of recombination centers present at positions Xt1 and Xt2 is reduced, fluctuations in the recombination center concentration can also be reduced. Therefore, even if the concentration of recombination centers changes before hydrogen diffusion, fluctuations in characteristics such as the threshold voltage can be reduced.

[0122] The hydrogen chemical concentration Dht at the location Xt1 where the gate trench 40 contacts the base region 14 can be lower than the hydrogen chemical concentration Dhc at the concentration peak 275. In this example, the hydrogen chemical concentration Dht is lower than the hydrogen chemical concentration Dhc. The hydrogen chemical concentration Dht can be less than 3 / 4 of the hydrogen chemical concentration Dhc, or less than 1 / 2 of the hydrogen chemical concentration Dhc. The hydrogen chemical concentration Dht can be more than 1 / 10 of the hydrogen chemical concentration Dhc, more than 1 / 5 of the hydrogen chemical concentration Dhc, or more than 1 / 3 of the hydrogen chemical concentration Dhc. The hydrogen chemical concentration Dht can be controlled by the width of the contact hole 54 in the X-axis direction and the hydrogen ion dosage, etc. By increasing the hydrogen chemical concentration Dht, as described above, variations in characteristics such as the threshold voltage can be reduced. The length (Xh1-Xt1) by which the interlayer insulating film 38 protrudes beyond the gate trench portion 40 in the X-axis direction can be 10% or more, 20% or more, 30% or more, or 40% or more of the width (Xt2-Xt1) of the mesa portion 60 in the X-axis direction. The length (Xt2-Xh2) by which the interlayer insulating film 38 protrudes beyond the dummy trench portion 30 in the X-axis direction can be the same as the length (Xh1-Xt1) described above.

[0123] It should be noted that the position Xt2 where the dummy trench 30 contacts the base region 14 can also have the same hydrogen chemical concentration Dht as position Xt1. In another example, the hydrogen chemical concentration at position Xt2 where the dummy trench 30 contacts the base region 14 can also be different from the hydrogen chemical concentration Dht at position Xt1. Furthermore, the width of the first region 270 in the X-axis direction can be the same as the width of the contact hole 54 in the X-axis direction. Alternatively, the width of the first region 270 in the X-axis direction can be 80% or more, or 90% or more, of the width of the contact hole 54 in the X-axis direction. The width of the first region 270 in the X-axis direction can also be less than 100% of the width of the contact hole 54 in the X-axis direction.

[0124] It should be noted that, in the depth direction (towards the negative Z-axis) from the upper surface 21 of the semiconductor 10, the lower end of the lower surface 23 side of the first region 270 may be deeper than the lower end of the lower surface 23 side of the base region 14. In this case, in the depth direction, the first region 270 overlaps with the accumulation region 16 in this example. Alternatively, the upper end of the upper surface 21 side of the first region 270 may be deeper than the lower end of the lower surface 23 side of the base region 14. In this case, in the depth direction, the first region 270 overlaps with the accumulation region 16 or the drift region 18 in this example. On the other hand, the upper end of the upper surface 21 side of the first region 270 may be located closer to the upper surface 21 side than the depth position of the lower end of the lower surface 23 side of the trench portion. The trench portion may be the gate trench portion 40 or the dummy trench portion 30. The lower end of the lower surface 23 side of the first region 270 may be located closer to the upper surface 21 side than the depth position of the lower end of the lower surface 23 side of the trench portion. The upper end of the upper surface 21 side of the first region 270 can be located at a depth closer to the lower end of the lower surface 23 side of the accumulation region 16 than the upper surface 21 side. The lower end of the lower surface 23 side of the first region 270 can be located at a depth closer to the upper surface 21 side than the lower end of the lower surface 23 side of the accumulation region 16. The upper end of the upper surface 21 side of the first region 270 can be located at a depth closer to the upper surface 21 side than the lower end of the lower surface 23 side of the base region 14. The lower end of the lower surface 23 side of the first region 270 can be located at a depth closer to the upper surface 21 side than the lower end of the lower surface 23 side of the base region 14.

[0125] The first depth position Z1 of the first region 270 can be located closer to the upper surface 21 than the depth position of the lower end of the lower surface 23 of the trench portion. The trench portion can be a gate trench portion 40 or a dummy trench portion 30.

[0126] The first depth position Z1 of the first region 270 can be located closer to the lower surface 23 side than the lower end of the lower surface 23 side of the accumulation zone 16. The first depth position Z1 of the first region 270 can be located closer to the upper surface 21 side than the lower end of the lower surface 23 side of the accumulation zone 16. The first depth position Z1 of the first region 270 can be located closer to the lower surface 23 side than the upper end of the upper surface 21 side of the accumulation zone 16. The first depth position Z1 of the first region 270 can be located closer to the upper surface 21 side than the upper end of the upper surface 21 side of the accumulation zone 16.

[0127] The first depth position Z1 of the first region 270 can be located at the lower end of the lower surface 23 side of the base region 14, close to the lower surface 23 side. The first depth position Z1 of the first region 270 can be located at the lower end of the lower surface 23 side of the base region 14, close to the upper surface 21 side. The first depth position Z1 of the first region 270 can be located at the upper end of the upper surface 21 side of the base region 14, close to the lower surface 23 side. The first depth position Z1 of the first region 270 can be located at the upper end of the upper surface 21 side of the base region 14, close to the upper surface 21 side.

[0128] Figure 6 This diagram shows another structural example of a mesa 60 having a first region 270. In this example, the emitter region 12 of the mesa 60 is disposed at both ends of the mesa 60 in the X-axis direction and is not disposed at the center of the mesa 60 in the X-axis direction. The emitter region 12 is disposed in the region that contacts each trench portion. On the upper surface 21 of the semiconductor substrate 10, the base region 14 is disposed between the emitter regions 12 at both ends of the mesa 60. The structure other than the emitter region 12 and the base region 14 is similar to... Figures 1 to 5 The description is identical for any of the 60 faces.

[0129] In this example, the depth position at the lower end of the emitter region 12 is set to Ze. The emitter region 12 is a high-concentration region with a higher doping concentration than the base region 14. In this example, the emitter region 12 may have concentration peaks of donors other than hydrogen, such as phosphorus or arsenic. The first depth position Z1 in the first region 270 is positioned above the depth position Ze. As described above, the first depth position Z1 is the position where the hydrogen chemical concentration distribution in the depth direction shows a peak.

[0130] exist Figure 6 Next to the structural diagram, a distribution map of the doping concentration in section AA and the hydrogen chemical concentration in section BB is shown. Section AA corresponds to the YZ plane passing through the portion of the mesa 60 that contacts the sidewall of the gate trench 40. Section BB corresponds to the YZ plane passing through the central position of the mesa 60 in the X-axis direction. The depth at the peak position of the doping concentration of the base region 14 in section AA is defined as Zb. Depth Zb is deeper than depth Z1. Furthermore, the hydrogen chemical concentration at depth Zb of section BB can be higher or lower than the doping concentration of the base region 14 at depth Zb of section AA. In this example, the hydrogen chemical concentration at depth Zb of section BB is higher than the doping concentration of the base region 14 at depth Zb of section AA. In this case, the hydrogen chemical concentration at the peak position of the doping concentration of the base region 14 in section AA can be sufficiently increased.

[0131] In this example, the first region 270 is disposed within the base region 14 and the emitter region 12, with the base region 14 sandwiched between the emitter regions 12 located at both ends of the stage 60 along the X-axis. In this example, the hydrogen chemical distribution at the first depth position Z1 is... Figure 5 The example described herein is the same. According to this example, by allowing hydrogen to diffuse to the interface between the base region 14 and the gate trench portion 40, variations in characteristics such as the threshold voltage can be reduced. Furthermore, in Figure 6 In this example, although the first region 270 is arranged to span both the base region 14 and the emitter region 12, it can also be arranged only in the base region 14 if a resist mask narrower than the contact hole 54 is used. Furthermore, the first depth position Z1 of the first region 270 can be positioned closer to the bottom than the depth position Ze, and a portion or all of the first region 270 can also be positioned closer to the bottom than the depth position Ze. Additionally, in the depth direction (towards the negative Z-axis) from the upper surface 21 of the semiconductor substrate 10, the lower end of the lower surface 23 side of the first region 270 can be deeper than the lower end of the lower surface 23 side of the base region 14. In this case, in the depth direction, the first region 270 overlaps with the accumulation region 16 in this example. Alternatively, the upper end of the upper surface 21 side of the first region 270 can be deeper than the lower end of the lower surface 23 side of the base region 14. In this case, in the depth direction, the first region 270 overlaps with either the accumulation region 16 or the drift region 18 in this example.

[0132] On the other hand, the upper end of the upper surface 21 side of the first region 270 can be located closer to the upper surface 21 side at a depth position than the lower end of the lower surface 23 side of the trench portion. The trench portion can be a gate trench portion 40 or a dummy trench portion 30. The lower end of the lower surface 23 side of the first region 270 can be located closer to the upper surface 21 side at a depth position than the lower end of the lower surface 23 side of the trench portion. The upper end of the upper surface 21 side of the first region 270 can be located closer to the upper surface 21 side at a depth position than the lower end of the lower surface 23 side of the accumulation region 16. The lower end of the lower surface 23 side of the first region 270 can be located closer to the upper surface 21 side at a depth position than the lower end of the lower surface 23 side of the accumulation region 16. The upper end of the upper surface 21 side of the first region 270 can be located closer to the upper surface 21 side at a depth position than the lower end of the lower surface 23 side of the base region 14. The lower end of the lower surface 23 side of the first region 270 can be located at a depth position close to the upper surface 21 side of the lower end of the lower surface 23 side of the base region 14.

[0133] The first depth position Z1 of the first region 270 can be located closer to the upper surface 21 than the depth position of the lower end of the lower surface 23 of the trench portion. The trench portion can be a gate trench portion 40 or a dummy trench portion 30.

[0134] The first depth position Z1 of the first region 270 can be located closer to the lower surface 23 side than the lower end of the lower surface 23 side of the accumulation zone 16. The first depth position Z1 of the first region 270 can be located closer to the upper surface 21 side than the lower end of the lower surface 23 side of the accumulation zone 16. The first depth position Z1 of the first region 270 can be located closer to the lower surface 23 side than the upper end of the upper surface 21 side of the accumulation zone 16. The first depth position Z1 of the first region 270 can be located closer to the upper surface 21 side than the upper end of the upper surface 21 side of the accumulation zone 16.

[0135] The first depth position Z1 of the first region 270 can be located at the lower end of the lower surface 23 side of the base region 14, close to the lower surface 23 side. The first depth position Z1 of the first region 270 can be located at the lower end of the lower surface 23 side of the base region 14, close to the upper surface 21 side. The first depth position Z1 of the first region 270 can be located at the upper end of the upper surface 21 side of the base region 14, close to the lower surface 23 side. The first depth position Z1 of the first region 270 can be located at the upper end of the upper surface 21 side of the base region 14, close to the upper surface 21 side.

[0136] Figure 7 This is a diagram showing another structural example of a tabletop 60 with a first region 270. In this example, the P-type contact area 15 of the tabletop 60 is exposed on the upper surface 21 of the tabletop 60. The structure other than the contact area 15 is similar to... Figures 1 to 5 The isthmus 60 described herein is identical to any of the mesa regions 60. The contact region 15 is a high-concentration region with a higher doping concentration than the base region 14. The contact region 15 may have concentration peaks of p-type dopants such as boron. The two ends of the mesa region 60 in the X-axis direction may be identical to... Figure 6 The example also has a launching area 12. In another example, the contact area 15 can also be provided over the entire area of ​​the stage surface 60 in the X-axis direction.

[0137] In this example, the depth position at the lower end of the contact area 15 is set to Zp. The first depth position Z1 in the first region 270 is configured above the depth position Zp. The first depth position Z1 in the first region 270 can also be configured above the depth position Ze. In this example, the depth position Ze is configured above the depth position Zp.

[0138] In this example, the first region 270 is arranged to span the contact region 15 and the emission region 12. In this example, the hydrogen chemical concentration distribution at the first depth position Z1 is also similar to... Figure 5The example described herein is the same. According to this example, by allowing hydrogen to diffuse to the interface between the base region 14 and the gate trench portion 40, variations in characteristics such as the threshold voltage can also be reduced. Furthermore, in Figure 7 In this example, although the first region 270 is arranged to span both the contact region 15 and the emitter region 12, it can also be arranged only in the contact region 15 if a resist mask narrower than the contact hole 54 is used. Furthermore, the first depth position Z1 of the first region 270 can be positioned closer to or below the depth positions Ze and Zp, and a portion or all of the first region 270 can also be positioned closer to or below the depth positions Ze and Zp. Additionally, in the depth direction (towards the negative Z-axis) from the upper surface 21 of the semiconductor substrate 10, the lower end of the lower surface 23 side of the first region 270 can be deeper than the lower end of the lower surface 23 side of the base region 14. In this case, in the depth direction, the first region 270 overlaps with the accumulation region 16 in this example. Alternatively, the upper end of the upper surface 21 side of the first region 270 can be deeper than the lower end of the lower surface 23 side of the base region 14. In this case, in the depth direction, the first region 270 overlaps with either the accumulation region 16 or the drift region 18 in this example.

[0139] On the other hand, the upper end of the upper surface 21 side of the first region 270 can be located closer to the upper surface 21 side at a depth position than the lower end of the lower surface 23 side of the trench portion. The trench portion can be a gate trench portion 40 or a dummy trench portion 30. The lower end of the lower surface 23 side of the first region 270 can be located closer to the upper surface 21 side at a depth position than the lower end of the lower surface 23 side of the trench portion. The upper end of the upper surface 21 side of the first region 270 can be located closer to the upper surface 21 side at a depth position than the lower end of the lower surface 23 side of the accumulation region 16. The lower end of the lower surface 23 side of the first region 270 can be located closer to the upper surface 21 side at a depth position than the lower end of the lower surface 23 side of the accumulation region 16. The upper end of the upper surface 21 side of the first region 270 can be located closer to the upper surface 21 side at a depth position than the lower end of the lower surface 23 side of the base region 14. The lower end of the lower surface 23 side of the first region 270 can be located at a depth position close to the upper surface 21 side of the lower end of the lower surface 23 side of the base region 14.

[0140] The first depth position Z1 of the first region 270 can be located closer to the upper surface 21 than the depth position of the lower end of the lower surface 23 of the trench portion. The trench portion can be a gate trench portion 40 or a dummy trench portion 30.

[0141] The first depth position Z1 of the first region 270 can be located closer to the lower surface 23 side than the lower end of the lower surface 23 side of the accumulation zone 16. The first depth position Z1 of the first region 270 can be located closer to the upper surface 21 side than the lower end of the lower surface 23 side of the accumulation zone 16. The first depth position Z1 of the first region 270 can be located closer to the lower surface 23 side than the upper end of the upper surface 21 side of the accumulation zone 16. The first depth position Z1 of the first region 270 can be located closer to the upper surface 21 side than the upper end of the upper surface 21 side of the accumulation zone 16.

[0142] The first depth position Z1 of the first region 270 can be located at the lower end of the lower surface 23 side of the base region 14, close to the lower surface 23 side. The first depth position Z1 of the first region 270 can be located at the lower end of the lower surface 23 side of the base region 14, close to the upper surface 21 side. The first depth position Z1 of the first region 270 can be located at the upper end of the upper surface 21 side of the base region 14, close to the lower surface 23 side. The first depth position Z1 of the first region 270 can be located at the upper end of the upper surface 21 side of the base region 14, close to the upper surface 21 side.

[0143] It should be noted that, in Figures 1 to 7 The distance from the first depth position Z1 to the upper surface 21 of the semiconductor substrate 10 in the Z-axis direction, as described herein, can be 1 μm or less. By reducing this distance, damage during hydrogen ion implantation at the first depth position Z1 can be reduced. This distance can also be 0.5 μm or less. In the case of hydrogen ion implantation, a thin mask of resist or the like can be formed on the upper surface 21 of the semiconductor substrate 10 to adjust the range of the hydrogen ions.

[0144] Figure 8 This is a diagram showing another structural example of a table surface 60 having a first region 270. In this example, the table surface 60 has a grooved contact portion 55. The structure other than the grooved contact portion 55 is similar to... Figures 1 to 7 The mesa 60 described herein is identical. The trench contact 55 is a groove formed from the upper surface 21 of the semiconductor substrate 10 to the base region 14. In this example, the emitter region 12 is disposed between the base region 14 and the upper surface 21 in the mesa 60, and the trench contact 55 extends through the emitter region 12. A plug made of a metal such as tungsten can be formed inside the trench contact 55. The trench contact 55 can be positioned at the center of the mesa 60 in the X-axis direction. The interlayer insulating film 38 can cover areas where the trench contact 55 is not disposed.

[0145] The first region 270 is disposed below the trench contact portion 55. The first depth position Z1 of the first region 270 can be disposed within the base region 14. Before filling the trench contact portion 55 with a metal material such as tungsten, hydrogen ions are injected through the trench contact portion 55, thereby forming the first region 270 below the trench contact portion 55. At this time, the bottom surface of the trench contact portion 55 becomes the hydrogen ion injection surface, i.e., the upper surface 21. The depth position of the bottom surface of the trench contact portion 55 is set as Ztc. The distance between the depth position Ztc and the first depth position Z1 of the first region 270 in the Z-axis direction can be less than 1 μm or less.

[0146] exist Figure 8 Next to the structural diagram, a distribution diagram of the doping concentration in section AA and the hydrogen chemical concentration in section BB is shown. Section AA corresponds to the YZ plane passing through the portion of the mesa 60 that contacts the sidewall of the gate trench 40. Section BB corresponds to the YZ plane passing through the central position of the mesa 60 in the X-axis direction. In section AA, the depth at the peak position of the doping concentration of the base region 14 is set as Zb. Depth position Zb is shallower than depth position Z1. Moreover, depth position Z1 can be deeper than depth position Ztc. It should be noted that depth position Zb can be either shallower or deeper than depth position Ztc. In this example, depth position Zb is shallower than depth position Ztc. The hydrogen chemical concentration at depth position Z1 of section BB can be higher than the doping concentration of the base region 14 at depth position Zb of section AA. In addition, when depth position Zb is deeper than depth position Ztc, the hydrogen chemical concentration at depth position Zb of section BB can be higher than the doping concentration of the base region 14 at depth position Zb of section AA. At this time, in the AA section, the hydrogen chemical concentration at the doping concentration peak position of the base region 14 can be sufficiently increased. The hydrogen chemical concentration at the depth position Z1 of the BB section can be higher than the doping concentration of the base region 14 at the depth position Z1 of the AA section. It should be noted that, in the case where the trench contact portion 55 is conical, the first region 270 can be provided in a manner that spans the base region 14 and the emitter region 12. In addition, the contact region 15 can be provided on the sidewall and bottom of the trench contact portion 55, and the first region 270 can be provided to overlap with the contact region 15. In addition, in the depth direction (towards the negative side of the Z-axis) from the upper surface 21 of the semiconductor substrate 10, the lower end of the lower surface 23 side of the first region 270 can be deeper than the lower end of the lower surface 23 side of the base region 14. At this time, in the depth direction, in this example, the first region 270 overlaps with the accumulation region 16. Alternatively, the upper end of the upper surface 21 side of the first region 270 can be deeper than the lower end of the lower surface 23 side of the base region 14. At this point, in the depth direction, in this example, the first region 270 overlaps with the accumulation region 16 or the drift region 18.

[0147] On the other hand, the upper end of the upper surface 21 side of the first region 270 can be located closer to the upper surface 21 side at a depth position than the lower end of the lower surface 23 side of the trench portion. The trench portion can be a gate trench portion 40 or a dummy trench portion 30. The lower end of the lower surface 23 side of the first region 270 can be located closer to the upper surface 21 side at a depth position than the lower end of the lower surface 23 side of the trench portion. The upper end of the upper surface 21 side of the first region 270 can be located closer to the upper surface 21 side at a depth position than the lower end of the lower surface 23 side of the accumulation region 16. The lower end of the lower surface 23 side of the first region 270 can be located closer to the upper surface 21 side at a depth position than the lower end of the lower surface 23 side of the accumulation region 16. The upper end of the upper surface 21 side of the first region 270 can be located closer to the upper surface 21 side at a depth position than the lower end of the lower surface 23 side of the base region 14. The lower end of the lower surface 23 side of the first region 270 can be located at a depth position close to the upper surface 21 side of the lower end of the lower surface 23 side of the base region 14.

[0148] The first depth position Z1 of the first region 270 can be located closer to the upper surface 21 than the depth position of the lower end of the lower surface 23 of the trench portion. The trench portion can be a gate trench portion 40 or a dummy trench portion 30.

[0149] The first depth position Z1 of the first region 270 can be located closer to the lower surface 23 side than the lower end of the lower surface 23 side of the accumulation zone 16. The first depth position Z1 of the first region 270 can be located closer to the upper surface 21 side than the lower end of the lower surface 23 side of the accumulation zone 16. The first depth position Z1 of the first region 270 can be located closer to the lower surface 23 side than the upper end of the upper surface 21 side of the accumulation zone 16. The first depth position Z1 of the first region 270 can be located closer to the upper surface 21 side than the upper end of the upper surface 21 side of the accumulation zone 16.

[0150] The first depth position Z1 of the first region 270 can be located at the lower end of the lower surface 23 side of the base region 14, close to the lower surface 23 side. The first depth position Z1 of the first region 270 can be located at the lower end of the lower surface 23 side of the base region 14, close to the upper surface 21 side. The first depth position Z1 of the first region 270 can be located at the upper end of the upper surface 21 side of the base region 14, close to the lower surface 23 side. The first depth position Z1 of the first region 270 can be located at the upper end of the upper surface 21 side of the base region 14, close to the upper surface 21 side.

[0151] Figure 9A This is a magnified view of the platform from above, at a 60° angle. (For example...) Figure 2As described, P-type and N-type regions are alternately arranged along the Y-axis on the upper surface of the stage 60. In this example, the P-type region is the contact region 15, and the N-type region is the emission region 12. The structure of the stage 60 is similar to... Figures 1 to 8 The face 60 is identical to any of the models described in the text. For example, Figure 9A The ff section in the middle can have the same Figure 5 or Figure 8 The example shown has the same structure.

[0152] When viewed from above, the first region 270 is configured to overlap with the emitter region 12 but not with the contact region 15. The first region 270, when viewed from above, can be a region where the hydrogen chemical concentration at the first depth position Z1 is 80% or more of the peak concentration, or it can be a region where the hydrogen chemical concentration at the first depth position Z1 is 50% or more of the peak concentration. When viewed from above, the first region 270 may also contact at least one of the gate trench portion 40 and the dummy trench portion 30.

[0153] In this example, a first region 270 is selectively disposed in the base region 14 below the emitter region 12. Therefore, the total hydrogen ion dose can be reduced, and the recombination center of the base region 14, which functions as a channel, can be effectively capped. Furthermore, the first region 270 is not disposed below the contact region 15. Therefore, the increase in hydrogen donor concentration below the contact region 15 can be suppressed, and vacancy extraction via the contact region 15 and the emitter electrode 52 is not hindered.

[0154] In another example, the first region 270 may also be set up to overlap with the contact region 15. However, it is preferable that the area of ​​the first region 270 overlapping with the emission region 12 is larger than the area of ​​the first region 270 overlapping with the contact region 15.

[0155] Figure 9B This is another example of a magnified view of the platform surface at angle 60 degrees, viewed from above. Figure 9A The difference lies in that a first region 270 is provided in both the adjacent emission region 12 and contact region 15. The structure other than the first region 270 is the same as... Figure 9A The example is the same. For example, the structure of the ff section through the emission region 12 can have the same... Figure 9A The structure shown has the same cross-section as the ff section. In this example, the first region 270 can be continuously arranged across adjacent emission regions 12 and contact regions 15. The region where the first region 270 is continuously arranged can include two or more emission regions 12. The region where the first region 270 is continuously arranged can include two or more contact regions 15.

[0156] Figure 9C These are other examples of enlarged views of the tabletop 60 from a top-down perspective. In this example, tabletop 60 corresponds to... Figure 6 or Figure 7 or Figure 8 The tabletop shown is 60. Figure 9C Section ii in the middle can have the same as Figure 6 or Figure 7 or Figure 8 The example shown has the same structure.

[0157] In this example, the mesa 60 has a second conductivity type region that is separately disposed from the trench portion (gate trench portion 40 and dummy trench portion 30 in this example) on the upper surface 21 of the semiconductor substrate 10, and a first conductivity type region disposed between the trench portion and the second conductivity type region on the upper surface 21 of the semiconductor substrate 10.

[0158] The second conductivity type region is Figure 7 The contact area 15 shown is, or is Figure 6 , Figure 8 The base region 14 is shown. The second conductive region can be configured along the trench portion. That is, the second conductive region can be configured to extend with a long side in the Y-axis direction. The second conductive region can be configured to overlap with the center of the platform portion 60 in the X-axis direction.

[0159] In this example, the first conductive region is the emitting region 12. The first conductive region can be arranged along the groove portion. That is, the first conductive region can be extended in contact with the groove portion with a long side in the Y-axis direction. The first conductive region can be configured to sandwich the second conductive region in the X-axis direction. For example, the second conductive region can be arranged at the center of the platform 60 in the X-axis direction, above the ground of each groove portion, and the first conductive region can be arranged on both sides of the second conductive region in the X-axis direction.

[0160] Viewed from above, the first region 270 is arranged to overlap with the second conductive region. The arrangement of the first region 270 and... Figure 6 or Figure 7 The example is the same. In top view, the first region 270 can be configured in a manner that does not overlap with the first conductive region. The first region 270 is configured along the groove portion in the same way as the second conductive region. That is, the first region 270 can be extended in a manner having a long side in the Y-axis direction. In top view, the first region 270 can contact the first conductive region, or a portion of the first region 270 can overlap with the first conductive region.

[0161] Figure 9D It is shown Figure 9A or Figure 9B Figures show other examples of the ff section. In this example, the depth position of the first region 270 of the tabletop 60 is... Figure 5 The examples differ. Other structures are different. Figure 5The 60mm surface area described in the text is the same.

[0162] In this example, at least a portion of the first region 270 is configured at the same depth as the emission region 12. The first depth position Z1 can be configured at a depth position Ze of the lower end of the emission region 12, closer to the upper surface 21. The entire first region 270 can be configured at a depth position Ze of the lower end of the emission region 12, closer to the upper surface 21, or a portion of the first region 270 can be configured at a depth position Ze of the lower end of the emission region 12, closer to the lower surface 23.

[0163] Figure 9E It is shown Figure 9A A diagram illustrating an example of the gg section. The gg section is a section passing through the contact region 15. Compared to the structure of the mesa 60 in the ff section, the mesa 60 in the gg section has the contact region 15 instead of the emission region 12. Furthermore, the first region 270 is not configured in the contact region 15.

[0164] Figure 9F It is shown Figure 9B A diagram illustrating an example of the hh section. The hh section is a section passing through contact area 15. The difference between the hh section and the truncated section 60 in the gg section is the presence of a first region 270. The rest of the structure is the same as the gg section.

[0165] In this example, the first region 270 is provided in the contact region 15. A portion of the first region 270 can be located in the base region 14, or the entire first region 270 can be located in the contact region 15. In the hh section, it has... Figure 9F In the case of the structure shown, the ff section can have Figure 9D The structure shown. Additionally, the ff section has... Figure 5 In the case of the structure shown, at least a portion of the first region 270 in the hh section can be disposed in the base region 14. At this time, the entire first region 270 can be disposed in the base region 14, or a portion of the first region 270 can be disposed in the contact region 15.

[0166] Figure 10 It is shown Figure 2 A diagram showing another example of the ee cross-section. The semiconductor device 100 in this example has a first lower region 220 and a second lower region 210 disposed at a second depth position Z2 on the side of the upper surface 21 of the semiconductor substrate 10. The second lower region 210 is a high-concentration region where the concentration of recombination centers at the second depth position Z2 is higher than that in the first lower region 220. Figure 10In the diagram, recombination centers are schematically shown with crosses. Recombination centers can be lattice defects dominated by vacancies such as vacancies and / or double vacancies, dislocations, interstitial atoms, or transition metals, etc.

[0167] The recombination center can be formed by injecting charged particles such as hydrogen ions or helium ions into the semiconductor substrate 10 from the lower surface 23. When hydrogen ions or helium ions are injected, the acceleration energy of the ions is adjusted so that the range of the ions is at a first depth position Z1.

[0168] The second lower region 210 can be provided throughout the entire diode section 80 in the XY plane. By providing the second lower region 210 in the diode section 80, the carrier lifetime in the diode section 80 can be reduced, thereby shortening the reverse recovery time. As a result, the reverse recovery loss of the diode section 80 can be reduced.

[0169] The second lower region 210 can be configured to extend below the mesa 60 where the transistor section 70 is located. In this example, the second region 260 is located on one or more mesa 60s closest to the diode section 80.

[0170] The first lower region 220 is a region where the concentration of recombination centers is lower than that of recombination centers in the second lower region 210. At the second depth position Z2, the concentration of recombination centers in the second lower region 210 can be more than twice, more than five times, or more than ten times the concentration of recombination centers in the first lower region 220. The concentration of recombination centers in the first lower region 220 can be less than 0.1 times, less than 0.01 times, or less than 0.001 times the concentration of recombination centers in the second lower region 210. The first lower region 220 may essentially not contain recombination centers. In this case, even if the first lower region 220 contains lattice defects, the concentration of lattice defects can be the same as that in the drift region 18 other than the first lower region 220 and the second lower region 210. That is, the first lower region 220 can be a region where it is intended not to reduce carrier lifetime. By not providing recombination centers in the transistor section 70, or by providing a low concentration of recombination centers in the transistor section 70, the reverse recovery time of the diode section 80 can be shortened and the increase in leakage current in the transistor section 70 can be suppressed.

[0171] Figure 11 It is shown Figure 10This diagram illustrates an example of a method for manufacturing the semiconductor device 100. First, in a first implantation stage S1101, charged particles are implanted from the lower surface 23 to a second depth position Z2. In this example, the charged particles are hydrogen ions or helium ions, etc. It should be noted that prior to the first implantation stage S1101, trenches, emitter regions 12, base regions 14, carrier dam regions 16, drift regions 18, buffer regions 20, collector regions 22, and cathode regions 82 may be formed on the semiconductor substrate 10. In the first implantation stage S1101, recombination centers of nearly equal concentration are formed in both the first lower region 220 and the second lower region 210.

[0172] Next, in the second implantation stage S1102, hydrogen ions are implanted from the upper surface 21 into the base region 14 of each platform to form the first region 270. The second implantation stage S1102 and... Figure 4 The hydrogen ion implantation stages shown are the same. An interlayer insulating film 38 may be provided before the second implantation stage S1102.

[0173] Next, in heat treatment stage S1103, the semiconductor substrate 10 is heat-treated. In heat treatment stage S1103, the semiconductor substrate 10 is heat-treated under conditions that allow hydrogen injected into the first region 270 to diffuse into both the channel portion, which serves as the boundary between the base region 14 and the gate trench portion 40, and the first lower region 220. This reduces the concentration of recombination centers in the channel portion and the first lower region 220. Therefore, recombination centers in the second lower region 210 can be selectively retained. This allows adjustment of the threshold voltage of the transistor portion 70 and selective formation of the second lower region 210.

[0174] In this example, the first region 270 is formed in a region above a portion of the first lower region 220. However, since the hydrogen injected into the first region 270 also diffuses across the XY plane, it is possible to cap the recombination centers throughout the entire first lower region 220. In another example, the recombination center concentration in the region below the trench portion of the first lower region 220 may be higher than the recombination center concentration in the region below the platform portion 60.

[0175] It should be noted that if a gate insulating film or the like is provided on the upper surface 21 of the semiconductor substrate 10, injecting charged particles from the upper surface 21 may damage the gate insulating film and cause changes in characteristics such as the threshold voltage. In this regard, by injecting charged particles from the lower surface 23 to the second depth position Z2 of the semiconductor substrate 10, damage to the upper surface 21 of the semiconductor substrate 10 can be suppressed.

[0176] However, when charged particles are injected from the lower surface 23 to the upper surface 21, the acceleration energy of the charged particles increases. In such cases, it becomes difficult to set up a mask for photoresist or similar materials to shield the charged particles if charged particles are to be selectively injected into the XY plane. For example, the mask thickness becomes very large, making patterning difficult.

[0177] In this example, during the first injection stage S1101, charged particles are injected into the region comprising both the first lower region 220 and the second lower region 210. As a result, recombination centers are formed in both the first lower region 220 and the second lower region 210 at the same concentration. When the charged particles are helium, the chemical concentration of helium in the first lower region 220 and the second lower region 210 can be the same.

[0178] Then, in the second implantation stage S1102, hydrogen ions (e.g., protons) are implanted into the region overlapping the first lower region 220 in the Z-axis direction with a range shorter than that of charged particles. Because the range of the hydrogen ions is reduced, the damage to the implantation surface is small, and selective shielding is easy to perform. After the hydrogen ions are implanted, the semiconductor substrate 10 is heat-treated to allow the hydrogen ions to diffuse into the first lower region 220 and combine with recombination centers in the first lower region 220. As a result, the concentration of recombination centers in the first lower region 220 can be lower than the concentration of recombination centers in the second lower region 210. The recombination center concentration at the second depth position Z2 of the first lower region 220 can be less than 1 / 2, less than 1 / 5, less than 1 / 10, or less than 1 / 100 of the recombination center concentration at the second depth position Z2 of the second lower region 210.

[0179] It should be noted that the concentration of recombination centers can be determined by comparing the carrier lifetimes. A shorter carrier lifetime can be considered as a higher concentration of recombination centers. In this specification, when "the recombination center concentration is N times" is specified, it can also be expressed as "the carrier lifetime is 1 / N times".

[0180] In this example, hydrogen diffuses into the first lower region 220, and hardly diffuses into the second lower region 210. Therefore, the hydrogen chemical concentration at the second depth position Z2 of the first lower region 220 is higher than the hydrogen chemical concentration at the second depth position Z2 of the second lower region 210. The hydrogen chemical concentration at the second depth position Z2 of the first lower region 220 can be more than 10 times, more than 100 times, or more than 1000 times that of the second depth position Z2 of the second lower region 210. The hydrogen chemical concentration at the second depth position Z2 of the second lower region 210 can also be 0.

[0181] Furthermore, the hydrogen chemical concentration at the first depth position Z1 of the first region 270 is higher than the hydrogen chemical concentration at the first depth position Z1 of the second region 260. The hydrogen chemical concentration at the first depth position Z1 of the first region 270 can be more than 10 times, more than 100 times, more than 1000 times, or even less than 10... 10 More than twice. The hydrogen chemical concentration at the first depth position Z1 in the second region 260 can also be 0.

[0182] While the present invention has been described above using embodiments, its technical scope is not limited to that described in the above embodiments. It will be apparent to those skilled in the art that various modifications or improvements can be added to the above embodiments. As can be seen from the claims, such modifications or improvements can also be included within the technical scope of the present invention.

[0183] It should be noted that the execution order of actions, processes, steps, and stages in the apparatus, system, program, and method shown in the claims, specification, and drawings can be implemented in any order, unless specifically stated as "earlier than" or "before," and the results of previous processes are not used in subsequent processes. Even if the flow of actions in the claims, specification, and drawings is described using terms such as "firstly" or "next" for convenience, it does not mean that they must be implemented in that order.

Claims

1. A semiconductor device, characterized by comprising: Possessing: a semiconductor substrate having an upper surface and a lower surface and provided with a drift region of a first conductivity type; trench portions provided in a manner reaching the drift region from the upper surface of the semiconductor substrate; and mesa portions sandwiched between the trench portions, the mesa portions having: a base region of a second conductivity type provided between the drift region and the upper surface; and a first region having a concentration peak of a hydrogen chemical concentration at a first depth position within the mesa portion, at the first depth position, a hydrogen chemical concentration of a portion of the base region in contact with the trench portion is 1 / 10 or more of a hydrogen chemical concentration of the concentration peak of the first region.

2. A semiconductor device, characterized by comprising: Possessing: a semiconductor substrate having an upper surface and a lower surface and provided with a drift region of a first conductivity type; trench portions provided in a manner reaching the drift region from the upper surface of the semiconductor substrate; and mesa portions sandwiched between the trench portions, the mesa portions having: a base region of a second conductivity type provided between the drift region and the upper surface; and a first region having a concentration peak of a hydrogen chemical concentration at a first depth position within the mesa portion, at the first depth position, a recombination center at a boundary of the base region and the trench portion is capped by hydrogen.

3. A semiconductor device, characterized by comprising: Possessing: a semiconductor substrate having an upper surface and a lower surface and provided with a drift region of a first conductivity type; trench portions provided in a manner reaching the drift region from the upper surface of the semiconductor substrate; and mesa portions sandwiched between the trench portions, the mesa portions having: a base region of a second conductivity type provided between the drift region and the upper surface; and a first region having a concentration peak of a hydrogen chemical concentration at a first depth position within the mesa portion, the mesa portions having a high concentration region disposed between the drift region and the upper surface of the semiconductor substrate and having a higher doping concentration than the base region, the first depth position is disposed at a position shallower than a lower end of the high concentration region, at the first depth position, a hydrogen chemical concentration of a portion of the base region in contact with the trench portion is 1 / 10 or more of a hydrogen chemical concentration of the concentration peak of the first region.

4. A semiconductor device, characterized by comprising: Possessing: a semiconductor substrate having an upper surface and a lower surface and provided with a drift region of a first conductivity type; trench portions provided in a manner reaching the drift region from the upper surface of the semiconductor substrate; and mesa portions sandwiched between the trench portions, the mesa portions having: a base region of a second conductivity type provided between the drift region and the upper surface; and a first region having a concentration peak of a hydrogen chemical concentration at a first depth position within the mesa portion, the mesa portions having a high concentration region disposed between the drift region and the upper surface of the semiconductor substrate and having a higher doping concentration than the base region, the first depth position is disposed at a position shallower than a lower end of the high concentration region, at the first depth position, a recombination center at a boundary of the base region and the trench portion is capped by hydrogen.

5. The semiconductor device according to any one of claims 1 to 4, wherein the semiconductor device further comprises an interlayer insulating film covering the upper surface of the semiconductor substrate, the interlayer insulating film has a contact hole exposing the upper surface of the semiconductor substrate, in plan view, the first region is disposed at a position overlapping the contact hole, the hydrogen chemical concentration at the first depth position continuously decreases from the hydrogen chemical concentration at a position corresponding to an end portion of the contact hole up to a side wall of the trench portion.

6. The semiconductor device according to any one of claims 1 to 4, wherein the first depth position is a position closer to the upper side than a lower end of the base region.

7. The semiconductor device according to any one of claims 1 to 4, wherein the hydrogen chemical concentration at the first depth position of a center in a width direction of the mesa portion is higher than the hydrogen chemical concentration at the first depth position of a region in contact with the trench portion.

8. The semiconductor device according to any one of claims 1 to 4, wherein the semiconductor device has a second region disposed at a mesa portion different from the mesa portion in which the first region is disposed, and the hydrogen chemical concentration at the first depth position is lower than the hydrogen chemical concentration at the first depth position of the first region.

9. The semiconductor device according to claim 3 or 4, wherein the base region has a peak of a doping concentration at a second depth position deeper than the first depth position in an interface in contact with a side wall of the trench portion.

10. The semiconductor device according to claim 3 or 4, wherein the high concentration region is an emitter region of a first conductivity type disposed in contact with the trench portion and having a doping concentration higher than a doping concentration of the drift region.

11. The semiconductor device according to claim 9, wherein the high concentration region is an emitter region of a first conductivity type disposed in contact with the trench portion and having a doping concentration higher than a doping concentration of the drift region.

12. The semiconductor device according to claim 3 or 4, wherein the high concentration region is a contact region of a second conductivity type having a doping concentration higher than a doping concentration of the base region.

13. The semiconductor device according to claim 9, wherein the high concentration region is a contact region of a second conductivity type having a doping concentration higher than a doping concentration of the base region.

14. The semiconductor device according to any one of claims 1 to 4, wherein the semiconductor device further comprises an emitter electrode disposed above the upper surface of the semiconductor substrate, a distance of the first depth position from the upper surface of the semiconductor substrate in contact with the emitter electrode in a depth direction is 1 μm or less.

15. The semiconductor device according to any one of claims 1 to 4, wherein the semiconductor device further comprises an interlayer insulating film covering the upper surface of the semiconductor substrate, the interlayer insulating film has a contact hole exposing the upper surface of the semiconductor substrate, ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ In a plan view, the first region is disposed at a position overlapping the contact hole.

16. The semiconductor device according to any one of Claims 1 to 4, wherein the mesa portion has an emitter region of a first conductivity type, the emitter region being disposed between the drift region and the upper surface of the semiconductor substrate, and having a higher doping concentration than the base region, the semiconductor device further includes an interlayer insulating film covering the upper surface of the semiconductor substrate, the interlayer insulating film has a contact hole exposing the upper surface of the semiconductor substrate, in a plan view, the first region is disposed at a position overlapping the contact hole, the semiconductor device includes a trench contact portion disposed through the emitter region from the upper surface on the lower surface side of the contact hole, the first region is disposed at a position deeper than a bottom surface of the trench contact portion.

17. The semiconductor device according to Claim 16, wherein the base region has a peak of the doping concentration at a second depth position shallower than the first depth position in an interface in contact with a side wall of the trench portion.

18. The semiconductor device according to Claim 17, wherein a bottom surface of the trench contact portion is disposed at a third depth position in a depth direction from the upper surface toward the lower surface, the second depth position is shallower than the third depth position, the third depth position is shallower than the first depth position.

19. The semiconductor device according to claim 8, wherein the semiconductor device further includes: a transistor portion having a collector region of a second conductivity type between the drift region and the lower surface of the semiconductor substrate; and a diode portion having a cathode region of a first conductivity type between the drift region and the lower surface of the semiconductor substrate, the first region is disposed at the mesa portion of the transistor portion, the second region is disposed at the mesa portion of the diode portion.

20. The semiconductor device according to claim 8, wherein the semiconductor device further includes: a first lower region disposed below the first region on the upper surface side of the semiconductor substrate; and a second lower region disposed at the same depth position as the first lower region and disposed below the second region, a concentration of recombination centers in the first lower region is lower than a concentration of recombination centers in the second lower region.

21. The semiconductor device according to any one of Claims 1 to 4, wherein the mesa portion has: a second conductivity type region disposed apart from the trench portion on an upper surface of the mesa portion; and a first conductivity type region disposed between the trench portion and the second conductivity type region on the upper surface of the mesa portion, and in contact with the trench portion, in a plan view, the first region is disposed overlapping the second conductivity type region.

22. The semiconductor device according to claim 21, wherein the semiconductor device further includes: a transistor portion having a collector region of a second conductivity type between the drift region and the lower surface of the semiconductor substrate; and a diode portion having a cathode region of a first conductivity type between the drift region and the lower surface of the semiconductor substrate, the first region is disposed at the mesa portion of the transistor portion.

23. A semiconductor device, comprising: includes: A semiconductor device includes: a semiconductor substrate having an upper surface and a lower surface and provided with a drift region of a first conductivity type; a trench portion provided in a manner reaching the drift region from the upper surface of the semiconductor substrate; and a mesa portion sandwiched between the trench portions, the mesa portion has: a base region of a second conductivity type provided between the drift region and the upper surface; and a first region having a concentration peak of a hydrogen chemical concentration at a first depth position within the mesa portion, the semiconductor device has a second region provided in a mesa portion different from the mesa portion provided with the first region and having a hydrogen chemical concentration at the first depth position lower than the hydrogen chemical concentration of the first region at the first depth position, the semiconductor device further includes: a transistor portion having a collector region of the second conductivity type between the drift region and the lower surface of the semiconductor substrate; and a diode portion having a cathode region of the first conductivity type between the drift region and the lower surface of the semiconductor substrate, the first region is provided in the mesa portion of the transistor portion, the second region is provided in the mesa portion of the diode portion, the transistor portion has first-conductivity-type regions and second-conductivity-type regions alternately arranged along a long side direction of the trench portion on an upper surface of the mesa portion, in a plan view, the first region is arranged to overlap the first-conductivity-type regions and not to overlap the second-conductivity-type regions, at the first depth position, a hydrogen chemical concentration of a portion of the base region in contact with the trench portion is 1 / 10 or more of a hydrogen chemical concentration of the concentration peak of the first region. A semiconductor device includes: a semiconductor substrate having an upper surface and a lower surface and provided with a drift region of a first conductivity type; a trench portion provided in a manner reaching the drift region from the upper surface of the semiconductor substrate; and a mesa portion sandwiched between the trench portions, the mesa portion has: a base region of a second conductivity type provided between the drift region and the upper surface; and a first region having a concentration peak of a hydrogen chemical concentration at a first depth position within the mesa portion, the semiconductor device has a second region provided in a mesa portion different from the mesa portion provided with the first region and having a hydrogen chemical concentration at the first depth position lower than the hydrogen chemical concentration of the first region at the first depth position, the semiconductor device further includes: a transistor portion having a collector region of the second conductivity type between the drift region and the lower surface of the semiconductor substrate; and a diode portion having a cathode region of the first conductivity type between the drift region and the lower surface of the semiconductor substrate, the first region is provided in the mesa portion of the transistor portion, the second region is provided in the mesa portion of the diode portion, 24. A semiconductor device, comprising: the transistor portion has first-conductivity-type regions and second-conductivity-type regions alternately arranged along a long side direction of the trench portion on an upper surface of the mesa portion, in a plan view, the first region is arranged to overlap the first-conductivity-type regions and not to overlap the second-conductivity-type regions, at the first depth position, a hydrogen chemical concentration of a portion of the base region in contact with the trench portion is 1 / 10 or more of a hydrogen chemical concentration of the concentration peak of the first region. ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ At the first depth position, recombination centers at the boundary of the base region and the trench portion are terminated by hydrogen.

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